Girotra
Kapil Girotra, Oosterbeek NL
Patent application number | Description | Published |
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20110045268 | PROCESS FOR WOOD ACETYLATION AND PRODUCT THEREOF - A process for the acetylation of wood comprising submerging the wood in an acetylation fluid under pressure, and subsequently heating the wood under controlled conditions to initiate two distinct exothermic reactions. The process permits the simultaneous upgrading of large quantities of commercial wood sizes having a natural durability class 4 or class 5 to a unique product of durability class 1 or class 2. | 02-24-2011 |
20130295365 | PROCESS FOR WOOD ACETYLATION AND PRODUCT THEREOF - A process for the acetylation of wood comprising submerging the wood in an acetylation fluid under pressure, and subsequently heating the wood under controlled conditions to initiate two distinct exothermic reactions. The process permits the simultaneous upgrading of large quantities of commercial wood sizes having a natural durability class 4 or class 5 to a unique product of durability class 1 or class 2. | 11-07-2013 |
Kunal Girotra, Suwon-Si KR
Patent application number | Description | Published |
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20080246033 | THIN FILM TRANSISTOR, ORGANIC LIGHT EMITTING DEVICE INCLUDING THIN FILM TRANSISTOR, AND MANUFACTURING METHOD THEREOF - The present invention relates to a thin film transistor, a method thereof and an organic light emitting device including the thin film transistor. According to an embodiment of the present invention, the thin film transistor includes a substrate, a control electrode, an insulating layer, a first electrode and a second electrode, a first ohmic contact layer and a second ohmic contact layer, and a semiconductor layer. The control electrode is formed on the substrate, and the insulating layer is formed on the control electrode. The first and the second electrodes are formed on the insulating layer. The first ohmic contact layer and the second ohmic contact layer are formed on the first electrode and the second electrode. The semiconductor layer is formed on the first ohmic contact layer and the second ohmic contact layer to fill between the first and the second electrodes. | 10-09-2008 |
Kunal Satyabhushan Girotra, Gyeonggi-Do KR
Patent application number | Description | Published |
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20090098673 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A TFT array panel-including a substrate, a gate line having a gate electrode, a gate insulating layer formed on the gate line, a data line having a source electrode and a drain electrode spaced apart from the source electrode, a passivation layer formed on the data line and the drain electrode, and a pixel electrode connected to the drain electrode is provided. The TFT array panel further includes a protection layer including Si under at least one of the gate insulating layer and the passivation layer to enhance reliability. | 04-16-2009 |