Patent application number | Description | Published |
20140358730 | Systems And Methods For Optimally Ordering Recommendations - Example systems and methods for optimally ordering recommendations or search results are described. In one implementation, a method determines a set of items as search results or candidates for recommendation. Each of the items in the set is associated with a respective first parameter representative of a measure of suitability of the respective item for recommendation. The items in the set are associated with a plurality of second parameters each of which representative of a measure of similarity between a respective one of the items and another respective one of the items. The method also determines an order in which a subset of the items is to be displayed based at least in part on the representative first parameter and the representative set of second parameters associated with the items. The method further displays the subset of the items in the determined order. | 12-04-2014 |
20140358742 | Systems And Methods For Mapping In-Store Transactions To Customer Profiles - Example systems and methods for mapping in-store transactions to customer profiles are described. In one implementation, a method receives information of a plurality of customer profiles of a plurality of online customers. Each of the customer profiles includes a plurality of types of attributes associated with a respective one of the online customers. The types of attributes include a first type of attribute. The method also receives information of a plurality of in-store transactions by a plurality of in-store customers. The information of each of the in-store transactions includes the first type of attribute associated with the respective in-store customer. The method further maps, for at least one of the in-store customers, one or more of the customer profiles of online customers to the at least one of the in-store customers based at least in part on the first type of attribute. | 12-04-2014 |
20140358771 | SYSTEMS AND METHODS FOR CLUSTERING OF CUSTOMERS USING TRANSACTION PATTERNS - Example systems and methods for clustering of customers using patterns in their transactions are described. In one implementation, a method receives customer information that includes at least a plurality of customer identifications and a plurality of payment options associated with a plurality of customers. The method identifies a subset of payment options, from among the payment options, and a subset of customer identifications, from among the customer identifications, such that each payment option of the subset of payment options is associated with more than one customer identification of the subset of customer identifications. The method then classifies each customer identification of the subset of customer identifications as either of one of more than one of the customer identifications associated with a single one of the customers or one of more than one of the customer identifications associated with more than one of the customers who are related to each other. | 12-04-2014 |
Patent application number | Description | Published |
20080320432 | Disabling unused IO resources in platform-based integrated circuits - The present invention is directed to methods for disabling unused IO resources in a platform-based integrated circuit. A slice is received from a vendor. The slice includes an IO circuit unused by a customer. The IO circuit is disabled. For example, when the IO circuit is desired to be tied to a power source, a primary input/output pin of the IO circuit is shorted to a power bus of the IO circuit. When the IO circuit is desired to be tied to a ground source, a primary input/output pin of the IO circuit is shorted to a ground bus of the IO circuit. When the IO circuit is desired to be left floated, a primary input/output pin of the IO circuit is not connected to any bonding pad cell of the slice. Next, the IO circuit is removed from the customer's logic design netlist. The IO circuit is inserted in the vendor's physical design database. | 12-25-2008 |
20090160475 | Test pin reduction using package center ball grid array - An apparatus and method for reducing the number of package pins in a chip package which must be budgeted for test purposes. In one embodiment, the invention achieves this by housing test balls in the depopulated center of a package ball array. The test balls are used to test a chip package prior to connection with a printed wiring board (PWB)/printed circuit board (PCB). After tests are completed, and when the chip package is connected to a PWB/PCB, the test balls may be left electrically isolated and unconnected. In another embodiment, the test balls are located in previously unused interstitial sites in a package ball array. | 06-25-2009 |
20090283904 | FLIPCHIP BUMP PATTERNS FOR EFFICIENT I-MESH POWER DISTRIBUTION SCHEMES - Disclosed is a flipchip scheme where power and ground bumps are arranged in a striped configuration. Specifically, there are a plurality of lines of power bumps, and a plurality of lines of ground bumps. Each line of power bumps is interconnected by a mesh core power bus, and each line of ground bumps is interconnected by a mesh core ground bus. The busses are shorted across the bumps without having to use metal tab extensions. This arrangement provides that: signal routing can be provided between the lines of bumps; and/or the mesh core power busses can be provided as being wider in order to provide improved power mesh performance and/or in order to reduce or eliminate the metal required on the second top-most metal layer. | 11-19-2009 |
20090321897 | METHOD AND APPARATUS OF POWER RING POSITIONING TO MINIMIZE CROSSTALK - A method and/or an apparatus of power ring positioning to minimize crosstalk are disclosed. In one embodiment, a method includes generating an array of fingers between a power ring and a die, applying a signal wire between a bond pad of the die and a particular finger of the array of fingers, and applying a shielding wire between an adjacent bond pad and the power ring, such that the shielding wire is longer than the signal wire and does not couple to any of the array of fingers. The shielding wire may be placed between adjacent ones of the signal wire to minimize crosstalk between the adjacent ones of the signal wire. | 12-31-2009 |
20100276816 | SEPARATE PROBE AND BOND REGIONS OF AN INTEGRATED CIRCUIT - Disclosed are a system and method of separate probe and bond regions of an integrated circuit (IC). An IC, an I/O region adjacent to the core region to enable the core region, and a die metal interconnect separating a bond pad area in the I/O region from a probe pad area outside the I/O region of the IC are disclosed. The die metal interconnect may have a length that is greater than the bond pad area length and/or the probe pad area length, and a width that is less than the bond pad area width and/or the probe pad area width. An in-front staggering technique may be used at a die corner of the IC to maintain the bond pad area in the I/O region, and a side staggering technique may be used at the die corner of the IC to maintain the bond pad area in the I/O region. | 11-04-2010 |
20130154109 | METHOD OF LOWERING CAPACITANCES OF CONDUCTIVE APERTURES AND AN INTERPOSER CAPABLE OF BEING REVERSE BIASED TO ACHIEVE REDUCED CAPACITANCE - The disclosure provides an interposer with conductive paths, a three-dimensional integrated circuit (3D IC), a method of reducing capacitance associated with conductive paths in an interposer and a method of manufacturing an interposer. In one embodiment the interposer includes: (1) a semiconductor substrate that is doped with a dopant, (2) conductive paths located within said semiconductor substrate and configured to provide electrical routes therethrough and (3) an ohmic contact region located within said semiconductor substrate and configured to receive a back bias voltage. | 06-20-2013 |
20140312475 | DIE REUSE IN ELECTRICAL CIRCUITS - A die having multiple sets of contact pads, with each such set having two or more contact pads distributed over the die and electrically interconnected using a respective electrical intra-die path to enable die reuse in a manner that causes electrical inter-die buses to be relatively short in length. Each electrical intra-die path can optionally include one or more respective buffer circuits configured to reduce degradation of the various signals that are being shared by the reused dies. In some embodiments, multiple reused dies can be arranged in a linear or two-dimensional array on an interposer or on the package substrate and packaged together with one or more non-reused dies in a single integrated-circuit package. | 10-23-2014 |
Patent application number | Description | Published |
20130346258 | INTERACTIVE DIGITAL CATALOGS FOR TOUCH-SCREEN DEVICES - A computer implemented method and computer program product features “Layered UI,” which consists of multiple “layers” activated by user selection options. Another feature is identified as “Linger UI,” or “Time Delayed Layers,” which comprises information that shows up automatically when the user “lingers” on a page for a pre-programmed amount of time. Another feature is identified as “Exploding UI,” or “Bloom View,” which is used to expand into a larger graphic overlay with one or more larger images which provide the user with more in-depth and important product information. Another feature is “Dynamic Personal Catalogs” which allows a user to browse a catalog and create one more “mini-catalogs” from which the user can share or shop, based on the user's individual needs. | 12-26-2013 |
20140052580 | PRODUCT EXPLORER PAGE FOR USE WITH INTERACTIVE DIGITAL CATALOGS AND TOUCH-SCREEN DEVICES - An electronic product explorer page type, or “PXP” as defined herein, uses available retail imagery to create a patchwork grid of cells that allows for different sizes of product images, each product image being shown within a respective cell. In this way, layouts of such product images can be dynamically generated to highlight a feature product item by making cell containing the image of that feature product larger relative to other product images shown in other cells. This will work particularly well for showcasing to users various collections of related retail products and for cross category selling of retail products. The computer implemented method can also be used where the device is a non-touch screen device having a pointing device and the steps are replaced by movement of the pointing device which translates into the motion of a pointer on the display. | 02-20-2014 |
20140129932 | INTERACTIVE DIGITAL CATALOGS FOR TOUCH-SCREEN DEVICES - A computer implemented method, system and computer program product features “Info Dial UI,” a degree-based and tactilely-initiated dialing gesture for providing product information to a user. This feature allows the user to tactilely control the amount of product information displayed to the user as the user tactilely moves an indicia along an arc. It also features a related “Circle a Product” feature. This method, system and computer program product provides the user with prompts and guidance for improving product purchases via mobile encoding technology and personal computing devices. | 05-08-2014 |
Patent application number | Description | Published |
20110165112 | POLYMER CONJUGATES OF C-PEPTIDES - The invention provides pro insulin c-peptides that are chemically modified by covalent attachment of a water soluble oligomer. A conjugate of the invention, when administered by any of a number of administration routes, exhibits characteristics that are different from the characteristics of the peptide not attached to the water soluble oligomer. | 07-07-2011 |
20110166063 | POLYMER CONJUGATES OF THERAPEUTIC PEPTIDES - The invention provides peptides that are chemically modified by covalent attachment of a water-soluble oligomer. A conjugate of the invention, when administered by any of a number of administration routes, exhibits characteristics that are different from the characteristics of the peptide not attached to the water-soluble oligomer. | 07-07-2011 |
20110171164 | POLYMER CONJUGATES OF GLP-2-LIKE PEPTIDES - The invention provides peptides that are chemically modified by covalent attachment of a water soluble oligomer. A conjugate of the invention, when administered by any of a number of administration routes, exhibits characteristics that are different from the characteristics of the peptide not attached to the water soluble oligomer. | 07-14-2011 |
20110171166 | POLYMER CONJUGATES OF OSTEOCALCIN PEPTIDES - The invention provides osteocalcin that is chemically modified by covalent attachment of a water soluble oligomer. A conjugate of the invention, when administered by any of a number of administration routes, exhibits characteristics that are different from the characteristics of the peptide not attached to the water-soluble oligomer. | 07-14-2011 |
20110237524 | POLYMER CONJUGATES OF AOD-LIKE PEPTIDES - The invention provides peptides that are chemically modified by covalent attachment of a water soluble oligomer. A conjugate of the invention, when administered by any of a number of administration routes, exhibits characteristics that are different from the characteristics of the peptide not attached to the water soluble oligomer. | 09-29-2011 |
20140328791 | Conjugates of an IL-2 Moiety and a Polymer - Conjugates of an IL-2 moiety and one or more nonpeptidic, water-soluble polymers are provided. Typically, the nonpeptidic, water-soluble polymer is poly(ethylene glycol) or a derivative thereof. Also provided, among other things, are compositions comprising conjugates, methods of making conjugates, methods of administering compositions to an individual, nucleic acid sequences, expression systems, host cells, and methods for preparing IL-moieties. | 11-06-2014 |
Patent application number | Description | Published |
20100253817 | ORIENTATION-BASED APPROACH FOR FORMING A DEMOSAICED IMAGE, AND FOR COLOR CORRECTING AND ZOOMING THE DEMOSAICED IMAGE - A method and apparatus for forming a demosaiced image from a color-filter-array (“CFA”) image is provided. The CFA image comprises a first set of pixels colored according to a first (e.g., a green) color channel, a second set of pixels colored according to a second (e.g., a red) color channel and a third set of pixels colored according to a third (e.g., blue) color channel. The method may include obtaining an orientation map, which includes, for each pixel of the color-filter-array image, an indicator of orientation of an edge bounding such pixel. The method may further include interpolating the first color channel at the second and third sets of pixels as a function of the orientation map so as to form a fourth set of pixels. The method may also include interpolating the second color channel at the first and third sets of pixels as a function of the orientation map and the fourth set of pixels; and interpolating the third color channel at the first and second sets of pixels as a function of the orientation map and the fourth set of pixels. | 10-07-2010 |
20100254630 | METHOD AND APPARATUS FOR FORMING SUPER RESOLUTION IMAGES FROM RAW DATA REPRESENTATIVE OF COLOR FILTER ARRAY IMAGES - A method and apparatus for generating a super-resolution image are provided. The method may include obtaining a first set of RAW data representing a first image captured at a first resolution and obtaining, from the first set of RAW data, at least one first sample of data associated with the first image. The method may also include obtaining a second set of RAW data representing a second image captured at the first resolution, and performing image registration as a function of the first set of RAW data and the second set of RAW data so as to obtain at least one second sample of data associated with the second image. The first set of RAW data is used as a reference for the second set of RAW data. The method further includes combining the at least one first sample of data with at least one second sample of data to form a collection of samples, and interpolating the collection of samples to form the super-resolution image. | 10-07-2010 |
20110229052 | BLUR FUNCTION MODELING FOR DEPTH OF FIELD RENDERING - A method and apparatus of depth of field rendering which simulates larger apertures for images captured at a smaller aperture. The depth of field rendering provides selective simulation of out-of-focus effects which are attainable with cameras having a larger aperture when capturing images at a smaller aperture. A blur function model is created based on the relationship between the blur change and the aperture change. This model is used to determine the blur difference which would arise between two images taken at two different apertures. Then the out-of-focus effect is generated by blurring the image in a rendering process based on the blur difference. | 09-22-2011 |
20120195492 | Method and apparatus for generating a dense depth map using an adaptive joint bilateral filter - A method and apparatus for generating a dense depth map. In one embodiment, the method includes applying a joint bilateral filter to a first depth map to generate a second depth map, where at least one filter weight of the joint bilateral filter is adapted based upon content of an image represented by the first depth map, and the second depth map has a higher resolution than the first depth map. | 08-02-2012 |
20120219236 | METHOD AND APPARATUS FOR PERFORMING A BLUR RENDERING PROCESS ON AN IMAGE - A method and apparatus for performing a blur rendering process on an image is disclosed. In one embodiment, the method of performing a blur rendering process includes accessing a filtered image and depth map information, determining a plurality of blending coefficients for computing a weighted sum for the image and filtered image, wherein the plurality of blending coefficients define a substantially smooth transition from at least one first depth class to at least one second depth class and a substantially sharp transition from the at least one second depth class and the at least one first depth class, wherein the at least one first depth class and the at least one second depth class form at least a portion of a plurality of depth classes and combining the image and the filtered image into a resulting image using the plurality of coefficients. | 08-30-2012 |
20120242796 | AUTOMATIC SETTING OF ZOOM, APERTURE AND SHUTTER SPEED BASED ON SCENE DEPTH MAP - A Depth Map (DM) is able to be utilized for many parameter settings involving cameras, camcorders and other devices. Setting parameters on the imaging device includes zoom setting, aperture setting and shutter speed setting. | 09-27-2012 |
20120249836 | METHOD AND APPARATUS FOR PERFORMING USER INSPIRED VISUAL EFFECTS RENDERING ON AN IMAGE - Method and apparatus for performing visual effects rendering on an image are described. User specifications are processed for at least one visual effect for the image. Scene analysis information associated with the image may be accessed, wherein the scene analysis information is based on the user specifications and indicates at least one pixel of the image for coupling with the at least one visual effect. The at least one pixel is accentuated using depth map information, wherein dimensions for the at least one pixel are determined in response to corresponding depth values of the at least one pixel. An output image is generated having at least one visual effect. | 10-04-2012 |
Patent application number | Description | Published |
20080291629 | Liquid-cooled portable computer - Embodiments of a computer system are described. This computer system includes a power source that is coupled to a heat pipe, where the power source includes an integrated circuit. This heat pipe may contain a liquid coolant that has a density greater than a first pre-determined value at room temperature. A pump is coupled to the heat pipe is configured to circulate the liquid coolant through the heat pipe. Furthermore, a heat exchanger coupled to the heat pipe is configured to transfer heat from the heat pipe to an environment external to the computer system. | 11-27-2008 |
20080298021 | Notebook computer with hybrid diamond heat spreader - Embodiments of a device are described. This device includes an integrated circuit and a heat spreader coupled to the integrated circuit. This heat spreader includes a first layer of an allotrope of carbon. Note that the allotrope of carbon has an approximately face-centered-cubic crystal structure. Furthermore, the allotrope of carbon has a thermal conductivity greater than a first pre-determined value and a specific heat greater than a second pre-determined value. | 12-04-2008 |
20090175003 | SYSTEMS AND METHODS FOR COOLING ELECTRONIC DEVICES USING AIRFLOW DIVIDERS - An electronic device can be provided with a heat-generating component and a cooling module for dissipating heat. In some embodiments, the cooling component may include a fan configured to produce an outflow of air, and a divider configured not only to direct a first portion of the outflow between a first surface of the divider and the heat-generating component, but also to direct a second portion of the outflow along a second surface of the divider. In other embodiments, the cooling component may include a divider and a pressure clip. A first portion of the pressure clip may be configured to exert a pressure on a first surface of the divider such that the pressure may hold a portion of a second surface of the divider in contact with the heat-generating component. | 07-09-2009 |
20100050658 | METHODS AND APPARATUS FOR COOLING ELECTRONIC DEVICES USING THERMOELECTRIC COOLING COMPONENTS - An electronic device can be provided with a heat-generating component, a heat-dissipating component, and a thermoelectric cooling component. The thermoelectric cooling component may be configured to create a temperature difference between the heat-generating component and the heat-dissipating component. In some embodiments, the thermoelectric cooling component is configured to use the Peltier effect to create the temperature difference. In some embodiments, the thermoelectric cooling component may be positioned proximate to a hotspot of the heat-generating component. | 03-04-2010 |
20100051243 | METHODS AND APPARATUS FOR COOLING ELECTRONIC DEVICES USING FLOW SENSORS - An electronic device can be provided with a housing having at least one wall defining a cavity and a flow sensor at least partially contained within the cavity. The flow sensor may be configured to detect a flow characteristic related to the flow of a fluid through a first portion of the cavity. The electronic device may also include a processor configured to alter a performance characteristic of the electronic device based on the detected flow characteristic. | 03-04-2010 |
20100053883 | METHODS AND APPARATUS FOR COOLING ELECTRONIC DEVICES THROUGH USER INTERFACES - An electronic device can be provided with a user interface component and a cooling component contained within a housing. The housing may include at least one surface having an opening formed therethrough, and the user interface may include one port formed therethrough. The user interface port may provide at least a first portion of a passageway between the housing opening and the cooling component. The passageway may allow fluids to be exchanged between the cooling component and the housing opening for cooling the electronic device. | 03-04-2010 |
20100053885 | METHODS AND APPARATUS FOR COOLING ELECTRONIC DEVICES USING THERMALLY CONDUCTIVE HINGE ASSEMBLIES - An electronic device can be provided with a first housing at least partially containing a first electronic component, a second housing, and a hinge assembly coupled to the first housing and the second housing. The hinge assembly may be configured to dissipate heat generated by the first electronic component away from the first housing. In some embodiments, the hinge assembly may be configured to dissipate heat generated by the first electronic component away from the first housing and on to the second housing. The second housing may include a heat spreader for dissipating the heat from the hinge assembly throughout the second housing. | 03-04-2010 |
20140185219 | COOLING ELECTRONIC DEVICES USING FLOW SENSORS - An electronic device can be provided with a housing having at least one wall defining a cavity and a flow sensor at least partially contained within the cavity. The flow sensor may be configured to detect a flow characteristic related to the flow of a fluid through a first portion of the cavity. The electronic device may also include a processor configured to alter a performance characteristic of the electronic device based on the detected flow characteristic. | 07-03-2014 |
Patent application number | Description | Published |
20120110236 | System and Method to Prioritize Large Memory Page Allocation in Virtualized Systems - The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization. | 05-03-2012 |
20130138864 | SYSTEM AND METHOD TO REDUCE TRACE FAULTS IN SOFTWARE MMU VIRTUALIZATION - A system for identifying an exiting process and removing traces and shadow page table pages corresponding to the process' page table pages. An accessed minimum virtual address is maintained corresponding to an address space. In one embodiment, whenever a page table entry corresponding to the accessed minimum virtual address changes from present to not present, the process is determined to be exiting and removal of corresponding trace and shadow page table pages is begun. In a second embodiment, consecutive present to not-present PTE transitions are tracked for guest page tables on a per address space basis. When at least two guest page tables each has at least four consecutive present to not-present PTE transitions, a next present to not-present PTE transition event in the address space leads to the corresponding guest page table trace being dropped and the shadow page table page being removed. | 05-30-2013 |
20130205062 | SYSTEM AND METHOD TO PRIORITIZE LARGE MEMORY PAGE ALLOCATION IN VIRTUALIZED SYSTEMS - The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization. | 08-08-2013 |
20140317375 | SYSTEM AND METHOD TO PRIORITIZE LARGE MEMORY PAGE ALLOCATION IN VIRTUALIZED SYSTEMS - The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization. | 10-23-2014 |
Patent application number | Description | Published |
20100297070 | COMPOSITIONS AND METHODS FOR AMELIORATING CNS INFLAMMATION, PSYCHOSIS, DELIRIUM, PTSD or PTSS - The invention provides compositions and methods for ameliorating, treating, reversing or preventing pathology or inflammation in the central nervous system (CNS), or the brain, caused or mediated by NFkB, IL-6, IL-6-R, NADPH oxidase (Nox), and/or superoxide and/or hydrogen peroxide production by a NADPH oxidase, including for example ameliorating, treating, reversing or preventing schizophrenia, psychosis, delirium, e.g., post-operative delirium, drug-induced psychosis, psychotic features associated with frailty syndrome (FS), aging, depression, dementias; traumatic war neurosis, post traumatic stress disorder (PTSD) or post-traumatic stress syndrome (PTSS), Amyotrophic Lateral Sclerosis (ALS, or Lou Gehrig's Disease), and/or Multiple Sclerosis (MS). The invention also provides methods for purifying a C60 fullerene, C3 (tris malonic acid C60) or malonic acid derivatives. | 11-25-2010 |
Patent application number | Description | Published |
20080307685 | CLOSURE MECHANISM FOR AN IDENTIFICATION MEDIUM ADAPTED FOR RECEIVING INDICIA FORMING MATERIAL AND DUAL CLOSURE MEANS - A closure mechanism receiving aperture presents a substantially contiguous, uninterrupted planar surface on a flexible medium, primarily for use with identification devices, i.e., wristbands. The aperture does not interrupt the printable area so that printer ink may be printed over the aperture without passing through. The inventive aperture also does not produce waster material or chads which can jam or foul-up a printer. An inventive wristband includes both snap closure and adhesive closure mechanisms that can be used at the same time. | 12-18-2008 |
20080309065 | PRINTABLE MULTI-PART FORM - A multi-part form includes a wristband with related tags and labels. The tags are configured for mounting on the wristband after the wristband has been secured to a person of object to be identified. The multi-part form is also configured with a wristband portion separate from a plurality of utility groups, each of which is separate from the other, by a street devoid of media layer. The layers that comprise the multi-part form are preferably solvent resistant so as to make the identification products more durable and longer lasting. | 12-18-2008 |
20090094872 | LASER WRISTBAND TAGS - The wristband system includes a tag having an identification area for receiving information associated with an object to be identified. A dual attachment mechanism is associated with the tag and generally includes a slit in the tag and an adhesive disposed on at least a portion of the tag. The wristband system further includes an elongated flexible strap having a fastener for retaining the strap in a closed loop configuration around the object to be identified. In turn, the tag is configured to fixedly attach to the strap by threaded engagement of the slit or retention by the adhesive. | 04-16-2009 |
20110146122 | CLOSURE MECHANISM FOR AN IDENTIFICATION MEDIUM ADAPTED FOR RECEIVING INDICIA FORMING MATERIAL AND DUAL CLOSURE MEANS - A closure mechanism receiving aperture presents a substantially contiguous, uninterrupted planar surface on a flexible medium, primarily for use with identification devices, i.e., wristbands. The aperture does not interrupt the printable area so that printer ink may be printed over the aperture without passing through. The inventive aperture also does not produce waster material or chads which can jam or foul-up a printer. An inventive wristband includes both snap closure and adhesive closure mechanisms that can be used at the same time. | 06-23-2011 |
Patent application number | Description | Published |
20120330701 | METHOD AND SYSTEM FOR REFERRAL TRACKING - A method for identifying a source of a job referral, the method including identifying a URL that the job applicant uses to access a web page with functionality to enable the job applicant to apply for the first job, identifying a first job message record using the URL, obtaining an original job message record for an original job message using the first job message record, determining a first sender of the original job message from the original job message record, determining that a second job message was sent to the job applicant for a second job at the company by a second sender, wherein the second job message was sent to the job applicant before the first job message and wherein the second job message was sent to the job applicant within a look-back period, and identifying the second sender as the source of the referral for the first job. | 12-27-2012 |
20120330856 | METHOD AND SYSTEM FOR CHANNEL OPTIMIZATION - A method for selecting a communication channel. The method includes identifying a job, identifying a target for the job, determining a characteristic of the target, obtaining analytic information using the characteristic, identifying, using the analytic information, a first communication channel of a plurality of communication channels over which to send a first job message for the job to the target, wherein a conversion rate associated with the first communication channel is higher than any conversion rate associated with any other of the plurality of communication channels and wherein the conversion rates are determined using the analytic information, and generating the first job message, wherein the first job message is associated with a first URL, and wherein the first URL is associated with the job, a sender, the target, and the first communication channel, and sending the first job message over the first communication channel to the target. | 12-27-2012 |
20130036065 | METHOD AND SYSTEM FOR IDENTIFYING JOB CANDIDATES, SOCIAL NETWORKS, AND RECRUITERS TO FACILITATE THE RECRUITING PROCESS - In general, the invention relates to a method for identifying a job candidate. The method includes determining new job characteristics for the new job using a job record corresponding to the new job, identifying an old job using the new job characteristics and old job characteristics, where the old job is similar to the new job and where a similarity between the old job and the new job is quantified using a job similarity factor. The method further includes selecting a job candidate, where the job candidate has applied for the old job, determining a candidate matching factor for the job candidate based on the old job, determining a rating for the job candidate using the job similarity factor and the candidate matching factor for the job candidate, and identifying the job candidate to contact about the job based on the rating. | 02-07-2013 |
20130054483 | METHOD AND SYSTEM FOR SOURCE TRACKING - A method for tracking referrals using a third party applicant tracking system (ATS). The method include receiving a request to display a web page at a URL from a client used by a job candidate, where the URL is associated with a job at a company and the job candidate. The method further includes providing to the client a web page associated with the URL that includes a description of the job and a link to an ATS, receiving a request for a web page corresponding to the job, where the request is initiated by selection of the link. The method further includes making a determination that the ATS is a third party ATS and, in response, generating a third party referral URL, a unique identifier associated with the job, and an identifier associated with a source type, and providing the third party referral URL to the client. | 02-28-2013 |
20140089303 | METHOD AND SYSTEM FOR IDENTIFYING JOB CANDIDATES - A method for ranking profile records. The method includes receiving a search request from a user, obtaining a user profile associated with the user, generating a query based on the search request, issuing the query to a profile database, receiving search results in response to the query, wherein the search results comprise a plurality of profile records, and wherein each of the plurality of profile records comprises a plurality of action records and is associated with a potential job candidate, ranking the plurality of profile records using the user profile and a plurality of network scores to obtain ranked profile records, and transmitting the ranked profile records to the user. | 03-27-2014 |
Patent application number | Description | Published |
20140035696 | COMMON MODE TERMINATION WITH C-MULTIPLIER CIRCUIT - Embodiments of the present disclosure provide input termination circuits that overcome the deficiencies of conventional designs. Specifically, embodiments eliminate large-on chip bypass capacitors that are commonly used for common mode termination, and instead use an active capacitor-multiplier (C-multiplier) circuit at the common mode node. The C-multiplier circuit mimics a large capacitor at high frequency. By eliminating large on-chip bypass capacitors, the IC design (e.g., receiver) is reduced in size, without affecting common mode return loss performance. Embodiments may be used with any applications that require input termination, and particularly with differential applications that require common mode termination. | 02-06-2014 |
20140036982 | High Bandwidth Equalizer and Limiting Amplifier - Embodiments of the present disclosure enable bandwidth extension of receiver front-end circuits without the use of inductors. As a result, significantly smaller and cheaper receiver implementations are made possible. In an embodiment, bandwidth extension is achieved by virtue of very small floating capacitors that are coupled around amplifier stages of the receiver front-end circuit. Each of the capacitors is configured to generate a negative capacitance for the preceding stage (e.g., equalizer or amplifier), thus extending the bandwidth of the preceding stage. A capacitively-degenerated cross-coupled transistor pair allows bandwidth extension for the final (e.g., amplifier) stage. Embodiments further enable DC offset compensation with the use of a digital feedback loop. The feedback loop can thus be turned on/off as needed, reducing power consumption. | 02-06-2014 |
20140146922 | QUASI-DIGITAL RECEIVER FOR HIGH SPEED SER-DES - Techniques are described herein that provide an interface for receiving and deserializing digital bit stream(s). For instance, a receiver for a high-speed deserializer may include digital slicers, a digital phase interpolator, and a digital clock phase generator. The digital slicers may be configured to determine a digital value of a data input. The digital phase interpolator may be configured to generate an interpolated clock signal based on input clock signals that correspond to respective phases of a reference clock. The phase of the interpolated clock tracks the data input to the receiver through a clock recovery loop. The digital clock phase generator may be configured to generate output clock signals to control timing of the respective digital slicers. The receiver may further include a single digital eye monitor configured to monitor a data eye of the data input. | 05-29-2014 |
20140241442 | COMPACT LOW-POWER FULLY DIGITAL CMOS CLOCK GENERATION APPARATUS FOR HIGH-SPEED SERDES - A device for high-speed clock generation may include an injection locking-ring oscillator (ILRO) configured to receive one or more input clock signals and to generate multiple clock signals with different equally spaced phase angles. A phase-interpolator (PI) circuit may be configured to receive the multiple coarse spaced clock signals and to generate an output clock signal having a correct phase angle. The PI circuit may include a smoothing block that may be configured to smooth the multiple clock signals with different phase angles and to generate multiple smooth clock signals. A pulling block may be configured to pull edges of the multiple smooth clock signals closer to one another. | 08-28-2014 |
20140320229 | TRANSMISSION LINE DRIVER WITH OUTPUT SWING CONTROL - A transmission line driver including an output configured to have a load impedance is provided. The transmission line driver includes a pull-up circuit coupled in series with the output. The transmission line driver also includes a pull-down circuit coupled in series with the output. The transmission line driver includes a shunt circuit having an adjustable impedance. The shunt circuit is coupled in parallel to the output. The shunt circuit is coupled to the pull-up circuit and the pull-down circuit. The shunt circuit is configured to receive a shunt control signal to adjust the adjustable impedance to provide linear control of an output swing at the output. | 10-30-2014 |
Patent application number | Description | Published |
20110068827 | PASSIVE CAPACITIVELY INJECTED PHASE INTERPOLATOR - A phase-interpolator circuit is described. In the phase-interpolator circuit, an output signal, having a fundamental frequency and a phase, is generated based on a weighted summation of a first reference signal and a second reference signal, where the first reference signal has the fundamental frequency and a first phase, and the second reference signal has the same fundamental frequency and a second phase. Note that contributions of the first reference signal and the second reference signal, respectively, to the output signal are determined based on associated first and second impedance values in a weighting circuit in the phase-interpolator circuit. For example, a programmable capacitance ratio of two capacitors may be used to interpolate between the first reference signal and the second reference signal. Additionally, the phase-interpolator circuit may include a biasing circuit that provides a DC bias to the weighting circuit, and which amplifies the output of the weighting circuit to provide the output signal. | 03-24-2011 |
20110109356 | APERTURE GENERATING CIRCUIT FOR A MULTIPLYING DELAY-LOCKED LOOP - A multiplying delay-locked loop (MDLL) is described. In the MDLL, a phase interpolator (PI) provides a correction signal to selection control logic by phase mixing two internal signals (which have different phases) from a sequence of delay elements in the MDLL. This correction signal compensates for a delay associated with the selection control logic, thereby ensuring that a selection pulse or signal output by the selection control logic to a selection circuit (such as a multiplexer) is appropriately timed so that the selection circuit can selectively injection lock the sequence of delay elements using edges in a reference signal. | 05-12-2011 |
20110150159 | CLOCK-FORWARDING TECHNIQUE FOR HIGH-SPEED LINKS - A repeater circuit, such as a clock regeneration and multiplication circuit, is described. In this repeater circuit, a clock multiplier unit (CMU) generates an internal clock signal based on a forwarded clock signal, which is received on a link. Furthermore, a phase interpolator (PI) in the repeater circuit provides the output clock signal based on the forwarded clock signal and the internal clock signal. Note that the CMU and the PI filter reduce the cycle-to-cycle jitter in the forwarded clock signal and the internal clock signal, and that the output clock signal has a phase that is a weighted average of the phases of the forwarded clock signal and the internal clock signal. In addition, the relative weights of the forwarded clock signal and the internal clock signal (i.e., the amount of phase averaging and jitter filtering) may be adjusted based on a position or location on the link. | 06-23-2011 |