Patent application number | Description | Published |
20090265917 | METHOD OF MANUFACTURING THIN FILM MAGNETIC HEAD - By the method of manufacturing a thin film magnetic head, a magnetic material having a suitable characteristic can be used for manufacturing a magnetic pole and corrosion of the magnetic pole can be prevented. The method comprises: a step of forming a multilayered magnetic pole; a step of forming a stopper layer on the magnetic pole; a step of forming an insulating layer on the stopper layer; a step of polishing the insulating layer, by chemical mechanical polishing process, until an upper face of the stopper layer is exposed; a step of removing the stopper layer, by dry etching process with a reactive gas, until an upper face of the magnetic head is exposed; a step of removing the upper face of the magnetic pole, by dry etching process with an inert gas, until reaching a prescribed depth; and a step of polishing the upper face of the magnetic pole, by chemical mechanical polishing process, until the upper face of the magnetic pole is flattened. | 10-29-2009 |
20090266705 | METHOD OF MANUFACTURING VERTICAL MAGNETIC HEAD - The method of manufacturing a vertical magnetic head comprises the steps of: forming a resist pattern including a concave section on a wafer substrate; laminating a plurality of films in the concave section until forming a prescribed multilayer structure of the main magnetic pole; and removing the resist pattern. Inner faces of the concave section are perpendicular to a surface of the wafer substrate. The laminating step includes the sub-steps of: (a) performing a sputtering process, in which particles are perpendicularly sputtered with respect to the surface of the wafer substrate, a plurality of times so as to laminate a plurality of sputtered films in the concave section; and (b) removing the sputtered films, which have been stuck on the resist pattern in the sub-step (a), from the resist pattern. The sub-steps (a) and (b) are repeated until the prescribed multilayer structure is formed. | 10-29-2009 |
Patent application number | Description | Published |
20100144117 | Semiconductor device having device characteristics improved by straining surface of active region and its manufacture method - A trench is formed in a surface layer of a semiconductor substrate, the trench surrounding an active region. A lower insulating film made of insulating material is deposited over the semiconductor device, the lower insulating film filling a lower region of the trench and leaving an empty space in an upper region. An upper insulating film made of insulating material having therein a tensile stress is deposited on the lower insulating film, the upper insulating film filling the empty space left in the upper space. The upper insulating film and the lower insulating film deposited over the semiconductor substrate other than in the trench are removed. | 06-10-2010 |
20100193846 | SEMICONDUCTOR DEVICE WITH STRAIN - A semiconductor device includes: a semiconductor substrate having a p-MOS region; an element isolation region formed in a surface portion of the semiconductor substrate and defining p-MOS active regions in the p-MOS region; a p-MOS gate electrode structure formed above the semiconductor substrate, traversing the p-MOS active region and defining a p-MOS channel region under the p-MOS gate electrode structure; a compressive stress film selectively formed above the p-MOS active region and covering the p-MOS gate electrode structure; and a stress released region selectively formed above the element isolation region in the p-MOS region and releasing stress in the compressive stress film, wherein a compressive stress along the gate length direction and a tensile stress along the gate width direction are exerted on the p-MOS channel region. The performance of the semiconductor device can be improved by controlling the stress separately for the active region and element isolation region. | 08-05-2010 |
20120091534 | SEMICONDUCTOR DEVICE WITH STRAIN - A semiconductor device includes: a semiconductor substrate having a p-MOS region; an element isolation region formed in a surface portion of the semiconductor substrate and defining p-MOS active regions in the p-MOS region; a p-MOS gate electrode structure formed above the semiconductor substrate, traversing the p-MOS active region and defining a p-MOS channel region under the p-MOS gate electrode structure; a compressive stress film selectively formed above the p-MOS active region and covering the p-MOS gate electrode structure; and a stress released region selectively formed above the element isolation region in the p-MOS region and releasing stress in the compressive stress film, wherein a compressive stress along the gate length direction and a tensile stress along the gate width direction are exerted on the p-MOS channel region. The performance of the semiconductor device can be improved by controlling the stress separately for the active region and element isolation region. | 04-19-2012 |
20120241869 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor device includes forming a first and a second isolation insulating film to define a first, a second, a third and a fourth region, forming a first insulating film, implanting a first impurity of a first conductivity type through the first insulating film into the first, the second and the fourth region at a first depth, forming a second insulating film thinner than the first insulating film, implanting a second impurity of a second conductivity type through the second insulating film into the third region at a second depth in the semiconductor substrate, implanting a third impurity of the second conductivity type into the third region at a third depth shallower than the second depth, forming a first transistor of the first conductivity type in the third region, and forming a second transistor of the second conductivity type in the fourth region. | 09-27-2012 |
Patent application number | Description | Published |
20090170245 | ELECTRONIC APPARATUS MANUFACTURING METHOD - An electronic apparatus manufacturing method comprises applying a first adhesive agent to a mounting portion, a first heating, in such a way that connection pads and bumps, come into contact, by pressing a heating head against a non-mounting surface of the electronic component, heating the electronic component, hardening the first adhesive agent, affixing the mounting substrate and electronic component, filling a space between the mounting substrate and the electronic component with a second adhesive agent under reduced pressure, and a second heating step of,, from being under reduced pressure to being under atmospheric pressure, by pressing the heating head against the non-mounting surface of the electronic component, heating the electronic component, as well as hardening the second adhesive agent, melting the connection pads, and joining the connection pads and the bumps. | 07-02-2009 |
20090243006 | ELECTRONIC PART WITH AFFIXED MEMS - According to an aspect of the invention, an electronic part includes a substrate having a first planar surface, a first bump affixed to the first planar surface of the substrate, a second bump affixed to the first planar surface of the substrate a predetermined distance from the first bump, a MEMS chip including a element, the MEMS chip coupled to the first bump and the second bump, the MEMS chip distanced from the first planar surface, an adhesive region bonding with the first bump, the substrate and the MEMS chip. | 10-01-2009 |
20100327043 | COMPRESSION-BONDING APPARATUS - A compression-bonding apparatus includes a support stage and a pressing tool. The pressing tool includes a pressing stage, an elastic member and a plurality of bonding heads. The elastic member is held by the pressing stage. The plurality of bonding heads includes an upper surface attached to the elastic member and a lower surface facing an upper surface of the support stage. | 12-30-2010 |
20100327435 | ELECTRONIC COMPONENT AND MANUFACTURE METHOD THEREOF - An electronic component includes a package substrate, a plurality of conductive pads, an insulating material and a semiconductor device. The plurality of conductive pads is disposed on the package substrate. The insulating material is disposed between the plurality of conductive pads. The insulating material includes a top surface located on an identical plane to an upper surface of the plurality of conductive pads. The semiconductor device includes a conductive bump aligned on a corresponding conductive pad of the plurality of conductive pads. | 12-30-2010 |
20110079896 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD - A semiconductor device fabrication method, comprising the steps of: forming a solder portion on an electrode of a substrate on which a semiconductor chip is to be mounted; applying a resin layer onto the substrate to a thickness such that a top region of the solder portion is exposed; curing the resin layer; providing a thermosetting underfill material over a region where the semiconductor chip is to be mounted; placing an electrode of the semiconductor chip face down on the solder portion in such a manner that the electrode faces the solder portion; and heating the underfill material and the solder portion. | 04-07-2011 |
20120080219 | METHOD OF MANUFACTURING ELECTRONIC DEVICE AND ELECTRONIC DEVICE - A method of manufacturing an electronic device in which an electronic component is flip-chip mounted on a circuit board, the method includes supplying, on an electrode of the circuit board or a terminal of the electronic component, a first resin material of a thickness smaller than a gap between the circuit board and the electronic component, after supplying the first resin material, connecting the terminal to the electrode by melting a solder material disposed on the electrode or the terminal at a first temperature with keeping the terminal in contact with the electrode, after connecting the terminal to the electrode, filling the gap between the circuit board and the electronic component with a second resin material, and heating the second resin material at a second temperature lower than the first temperature. | 04-05-2012 |
20120080220 | ELECTRONIC DEVICE, CIRCUIT BOARD, AND MANUFACTURING METHOD OF ELECTRONIC DEVICE - An electronic device includes a circuit board including a first electrode and a second electrode; and an electronic component including a first terminal and a second terminal, wherein the first electrode includes a first pad portion to which the first terminal is connected and a first protrusion portion disposed in a first direction in parallel with a straight line passing through the first electrode and the second electrode with respect to the first pad portion and being into contact with the first terminal, the second electrode includes a second pad portion to which the second terminal is connected and a second protrusion portion disposed in a second direction opposite to the first direction with respect to the second pad portion and being into contact with the second terminal. | 04-05-2012 |
20120230001 | ELECTRONIC DEVICE, PORTABLE ELECTRONIC TERMINAL, AND METHOD OF MANUFACTURING ELECTRONIC DEVICE - An electronic device includes an interposer, a first chip being mounted on a first surface of the interposer, the first chip having a first surface facing the first surface of the interposer and a second surface opposite to the first surface of the first chip, a second chip being mounted on a second surface of the interposer opposite to the first surface of the interposer, the second chip having a first surface facing the second surface of the interposer and a second surface opposite to the first surface of the second chip, a first metal plate being connected to the second surface of the first chip, a second metal surface being provided over the second surface of the second chip, and a via penetrating through the interposer and connected to the first metal plate and the second metal plate. | 09-13-2012 |
20130249087 | ELECTRONIC COMPONENT AND MANUFACTURE METHOD THEREOF - An electronic component includes a package substrate, a plurality of conductive pads, an insulating material and a semiconductor device. The plurality of conductive pads is disposed on the package substrate. The insulating material is disposed between the plurality of conductive pads. The insulating material includes a top surface located on an identical plane to an upper surface of the plurality of conductive pads. The semiconductor device includes a conductive bump aligned on a corresponding conductive pad of the plurality of conductive pads. | 09-26-2013 |