Patent application number | Description | Published |
20100191642 | System and Method for Dynamic Quantity Orders in an Electronic Trading Environment - A system and method for dynamic quantity orders in an electronic trading environment are described. According to one method, a dynamic quantity order includes a price, a desired order quantity and a percentage associated with an estimated order quantity that will be filled in an order queue. When the order is received at an electronic exchange, the order is sorted into a pro-rata order queue, and the exchange may estimate a potential order quantity that will be filled in the order queue at the price based on the defined percentage. Subsequently, the exchange may then increase the order quantity of the dynamic quantity order so that if the estimated number of fills occurs, the order quantity of the dynamic quantity order will be filled. | 07-29-2010 |
20110040672 | System and Method for Dynamic Quantity Orders in an Electronic Trading Environment - A system and method for dynamic quantity orders in an electronic trading environment are described. According to one method, a dynamic quantity order includes a price, a desired order quantity and a percentage associated with an estimated order quantity that will be filled in an order queue. When the order is received at an electronic exchange, the order is sorted into a pro-rata order queue, and the exchange may estimate a potential order quantity that will be filled in the order queue at the price based on the defined percentage. Subsequently, the exchange may then increase the order quantity of the dynamic quantity order so that if the estimated number of fills occurs, the order quantity of the dynamic quantity order will be filled. | 02-17-2011 |
20120185376 | System and Method for Automated Order Entry on Short Queues - Orders are automatically sent to the market when certain user defined conditions are met. In particular, a trader can configure the trading application to automatically send orders for preset quantities at price levels with queues falling below a user defined threshold. The length of queues may be measured in several ways, for example, the queue length could be measured by quantity at a given price level or the queue length could be measured by the number of orders at a given price level, or the queue length could be measured by a combination of quantity and orders. The present embodiments can more quickly recognize opportunities and send an order to take advantage of it than a trader can do manually. Other advantages and features are described herein. | 07-19-2012 |
20130132265 | System and Method for Trading and Displaying Market Information in an Electronic Trading Environment - A system and method for trading and displaying market information along a static axis are described to ensure fast and accurate execution of trades. The static axis, whether is a straight axis or a curved one, can be oriented in any direction. Regardless of how the axis is oriented, a first region may display price levels that are arranged along the static axis. A second region, which overlaps the first region, may display one or more indicators for highlighting one of the price levels associated with the lowest offer and one of the price levels associated with the highest bid. Moreover, a third region, which overlaps the first region, may be included for initiating placement of an order to buy or an order to sell the tradeable object through an action of a user input device. Other overlapping regions may also be displayed so that additional market information may be viewed by a trader. | 05-23-2013 |
Patent application number | Description | Published |
20130165367 | ENVIRONMENTALLY SAFE CLEANING SOLUTION - An environmentally safe cleaning solution, which can be employed to aggressively clean all common materials, including those conventionally only dry-cleaned, without damage to these materials, and without employing toxic or environmentally hazardous components. The cleaning solution includes liquid detergent, fabric softener, ammonia, household bleach, and liquid dish soap, mixed with distilled water. The mixture quickly stabilizes without degradation or separation on prolonged storage. | 06-27-2013 |
20140287976 | ENVIRONMENTALLY SAFE CLEANING SOLUTION - An environmentally safe cleaning solution, which can be employed to aggressively clean all common materials, including those conventionally only dry-cleaned, without damage to these materials, and without employing toxic or environmentally hazardous components. The cleaning solution includes liquid detergent, fabric softener, ammonia, household bleach, and liquid dish soap, mixed with distilled water. A preferred alternative mixture also includes potassium chloride. The mixture quickly stabilizes without degradation or separation on prolonged storage. | 09-25-2014 |
Patent application number | Description | Published |
20090051325 | AUTOMOTIVE POWER SYSTEM AND METHOD OF CONTROLLING SAME - A power source is electrically connected with a battery and an electrical load. The power source has an output voltage and provides current for the battery and electrical load. A charging voltage for the battery is determined based on temperature of the battery. An offset voltage is determined based on the provided current to the battery. The output voltage is determined based on the charging and offset voltages. | 02-26-2009 |
20100117593 | AUTOMOTIVE VEHICLE POWER SYSTEM - An energy storage system for an automotive vehicle includes a plurality of energy storage units electrically connected in series and a plurality of bi-directional energy converters each having first and second sides. Each of the first sides is electrically connected with one of the plurality of energy storage units. The system also includes another energy storage unit. The second sides of the plurality of bi-directional energy converters are electrically connected in parallel with the another energy storage unit. Each of the bi-directional energy converters is capable of transferring energy between the first and second sides. | 05-13-2010 |
20110013322 | AUTOMOTIVE VEHICLE CHARGE PORT WITH FAULT INTERRUPT CIRCUIT - An automotive vehicle includes a charge port integrated with the vehicle. The charge port includes electrical contacts configured to receive electrical power from an electric grid, and a fault interrupt circuit electrically connected with the electrical contacts. | 01-20-2011 |
20110082607 | System And Method For Balancing A Storage Battery For An Automotive Vehicle - A system and method is provided for balancing a storage battery for an automotive vehicle. The battery is of the type including a plurality of storage cells. The system includes a thermoelectric device and a controller. The thermoelectric device receives thermal energy and converts the thermal energy into electric energy. The controller determines a subset of the storage cells in the battery to be charged based on an amount of electric charge in each of the storage cells. Furthermore, the controller causes the electric energy to be distributed to each storage cell in the subset in an effort to balance the battery in the vehicle. | 04-07-2011 |
20120242144 | VEHICLE BATTERY CELL WITH INTEGRAL CONTROL CIRCUIT - The present disclosure relates to a vehicle battery pack having battery cells with an integral control circuit configured to communicate with a battery energy control module. | 09-27-2012 |
20130034767 | BATTERY PACK LIQUID COOLING SYSTEM - A cooling system operable to cool a battery pack or other device through a heat exchange operation supported, at least in part, with cycling of a coolant relative to a coldplate or other thermally conducting surface of the device and/or attached thereto. | 02-07-2013 |
20130164592 | Method and Apparatus for Manufacturing a Battery for a Vehicle - A battery module assembly and method of assembling a battery. The battery module assembly includes a plurality of modules in which a plurality of battery cells are preassembled. The modules are compressed by end plates that are held together under compression by a plurality of linking members. The end plates may include a protrusion that applies pressure to the central portion of the battery cells within the modules. The central portion of the end plates may be partially spherical, partially cylindrical or a flat surface. | 06-27-2013 |
20140205870 | Battery Pack - A battery pack for a vehicle may include a cell array defining an upper surface and a housing defining a raised portion extending along and above a length of the array such that the raised portion and upper surface define a vent manifold therebetween which may be configured to collect gases generated by the array. The housing may define a discharge opening configured to allow gases to exit the manifold. A pair of end plates may be disposed at opposing ends of the array. One of the end plates may define a pass through portion in at least partial registration with the discharge opening. An outlet tube may be configured to facilitate fluid communication between the vent manifold and exterior of the vehicle. The battery pack may also include spacers located between upper edges of adjacent cells and may be configured to prevent cooling gases from entering the vent manifold. | 07-24-2014 |
20150207126 | FLEXIBLE BUSBAR HOLDER FOR WELDED CELLS - A traction battery assembly is provided including a support member, two battery cells, a busbar, and a segmented busbar holder. The battery cells include adjacent terminals at differing heights relative to the support member. The busbar is attached to the terminals. The segmented busbar holder includes adjacent panels configured to cover and orient the busbar relative to the terminals. The panels are also configured to move relative to one another such that the holder accommodates the differing heights of the terminals. | 07-23-2015 |
20150280291 | TRACTION BATTERY ASSEMBLY WITH SPRING COMPONENT - A traction battery thermal plate assembly may include a structure having edge portions defining a cavity and configured to support a battery cell array, a thermal plate disposed within the cavity and adjacent to the array, and a spring assembly disposed within the cavity between the structure and the plate. The spring assembly may be configured to exert a force against the plate such that plate contacts the array to transfer heat between the array and the plate. The thermal plate disposed within the cavity may be below the array. The spring assembly may include a body defining a plurality of tabs configured to extend outward from a plane defined by the body. The spring assembly may include a base portion and an upper portion configured to support one or more compression springs therebetween. | 10-01-2015 |
20160064783 | TRACTION BATTERY THERMAL MANAGEMENT APPARATUS AND METHOD - A vehicle traction battery heat sink includes a first fin having a cell contact portion in thermal contact with a plurality of battery cells. The first fin also includes a connector portion extending from the cell contact portion. The heat sink further includes a thermal plate in thermal contact with the connector portion and a thermal agent circulated within the thermal plate. The heat sink allows heat generated by the plurality of battery cells to be transferred through the fin to the thermal plate. | 03-03-2016 |
Patent application number | Description | Published |
20100180051 | SYSTEM, APPARATUS, AND METHOD FOR FAST STARTUP OF USB DEVICES - Exemplary embodiments are directed to fast enumeration of a device in a USB system including a USB device and a USB host. The USB device includes two device descriptors, a memory for holding firmware for operation of the USB device, and a controller for executing the firmware. A first device descriptor is for enumerating the USB device in a firmware-loading mode and a second device descriptor is for enumerating the USB device in an operational mode. The USB host controls a first enumeration of the USB device using the first device descriptor. After the first enumeration, the USB host receives a re-enumerate indicator from the USB device and controls a second enumeration of the USB device using the second device descriptor. | 07-15-2010 |
20100274998 | METHOD AND SYSTEM FOR PROVIDING A DATA MODULE LOCK TO DEVICE HARDWARE - Systems and methods for confirming that a circuit card is compatible with a computer in which it is installed includes accessing a list of compatible circuit cards stored in the computer's nonvolatile memory, determining if the circuit card is included in the list of compatible circuit cards; and storing operating software on the circuit card only if the circuit card is included in the list of compatible circuit cards. The list of compatible circuit cards can be the Plug-and-Play Identification (PnP ID) list stored in the computer's BIOS data. Power may be removed from the circuit card if the circuit card is not include in the list of compatible circuit cards. | 10-28-2010 |
20140010221 | CONFIGURABLE HOST INTERFACE USING MULTI-RADIO DEVICE AND ARCHITECTURE FOR WLAN OFFLOAD - A method, an apparatus, and a computer program product for wireless communication are provided. A multi-radio device controls wireless communications by identifying one or more connection points between radio(s) of the multi-radio device and an operating system executing on a host device, analyzing a policy relating to the multi-radio device, and exposing, to the operating system, a subset of the connection points based on the policy. A modem manages a connection to an applications processor (AP) by virtualizing physical communication interfaces at the modem, providing a single Internet protocol (IP) interface representing the virtualized physical communication interfaces to a high level operating system (HLOS) at the AP, detecting a physical communication interface connected to the modem, and determining whether to expose the detected physical communication interface to the HLOS as a standalone virtualized physical communication interface, or hide the detected physical communication interface as part of an existing virtualized physical communication interface. | 01-09-2014 |
Patent application number | Description | Published |
20080202164 | Isopipe design feature to reduce sag - Disclosed is an isopipe for use in the manufacture of sheet glass by, and more specifically to an isopipe designed to control sag during use, as well as a method for reducing the sag of an isopipe used in a fusion process for molten glass. In one embodiment, the isopipe comprises a cavity that extends at least partially through the refractory body of the isopipe along its longitudinal length. The cavity has varying cross-sections configured such that, for at least a portion of the length of the isopipe, the load bending moment is greater than or generally equal to the gravity bending moment. In one embodiment, the neutral axis varies along the length of the cavity and has a similar profile to that of the gravity bending moment diagram. | 08-28-2008 |
20100104486 | High Throughput Pressure Resistant Microfluidic Devices - A microfluidic device, comprising wall structures formed of a consolidated frit material positioned between and joined to two or more spaced apart substrates formed of a second material with the wall structures defining one or more fluidic passages between the substrates, has at least one passage with a height in a direction generally perpendicular to the substrates of greater than one millimeter, preferably greater than 1.1 mm, or than 1.2 mm, or than as much as 1.5 mm or more, and may have a non three-dimensionally tortuous portion of the at least one passage, in which the wall structures have an undulating shape such that no length of wall structure greater than 3 centimeters or greater than 2 centimeters, or greater than 1 centimeter, or even no length at all, is without a radius of curvature. A device may also include the undulations without the height. | 04-29-2010 |
Patent application number | Description | Published |
20080256405 | COMPILABLE MEMORY STRUCTURE AND TEST METHODOLOGY FOR BOTH ASIC AND FOUNDRY TEST ENVIRONMENTS - A method of implementing a compilable memory structure configured for supporting multiple test methodologies includes configuring a first plurality of multiplexers for selectively coupling at least one data input path and at least one address path between an external customer connection and a corresponding internal memory connection associated therewith. A second multiplexer is configured for selectively coupling an input of a test latch between a functional memory array connection and a memory logic connection, the memory logic connection coupled to the at least one data input path, with an output of the test latch defining a data out customer connection. Flush logic is configured to direct data from the memory logic connection to the data out customer connection during a test of logic associated with a customer chip, facilitating observation of the memory logic connection at the customer chip. | 10-16-2008 |
20080284459 | Testing Using Independently Controllable Voltage Islands - A voltage island architecture wherein the source voltage of each voltage island can be independently turned on/off or adjusted during a scan-based test. The architecture includes a plurality of voltage islands, each powered by a respective island source voltage, and a testing circuit, coupled to the voltage islands, and powered by a global source voltage that is always on during test, wherein each island source voltage may be independently controlled during test. | 11-20-2008 |
20080288841 | SYSTEM AND METHODS OF BALANCING SCAN CHAINS AND INSERTING THE BALANCED-LENGTH SCAN CHAINS INTO HIERARCHICALLY DESIGNED INTEGRATED CIRCUITS. - A system and methods of balancing scan chains and, more particularly, a system and methods of load balancing scan chains into hierarchically designed integrated circuits. The method includes estimating or calculating a maximum scan chain length L and creating a maximum number of scan chains of length L in each hierarchical block. The method further includes distributing remaining scan bits in each hierarchical block into additional scan chains, and creating chip-level scan chains by using the scan chains of maximum length L and by forming additional chip-level scan chains of maximum length L by distributing the additional scan chains of maximum length LR, plus any remaining top-level scan bits, among the additional chip-level scan chains of maximum length L. | 11-20-2008 |
20090055696 | MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST) - Built-in self-test (BIST) microcontroller integrated circuit adapted for logic verification. Microcontroller includes a plurality of hardware description language files representing a hierarchical description of the microcontroller, the plurality of hardware description language files including a library of circuit design elements, a plurality of library design circuit elements adapted to store a uniquely defined set of input and output signals to enable a logic BIST, and a plurality of latches adapted to store a plurality of values corresponding to a behavioral profile of a test clock. | 02-26-2009 |
20100088561 | FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS - A method and circuits for testing an integrated circuit at functional clock frequency by providing a test controller generating control signals that assure proper latching of test patterns in scan chains at tester frequency and propagation of the test pattern through logic circuits being tested at functional clock frequency. | 04-08-2010 |
20100088562 | FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS - A method and circuits for testing an integrated circuit at functional clock frequency by providing a test controller generating control signals that assure proper latching of test patterns in scan chains at tester frequency and propagation of the test pattern through logic circuits being tested at functional clock frequency. | 04-08-2010 |
20120179944 | DENSE REGISTER ARRAY FOR ENABLING SCAN OUT OBSERVATION OF BOTH L1 AND L2 LATCHES - A scannable register array structure includes a plurality of individual latches, each configured to hold one bit of array data in a normal mode of operation. The plurality of individual latches operate in scannable latch pairs in a test mode of operation, with first latches of the scannable latch pairs comprising L1 latches and second latches of the scannable latch pairs comprising L2 latches. A test clock signal generates a first clock pulse signal, A, for the L1 latches and a second clock pulse signal, B, for the L2 latches. The L2 latches are further configured to selectively receive L1 data therein upon a separate activation of the B clock signal, independent of the test clock signal, such that a scan out operation of the individual latches results in observation of L1 latch data. | 07-12-2012 |
20120187953 | CIRCUIT FOR DETECTING STRUCTURAL DEFECTS IN AN INTEGRATED CIRCUIT CHIP, METHODS OF USE AND MANUFACTURE AND DESIGN STRUCTURES - Detection circuits, methods of use and manufacture and design structures are provided herein. The structure includes at least one signal line traversing one or more metal layers of an integrated circuit. Circuitry is coupled to the at least one signal line, which is structured to receive a signal with a known signal from the at least one signal line or a signal from a different potential and, based on which signal is received, determine whether there is a structural defect in the integrated circuit. | 07-26-2012 |
20120221910 | MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST) - Built-in self-test (BIST) microcontroller integrated circuit adapted for logic verification. Microcontroller includes a plurality of hardware description language files representing a hierarchical description of the microcontroller, the plurality of hardware description language files including a library of circuit design elements, a plurality of library design circuit elements adapted to store a uniquely defined set of input and output signals to enable a logic BIST, and a plurality of latches adapted to store a plurality of values corresponding to a behavioral profile of a test clock. | 08-30-2012 |
20150070048 | VERIFYING PARTIAL GOOD VOLTAGE ISLAND STRUCTURES - Structures, methods, and systems for designing and verifying integrated circuits including redundant logic blocks are provided. An integrated circuit includes selection logic and selectable logic blocks that are individually controllable by the selection logic. The selectable logic blocks include respective instances of a redundant logic block, and respective instances of an interface logic block that selectively disable the redundant logic blocks in the integrated circuit. | 03-12-2015 |
20150247896 | CIRCUIT FOR DETECTING STRUCTURAL DEFECTS IN AN INTEGRATED CIRCUIT CHIP, METHODS OF USE AND MANUFACTURE AND DESIGN STRUCTURES - Detection circuits, methods of use and manufacture and design structures are provided herein. The structure includes at least one signal line traversing one or more metal layers of an integrated circuit. Circuitry is coupled to the at least one signal line, which is structured to receive a signal with a known signal from the at least one signal line or a signal from a different potential and, based on which signal is received, determine whether there is a structural defect in the integrated circuit. | 09-03-2015 |
Patent application number | Description | Published |
20140021381 | BLOWOUT PREVENTER WITH PRESSURE-ISOLATED OPERATING PISTON ASSEMBLY - A ram-type blowout preventer including an operating piston assembly isolated from wellbore pressure effects is provided. In one embodiment, a blowout preventer includes piston coupled to a ram by a connecting rod, and the connecting rod is inserted into a recess in the ram. A pressure-isolating seal may be provided in the recess between the connecting rod and the ram to isolate the end of the connecting rod within the recess from wellbore pressure in the blowout preventer. Additional systems, devices, and methods are also disclosed. | 01-23-2014 |
20140021382 | ASYMMETRICAL BUTTON FOR RAM-TYPE BLOWOUT PREVENTERS - An asymmetrical ram button is provided. In one embodiment, a system includes a blowout preventer including such a button. Particularly, the blowout preventer may include an actuation assembly having the asymmetric ram button attached to a connecting rod coupled to a piston. The asymmetric body of the button can engage an internal shoulder of the ram such that a retraction force on the actuation assembly causes the asymmetrical ram button to load against the internal shoulder. Additional systems, devices, and methods are also disclosed. | 01-23-2014 |
20140084192 | LINEAR CLUTCH FOR BLOWOUT PREVENTER - Linear clutches for reducing axial loads in a system are provided. In one embodiment, a system includes a blowout preventer having a ram coupled to an actuation assembly. A locking assembly is positioned within the system to enable an end of the locking sleeve to engage the actuation assembly and to lock the actuation assembly and the ram into place. In this embodiment, the locking sleeve is segmented and includes at least one groove to engage a complimentary surface of the actuation assembly. Additional systems, devices, and methods are also disclosed. | 03-27-2014 |
20150144814 | BLOWOUT PREVENTER WITH PRESSURE-ISOLATED OPERATING PISTON ASSEMBLY - A ram-type blowout preventer including an operating piston assembly isolated from wellbore pressure effects is provided. In one embodiment, a blowout preventer includes piston coupled to a ram by a connecting rod, and the connecting rod is inserted into a recess in the ram. A pressure-isolating seal may be provided in the recess between the connecting rod and the ram to isolate the end of the connecting rod within the recess from wellbore pressure in the blowout preventer. Additional systems, devices, and methods are also disclosed. | 05-28-2015 |
20160024870 | ASYMMETRICAL BUTTON FOR RAM-TYPE BLOWOUT PREVENTERS - An asymmetrical ram button is provided. In one embodiment, a system includes a blowout preventer including such a button. Particularly, the blowout preventer may include an actuation assembly having the asymmetric ram button attached to a connecting rod coupled to a piston. The asymmetric body of the button can engage an internal shoulder of the ram such that a retraction force on the actuation assembly causes the asymmetrical ram button to load against the internal shoulder. Additional systems, devices, and methods are also disclosed. | 01-28-2016 |
Patent application number | Description | Published |
20080256398 | Using EMI signals to facilitate proactive fault monitoring in computer systems - A system that monitors electromagnetic interference (EMI) signals to facilitate proactive fault monitoring in a computer system is presented. During operation, the system receives EMI signals from one or more antennas located in close proximity to the computer system. The system then analyzes the received signals to proactively detect anomalies during operation of the computer system. | 10-16-2008 |
20090306920 | COMPUTER SYSTEM WITH INTEGRATED ELECTROMAGNETIC-INTERFERENCE DETECTORS - Embodiments of a system that determines a condition associated with an integrated circuit disposed on a circuit board are described. During operation, the system receives electromagnetic-interference (EMI) signals from one or more antennas while the integrated circuit is operating, where the one or more antennas are disposed on the circuit board. Then, the system analyzes the received EMI signals to determine the condition. | 12-10-2009 |
20100033922 | CONTROLLING A COOLING FAN FOR A STORAGE ARRAY - Some embodiments of the present invention provide a system that controls a cooling fan for a storage array. During operation, an input-output (I/O) metric of the storage array is monitored. Then, the cooling fan is controlled based on the I/O metric. | 02-11-2010 |
20100121788 | GENERATING A UTILIZATION CHARGE FOR A COMPUTER SYSTEM - Some embodiments of the present invention provide a system that generates a utilization charge for a computer system. First, a set of performance parameters of the computer system are monitored. Next, a power utilization of the computer system is inferred based on the set of performance parameters and a power-utilization model. Then, a utilization charge is generated based on the power utilization of the computer system. | 05-13-2010 |
20100284781 | MITIGATING MECHANICAL VIBRATIONS CAUSED BY A FAN IN A COMPUTER SYSTEM - One embodiment provides a system that mitigates vibrations caused by cooling fans in a computer system. More specifically, the system includes a cooling fan mechanically coupled to the chassis of the computer system, wherein vibrations generated by the cooling fan are coupled to the chassis. The system also includes an actuation mechanism that creates a relative displacement between the cooling fan and the chassis when a control signal is applied to the actuation mechanism. The system additionally includes a detection mechanism which detects the relative displacement and generates a feedback signal which represents the relative displacement. The system further includes a control signal generation mechanism which converts the feedback signal into the control signal, which is subsequently applied to the actuation mechanism. When the control signal is applied to the actuation mechanism, the relative displacement between the cooling fan and the chassis vibrationally decouples the cooling fan from the chassis. | 11-11-2010 |
20100332185 | ANALYTICAL BANDWIDTH ENHANCEMENT FOR MONITORING TELEMETRIC SIGNALS - Some embodiments provide a system that analyzes telemetry data from a monitored system. During operation, the system obtains the telemetry data as a set of telemetric signals from the monitored system and groups the telemetry data into one or more clusters of correlated telemetric signals from the telemetric signals. Next, the system increases a bandwidth associated with monitoring the telemetric signals. To increase the bandwidth, the system omits one or more of the correlated telemetric signals from each of the clusters during sampling of the telemetric signals and estimates the omitted correlated telemetric signals by applying a nonlinear, nonparametric regression technique to the sampled telemetric signals. | 12-30-2010 |