Kwack, KR
Heeyoung Kwack, Paju-Si KR
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20120104404 | HIGH LIGHT TRANSMITTANCE IN-PLANE SWITCHING LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present disclosure relates to a high light transmittance in-plan switching liquid crystal display device and a method for manufacturing the same. The liquid crystal display device includes: a substrate; a gate line disposed in horizontal direction on the substrate; a gate insulating layer covering the gate line; a data line disposed in vertical direction on the gate insulating layer; an additional insulating layer on the data line having same size and shape with the data line; a passivation layer covering the additional insulating layer; and a common electrode overlapping with the data line on the passivation layer. According to the present disclosure, the failure due to the parasitic capacitance and the load for driving the display panel are reduced and it is possible to make large and high definition display panel. | 05-03-2012 |
20120139871 | ELECTROSTATIC CAPACITY TYPE TOUCH SCREEN PANEL - A touch screen panel for display apparatus is provided, which includes a substrate; an electrode forming part including a plurality of first electrode serials and a plurality of second electrode serials arranged to cross over the plurality of first electrode serials; a routing wire forming part including a plurality of first routing wires connected to the plurality of first electrode serials, respectively and a plurality of second routing wires connected to the plurality of second electrode serials, respectively; a plurality of first insulation patterns formed at a cross region of the first and second electrode serials to insulate the first electrode serial from the second electrode serial; and at least one buffer pattern to be positioned at least one side of each of the first insulation patterns, and be spaced at a predetermined distance from the first insulation pattern. | 06-07-2012 |
20130087797 | HIGH LIGHT TRANSMITTANCE IN-PLANE SWITCHING LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present disclosure relates to a high light transmittance in-plan switching liquid crystal display device and a method for manufacturing the same. The liquid crystal display device includes: a substrate; a gate line disposed in horizontal direction on the substrate; a gate insulating layer covering the gate line; a data line disposed in vertical direction on the gate insulating layer; an additional insulating layer on the data line having same size and shape with the data line; a passivation layer covering the additional insulating layer; and a common electrode overlapping with the data line on the passivation layer. According to the present disclosure, the failure due to the parasitic capacitance and the load for driving the display panel are reduced and it is possible to make large and high definition display panel. | 04-11-2013 |
Hee Young Kwack, Gyeonggi-Do KR
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20110156040 | THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR FABRICATING THE SAME - A thin film transistor array substrate including a substrate, a gate line intersecting a data line to define a pixel region on the substrate, a switching element disposed at an intersection of the gate line and the data line, a plurality of pixel electrodes and a plurality of first common electrodes alternately arranged in the pixel region, a second common electrode overlapping the data line and interposed between a gate insulation film and a protective film, a first storage electrode on the substrate, a second storage electrode overlapping the first storage electrode, and an organic insulation film on the switching element, the second storage electrode, the data line, a gate pad, and a data pad, wherein the second common electrode covers the data line, the protective film, the organic insulation film, and the gate insulation film, and has inclined surfaces connected to the surface of the substrate. | 06-30-2011 |
20120280237 | Thin Film Transistor Substrate and Method for Fabricating the Same - The present invention relates to a thin film transistor substrate and a method for fabricating the same which can reduce a number of steps. The method for fabricating a thin film transistor substrate includes the steps of a first mask step forming a first conductive pattern on a substrate to include a gate electrode and a gate line, a second mask step depositing a gate insulating film on the substrate having the first conductive pattern formed thereon and forming a second conductive pattern on the gate insulating film to include a semiconductor pattern, source and drain electrodes and data line, a third mask step depositing a first protective film on the substrate having the second conductive pattern formed thereon and forming a pixel contact hole for exposing the drain electrode passed through the first protective film, a fourth mask step forming a third conductive pattern on the first protective films to have a common electrode and a common line and a second protective film to form an undercut with the common electrode and to include a pixel contact hole which exposes the drain electrode on the common electrode, and a fifth mask step forming a fourth conductive pattern to include a pixel electrode spaced from the common electrode by a space provided by the undercut. | 11-08-2012 |
20130162926 | Liquid Crystal Display Device and Method for Fabricating the Same - Disclosed are a liquid crystal display device which reduces the number of masks and improves an aperture ratio, and a method for fabricating the same. The liquid crystal display device includes gate and data lines perpendicularly intersecting on a substrate having pixel and pad parts; a thin film transistor on the substrate at the intersection of the gate and data lines; a pixel electrode on the substrate at the pixel part and connected directly to a drain electrode of the thin film transistor; an insulating film on the overall surface of the substrate including the pixel electrode and the thin film transistor; an organic film on the insulating film over the thin film transistor and the data line; and a common electrode of slit shapes overlapping the pixel electrode such that the insulating film is interposed between the common electrode and the pixel electrode. | 06-27-2013 |
20140134810 | Thin Film Transistor Substrate and Method for Fabricating the Same - The present invention relates to methods for fabricating a thin film transistor substrate. | 05-15-2014 |
Hee-Young Kwack, Paju-Si KR
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20130087794 | Thin Film Transistor Substrate and Method of Fabricating the Same - Disclosed are a thin film transistor substrate and a method of fabricating the same in which the number of processes is reduced. The method includes forming a first conductive pattern including gate electrodes and gate lines on a substrate through a first mask process, depositing a gate insulating film and forming a second conductive pattern including a semiconductor pattern, source and drain electrodes and data lines through a second mask process, depositing first and second passivation films and forming pixel contact holes passing through the first and second passivation films and exposing the drain electrodes through a third mask process, and forming a third conductive pattern including a common electrode and a common line and forming a third passivation film formed in an undercut structure with the common electrode through a fourth mask process, simultaneously, and forming a fourth conductive pattern including pixel electrodes through a lift-off process. | 04-11-2013 |
20140175442 | ARRAY SUBSTRATE FOR FRINGE FIELD SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - An array substrate for an FFS mode LCD device includes a gate line and a gate pad electrode on a substrate; a common line parallel to the gate line; a data line extending along a second direction in a display area and a data pad electrode disposing in a non-display area; a thin film transistor electrically connected to the gate and data lines; a first passivation layer covering the thin film transistor and the data line; a second passivation layer on the first passivation layer and having a first thickness in the display area and a second thickness in the non-display area; a common electrode on the second passivation layer and connected to the common line; a third passivation layer on the common electrode; and a pixel electrode, a gate auxiliary pad electrode and a data auxiliary pad electrode on the third passivation layer. | 06-26-2014 |
Ho Sang Kwack, Cheonan-Si KR
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20100260223 | Quantum dot laser diode and method of fabricating the same - A quantum dot laser diode and a method of fabricating the same are provided. The quantum dot laser diode includes: a first clad layer formed on an InP substrate; a first lattice-matched layer formed on the first clad layer; an active layer formed on the first lattice-matched layer, and including at least one quantum dot layer formed of an InAlAs quantum dot or an InGaPAs quantum dot which is grown by an alternate growth method; a second lattice-matched layer formed on the active layer; a second clad layer formed on the second lattice-matched layer, and an ohmic contact layer formed on the second clad layer. | 10-14-2010 |
Ho Sang Kwack, Chungcheongnam-Do KR
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20090296766 | QUANTUM DOT LASER DIODE AND METHOD OF MANUFACTURING THE SAME - Provided are a quantum dot laser diode and a method of manufacturing the same. The method of manufacturing a quantum dot laser diode includes the steps of: forming a grating structure layer including a plurality of gratings on a substrate; forming a first lattice-matched layer on the grating structure layer; forming at least one quantum dot layer having at least one quantum dot on the first lattice-matched layer; forming a second lattice-matched layer on the quantum dot layer; forming a cladding layer on the second lattice-matched layer; and forming an ohmic contact layer on the cladding layer. Consequently, it is possible to obtain high gain at a desired wavelength without affecting the uniformity of quantum dots, so that the characteristics of a laser diode can be improved. | 12-03-2009 |
20110165716 | QUANTUM DOT LASER DIODE AND METHOD OF FABRICATING THE SAME - A quantum dot laser diode and a method of fabricating the same are provided. The quantum dot laser diode includes: a first clad layer formed on an InP substrate; a first lattice-matched layer formed on the first clad layer; an active layer formed on the first lattice-matched layer, and including at least one quantum dot layer formed of an InAlAs quantum dot or an InGaPAs quantum dot which is grown by an alternate growth method; a second lattice-matched layer formed on the active layer; a second clad layer formed on the second lattice-matched layer; and an ohmic contact layer formed on the second clad layer. | 07-07-2011 |
Ho Sang Kwack, Seoul KR
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20130001617 | LIGHT EMITTING DEVICE - Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises a reflective layer, a second conductive type semiconductor layer on the reflective layer, an active layer on the second conductive type semiconductor layer, a first conductive type semiconductor layer on the active layer, and a pad electrode on the first conductive type semiconductor layer. The reflective layer comprises a predetermined pattern. | 01-03-2013 |
20150014731 | LIGHT EMITTING DEVICE PACKAGE - A light emitting device package includes: a package body having a first cavity; an electrode layer comprising a first electrode and a second electrode which are electrically isolated from each other; a light emitting device electrically connected to the electrode layer on the package body; a protective device disposed in a second cavity formed at the package body and electrically connected to the electrode layer; a reflective layer on the protective device; and a molding part on the light emitting device, wherein at least one of the first electrode and the second electrode is disposed on the package body. | 01-15-2015 |
Hyun-Sun Kwack, Yongin-Si KR
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20110223915 | APPARATUS AND METHOD FOR ALLOWING FEMTO BASE STATION TO EFFICIENTLY PERFORM BEACONING IN WIRELESS COMMUNICATION SYSTEM - An apparatus and a method for allowing a femto base station to efficiently perform beaconing in a wireless communication system are provided. The method includes obtaining a System Information Block (SIB) message of a neighbor macro base station transmitted to a terminal by the neighbor macro base station. Information of the femto base station is added to the obtained SIB message of the macro base station and the SIB message is updated. The updated SIB message is transmitted to the terminal. | 09-15-2011 |
Il Young Kwack, Yongin-Si KR
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20140106435 | NOVEL LACTOBACILLUS PLANTARUM ISOLATED FROM LEAVES OF CAMELLIA SINENSIS - Disclosed are novel | 04-17-2014 |
20140328953 | SKIN PREPARATION COMPOSITION FOR EXTERNAL USE HAVING EXCELLENT ANTISEPTIC ABILITY - The present invention relates to a skin preparation composition for external use having excellent antiseptic ability without using chemical antiseptics. More particularly, the present invention relates to a skin preparation composition for external use, comprising: glyceryl undecylenate having excellent antiseptic ability; and one or more mixtures of ethylhexylglycerin, glyceryl caprylate, p-anisic acid and a citrus mixed extract, thus improving antiseptic ability through the increased effects of antiseptic abilities of those materials. | 11-06-2014 |
20150197721 | NOVEL LACTOBACILLUS PLANTARUM ISOLATED FROM LEAVES OF CAMELLIA SINENSIS - Disclosed are novel | 07-16-2015 |
20150197722 | NOVEL LACTOBACILLUS PLANTARUM ISOLATED FROM LEAVES OF CAMELLIA SINENSIS - Disclosed are novel | 07-16-2015 |
20150197723 | NOVEL LACTOBACILLUS PLANTARUM ISOLATED FROM LEAVES OF CAMELLIA SINENSIS - Disclosed are novel | 07-16-2015 |
20150246084 | COMPOSITION FOR REMOVING KERATINOUS SKIN MATERIAL COMPRISING GREEN TEA LACTOBACILLUS - The present invention relates to a composition for removing keratinous skin material, the composition comprising a | 09-03-2015 |
Il Young Kwack, Seoul KR
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20110250315 | METHOD FOR PREPARING FERMENTED TEA USING BACILLUS SP. STRAINS (As Amended) - Disclosed is a method for manufacturing fermented tea having superior flavor using | 10-13-2011 |
Jinho Kwack, Yongin-City KR
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20160137769 | COMPOSITION FOR FABRICATING ORGANIC FILM, ORGANIC LIGHT-EMITTING DISPLAY APPARATUS MANUFACTURED USING THE SAME, AND METHOD OF MANUFACTURING THE ORGANIC LIGHT-EMITTING DISPLAY APPARATUS - A composition for fabricating an organic film, an organic light-emitting display apparatus manufactured using the same, and a method of manufacturing the organic light-emitting display apparatus, the composition comprising a first compound that includes n substituents Y, and m polymerizable groups P | 05-19-2016 |
Jinho Kwack, Kyounggi-Do KR
Patent application number | Description | Published |
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20120146489 | DEVICE COMPRISING AN ORGANIC LIGHT EMITTING DISPLAY - The invention relates to a sandwich structure ( | 06-14-2012 |
20120268762 | DOCUMENT WITH AN INTEGRATED DISPLAY AND METHOD OF MANUFACTURE THE SAME - A method of manufacturing a document ( | 10-25-2012 |
Jun Ho Kwack, Geumsan-Gun KR
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20130109438 | MOBILE TERMINAL WITH DISPLAY DEVICES AND METHOD OF OPERATING THE SAME | 05-02-2013 |
20140374014 | RESIN COATING APPARATUS AND A METHOD FOR FORMING A RESIN LAYER USING THE SAME - A resin coating apparatus includes a display panel disposed on a stage. A plurality of nozzles correspond to the display panel. The nozzles have a plurality of outlets configured to discharge a first resin and a second resin to the display panel. The second resin has different viscosity from the first resin. A connecting member holds the plurality of nozzles. A first supply unit is connected to the nozzles, and the first supply unit is configured to supply the first resin. The second supply unit is connected to the nozzles, and the second supply unit is configured to supply the second resin. | 12-25-2014 |
20140376122 | FLAT PANEL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A flat panel display device includes a window, a mold, a black matrix, a display panel and a resin layer. The window has a connecting part and a transmission part through which light may pass. The mold is coupled to the connecting part of the window. The black matrix is disposed under the connecting part of the window, and the black matrix blocks light which is leaked from the mold. The display panel is disposed under the window. The display panel includes a first substrate and a second substrate, which is disposed opposite to the first substrate. The display panel further includes a polarizer which is disposed on the first substrate. The resin layer is disposed between the window and the display panel, and the resin layer is hardened by ultraviolet ray. | 12-25-2014 |
20150030799 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - A display apparatus includes a first substrate including a display region and a peripheral region, where the peripheral region surrounds the display region, a second substrate disposed opposite to the first substrate, a resin layer disposed between the first substrate and the second substrate, where the resin layer covers a surface of the second substrate, a first member disposed at a bottom surface of the second substrate corresponding to the peripheral region of the first substrate, where the first member covers a portion of the resin layer, and a second member which surrounds the first substrate, the second substrate, the first member and the resin layer, where the second member is disposed at opposing side portions of the second substrate, the second member is spaced apart from the first substrate, and the second member surrounds opposing side portions of the resin layer. | 01-29-2015 |
Jun-Ho Kwack, Yongin-City KR
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20130036638 | DISPLAY DEVICE - A display device includes: a flexible display panel including a recognition pattern; a housing for holding the flexible display panel, wherein varying amounts of a display area of the flexible display panel are exposable to the outside to display an image; and a sensor in the housing for sensing an amount of the exposed display area corresponding to the recognition pattern. | 02-14-2013 |
20130127917 | DISPLAY DEVICE - A display device includes a flexible display including a flexible display panel and a flexible touch panel, and a housing configured to enclose the flexible display while allowing the flexible display to move relative to the housing such that a portion of the flexible display is drawn out of the housing and retracted into the housing. The display device further includes a marker configured to contact a location of the flexible touch panel when a portion of the flexible display is drawn out of the housing. The marker is provided such that the contact location changes as the flexible display moves relative to the housing. The display device also includes at least one processor configured to compute the contact location on the flexible display and to adjust the size of an image displayed on the flexible display panel based on the computed contact location. | 05-23-2013 |
20130300677 | FLEXIBLE DISPLAY DEVICE AND METHOD OF SENSING WARPAGE OF THE SAME - A flexible display device includes: a flexible display unit configured to display an image; a flexible touch screen unit disposed over the flexible display unit; an insulating film interposed between the flexible display unit and the flexible touch screen unit, and a spacer formed between the flexible touch screen unit and the insulating film in order to maintain a distance between the flexible touch screen unit and the insulating film. A conductive layer is further formed over the insulating film and configured to touch the flexible touch screen unit when the flexible display device is bent. A degree of warpage of the flexible display device can be measured and thus can be utilized in various warpage events of the flexible display device by using warpage values. | 11-14-2013 |
20130314387 | DISPLAY DEVICE, CALIBRATION METHOD OF DISPLAY DEVICE, AND DISPLAY METHOD OF DISPLAY DEVICE - A display device includes a flexible display panel including a recognition pattern, the recognition pattern having a plurality of sub-patterns with different color concentrations and disposed in a first direction, a housing accommodating the flexible display panel, the flexible display panel being configured to extend out of the housing in the first direction to vary a display area, and a photosensor in the housing, the photosensor corresponding to the recognition pattern and being configured to recognize the recognition pattern and to sense the display area of the flexible display panel. | 11-28-2013 |
20130314762 | DISPLAY DEVICE - A display device includes a flexible display panel with a magnetic pattern, the magnetic pattern including a magnetic substance, a magnetic sensor configured to recognize magnetism of the magnetic pattern and to sense a display area of the flexible display panel in accordance with the magnetic pattern, the display area being variable in a first direction, and a controller connected to the magnetic sensor and to the flexible display panel, the controller being configured to display on the flexible display panel an image corresponding to the display area of the flexible display panel sensed by the magnetic sensor. | 11-28-2013 |
20130334981 | DISPLAY DEVICE - A display device includes: a flexible display panel having a display area variably exposed in a first direction and including a conductive pattern; a sensing pattern positioned to correspond to the conductive pattern in the first direction; and a controller sensing a current flowing to one of the conductive pattern and the sensing pattern to display an image corresponding to the display area of the flexible display panel in the flexible display panel. | 12-19-2013 |
20130342439 | FLEXIBLE DISPLAY APPARATUS - A flexible display apparatus includes a substrate that is flexible and is foldable according to an intention of a user, the substrate including a display area, wherein a size of the substrate is variable according to a folding thereof, a deformation sensing unit that is in an overlapping relationship with the display area and that senses deformation of the substrate, a control unit obtaining information from the deformation sensing unit, and a resolution adjusting unit that is controlled by the control unit and adjusts a resolution of an image displayed on the display area. | 12-26-2013 |
20140002430 | FLEXIBLE DISPLAY DEVICE AND DRIVING METHOD THEREOF | 01-02-2014 |
20140098055 | DISPLAY DEVICE - A display device includes a first substrate, a display section that is on the first substrate and that displays an image, first pad portions at a first directional edge of the first substrate and connected to the display section and to a driver integrated circuit (driver IC) that supplies a driving voltage, a second substrate on the first substrate with the display section interposed therebetween, and which exposes the first pad portions, a touch section that is on the second substrate and that corresponds to the display section, second pad portions on the second substrate and connected to edges of the touch section, a main flexible printed circuit board (main FPCB) connected to the first pad portions, and a touch flexible printed circuit board (touch FPCB) connected to the second pad portions and overlapping the main FPCB. | 04-10-2014 |
20140124803 | DISPLAY PANEL, CHIP ON FILM AND DISPLAY DEVICE INCLUDING THE SAME - A display panel includes a display area including a display element, and a non-display area adjacent to the display area, the non-display area including a plurality of conductive pads. The conductive pads are spaced apart at a predetermined distance so as to form a first pad row and a second pad row, the conductive pads collectively having a center portion and lateral portions. A distance between the first pad row and the second pad row is greater at at least one of the lateral end portions than at the center portion. | 05-08-2014 |
20140198436 | DISPLAY DEVICE HAVING COVER WINDOW - A display device includes a cover window having curves at one or more outer blocks of the cover window, an outside and an inside of the cover window each having a shape of a quadrisected arc of an ellipse and together forming a lens, and a thickness of the cover window at one of the outer blocks being thicker than a thickness of the cover window at a center of the cover window; and a display panel attached to the inside of the cover window. | 07-17-2014 |
20150013900 | SLIT NOZZLE AND METHOD OF MANUFACTURING DISPLAY APPARATUS USING THE SAME - A slit nozzle includes: a first head, a second head facing the first head; and a plurality of cores located between the first head and the second head, wherein the plurality of cores includes: a first core and a third core for coating a coating solution; and a second core located between the first core and the third core so that coating of the coating solution via the first core and the third core is achieved at different instants of time. | 01-15-2015 |
Kae Dal Kwack, Gyeonggi-Do KR
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20120213019 | SEMICONDUCTOR MEMORY APPARATUS AND DATA INPUT/OUTPUT METHOD THEREOF - A semiconductor memory apparatus includes: a first bit line of to a first memory bank; a first middle input/output line configured to be electrically connected to the first bit line; a second bit line of a second memory bank; a second middle input/output line configured to be electrically connected to the second bit line; and a shared local input/output line configured to be electrically connected to the first and second middle input/output lines. A bank selection signal controls both the electrical connection between the shared local input/output line and the first middle input/output line and the electrical connection between the shared local input/output line and the second middle input/output line. | 08-23-2012 |
Kae Dal Kwack, Ichon-Si KR
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20110075503 | MAIN DECODING CIRCUIT AND SEMICONDUCTOR MEMORY APPARATUS INCLUDING THE SAME - A main decoding circuit includes a shared column selection signal generating unit and a switching unit. The shared column selection signal generating unit receives a column decoding signal to generate a shared column selection signal. The switching unit selectively provides the shared column selection signal to one of a column selection line of a first memory bank and a column selection line of a second memory bank in response to a bank selection signal. | 03-31-2011 |
20110085393 | SEMICONDUCTOR MEMORY APPARATUS AND DATA INPUT/OUTPUT METHOD THEREOF - A semiconductor memory apparatus includes: a first bit line of to a first memory bank; a first middle input/output line configured to be electrically connected to the first bit line; a second bit line of a second memory bank; a second middle input/output line configured to be electrically connected to the second bit line; and a shared local input/output line configured to be electrically connected to the first and second middle input/output lines. A bank selection signal controls both the electrical connection between the shared local input/output line and the first middle input/output line and the electrical connection between the shared local input/output line and the second middle input/output line. | 04-14-2011 |
Kae-Dal Kwack, Seoul KR
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20090108327 | Gate pattern having two control gates, flash memory including the gate pattern and methods of manufacturing and operating the same - Provided may be a gate pattern, flash memory and methods of manufacturing and operating the same. A gate pattern may include a floating gate on a tunneling dielectric layer, an inter-gate dielectric layer on the floating gate, a first control gate on the inter-gate dielectric layer, and a second control gate on the inter-gate dielectric layer and spaced apart from the first control gate. Each of the control gates sets four states according to an application time of a program voltage applied to the control gates. Thus, one control gate may program 2-bit data. | 04-30-2009 |
20090206385 | NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A non-volatile memory device includes a semiconductor substrate, first and second control gates, and first and second charge storage patterns. The semiconductor substrate includes a protruding active pin having a source region, a drain region and a channel region located between the source and drain regions. The first control gate is located on a first sidewall of the channel region, and the second control gate is located on a second sidewall of the channel region. The second control gate is separated from the first control gate. The first charge storage pattern is located between the first sidewall and the first control gate, and the second charge storage pattern is located between the second sidewall and the second control gate. | 08-20-2009 |
20110069555 | NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A non-volatile memory device includes a semiconductor substrate, first and second control gates, and first and second charge storage patterns. The semiconductor substrate includes a protruding active pin having a source region, a drain region and a channel region located between the source and drain regions. The first control gate is located on a first sidewall of the channel region, and the second control gate is located on a second sidewall of the channel region. The second control gate is separated from the first control gate. The first charge storage pattern is located between the first sidewall and the first control gate, and the second charge storage pattern is located between the second sidewall and the second control gate. | 03-24-2011 |
20110216595 | NAND FLASH MEMORY OF USING COMMON P-WELL AND METHOD OF OPERATING THE SAME - A flash memory using hot carrier injection and a method of operating the same are provided. A plurality of strings constituting a page are formed on a single p-well and share the p-well. During a program operation, a string selection transistor is turned off, and electrons are accumulated in a source or drain region in response to a bias voltage applied to the p-well. Thereafter, the accumulated electrons are trapped in a charge trap layer of a memory cell in response to a program voltage applied through a word line. Also, during an erase operation, holes accumulated in response to a bias voltage applied to the p-well are trapped in the charge trap layer in response to an erase voltage. The flash memory performs NAND-type program and erase operations using hot carrier injection. | 09-08-2011 |
Kyoung Kuk Kwack, Suwon KR
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20100015898 | Conditioner for Chemical Mechanical Planarization Pad - The present invention provides a conditioner for CMP pad required for global planarization of wafer to achieve high integration of a semiconductor element. The conditioner for CMP pad includes a metal substrate having abrasive particles fixed thereto, a plurality of abrasive particles fixed to the metal substrate, and a layer of metal binder fixing the abrasive particles to the metal substrate. The abrasive particles include at least one pattern. The pattern includes at least one row of abrasive particles and the abrasive particles include bigger abrasive particles and smaller abrasive particles. In addition, a diameter difference between smaller and bigger abrasive particles is 10 to 40%. The present invention ensures uniform dressing of conditioner, superior dressing efficiency and superior performance reproducibility. | 01-21-2010 |
Kyu-Bum Kwack, Seoul KR
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20080317879 | Herb Composition for Asthma Maintenance Therapy and Manufacturing Method Thereof - The present invention relates to a herb composition for asthma maintenance therapy based on Chungsangboha-tang, which is known to be effective in asthma, capable of reducing the long-term suffering of asthma patients and improving their quality of lives and a manufacturing method thereof. The herbal composition of the present invention is characterized by comprising 5-18 parts by weight of | 12-25-2008 |
Myung Joon Kwack, Gyeonggi-Do KR
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20140346532 | OPTICAL INPUT/OUTPUT DEVICE, OPTICAL ELECTRONIC SYSTEM INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME - Disclosed are an optical input/output device and an opto-electronic system including the same. The device includes a bulk silicon substrate, at least one vertical-input light detection element monolithically integrated on a portion of the bulk silicon substrate, and at least one vertical-output light source element monolithically integrated on another portion of the bulk silicon substrate adjacent to the vertical-input light detection element. The vertical-output light source element includes a III-V compound semiconductor light source active layer combined with the bulk silicon substrate by a wafer bonding method. | 11-27-2014 |
Myung Joon Kwack, Gimpo-Si KR
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20150078708 | OPTICAL COUPLER HAVING SELF-FOCUSING REGION AND ARRYED-WAVEGUIDE GRATING STRUCTURE INCLUDING THE SAME - Provided are an optical coupler and an arrayed-waveguide grating structure including the same. The coupler includes a lower clad layer, a core comprising a slab waveguide region disposed on one side of the lower clad layer and a ridge waveguide region disposed on the other side of the lower clad layer, and an upper clad disposed on the core, wherein the ridge waveguide region comprises a self-focusing region configured to focus an optical signal provided form the slab waveguide region and thus to prevent scattering of the optical signal. | 03-19-2015 |
Seo Shin Kwack, Gwacheon-Si KR
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20110111784 | METHOD OF ALLOCATING UPLINK RESOURCES IN WIRELESS COMMUNICATION SYSTEM - A method of allocating uplink resources in a wireless communication system is provided. The method comprises generating a first message which has a preamble and adaptively further includes resource request information based on a communication state with a base station and transmitting the first message to the base station. | 05-12-2011 |
Seung Wook Kwack, Icheon-Si Gyeonggi-Do KR
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20120213011 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus includes: a data output signal transmitter configured to receive a data signal and a data mask signal and transmit a data output signal through a global data line, the data output signal being outputted by determining whether the data signal is masked or not; and a write driver configured to receive the data output signal through the global data line and input the received data output signal to a local data line corresponding to the data output signal. | 08-23-2012 |
Seung Wook Kwack, Daejeon-Shi KR
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20090010082 | DATA TRANSFER APPARATUS IN SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME - A data transfer apparatus in a semiconductor memory device includes a DQ pad, a DQS pad, a DQ driver for transferring the data signal to the DQ pad according to a driver select signal, and a DQS driver for transferring data strobe signal to the DQS pad according to the driver select signal. Any one of the DQ driver and the DQS driver is activated by the driver select signal, and the driver select signal is generated by one of EMRS control code, MRS control code and test mode code. | 01-08-2009 |
Seung Wook Kwack, Ichon-Si KR
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20110026337 | DATA INPUT/OUTPUT CIRCUIT AND SEMICONDUCTOR MEMORY APPARATUS INCLUDING THE SAME - A circuit includes a data input/output unit configured to connect to a first memory bank and a second memory bank. The data input/output unit includes a data switching unit configured to be selectively coupled with the first or second memory bank in response to a bank selection signal, and an input/output driver configured to amplify an output of the data switching unit and transfer the amplified output to a global data line during the read operation, and configured to amplify data from the global data line and transfer the amplified data to the data switching unit during the write operation. | 02-03-2011 |
20110075503 | MAIN DECODING CIRCUIT AND SEMICONDUCTOR MEMORY APPARATUS INCLUDING THE SAME - A main decoding circuit includes a shared column selection signal generating unit and a switching unit. The shared column selection signal generating unit receives a column decoding signal to generate a shared column selection signal. The switching unit selectively provides the shared column selection signal to one of a column selection line of a first memory bank and a column selection line of a second memory bank in response to a bank selection signal. | 03-31-2011 |
20110085393 | SEMICONDUCTOR MEMORY APPARATUS AND DATA INPUT/OUTPUT METHOD THEREOF - A semiconductor memory apparatus includes: a first bit line of to a first memory bank; a first middle input/output line configured to be electrically connected to the first bit line; a second bit line of a second memory bank; a second middle input/output line configured to be electrically connected to the second bit line; and a shared local input/output line configured to be electrically connected to the first and second middle input/output lines. A bank selection signal controls both the electrical connection between the shared local input/output line and the first middle input/output line and the electrical connection between the shared local input/output line and the second middle input/output line. | 04-14-2011 |
Seung Wook Kwack, Icheon-Si KR
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20120120743 | SEMICONDUCTOR MEMORY APPARATUS AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME - A semiconductor memory apparatus includes a shared pad which is configured to output a read operation control signal in a read operation and receive a write operation control signal in a write operation. | 05-17-2012 |
20130033943 | DATA INPUT/OUTPUT CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE - A data input/output circuit includes: an amplification unit configured to generate a data signal by amplifying data of a first input/output line coupled to a bank during a read operation, and generate a driving signal by amplifying data of a second input/output line coupled to a data input/output pad during a write operation; a read driving unit configured to drive the second input/output line in response to the data signal during the read operation; and a write driving unit configured to drive the first input/output line in response to the driving signal during the write operation. | 02-07-2013 |
20140198585 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus includes: a data output signal transmitter configured to receive a data signal and a data mask signal and transmit a data output signal through a global data line, the data output signal being outputted by determining whether the data signal is masked or not; and a write driver configured to receive the data output signal through the global data line and input the received data output signal to a local data line corresponding to the data output signal. | 07-17-2014 |
20150095520 | SEMICONDUCTOR MEMORY APPARATUS AND DATA INPUT AND OUTPUT METHOD THEREOF - A semiconductor memory apparatus includes an input data bus inversion unit, a data input line, a termination unit, a data recovery unit and a memory bank. The input data bus inversion unit determines whether or not to invert a plurality of input data based on an operation mode signal and the plurality of input data and generates a plurality of conversion data. The data input line transmits the plurality of conversion data. The termination unit terminates the data input line in response to the operation mode signal. The data recovery unit receives the plurality of conversion data and generates a plurality of storage data. The memory bank configured to store the plurality of storage data. | 04-02-2015 |
Seung-Wook Kwack, Gyeonggi-Do KR
Patent application number | Description | Published |
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20090022005 | APPARATUS AND METHOD OF CONTROLLING BANK OF SEMICONDUCTOR MEMORY - An apparatus for controlling bank of a semiconductor memory includes a plurality of banks, a peripheral circuit unit that generates and outputs a bank selection signal and a first address, and a bank controller that generates a second address obtained by correcting the first address to match a bank control timing and outputs the generated second address to a bank corresponding to the bank selection signal among the plurality of banks. Since it is easy to ensure a timing margin, it is possible to completely prevent an address generation error, minimize a layout area, and reduce current consumption. | 01-22-2009 |
20120213019 | SEMICONDUCTOR MEMORY APPARATUS AND DATA INPUT/OUTPUT METHOD THEREOF - A semiconductor memory apparatus includes: a first bit line of to a first memory bank; a first middle input/output line configured to be electrically connected to the first bit line; a second bit line of a second memory bank; a second middle input/output line configured to be electrically connected to the second bit line; and a shared local input/output line configured to be electrically connected to the first and second middle input/output lines. A bank selection signal controls both the electrical connection between the shared local input/output line and the first middle input/output line and the electrical connection between the shared local input/output line and the second middle input/output line. | 08-23-2012 |
Won-Sub Kwack, Daejeon KR
Patent application number | Description | Published |
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20150357486 | SOLAR CELL INCLUDING MULTIPLE BUFFER LAYER FORMED BY ATOMIC LAYER DEPOSITION AND METHOD OF FABRICATING THE SAME - Provided are a solar cell and a method for fabricating the same. The solar cell includes: a substrate; a back electrode layer formed on the substrate; a light absorbing layer formed on the back electrode layer; a buffer layer including an O-free first buffer layer formed on the light absorbing layer by atomic layer deposition (ALD) and a second buffer layer formed on the first buffer layer by the atomic layer deposition (ALD); and a front electrode layer formed on the buffer layer. | 12-10-2015 |