Patent application number | Description | Published |
20100193419 | Normal-Pressure Plasma-Based Apparatus for Processing Waste Water by Mixing the Waste Water with Working Gas - There is disclosed a normal-pressure plasma-based apparatus for processing waste water by mixing the waste water with working gas. The apparatus includes a waste water supply, a gas supply, a plasma-based processing unit connected to both of the waste water supply and the gas supply, a reservoir connected to the plasma-based processing unit and a washing tower connected to both of the reservoir and the plasma-based processing unit. The plasma-based processing unit and the washing tower are used together to mix the waste water with the working gas at least twice. The plasma-based processing unit produces active substances to decompose organic compounds and eliminate the colors of the organic compounds. Thus, performance in processing the waste water is excellent while the consumption of time and energy is low. | 08-05-2010 |
20110000432 | One atmospheric pressure non-thermal plasma reactor with dual discharging-electrode structure - A non-thermal plasma reactor includes a reactor chamber, a first electrode unit disposed in the top portion of chamber and a second electrode unit disposed in the bottom of the chamber, so that a plasma treatment region is defined between the first and second electrode units. The first electrode unit includes at least one or arrays of dual discharging-electrode structure embedded in an isolating layer. A high-voltage power supply is connected to the first and second electrode units. An external gas introducing unit is used to allow auxiliary gas into the plasma reaction region so that arrays of dual discharging-electrode structure can enhance the gas discharge process and thus promote the plasma assisted chemical reaction for cleaning purpose. | 01-06-2011 |
20110020189 | Dual-mode plasma reactor - A dual-mode non-thermal plasma reactor includes an air-buffering chamber, a magnetic element provided on the air-buffering chamber, a first electrode disposed in the air-buffering chamber, a second electrode disposed in the air-buffering chamber opposite to the fist electrode, a high-voltage power supply connected to the first and second electrodes and an air-swirling chamber located between the first and second electrodes. The air-swirling chamber includes a first isolating film covering on an internal side of the first electrode, a second isolating film covering on an internal side of the second electrode and an isolating tube placed between the first and second isolating films. An air passageway is defined through the first and second isolating films. An air-swirling space is defined by the first and second isolating films and the isolating tube. The isolating tube includes at least one tunnel in communication with the air-swirling space. | 01-27-2011 |
Patent application number | Description | Published |
20110002437 | SHIFT REGISTERS - A shift register is provided and includes a first shift registering unit and a second shift registering unit. The first shift registering unit generates a first trigger signal at a first output terminal and includes a first pull-down circuit. The second shift registering unit receives the first trigger signal and generates a second trigger signal at a second output terminal. The first trigger signal and the second trigger signal are sequentially asserted. The second shift registering unit includes a second pull-down circuit. The first pull-down circuit and the second pull-down circuit perform pull-down operations at different times. When the first pull-down circuit does not perform the pull-down operation, the second pull-down circuit performs pull-down operations to the first output terminal. | 01-06-2011 |
20110156075 | SEMICONDUCTOR ELEMENT - A semiconductor element according to an embodiment of present application includes a first voltage drop portion providing a first voltage drop, a second voltage drop portion providing a second voltage drop, and a connecting material between the first voltage drop portion and the second voltage drop portion and having a physical dimension smaller than that of at least one of the first voltage drop portion and the second voltage drop portion. The semiconductor element can operate under a total bias voltage. The total bias voltage is greater than the second voltage drop, while the second voltage drop is greater than or equal to the first voltage drop. | 06-30-2011 |
20110205461 | LCD display visual enhancement driving circuit and method - A pixel in a liquid crystal display panel comprises a first sub-pixel area having a first sub-pixel electrode and a second sub-pixel area having a second sub-pixel electrode. Each sub-pixel electrode is associated with a capacitor. When a gate-line signal and a data voltage is provided to the pixel, the voltage level on the first sub-pixel electrode is substantially equal to or slightly higher than the voltage level on the second sub-pixel electrode and the capacitor associated with each sub-pixel electrode is charged. When the gate-line signal has entirely passed on partially passed, a circuit element causes the capacitor associated with the second sub-pixel electrode to transfer its charge to another capacitor, resulting in a reduction of the voltage level on the second sub-pixel electrode. | 08-25-2011 |
20110234577 | SHIFT REGISTER WITH LOW POWER CONSUMPTION - A shift register comprises a plurality of stages. In one embodiment, each stage includes a first output, a second output, a pull-up circuit electrically coupled between a node and the second output, a pull-up control circuit electrically coupled to the node, a pull-down control circuit electrically coupled between the node and the first output, and a control circuit electrically coupled to the node and the first output. | 09-29-2011 |
20110316833 | Shift Register and Architecture of Same on a Display Panel - The present invention relates to a shift register and GOA architecture of the same in a display panel comprising a substrate and a plurality of pixels spatially formed on the substrate defining a number of pixel rows, each pixel row having a height of H. The shift register has the plurality of shift register stages disposed spatially and sequentially on the substrate in such a way that the layout of each shift register stage has a height of (j*H), j being an integer greater than one. Each shift register stages is configured to generate j scanning signals for driving j neighboring pixel rows, respectively. | 12-29-2011 |
Patent application number | Description | Published |
20100285288 | BONDING METHOD FOR HETERO-MATERIALS AND COMPOSITE SHELL BODY MADE THEREBY - A bonding method for hetero-materials includes the steps of: a) preparing a ceramic substrate having opposite first and second surfaces; b) micro-structurizing the substrate to form a plurality of micro-structures and a plurality of indentations on the first surface of the substrate; c) preparing a mold including a first mold part having a mold cavity, and a second mold part; d) disposing the substrate in the mold cavity; e) closing the first mold part so that a molding space is defined between the second mold part and the first surface of the substrate; and f) insert-molding a polymeric material in the molding space so as to form a polymeric layer bonding to the first surface of the substrate by filling the polymeric material into the indentations. A composite shell body including a ceramic substrate and a polymeric layer is also disclosed. | 11-11-2010 |
20110285950 | ACTIVE DEVICE ARRAY SUBSTRATE - An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively. | 11-24-2011 |
Patent application number | Description | Published |
20090304138 | SHIFT REGISTER AND SHIFT REGISTER UNIT FOR DIMINISHING CLOCK COUPLING EFFECT - A shift register and a shift register unit for diminishing clock coupling effect are introduced herein. Each stage shift register unit includes at least one pull-up driving module, a pull-up module, at least one pull-down module and a pull-down driving module. Before a waveform of either a first clock signal or a second clock signal employed by the pull-up module transits into a rising edge, the pull-down driving module employs a first periodic signal to turn on the pull-down module in advance for a specific period, and/or before the waveform of the first or second clock signal employed by the pull-up module transits into a falling edge, the pull-down driving module employs a second periodic signal to turn off the pull-down module in advance for a specific period. Accordingly, the pull-down module can gain a sufficient capability against the clock coupling effect so as to optimize the waveform outputted from the shift register unit. | 12-10-2009 |
20090304139 | SHIFT REGISTER - A shift register includes a plurality of register units cascade-connected with each other. Each register unit includes a pull-up circuit, a pull-up driving circuit, a pull-down circuit, and a pull-down driving circuit. The pull-up circuit coupled to a first clock signal is used for providing an output signal. The pull-up driving circuit turns on in response to a driving pulse from a previous register unit and a second clock signal, and turns off in response to a third clock signal. The pull-down driving circuit which is coupled to an input node of the pull-down circuit, turns on in response to a first clock signal, and turns off in response to a the first clock signal or output of the pull-up driving circuit. | 12-10-2009 |
20100226473 | SHIFT REGISTER - A shift register includes multiple cascade-connected stages. Each stage generates an output signal in response to a clock signal and a first control signal. Each stage includes a pull-up module, a pull-up driving module, a first pull-down module, a second pull-down module, and a third pull-down module. The pull-up module is used for providing the output signal based on the clock signal. The pull-up driving module turns on the pull-up module in response to a first control signal. The first pull-down module adjusts voltage level on the first node to a first supply voltage in response to a second control signal. The second pull-down module adjusts voltage level on the output end to a second supply voltage in response to the second control signal. The third pull-down module adjusts voltage level on the second node to a third supply voltage in response to a third control signal. | 09-09-2010 |
20110246829 | Method for Fast Detection of Node Mergers and Simplification of a Circuit - The present invention discloses a method for fast detection of node mergers and simplification of a circuit. The steps of the method include: (a) a circuit with a large amount of nodes is provided; (b) a target node is selected for computing mandatory assignments (MAs) of the stuck-at 0 and stuck-at 1 fault tests on the target node respectively by a computer; (c) the MAs of the stuck-at 0 and stuck-at 1 fault tests of the target node are utilized to find substitute nodes; (d) the substitute node that is closest to primary inputs is used to replace the target node; and (e) the steps (b)˜(d) are repeated for removing the replaceable nodes and simplifying the circuit. | 10-06-2011 |
Patent application number | Description | Published |
20130293821 | ACTIVE DEVICE ARRAY SUBSTRATE - An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively. | 11-07-2013 |
20130330991 | COMPOSITE MATERIAL AND METHOD FOR PREPARING THE SAME - A composite material includes a porous substrate covered by thermoplastic foil. The porous substrate has a top side, a bottom side, and a plurality of gaps connecting the top side with the bottom side. The thermoplastic foil covers the top side and the bottom side, and fills the gaps. A method for preparing the composite material includes the steps of preparing a porous substrate having a top side, a bottom side, and a plurality of gaps connecting the top side with the bottom side. A top foil is placed on the top side and a bottom foil is placed on the bottom side, and a force is then applied to the top foil at a predetermined temperature, thereby filling the gaps with the top foil or the bottom foil. | 12-12-2013 |
20150316966 | ELECTRONIC DEVICE WITH IMPROVED HEAT DISSIPATION - An electronic device may include: a circuit board having a board surface; a heat-generating source including a first electronic component mounted on the board surface of the circuit board; and a heat dissipating panel stacked over the circuit board, having a panel surface, and formed with a first recess that is indented inwardly from the panel surface and that is defined by a first recess-defining wall. The first electronic component protrudes from the board surface into the first recess to contact the first recess-defining wall. | 11-05-2015 |
20160046013 | RATCHET WRENCH TOOL SET - A ratchet wrench tool set includes a box, tool bits receivable in the box, two side boards mounted to two sides of the box, and a ratcheting device. The ratcheting device includes a rotary connection plate to which a ratcheting head is mounted. The rotary connection plate is rotatably mounted to the two side boards and rotatable between an operation position and a storage position and includes a constraint step section. The slidable constraint cover has a front end that forms a constraint projection section and is slidably mounted between the two side boards. When the slidable constraint cover is moved frontwards, the constraint projection section engages the constraint step section to retain the ratcheting device in the operation position and when the slidable constraint cover is moved rearward, the constraint projection section disengages from the constraint step section to allow the ratcheting device to rotate to the storage position. | 02-18-2016 |
20160096317 | METHOD OF MAKING A MOLDED ARTICLE AND MOLDED ARTICLE - A method of making a molded article includes the steps of providing a first sheet member and a second sheet member that are made of a fiber composite material and that are different in shape. The method further includes laminating the first and second sheet members into a main body that has a thick region and a thin region having a thickness smaller than that of the thick region and forming and bonding a molded body on the main body by a molding technique so as to obtain the molded article. | 04-07-2016 |