San Antonio
Romarico S. San Antonio, Batam Island ID
Patent application number | Description | Published |
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20090215244 | Package Having Exposed Integrated Circuit Device - A package ( | 08-27-2009 |
20100221872 | REVERSIBLE LEADLESS PACKAGE AND METHODS OF MAKING AND USING SAME - A method for manufacturing a semiconductor device package including an electrically conductive lead frame having a plurality of posts disposed at a perimeter of the package. Each of the posts has a first contact surface at the first package face and a second contact surface at the second package face. The lead frame also includes a plurality of post extensions disposed at the second package face. Each of the post extensions includes a bond site formed on a surface of the post extension opposite the second package face. At least one I/O pad on the semiconductor device is electrically connected to the post extension at the bond site using wirebonding, tape automated bonding, or flip-chip methods. The package can be assembled using a lead frame having pre-formed leads, with or without taping, or using partially etched lead frames. A stack of the semiconductor device packages may be formed. | 09-02-2010 |
Romarico S. San Antonio, San Miguel PH
Patent application number | Description | Published |
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20110111562 | Partially Patterned Lead Frames and Methods of Making and Using the Same in Semiconductor Packaging - A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging lead-count, wherein the method lends itself to better automation of the manufacturing line and improved quality and reliability of the packages produced therefrom. A major portion of the manufacturing process steps is performed with a partially patterned strip of metal formed into a web-like lead frame on one side so that the web-like lead frame is also rigid mechanically and robust thermally to perform without distortion or deformation during the chip-attach and wire bond processes, both at the chip level and the package level. The bottom side of the metal lead frame is patterned to isolate the chip-pad and the wire bond contacts only after the front side, including the chip and wires, is hermetically sealed with an encapsulant. The resultant package being electrically isolated enables strip testing and reliable singulation. | 05-12-2011 |
20120126378 | SEMICONDUCTOR DEVICE PACKAGE WITH ELECTROMAGNETIC SHIELDING - A package for a semiconductor device includes shielding from RF interference. The package has a lead frame with a lead and a connecting bar. The lead has an inner end for connecting to the device and an outer end having an exposed surface at the package side face. The connecting bar also has an end with an exposed surface at the package side face. A molding compound overlying the leadframe forms a portion of the side face. Electrically conductive shielding forms a top surface of the package, and extends downward therefrom to form an upper portion of the package side face. The exposed surface at the connecting bar end has an upper edge higher than the upper edge of the exposed surface of lead end. Accordingly, the shielding makes electrical contact with the connecting bar adjacent to its exposed surface, while being electrically isolated from the lead. | 05-24-2012 |
Romarico Santos San Antonio, Batam Island ID
Patent application number | Description | Published |
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20110001224 | LEAD FRAME ROUTED CHIP PADS FOR SEMICONDUCTOR PACKAGES - A redistributed lead frame for use in a molded plastic semiconductor package is formed from an electrically conductive substrate by a sequential metal removal process. The process includes patterning a first side of the substrate to form an array of lands separated by channels; disposing a first molding compound within those channels; patterning a second side of the substrate to form an array of chip attach sites and routing circuits electrically interconnecting the array of lands and the array of chip attach sites; directly electrically interconnecting input/output pads on a semiconductor device to the chip attach sites; and encapsulating the semiconductor device, the array of chip attach sites and the routing circuits with a second molding compound. This process is particularly suited for the manufacture of chip scale packages and very thin packages. | 01-06-2011 |
20110304032 | NO LEAD PACKAGE WITH HEAT SPREADER - A no-lead electronic package including a heat spreader and method of manufacturing the same. This method includes the steps of selecting a matrix or mapped no-lead lead frame with die receiving area and leads for interconnect; positioning an integrated circuit device within the central aperture and electrically interconnecting the integrated circuit device to the leads; positioning a heat spreader in non-contact proximity to the integrated circuit device such that the integrated circuit device is disposed between the leads and the heat spreader; and encapsulating the integrated device and at least a portion of the heat spreader and leads in a molding resin. | 12-15-2011 |