Barnett, TX
Alexander Montgomery Barnett, Cedar Hill, TX US
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20090012916 | Energy optimization system and method - A energy optimization system and method is disclosed that permits energy consumers to minimize their energy costs by purchasing energy on the “spot market” at times wherein the cost of such energy is minimal (or alternatively, at times wherein the cost of such energy has not spiked to abnormally high levels). The invention utilizes information from a load constraint database in conjunction with information on the anticipated spot market energy price to determine when and how long to activate customer power loads. The present invention anticipates that power line frequency monitoring and/or the use of communication to the power providers will provide the necessary information to anticipate the spot market energy price for the desired cost reduction optimization to occur as desired. The present invention is equally applicable to a variety of energy sources, including but not limited to electricity, natural gas, and/or fuel oil. | 01-08-2009 |
Alexander R. Barnett, Houston, TX US
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20110180270 | POSITION RETENTION MECHANISM FOR MAINTAINING A COUNTER MECHANISM IN AN ACTIVATED POSITION - To operate a device for use in a well, a counter mechanism is provided that is actuatable by pressure cycles to an active position that allows actuation of the device to a target state. A position retention mechanism is coupled to the counter mechanism to maintain the counter mechanism in the active position once the counter mechanism has been incremented by the pressure cycles to the active position. | 07-28-2011 |
Howard Barnett, Dallas, TX US
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20080235681 | System, method and apparatus for retrieving schedule information from a remote location for an electronic calendar - A user device accesses a webpage (hosted on a schedule host server) to identify a calendar or schedule of interest for downloading for incorporation into a calendar application within the user device (or otherwise identifies the calendar or schedule from a message received at the user device). A single click on a link within the webpage or message) selects a specific schedule or events or calendar entries corresponding thereto and constitutes a user request for the information. The user's request is redirected to a fulfillment server that retrieves calendar/schedule information corresponding to the selected link and downloads the information to the user's calendar, and thus multiple calendar entries are inserted and stored in response to selection of the link. A calendar plug-in may be provided within the user device for interfacing to the calendar application. Optionally, additional information (i.e., markers, tags, flags) may be inserted or associated with the calendar entries to uniquely identify them and associate them with a specific calendar/schedule. | 09-25-2008 |
James L. Barnett, Missouri City, TX US
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20080218174 | Apparatus and method for identifying proper orientation and electrical conductivity between a semiconductor device and a socket or contactor - A semiconductor device with a semiconductor die thereon and a contactor board are electrically coupled when the electrically conductive elements on the semiconductor device and the contactor board are in physical contact. A continuous electrically conductive path is formed with electrically conductive elements involving both the semiconductor device and the contactor board. A complete electrical circuit involving both the semiconductor device and the contactor board is formed only when the relative orientation of the semiconductor device and the contactor board have predetermined relationship and the electrically conductive elements of the two boards are in good physical contact. | 09-11-2008 |
Joel Barnett, Austin, TX US
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20090026548 | Systems And Methods For Fabricating Nanometric-Scale Semiconductor Devices With Dual-Stress Layers Using Double-Stress Oxide/Nitride Stacks - Systems and methods for fabricating semiconductor devices with dual-stress layers using double-stress oxide/nitride stacks. A method comprises providing NMOS and PMOS regions, selectively forming a dual-stack tensile stress layer over the NMOS region by depositing a tensile silicon nitride layer over the NMOS and PMOS regions, depositing a tensile silicon oxide layer over the tensile silicon nitride layer, removing a portion of the tensile silicon oxide layer from the PMOS region, and removing a portion of the tensile silicon nitride layer from the NMOS region and selectively forming a dual stack compressive stress layer over the PMOS region by depositing a compressive silicon nitride layer over the NMOS and PMOS regions, depositing a compressive silicon oxide layer over the compressive silicon nitride layer, removing a portion of the compressive silicon oxide layer from the NMOS region, and removing a portion of the compressive silicon nitride layer from the NMOS region. | 01-29-2009 |
20110298090 | Capacitors, Systems, and Methods - Capacitors, systems, and methods are disclosed. In one embodiment, the capacitor includes a first electrode. The capacitor may also include a first insulator layer having a positive VCC adjacent to the first electrode. The capacitor may further include a second insulator layer having a negative VCC adjacent to the first insulator layer. The capacitor may also include a third insulator layer having a positive VCC adjacent to the second insulator layer. The capacitor may also include a second electrode adjacent to the third insulator layer. | 12-08-2011 |
Joel Myron Barnett, Austin, TX US
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20120264309 | AMMONIUM SULFIDE PASSIVATION OF SEMICONDUCTORS - The present invention includes methods directed to improved processes for producing a monolayer of sulfur on the surface of a semiconductor. As a surface layer, it functions to passivate the surface; if annealed, it provides a doping element. | 10-18-2012 |
John Duane Barnett, Flower Mound, TX US
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20100307102 | EXPANSION JOINT CONSTRUCTION SYSTEM - The present invention relates generally to an improved expansion joint construction and a method for creating an expansion joint between adjacent roadway slabs. The invention relates specifically to the use of an epoxy blend having improved set times that can be applied in cold weather. | 12-09-2010 |
John O. Barnett, Houston, TX US
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20120145205 | METHOD AND APPARATUS FOR MINIMIZING ACCUMULATION OF POLYMER ON PROCESS EQUIPMENT, ESPECIALLY SAFETY DEVICES - Accumulation of polymer on equipment, which is in contact with polymerizable material during normal process operation, is minimized by the method and apparatus of the present invention. The method comprises positioning and affixing the equipment, such as a pressure relief device, to process apparatus, such as a distillation column, proximate to a wetted region comprising liquid phase fluid in the process apparatus, such that the moving liquid phase fluid is at least intermittently in contact with the equipment and one or more of accumulated polymerizable material, condensate comprising same, and polymer, is washed off of the equipment. The apparatus of the present invention is effective for maintaining the service-readiness of the equipment, which provides for safe long-term operation of the process apparatus. | 06-14-2012 |
Jonathan Clay Barnett, Cypress, TX US
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20150285033 | INSULATED CONDUCTORS FORMED USING A FINAL REDUCTION STEP AFTER HEAT TREATING - An insulated electrical conductor (MI cable) may include an inner electrical conductor, an electrical insulator at least partially surrounding the electrical conductor, and an outer electrical conductor at least partially surrounding the electrical insulator. The insulated electrical conductor may have a substantially continuous length of at least about 100 m. The insulated electrical conductor may have an initial breakdown voltage, over a substantially continuous length of at least about 100 m, of at least about 60 volts per mil of the electrical insulator thickness (about 2400 volts per mm of the electrical insulator thickness) at about 1300° F. (about 700° C.) and about 60 Hz. The insulated electrical conductor may be capable of being coiled around a radius of about 100 times a diameter of the insulated electrical conductor. The outer electrical conductor may have a yield strength based on a 0.2% offset of about 100 kpsi. | 10-08-2015 |
Katherine Emily Barnett, Dallas, TX US
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20150025349 | PAD FOR MEASURING BLOOD LOSS - A pad is disclosed having a grid of absorbent structures (e.g., squares) formed on the pad. The pad may be used to quantify or otherwise assess blood loss by a patient. For example, blood lost by the patient and absorbed by the pad may be quantified by counting the number of saturated squares on the pad and taking into account the known absorbance of each square. | 01-22-2015 |
Kenneth Barnett, Austin, TX US
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20120025877 | LATCH STRUCTURE, FREQUENCY DIVIDER, AND METHODS FOR OPERATING SAME - A latch includes three circuits. The first circuit drives a first output (QB) to a first level when a first input (D) and a first clock phase (CK) are both low, to a second level when D and CK are both high, and provides high impedance (HI-Z) when different logic levels are applied to D and CK. The second circuit drives a second output (Q) to the first level when a third input (DB) and a complimentary clock phase (CKB) are both low, to the second level when DB and CKB are both high, and provides HI-Z when different logic levels are applied to DB and CKB. The third circuit maintains voltages of Q and QB when the first and second circuits provide HI-Z at Q and QB. Odd-number dividers constructed with such latches produce 50% duty cycle operation without restricting output pulse widths to integer multiples of input periods. | 02-02-2012 |
Kenneth C. Barnett, Austin, TX US
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20100327929 | PREDETERMINED DUTY CYCLE SIGNAL GENERATOR - Techniques for generating a signal having a predetermined duty cycle. In an exemplary embodiment, a first counter is configured to count a first number of cycles of an oscillator signal, and a second counter is configured to count a second number of cycles of the oscillator signal, with the second number being greater than the first number. The output of the second counter is used to reset the first and second counters, while the outputs of the first and second counters further drive a toggle latch for generating the signal having predetermined duty cycle. Further aspects include techniques for accommodating odd and even values for the second number. | 12-30-2010 |
20100329158 | RF SINGLE-ENDED TO DIFFERENTIAL CONVERTER - Techniques for designing a highly differential single-ended-to-differential converter for use in, e.g., communications receivers. In an exemplary embodiment, an auxiliary current path including cascomp transistors is coupled to a main current path including input transistors and cascode transistors. The transistors are biased such that inter-modulation products generated by the auxiliary current path cancel out inter-modulation products generated by the main current path. In another exemplary embodiment, current source transistors for the main current path are adaptively biased depending on the level of the input signal received. In an exemplary embodiment, the techniques may be applied to designing a converter for interfacing a single-ended low-noise amplifier (LNA) output voltage with a differential mixer input in a communications receiver. | 12-30-2010 |
20110121910 | PHASE LOCKED LOOP APPARATUS WITH SELECTABLE CAPACITANCE DEVICE - A phase locked loop apparatus includes an oscillator, a variable capacitance device, a selectable capacitance device, and a capacitance controller that is configured to provide a control signal to the selectable capacitance device. The selectable capacitance device is connected to the oscillator and is responsive to the control signal such that the selectable capacitance device has a first capacitance at a first control signal value and a second capacitance at a second control signal value. The capacitance controller only selects either the first capacitance or the second capacitance by providing a control signal that has the first control signal value to select the first capacitance and having the second control signal value to select the second capacitance. | 05-26-2011 |
Kenneth Charles Barnett, Austin, TX US
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20080204148 | AMPLIFIER WITH INTEGRATED FILTER - An amplifier with integrated filter (e.g., an LNA) is described. In one design, the amplifier may include a gain stage, a filter stage, and a buffer stage. The gain stage may provide signal amplification for an input signal. The filter stage may provide filtering for the input signal. The buffer stage may buffer a filtered signal from the filter stage. The amplifier may further include a second filter stage and a second buffer stage. The second filter stage may provide additional filtering for the input signal. The second buffer stage may buffer a second filtered signal from the second filter stage. All of the stages may be stacked and coupled between a supply voltage and circuit ground. The filter stage(s) may implement an elliptical lowpass filter. Each filter stage may include an inductor and a capacitor coupled in parallel and forming a resonator tank to attenuate interfering signals. | 08-28-2008 |
20080220735 | FREQUENCY SELECTIVE AMPLIFIER WITH WIDE-BAND IMPEDANCE AND NOISE MATCHING - This disclosure is directed to a frequency-selective low noise amplifier (LNA) with wide-band impedance and noise matching. The LNAS may include a closed loop circuit that supports wideband input matching. For example, the closed loop circuit may be configure to impedance match an input signal and provide a low noise figure. In addition, the LNA may include an open loop circuit that amplifies the input signal and provides a high output impedance. The open loop circuit may further include a selectivity filter that filters out frequencies outside a desired frequency band. The LNA may drive a tunable band-pass filter via the open loop circuit. | 09-11-2008 |
20080224770 | ACTIVE CIRCUITS WITH ISOLATION SWITCHES - Active circuits with isolation switches are described. In one design, an apparatus includes first and second amplifiers coupled in parallel. Each amplifier receives an input signal and provides an output signal. Each amplifier has a switch that isolates the amplifier when the amplifier is turned off. The first and second amplifiers may be high and low gain amplifiers or two low noise amplifiers (LNAs). The first and second amplifiers may be for different communication systems, different frequency bands, and/or different gain ranges. In general, any number of amplifiers may be coupled in parallel, and each amplifier may have a switch to isolate that amplifier when turned off. A switch for an amplifier may be a shunt switch coupled between an internal node of the amplifier and ground. The shunt switch may be closed when the amplifier is turned off and may be opened when the amplifier is turned on. | 09-18-2008 |
20080231362 | LINEAR TRANSCONDUCTOR FOR RF COMMUNICATIONS - The present patent application comprises a linear transconductor having at least one input and at least one output, comprising a differential amplifier having a plurality of transistors and a plurality of inputs, wherein a difference of input signals is amplified, a cascode circuit having a plurality of transistors, wherein the transistors are operably connected to the differential amplifier, wherein reverse isolation between an input and an output of the linear transconductor is improved by decoupling the input and the output of the linear transconductor by mounting at least one transistor of the plurality of transistors of the cascode circuit as a common-gate stacked on the at least one transistor of the differential amplifier, an active load having a plurality of transistors operably connected between the cascode circuit and supply voltage, and an auxiliary device operably connected to the connection between the active load, the cascode device and ground. | 09-25-2008 |
20090085549 | BANDGAP REFERENCE CIRCUIT WITH REDUCED POWER CONSUMPTION - A bandgap voltage reference circuit and methods for generating a bandgap reference voltage are disclosed. An operational amplifier receives first and second input voltages from a first and second current path, respectively. A buffer stage is coupled to an output of the operational amplifier and generates third and fourth voltages on the first and second path. A temperature dependent current is generated using the third and fourth voltages in combination with a first diode, second diode and a resistor. A third current path mirrors the temperature dependent current and a temperature independent voltage is generated for the bandgap reference voltage in the third current path using the temperature dependent current in combination with a second resistor and related diode. | 04-02-2009 |
20090237143 | CAPACITANCE MULTIPLIER CIRCUIT - A capacitance multiplier circuit is configured to sense a current through a capacitor in an RC filter of the circuit and to multiply the current so as to achieve a capacitance multiplier effect without adding additional circuitry or requiring additional power. The circuit includes an RC filter, a first signal path connected to a filter output, and a second signal path connected to an input to the filter. A current output through the filter (i | 09-24-2009 |
20090289715 | AMPLIFIER WITH IMPROVED LINEARIZATION - According to some embodiments, an amplifier may include a transconductance stage, a tail current source stage, and an adaptive biasing stage. The transconductance stage may be configured to receive an input voltage. The tail current source stage may be configured to provide current to the transconductance stage. The adaptive biasing stage may capacitively couple the transconductance stage to the tail current source stage. | 11-26-2009 |
20110267144 | NOISE-CANCELING FOR DIFFERENTIAL AMPLIFIERS REQUIRING NO EXTERNAL MATCHING - A differential Low Noise Amplifier (LNA) includes a first stage of resistive feedback amplifiers and second stage of complementary amplifiers, where the outputs of the first stage are coupled to the inputs of the second stage in a cross-coupled fashion. An inductive load, such as a transformer, combines signals output from the complementary amplifiers of the second stage. In one example, the LNA has an input impedance of less than 75 ohms, a noise factor of less than 2 dB, and a gain of more than 20 dB. Due to the low input impedance, the LNA is usable to amplify a signal received from a source having a similar low impedance without the use of an impedance matching network between the output of the source and the input of the LNA. | 11-03-2011 |
20120017131 | METHODS AND APPARATUS FOR PROVIDING A BUILT-IN SELF TEST - A built-in self test (BiST) system is described. The BiST system includes a circuit-under-test. The BiST system also includes one or more embedded sensors. Each of the embedded sensors includes one or more switches connected to one or more nodes within the circuit-under-test. The BiST system further includes a signal generator. The BiST system also includes a bus interface. The bus interface provides for external access of the BiST system. | 01-19-2012 |
20120274403 | AMPLIFIER WITH INTEGRATED FILTER - An amplifier with integrated filter (e.g., an LNA) is described. In one design, the amplifier may include a gain stage, a filter stage, and a buffer stage. The gain stage may provide signal amplification for an input signal. The filter stage may provide filtering for the input signal. The buffer stage may buffer a filtered signal from the filter stage. The amplifier may further include a second filter stage and a second buffer stage. The second filter stage may provide additional filtering for the input signal. The second buffer stage may buffer a second filtered signal from the second filter stage. All of the stages may be stacked and coupled between a supply voltage and circuit ground. The filter stage(s) may implement an elliptical lowpass filter. Each filter stage may include an inductor and a capacitor coupled in parallel and forming a resonator tank to attenuate interfering signals. | 11-01-2012 |
Michelle Latrese Barnett, Plano, TX US
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20080248180 | EXTRUDED LEGUME SNACK FOOD - An extruded legume snack food comprising an extruded puff product based on a dried legume powder having a shape that is a facsimile of the natural starting material, such as a pea pod. A legume powder is mixed with a starch, extruded, and then shaped. The extrudate can be shaped by a number of forming devices or, in an alternative embodiment, by the orifice shape of an extrusion die when the extrudate is face cut from the extruder. | 10-09-2008 |
20130202774 | Extruded Legume Snack Food - An extruded legume snack food comprising an extruded puff product based on a dried legume powder having a shape that is a facsimile of the natural starting material, such as a pea pod. A legume powder is mixed with a starch, extruded, and then shaped. The extrudate can be shaped by a number of forming devices or, in an alternative embodiment, by the orifice shape of an extrusion die when the extrudate is face cut from the extruder. | 08-08-2013 |
20150150268 | CONTINUOUS PROCESS AND APPARATUS FOR MAKING A PITA CHIP - A method and apparatus for forming chips, for example, pita chips, from a continuous mass of dough. In a first aspect, the apparatus comprises a first conveyor, a second conveyor, and a first trimmer. The first conveyor and the second conveyor are spaced apart a distance to form a gap. The first trimmer, which can comprise a liquid jet nozzle, is positioned above the gap. In a second aspect, the method comprises using a first conveyor to convey a continuous mass of dough to a first trimmer positioned over a gap between the first conveyor and a second conveyor. The method also comprises using the first trimmer to longitudinally trim a first portion of the continuous mass of dough to form thinner strips of the continuous mass of dough. The thinner strips can be integral with the first portion. | 06-04-2015 |
20150150269 | CONTINUOUS PROCESS AND APPARATUS FOR MAKING A PITA CHIP - A method and apparatus for processing dough, for example, to form pita chips. The dough is split longitudinally to form a first portion of dough and a second portion of dough. In a first aspect, the apparatus comprises a first roller, a second roller, and at least one source of vacuum to provide a first vacuum in the first roller and a second vacuum in the second roller. The first roller and the second roller are spaced apart a distance so that the dough can pass between. In a second aspect, the method comprises providing dough with a first portion and a second portion; conveying the dough between a first roller and a second roller; exposing the first portion to a first vacuum within the first roller, rotating the first roller; exposing the second portion to a second vacuum within the second roller; and rotating the second roller. | 06-04-2015 |
20150150270 | CONTINUOUS PROCESS AND APPARATUS FOR MAKING A PITA CHIP - A method and apparatus for processing dough, for example, curing dough to make a pita chip. In a first aspect, the method comprises providing a first portion of dough on a first conveyor, conveying the first portion into an oven, directing a heating medium at the first portion using a first discharge array, and conveying the first portion out of the oven. In a second aspect, the apparatus comprises an oven, a first conveyor for conveying a first portion of dough, and a first discharge array. The oven comprises an oven housing, a first entrance of the oven housing for the first portion of dough, and a first exit of the oven housing for the first portion of dough. The first discharge array is positioned and oriented to direct a heating medium at the first portion of dough when the first portion of dough is positioned for conveyance by the first conveyor. | 06-04-2015 |
Paul Barnett, Plano, TX US
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20080288543 | System and method for aligning data frames in time - A method and apparatus for merging data acquired by two or more capture devices from two or more points in a computer system, duplicate frames are analyzed to determine the time difference between the timestamp of a first capture device and the timestamp of a second capture device. The invention compares the frames for duplicates. If the duplicate frames are the first set of duplicate frames discovered, then all previous timestamps and all subsequent timestamps from the second capture device are adjusted by the calculated time difference. If duplicate frames are again discovered, the time difference is recalculated and all subsequent frames from the second capture device are adjusted by the calculated time difference. After all the frames have been analyzed and the timestamps adjusted, the frames are merged together and put into chronological order to simulate a single capture of data encompassing all of the points where the data was collected. | 11-20-2008 |
20120096146 | System and method for aligning data frames in time - A method and apparatus for merging data acquired by two or more capture devices from two or more points in a computer system, frames are compared for duplicates, then duplicate frames are analyzed to determine the time difference between the timestamps of a first capture device and a second capture device. If the duplicate frames are the first set of duplicate frames discovered, then all previous timestamps and all subsequent timestamps from the second capture device are adjusted by the time difference. If duplicate frames are again discovered, the time difference is recalculated and all subsequent frames from the second capture device are adjusted by the recalculated time difference. After all the frames have been analyzed and the timestamps adjusted, the frames are merged together and put into chronological order to simulate a single capture of data encompassing all of the points where the data was collected. | 04-19-2012 |
20130346377 | SYSTEM AND METHOD FOR ALIGNING DATA FRAMES IN TIME - A method and apparatus for merging data acquired by two or more capture devices from two or more points in a computer system, duplicate frames are analyzed to determine the time difference between the timestamp of a first capture device and a second capture device. The disclosure compares the frames for duplicates. If the duplicate frames are the first set of duplicate frames discovered, then all previous timestamps and all subsequent timestamps from the second capture device are adjusted by the calculated time difference. If duplicate frames are again discovered, the time difference is recalculated and all subsequent frames from the second capture device are adjusted by the calculated time difference. After all the frames have been analyzed and the timestamps adjusted, the frames are merged together and put into chronological order to simulate a single capture of data encompassing all of the points where the data was collected. | 12-26-2013 |
Paul T. Barnett, Plano, TX US
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20080270526 | System for improving the performance of a computer software application in a server network - Method and apparatus for separating background utilization from transaction resource consumption to simulate resource costs on system servers including a computer application server is taught. Transaction throughput combined with resource consumption data. Regression analysis on the resulting data set provides information useful for determining performance and for creating discrete event simulations. In a first embodiment, data from an application server is combined with the application transaction log to find a background utilization on the application servers and to simulate transaction resource cost with a background load. In a second embodiment, data from servers other than the application server are combined with the application transaction log to estimate the resource cost per transaction for a given resource in the system. In a third embodiment, data from servers other than the application server are combined with the application transaction log to simulate resource cost for a given resource based on transaction throughput. | 10-30-2008 |
20100106478 | Method for building enterprise scalability models from production data - The invention provides a method for preparing a discrete event simulation model of a production network including a client and a plurality of servers on a plurality of network tiers connected by a network comprising the steps of executing a business function from the client on the production network, gathering resource data from the plurality of servers, normalizing the resource data, calculating a consumption of resources used by the plurality of servers, estimating a transaction cost associated with the consumption of resources and building a discrete event simulation model from the transaction cost. | 04-29-2010 |
Raymond E. Barnett, Dallas, TX US
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20140110484 | DATA DETECTOR FOR UHF RFID TAGS - A method of detecting a signal in radio frequency identification (RFID) transponder (FIG. | 04-24-2014 |
Richard A. Barnett, Houston, TX US
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20130100624 | CIRCUIT BOARD CONTACT PADS - The present disclosure provides a circuit board with a first via and a second via, the first and second vias providing an electrical path from a top surface of the circuit board to a bottom surface of the circuit board. The circuit board also includes a first contact pad electrically coupled to the first via and a second contact pad electrically coupled to the second via. The first contact pad is disposed at an angle with respect to a reference line crossing through the center of the first and second vias, and the second contact pad is disposed on an opposite side of the reference line at the angle with respect to the reference line, such that a footprint that encompasses an area between the first and second contact pads does not cover the first and second vias. | 04-25-2013 |
Rick L. Barnett, Dallas, TX US
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20090003018 | DC TO DC CONVERSION CONTROL SYSTEM AND METHOD - A direct current to direct current (DC/DC) converter control systems and related methods are disclosed. An exemplary embodiment provides a control circuit configured to modulate the duty cycles of a first switching device and a second switching device, and is further configured to compensate for a voltage drift at a monitoring node by varying the modulation for at least one of the switching devices. | 01-01-2009 |
20120153730 | INTERLEAVED LLC CONVERTER EMPLOYING ACTIVE BALANCING - An interleaved LLC converter, a method of operating an LLC converter and a power supply are disclosed herein. In one embodiment, the LLC converter includes: (1) a plurality of LLC power channels, with each of the plurality having an independent power input and (2) a compensation controller configured to actively adjust the independent power inputs to substantially match output voltage and current levels for a given load condition and a common operating frequency of the plurality of LLC power channels. | 06-21-2012 |
Rick Lee Barnett, Dallas, TX US
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20140268608 | COMPONENT HOLDING STRUCTURES, SYSTEM, AND METHOD - A component holding structure for holding a plurality of through-hole components having an axial lead includes a pair of opposing end walls that define a cavity between them. The cavity is configured to receive the through-hole components. The through-hole components are positioned between the pair of opposing end walls in a vertically-stacked configuration. Each one of the end walls includes at least one slot that is configured to receive the axial lead of each through-hole component when the plurality of through-hole components are inserted into the component holding structure. Each one of the end walls also includes a plurality of lead guides that are configured to guide the axial lead of each through-hole component when the plurality of through-hole components are inserted into the component holding structure. | 09-18-2014 |
Robert Matthew Barnett, Houston, TX US
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20100145979 | GEOSPATIAL DATA INTERACTION - A method, system and medium for accepting geospatial data queries through an interface allowing dynamic predicates are disclosed. The geospatial data queries are translated into one or more intermediate formats, and then the intermediate format is provided to one or more geospatial data servers. Each of the one or more geospatial data servers will receive the appropriate language and syntax for which it was designed. Each of the one or more geospatial data servers will simultaneously process the request and, when processing is complete, render an appropriate result from that geospatial data server and application to an end user. | 06-10-2010 |
W. H. Barnett, Fort Worth, TX US
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20120141305 | Stay Rod for a High Pressure Oil Field Pump - A stay rod connects a power end to a fluid end of a high pressure well service pump where the pump has a pump motor face on a power end which is spaced apart from a joining face of a fluid end by the stay rods. The stay rods each have an elongated unitary body having first threaded end which is sized to be received in a mating threaded opening provided in the motor face of the power end of the pump and a second opposing threaded end which is sized to be received in a mating opening provided on the joining face of the fluid end of the pump. The intermediate portion is of a greater relative diameter than either of its first and second threaded ends and is provided with a series of elongated flats which begin at the approximate juncture between a shoulder joining the second threaded end and extending in the direction of a shoulder joining the first threaded end. Each flat forms a torque surface for engagement by a torque wrench for torquing and installing the stay rod. | 06-07-2012 |