Symanczyk
Ralf Symanczyk, Munich DE
Patent application number | Description | Published |
---|---|---|
20100001252 | Resistance Changing Memory Cell - An integrated circuit includes a plurality of programmable metallization memory cells. Each memory cell includes a memory element having a first electrode layer, a second electrode layer, and a resistance changing material layer arranged between the first electrode layer and the second electrode layer. The resistance changing material layer includes an active matrix material layer made of a chalcogenide material including at least one chalcogen and at least one electropositive element, wherein the chalcogenide material is not GeS, GeSe, AgSe or CuS. | 01-07-2010 |
20100084741 | Integrated Circuit - According to an embodiment, an integrated circuit including a plurality of resistance changing memory cells is disclosed. Each memory cell includes a first electrode, a second electrode and resistance changing memory element arranged between the first electrode and the second electrode. A front surface area of an end section of the first electrode that faces the resistance changing memory element is smaller than a front surface area of an end section of the second electrode that faces the resistance changing memory element. | 04-08-2010 |
Ralf Symanczyk, Munchen DE
Patent application number | Description | Published |
---|---|---|
20090161460 | RETENTION TEST SYSTEM AND METHOD FOR RESISTIVELY SWITCHING MEMORY DEVICES - A retention test system and method for resistively switching memory devices is disclosed. One embodiment provides a plurality of memory cells configured to be changed over between a first state of high electrical resistance and a second state of low electrical resistance, wherein the system is configured to apply a bias voltage to at least one memory cell of the memory device to be tested. | 06-25-2009 |
20090196088 | RESISTANCE CONTROL IN CONDUCTIVE BRIDGING MEMORIES - An integrated circuit may comprise one or more resistive storage cells, wherein each resistive storage cell comprises a resistive storage medium that is switchable between at least a high resistive state and a low resistive state; and a resistance element communicatively coupled to the resistive storage medium in series. | 08-06-2009 |
Ralf Symanczyk, Tuntenhausen DE
Patent application number | Description | Published |
---|---|---|
20080253167 | Integrated Circuit, Method of Operating an Integrated Circuit, Method of Manufacturing an Integrated Circuit, Active Element, Memory Module, and Computing System - According to one embodiment of the present invention, an active element includes a reactive electrode, an inert electrode and a solid electrolyte disposed between the reactive electrode and the inert electrode. The solid electrolyte has a negative differential resistance. | 10-16-2008 |
20080273370 | Integrated Circuit, Method of Operating an Integrated Circuit, Memory Cell Array, and Memory Module - According to one embodiment of the present invention, an integrated circuit includes a memory cell that includes at least two resistivity changing layers being stacked above each other, each resistivity changing layer serving as a separate data storage layer and having individual data storing properties. | 11-06-2008 |
20090003037 | INTEGRATED CIRCUIT WITH MEMORY HAVING A CURRENT LIMITING SWITCH - An integrated circuit with memory having a current limiting switch. One embodiment provides a memory cell having a programmable resistivity layer and a writing line. A switch is arranged between the resistivity layer and the writing line. The switch includes a control input connected to a select line. The switch is configured to limit a current through the resistivity layer for a write operation. | 01-01-2009 |