Patent application number | Description | Published |
20080252201 | ELECTRICAL CONNECTION IN OLED DEVICES - In one aspect of the present invention, a method of making an OLED device comprises providing a substrate; a first electrode, a conductive bus line over the substrate and an organic electroluminescent media over the first electrode and over the conductive bus line. A laser that operating at a predetermined wavelength and is scanned over the conductive bus line in a predetermined direction so that the conductive bus line absorbs sufficient energy to cause the ablation a portion of the organic electroluminescent media over the conductive bus line thereby forming an opening in the organic electroluminescent media. The width of the laser beam in the predetermined direction is less than four times the width of the conductive bus line; and forming a second electrode over the organic electroluminescent media, the first electrode, and through the opening in the organic electroluminescent media. | 10-16-2008 |
20090050855 | POLYMERIC CONDUCTOR DONOR AND TRANSFER METHOD - The present invention relates to a donor laminate for transfer of a conductive layer comprising at least one electronically conductive polymer on to a receiver, wherein the receiver is a component of a device. The present invention also relates to methods pertinent to such transfers. | 02-26-2009 |
20090092928 | COMPONENT FABRICATION USING THERMAL RESIST MATERIALS - A method for producing a patterned material for electronic or photonic circuits, comprising the steps of: | 04-09-2009 |
20100118243 | POLYMERIC CONDUCTIVE DONOR AND TRANSFER METHOD - A donor laminate for transfer of a conductive layer has a transparent substrate and a conductive layer comprising at least one electronically conductive polymer that is present in an amount of at least 40 weight %, a polyanion, and inorganic particles having an average particle size of less than 100 nanometers (nanoparticles). This donor laminate can be used to transfer the conductive layer to a suitable receiver element to prepare various electronic devices. | 05-13-2010 |
20100219747 | INVERTED BOTTOM-EMITTING OLED DEVICE - A method of making an inverted bottom-emitting OLED device, comprising: providing a substrate; providing one or more first electrodes driven by n-type transistors on the substrate; providing an electron-transporting layer over the substrate and first electrode(s), wherein the electron-transporting layer comprises an n-type inorganic semiconductive material with a resistivity in the range of 1 to 10 | 09-02-2010 |
20110024770 | Inverted Bottom-Emitting OLED Device - A method of making an inverted bottom-emitting OLED device, comprising: providing a substrate; providing one or more first electrodes driven by n-type transistors on the substrate; providing an electron-transporting layer over the substrate and first electrode(s), wherein the electron-transporting layer comprises an n-type inorganic semiconductive material with a resistivity in the range of 1 to 10 | 02-03-2011 |
20110076611 | DIGITAL MANUFACTURE OF AN OPTICAL WAVEGUIDE - The electrographic printing of one or more multi-channeled layers having a particular pattern by electrographic techniques that produces a three-dimensional optical waveguide electrographically. Such electrographic printing comprises the steps of forming a desired print image, electrographically, on a receiver member utilizing predetermined sized marking particles; and, where desired, forming one or more final multi-channeled layers utilizing marking particles of a predetermined size or size distribution. | 03-31-2011 |
20110089609 | LASER-ABLATABLE ELEMENTS AND METHODS OF USE - A laser-ablatable element for direct laser engraving has a laser-ablatable, relief-forming layer that has a relief-image forming surface and a bottom surface. This relief-forming layer includes a laser-ablatable polymeric binder and an infrared radiation absorbing compound that is present at a concentration profile such that its concentration is greater near the bottom surface than the image-forming surface. This arrangement of the infrared radiation absorbing compound provides improved ablation efficiency, particularly when laser exposure is carried out adiabatically. | 04-21-2011 |
20110103838 | DIGITAL MANUFACTURE OF A MICROFLUIDIC DEVICE - In view of the above, this invention is directed to printing methods including electrographic printing wherein toner and/or laminates form one or more multi-channeled layers, with a particular pattern. The multi-channeled layers are printed, such as by electrographic techniques, using the steps of forming a desired image on a receiver member and incorporating channels of toner that form a microfluidic item. In the microfluidic items the channels act as interconnects to transfer fluids between incorporated micro-devices such as pumps, devices, and sensors. The channels can also be designed to act as splitters ports, reservoirs, filters, and separators to allow a variety of specialty micro-devices to be developed with the printer. | 05-05-2011 |
20110104386 | DIGITAL MANUFACTURE OF AN GAS OR LIQUID SEPARATION DEVICE - Printing one or more layers using toner and/or laminates to form one or more multi-channeled layers, with a particular pattern, including forming a desired image, for example, electrographically, on a receiver member. The multi layered channel printing apparatus and related method and print incorporates one or more static layers, and one or more moveable layers that allow a fluid to move through the micro channels via an opening or through a direct fill. It also incorporates particles in the channels to act as a packing material for separation of components of samples. The packing material can either be applied directly or using the electrographic printing process. An optional capping layer or substrate may then be applied. | 05-05-2011 |
20110121720 | ELECTRICAL CONNECTION IN OLED DEVICES - In one aspect of the present invention, a method of making an OLED device comprises providing a substrate; a first electrode, a conductive bus line over the substrate and an organic electroluminescent media over the first electrode and over the conductive bus line. A laser that operating at a predetermined wavelength and is scanned over the conductive bus line in a predetermined direction so that the conductive bus line absorbs sufficient energy to cause the ablation a portion of the organic electroluminescent media over the conductive bus line thereby forming an opening in the organic electroluminescent media. The width of the laser beam in the predetermined direction is less than four times the width of the conductive bus line; and forming a second electrode over the organic electroluminescent media, the first electrode, and through the opening in the organic electroluminescent media. | 05-26-2011 |
20110122552 | METHOD FOR SELECTIVE DEPOSITION AND DEVICES - A chemical vapor deposition method such as an atomic-layer-deposition method for forming a patterned thin film includes applying a deposition inhibitor material to a substrate. The deposition inhibitor material is a hydrophilic polymer that is soluble in an aqueous solution comprising at least 50 weight % water and has an acid content of less than 2.5 meq/g of polymer. The deposition inhibitor material is patterned simultaneously or subsequently to its application to the substrate, to provide selected areas of the substrate effectively not having the deposition inhibitor material. A thin film is substantially deposited only in the selected areas of the substrate not having the deposition inhibitor material. | 05-26-2011 |
20110210783 | TRANSISTOR INCLUDING REENTRANT PROFILE - A transistor includes a substrate, an electrically conductive material layer, and an electrically insulating material layer. At least a portion of one or more of the substrate, the electrically conductive material layer, and the electrically insulating material layer define a reentrant profile. | 09-01-2011 |
20120094018 | METHOD OF MAKING LASER-ABLATABLE ELEMENTS - A method is used to make a laser-ablatable element for direct laser engraving that has a laser-ablatable, relief-forming layer that has a relief-image forming surface and a bottom surface. The relief-forming layer can be prepared by applying multiple formulations. Each formulation comprises a coating solvent, a laser-ablatable polymeric binder, and an infrared radiation absorbing compound. The infrared radiation absorbing compound concentration in the resulting sub-layers is different in each adjacent pair of sub-layers so that the concentration is always greater in each pair sub-layer that is closer to the substrate, and the concentration is progressively greater in the sub-layers as they are closer to the substrate after the coating solvent is removed, wherein the multiple sub-layers provide a relief-forming layer so that the sub-layer farthest from the substrate provides a relief-image forming surface. | 04-19-2012 |
20120175614 | TRANSISTOR INCLUDING MULTI-LAYER REENTRANT PROFILE - A transistor includes a substrate. A first electrically conductive material layer is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. A third electrically conductive material layer is in contact with and positioned on the second electrically conductive material layer. The third electrically conductive material layer overhangs the second electrically conductive material layer. | 07-12-2012 |
20120175623 | TRANSISTOR INCLUDING MULTIPLE REENTRANT PROFILES - A transistor includes a substrate. A first electrically conductive material layer is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. The second electrically conductive material layer includes a reentrant profile. The second electrically conductive material layer also overhangs the first electrically conductive material layer. | 07-12-2012 |
20120175684 | TRANSISTOR INCLUDING REDUCED CHANNEL LENGTH - A transistor includes a substrate. A first electrically conductive material layer, having a thickness, is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. The second electrically conductive material layer overhangs the first electrically conductive material layer. An electrically insulating material layer, having a thickness, is conformally positioned over the second electrically conductive material layer, the first electrically conductive material layer, and at least a portion of the substrate. The thickness of the first electrically conductive material layer is greater than the thickness of the electrically insulating material layer. | 07-12-2012 |
20120176181 | ACTUATING TRANSISTOR INCLUDING MULTIPLE REENTRANT PROFILES - A method of actuating a semiconductor device includes providing a transistor. The transistor includes a substrate. A first electrically conductive material layer is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. The second electrically conductive material layer includes a reentrant profile. The second electrically conductive material layer also overhangs the first electrically conductive material layer. An electrically insulating material layer is conformally positioned over the second electrically conductive material layer, the first electrically conductive material layer, and at least a portion of the substrate. A semiconductor material layer conforms to and is in contact with the electrically insulating material layer. A third electrically conductive material layer is nonconformally positioned over and in contact with a first portion of the semiconductor material layer. A fourth electrically conductive material layer is nonconformally positioned over and in contact with a second portion of the semiconductor material layer. A voltage is applied between the third electrically conductive material layer and the fourth electrically conductive material layer. A voltage is applied to the first electrically conductive material layer to electrically connect the third electrically conductive material layer and the fourth electrically conductive material layer. | 07-12-2012 |
20120176182 | ACTUATING TRANSISTOR INCLUDING MULTI-LAYER REENTRANT PROFILE - A method of actuating a semiconductor device includes providing a transistor. The transistor includes a substrate. A first electrically conductive material layer is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. A third electrically conductive material layer is in contact with and positioned on the second electrically conductive material layer. The third electrically conductive material layer overhangs the second electrically conductive material layer. An electrically insulating material layer is conformally positioned over the third electrically conductive material layer, the second electrically conductive material layer, the first electrically conductive material layer, and at least a portion of the substrate. A semiconductor material layer conforms to and is in contact with the electrically insulating material layer. A fourth electrically conductive material layer is in contact with the semiconductor material layer. A fifth electrically conductive material layer is in contact with the semiconductor material layer. A voltage is applied between the fourth electrically conductive material layer and the fifth electrically conductive material layer. A voltage is applied to the first electrically conductive material layer to electrically connect the fourth electrically conductive material layer and the fifth electrically conductive material layer. | 07-12-2012 |
20120178225 | PRODUCING TRANSISTOR INCLUDING REDUCED CHANNEL LENGTH - A method of producing a transistor includes providing a substrate including in order a first electrically conductive material layer and a second electrically conductive material layer. The first electrically conductive material layer has a thickness. A resist material layer is deposited over the second electrically conductive material layer. The resist material layer is patterned to expose a portion of the second electrically conductive material layer. Some of the second electrically conductive material layer is removed to expose a portion of the first electrically conductive material layer. The second electrically conductive material layer is caused to overhang the first electrically conductive material layer by removing some of the first electrically conductive material layer. The second electrically conductive material layer, the first conductive material layer, and at least a portion of the substrate are conformally coated with an electrically insulating material layer having a thickness such that the thickness of the first conductive material layer is greater than the thickness of the electrically insulating material layer. | 07-12-2012 |
20120178246 | PRODUCING TRANSISTOR INCLUDING MULTIPLE REENTRANT PROFILES - A method of producing a transistor includes providing a substrate including in order a first electrically conductive material layer and a second electrically conductive material layer. A resist material layer is deposited over the second electrically conductive material layer. The resist material layer is patterned to expose a portion of the second electrically conductive material layer. Some of the second electrically conductive material layer is removed to create a reentrant profile in the second electrically conductive material layer and to expose a portion of the first electrically conductive material layer. The second electrically conductive material layer is caused to overhang the first electrically conductive material layer by removing some of the first electrically conductive material layer. | 07-12-2012 |
20120178247 | PRODUCING TRANSISTOR INCLUDING MULTI-LAYER REENTRANT PROFILE - A method of producing a transistor includes providing a substrate including in order a first electrically conductive material layer, a second electrically conductive material layer, and a third electrically conductive material layer. A resist material layer is deposited over the third electrically conductive material layer. The resist material layer is patterned to expose a portion of the third electrically conductive material layer. Some of the third electrically conductive material layer is removed to expose a portion of the second electrically conductive material layer. The third electrically conductive material layer is caused to overhang the second electrically conductive material layer by removing some of the second electrically conductive material layer. Some of the first electrically conductive material layer is removed. | 07-12-2012 |
20120186472 | LASER LEVELING HIGHLIGHT CONTROL - An apparatus for preparing a flexographic printing member includes a laser for forming a relief image that consists of both fine-featured regions and coarse-featured regions; and leveling a top most surface of at least one of the coarse-featured regions with the laser. | 07-26-2012 |
20120187603 | LASER LEVELING HIGHLIGHT CONTROL - A method of preparing a flexographic printing member includes forming a relief image that consists of both fine-featured regions and coarse-featured regions; and leveling a top most surface of at least one of the coarse-featured regions by means of laser engravings. | 07-26-2012 |
20120210893 | FLOOR RELIEF FOR DOT IMPROVEMENT - Preparing a flexographic member ( | 08-23-2012 |
20120211924 | FLOOR RELIEF FOR DOT IMPROVEMENT - Preparing a flexographic member ( | 08-23-2012 |
20120212563 | FLOOR RELIEF FOR DOT IMPROVEMENT - Preparing a flexographic member ( | 08-23-2012 |
20130052832 | PRODUCING TRANSISTOR INCLUDING SINGLE LAYER REENTRANT PROFILE - A method of producing a transistor includes providing a substrate including a first electrically conductive material layer. A resist material layer is deposited over the first electrically conductive material layer. The resist material layer is patterned to expose a portion of the first electrically conductive material layer. Some of the first electrically conductive material layer is removed to create a reentrant profile in the first electrically conductive material layer and expose a portion of the substrate. The first electrically conductive material layer and at least a portion of the substrate are conformally coated with an electrically insulating material layer. | 02-28-2013 |
20130082746 | VERTICAL TRANSISTOR HAVING REDUCED PARASITIC CAPACITANCE - A transistor includes a substrate and an electrically conductive material layer stack positioned on the substrate. The electrically conductive material layer stack includes a reentrant profile. A first electrically insulating material layer positioned is in contact with a first portion of the electrically conductive material layer stack. A second electrically insulating material layer is conformally positioned in contact with the first electrically insulating layer, and conformally positioned in contact with a second portion of the electrically conductive material layer stack, and conformally positioned in contact with at least a portion of the substrate. | 04-04-2013 |
20130084681 | PRODUCING A VERTICAL TRANSISTOR INCLUDING REENTRANT PROFILE - Producing a vertical transistor includes providing a substrate including a gate material layer stack with a reentrant profile. A patterned deposition inhibiting material is deposited over a portion of the gate material layer stack and over a portion of the substrate. An electrically insulating material layer is deposited over a portion of the gate material layer stack and over a portion of the substrate using a selective area deposition process in which the electrically insulating material layer is not deposited over the patterned deposition inhibiting material. A semiconductor material layer is deposited over the electrically insulating material layer. | 04-04-2013 |
20130084692 | PRODUCING VERTICAL TRANSISTOR HAVING REDUCED PARASITIC CAPACITANCE - A method of producing a transistor includes providing a substrate including an electrically conductive material layer stack positioned on the substrate. A first electrically insulating material layer is deposited so that the first electrically insulating material layer contacts a first portion of the electrically conductive material layer stack. A second electrically insulating material layer is conformally deposited so that the second electrically insulating material contacts the first electrically insulating layer, and contacts a second portion of the electrically conductive material layer stack, and contacts at least a portion of the substrate. | 04-04-2013 |
20130214347 | CIRCUIT INCLUDING VERTICAL TRANSISTORS - An electrical circuit includes a first transistor and a second transistor. Each transistor includes a substrate and a first electrically conductive material layer stack positioned on the substrate. The first electrically conductive material layer stack includes a reentrant profile. A second electrically conductive material layer includes first and second discrete portions in contact with first and second portions of a semiconductor material layer that conforms to the reentrant profile and is in contact with the electrically insulating material layer that conforms to the reentrant profile. A third electrically conductive material layer is in contact with a third portion of the semiconductor material layer and is positioned over the first electrically conductive material layer stack but is not in electrical contact with the first electrically conductive material layer stack. The third electrically conductive material layer of the first transistor and the second transistor are physically separate from each other. | 08-22-2013 |
20130214845 | VERTICAL TRANSISTOR ACTUATION - A method of actuating a semiconductor device includes providing a transistor including a substrate and a first electrically conductive material layer stack positioned on the substrate. The first electrically conductive material layer stack includes a reentrant profile. A second electrically conductive material layer includes first and second discrete portions in contact with first and second portions of a semiconductor material layer that conforms to the reentrant profile and is in contact with an electrically insulating material layer that conforms to the reentrant profile. A voltage is applied between the first discrete portion and the second discrete portion of the second electrically conductive material layer. A voltage is applied to the first electrically conductive material layer stack to modulate a resistance between the first discrete portion and the second discrete portion of the second electrically conductive material layer. | 08-22-2013 |
20130269557 | METHOD FOR DIRECT ENGRAVING OF FLEXOGRAPHIC PRINTING MEMBERS - A method for engraving a flexographic relief member includes providing a laser engraveable flexographic member; providing a thin engraveable control layer on top of the laser and engraveable flexographic member; the flexographic relief member comprises the laser engraveable flexographic member and the thin engraveable control layer; the engraveable control layer has an engraving sensitivity lower than the flexographic member; and scanning a radiation beam on the flexographic relief member to engrave the flexographic relief member. | 10-17-2013 |
20130270236 | SYSTEM FOR DIRECT ENGRAVING OF FLEXOGRAPHIC PRINTING MEMBERS - A system for engraving a flexographic relief member includes a laser scanning apparatus providing a focused radiation beam. The flexographic relief member includes a laser engravable flexographic member; a thing engravable control layer on top of the flexographic member; and wherein the engravable control layer has an engraving sensitivity lower than the flexographic member. | 10-17-2013 |
20140374762 | CIRCUIT INCLUDING FOUR TERMINAL TRANSISTOR - An electrical circuit includes a substrate and a plurality of transistors. The plurality of transistors includes a first electrically conductive material layer positioned on the substrate and a first electrically insulating material layer positioned on the first electrically conductive material layer. A gate includes a second electrically conductive material and a reentrant profile in which a first portion of the gate is sized and positioned to extend beyond a second portion of the gate. A second electrically insulating material layer conforms to the reentrant profile of the gate and in positioned on at least a portion of the first electrically insulating material layer. A semiconductor material ayer conforms to and is in contact with the second electrically insulating material layer. | 12-25-2014 |
20140374806 | FOUR TERMINAL TRANSISTOR - A transistor includes a substrate, a first electrically conductive material layer positioned on the substrate, and a first electrically insulating material layer is positioned on the first electrically conductive material layer. A gate includes a second electrically conductive material and a reentrant profile in which a first portion of the gate is sized and positioned to extend beyond a second portion of the gate. A second electrically insulating material layer conforms to the reentrant profile of the gate and in positioned on at least a portion of the first electrically insulating material layer. A semiconductor material layer conforms to and is in contact with the second electrically insulating material layer. | 12-25-2014 |
20140377943 | FOUR TERMINAL TRANSISTOR FABRICATION - Producing a transistor includes providing a substrate including in order a first electrically conductive material layer positioned on the substrate and a first electrically insulating material layer positioned on the first electrically conductive material layer. A gate including a reentrant profile is formed from an electrically conductive material layer stack provided on the first electrically insulating material layer in which a first portion of the gate is sized and positioned to extend beyond a second portion of the gate. The gate including the reentrant profile and at least a portion of the first electrically insulating material layer are conformally coated with a second electrically insulating material layer. The second electrically insulating material layer is conformally coated the with a semiconductor material layer. A source and drain electrodes are formed simultaneously by directionally depositing a second electrically conductive material layer on portions of the semiconductor material layer. | 12-25-2014 |