Patent application number | Description | Published |
20100237440 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes a gate insulating film formed on a semiconductor region of a first conductivity type, a gate electrode formed on the gate insulating film and including a polysilicon film of a second conductivity type and a first silicon mixed crystal layer formed on the polysilicon film, a first silicide layer formed on the first silicon mixed crystal layer, impurity diffused regions of the second conductivity type formed in the semiconductor region laterally outside the gate electrode, second silicon mixed crystal layers containing carbon formed in upper regions of the impurity diffused regions, and second silicide layers formed on the second silicon mixed crystal layers. | 09-23-2010 |
20130015522 | SEMICONDUCTOR DEVICE - A semiconductor device includes an active region formed in a semiconductor substrate made of silicon, and surrounded by an isolation region; and a gate electrode formed on the active region and the isolation region with a gate insulating film interposed between the gate electrode and the active region or the isolation region. P-type silicon alloy layers are formed in recess regions formed in regions of the active region located laterally outward of the gate electrode, and an upper end of a portion of each of the silicon alloy layers in contact with the isolation region is located below a portion of an upper surface of the active region under the gate insulating film. | 01-17-2013 |
20130056831 | SEMICONDUCTOR DEVICE - A first MIS transistor and a second MIS transistor of the same conductivity type are formed on an identical semiconductor substrate. An interface layer included in a gate insulating film of the first MIS transistor has a thickness larger than that of an interface layer included in a gate insulating film of the second MIS transistor. | 03-07-2013 |
20130248813 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a nonvolatile semiconductor memory device including a variable resistance element in which a parasitic resistance between the lower electrode and the variable resistance layer included in the variable resistance element is reduced. The nonvolatile semiconductor memory device includes: a substrate; and a variable resistance element formed on the substrate, wherein the variable resistance element includes a lower electrode layer formed on the substrate, a variable resistance layer formed on the lower electrode layer, and an upper electrode layer formed on the variable resistance layer, the lower electrode layer includes at least a first conductive layer and a second conductive layer which is formed on the first conductive layer and is in contact with the variable resistance layer, and the first conductive layer includes an oxidatively degraded layer which is formed on an upper surface of the first conductive layer due to oxidization of the first conductive layer. | 09-26-2013 |
20140021429 | NONVOLATILE MEMORY ELEMENT AND METHOD FOR MANUFACTURING THE SAME - A nonvolatile memory element includes a first electrode, a second electrode, and a variable resistance layer positioned between the first electrode and the second electrode. The variable resistance layer has a resistance state which reversibly changes based on an electrical signal applied between the first electrode and the second electrode. The variable resistance layer includes a first variable resistance layer having a first metal oxide and a second variable resistance layer having a second metal oxide. The second variable resistance layer includes a metal-metal bonding region including a metal bond of metal atoms included in the second metal oxide, and the second metal oxide has a low degree of oxygen deficiency and a high resistance value compared to the first metal oxide. | 01-23-2014 |
20140138607 | NON-VOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - A non-volatile memory device comprises first wires on and above a first plane; second wires extending in a direction crossing the first wires, on and above a second plane, third wires extending in parallel with the second wires on and above a fourth plane, and memory cells provided to correspond to three-dimensional cross-points of the first wires and the third wires, respectively, each of the memory cells including a transistor and a variable resistance element, the transistor including a first main electrode, a second main electrode, and a control electrode, the variable resistance element being placed on and above a third plane and including a lower electrode, an upper electrode and a variable resistance layer, wherein the upper electrode is connected to corresponding one of the third wires; and further comprises a first contact plug extending from the first main electrode to the second plane and connected to corresponding one of the second wires; a second contact plug extending from the second main electrode to the second plane; and a third contact plug extending from the second contact plug and connected to the lower electrode; wherein the second main electrode and the lower electrode are connected to each other via the second contact plug and the third contact plug. | 05-22-2014 |
20140175369 | MANUFACTURING METHOD OF NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY DEVICE - A method of manufacturing a non-volatile memory device comprises: forming a first electrode layer; a variable resistance material layer, a second electrode layer; and a hard mask layer, forming a first resist mask extending in a first direction on the hard mask layer; forming a first hard mask extending in the first direction by etching the hard mask layer using the first resist mask; forming a second resist mask extending in a second direction, on the first hard mask such that the width of the second resist mask is greater than the width of the first resist mask; forming a second hard mask by etching the first hard mask using the second resist mask; and forming a variable resistance element by patterning, by etching the second electrode layer, the variable resistance material layer and the first electrode layer using the second hard mask. | 06-26-2014 |
20140197368 | NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY ELEMENT MANUFACTURING METHOD, AND NONVOLATILE MEMORY DEVICE MANUFACTURING METHOD - A nonvolatile memory element including: a first electrode; a second electrode; a variable resistance layer that is between the first electrode and the second electrode and includes, as stacked layers, a first variable resistance layer connected to the first electrode and a second variable resistance layer connected to the second electrode; and a side wall protecting layer that has oxygen barrier properties and covers a side surface of the variable resistance layer. The first variable resistance layer includes a first metal oxide and a third metal oxide formed around the first metal oxide and having an oxygen deficiency lower than that of the first metal oxide, and the second variable resistance layer includes a second metal oxide having an oxygen deficiency lower than that of the first metal oxide. | 07-17-2014 |
20140264249 | NONVOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A nonvolatile memory device includes a plurality of nonvolatile memory elements each having an upper electrode, a variable resistance layer, and a lower electrode; a first insulating layer embedding the plurality of nonvolatile memory elements, and ranging from a lowermost part of the lower electrode to a position higher than an uppermost part of the upper electrode in each of the nonvolatile memory elements; a second insulating layer being formed on the first insulating layer, and having an average size of vacancies larger than an average size of vacancies included in the first insulating layer, or having an average carbon concentration higher than an average carbon concentration of the first insulating layer; and a conductive layer penetrating the second insulating layer and a part of the first insulating layer and being connected to at least one of the upper electrodes included in the nonvolatile memory elements. | 09-18-2014 |
20150295012 | NONVOLATILE MEMORY DEVICE - A nonvolatile memory device includes: a pair of first wirings extending in a first direction; a second wiring extending in a second direction crossing the first direction; a pair of third wirings extending in the second direction; and a fourth wiring located between the pair of the third wirings. The nonvolatile memory device has four resistance-change elements each which is provided adjacent to respective four crossing areas in which each of the pair of first wirings intersects with each of the pair of third wirings, and a first contact plug disposed at an intersection of two diagonals of a virtual tetragon defined by the four resistance-change elements. Two transistors arranged in the second direction, among four transistors, share each one first main terminal located between the pair of the first wirings, the shared each one first main terminal being connected to the second wiring. | 10-15-2015 |
Patent application number | Description | Published |
20090160692 | A/D CONVERSION CIRCUIT AND ELECTRONIC INSTRUMENT - An A/D conversion circuit includes an amplifier circuit that includes a plurality of amplifiers that are cascaded, a selector that selects one of output signals output from the plurality of amplifiers and outputs the selected output signal as a selector output signal, an A/D converter that A/D-converts the selector output signal output from the selector, a determination circuit that determines whether or not a voltage of the output signal output from each of the plurality of amplifiers is within a determination voltage range specified by a high-potential-side determination voltage and a low-potential-side determination voltage, and a control circuit that instructs the selector to select one of the output signals output from the plurality of amplifiers based on the determination result of the determination circuit. | 06-25-2009 |
20090160693 | A/D CONVERSION CIRCUIT AND ELECTRONIC INSTRUMENT - An A/D conversion circuit includes a continuous-time filter that performs a filtering process on an input signal, an SCF that is provided in a subsequent stage of the continuous-time filter and performs a filtering process utilizing the continuous-time filter as a prefilter, a cut-off frequency of the SCF being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the SCF and performs an A/D conversion operation utilizing the continuous-time filter and the SCF as prefilters, and a digital filter that is provided in a subsequent stage of the A/D converter and performs a digital filtering process utilizing the continuous-time filter and the SCF as prefilters, a cut-off frequency of the digital filter being variably set corresponding to the frequency band of the input signal. | 06-25-2009 |
20090212860 | INTEGRATED CIRCUIT DEVICE AND ELECTRONIC INSTRUMENT - An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers that are cascaded and receives an input signal, an A/D converter that performs an A/D conversion process on a signal amplified by the amplifier circuit, first to Nth D/A converters that are provided corresponding to the first to Nth amplifiers and used to perform an offset adjustment of the first to Nth amplifiers, and a control circuit that sets an offset adjustment of the first to Nth amplifiers using the first to Nth D/A converters and a gain adjustment of the first to Nth amplifiers. | 08-27-2009 |
20090212867 | INTEGRATED CIRCUIT DEVICE AND ELECTRONIC INSTRUMENT - An integrated circuit device includes an amplifier circuit that receives an input signal and performs an offset adjustment corresponding to a DC offset of the input signal and a gain adjustment corresponding to an amplitude of the input signal, a filter that is provided in a subsequent stage of the amplifier circuit, a cut-off frequency of the filter being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the filter and performs an A/D conversion process on a signal amplified by the amplifier circuit, and a control circuit that sets an offset adjustment of the amplifier circuit, a gain adjustment of the amplifier circuit, and the cut-off frequency of the filter. | 08-27-2009 |
20090212983 | INTEGRATED CIRCUIT DEVICE AND ELECTRONIC INSTRUMENT - An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers, an A/D converter, first to Nth offset adjustment registers that are provided corresponding to the first to Nth amplifiers and store first to Nth offset adjustment data, first to Nth D/A converters provided corresponding to the first to Nth amplifiers, first to Nth offset value storage sections that store first to Nth offset value data, and a control circuit that calculates the first to Nth offset adjustment data based on the first to Nth offset value data, and sets the first to Nth offset adjustment data in the first to Nth offset adjustment registers. | 08-27-2009 |
Patent application number | Description | Published |
20110205403 | IMAGING DEVICE AND AUTOMATIC FOCUS ADJUSTMENT METHOD - An imaging device of the present invention comprises an imaging section for forming a subject image using a photographing lens and generating image data, a contrast detection section for detecting contrast values corresponding to contrast of the subject image, for every position of the photographing lens, based on the image data, a subject brightness detection section for detecting brightness evaluation values corresponding to subject brightness of the subject image for every position of the photographing lens, based on the image data, a correction section for correcting the contrast values depending on a brightness evaluation value for a corresponding position of the photographing lens and calculating corrected contrast value, and a focus detection section for detecting a focus position of the photographing lens based on the corrected contrast values that have been corrected by the correction section. | 08-25-2011 |
20140204266 | FOCUS ADJUSTMENT UNIT AND CAMERA SYSTEM - A focus adjustment unit according to the present invention has an imaging section configured to generate an image signal by forming and capturing an optical image on an image sensor by an optical system including a focusing lens, and performs focus adjustment based on a focus detection signal relating to a focus detection area set within an imaging area, the focus adjustment unit comprising a focusing lens position detection section configured to detect a position of the focusing lens, a storage section configured to store information on an image magnification change of the optical system along with movement of the focusing lens, and a focus detection area setting section configured to set a focus detection area within the imaging area, wherein the focus detection area setting section sets the focus detection area based on the position of the focusing lens and the information on an image magnification change. | 07-24-2014 |
20140307145 | IMAGING APPARATUS AND IMAGING METHOD - An imaging apparatus according to the present invention is an imaging apparatus performing live-view display by generating image data using an exposure parameter calculated from a brightness value in a photometric area for the live-view display which is different from a photometric area for focus adjustment when not performing the focus adjustment, and performing the live-view display also when performing the focus adjustment, and includes: a focus adjustment brightness value calculation section comparing a first brightness value in the photometric area for the live-view display with a second brightness value in the photometric area for the focus adjustment, correcting the first brightness value according to a comparison result, and calculating a brightness value for obtaining the image data for the focus adjustment; an imaging section obtaining the image data by performing exposure using the brightness value calculated by the focus adjustment brightness value calculation section; a focus adjustment section performing the focus adjustment using the image data obtained by the imaging section, and a display section performing the live-view display using the image data obtained by the imaging section. | 10-16-2014 |
20140375295 | DC-DC Converter - A DC-DC converter includes: an error amplifier for outputting an error between an output voltage and a predetermined voltage; a phase compensation impedance element for accumulating the error across one end to generate an error phase; a determination unit for determining whether the voltage output by the error amplifier is higher, or lower than a reference voltage that is consonant with the predetermined voltage, and outputting a determination signal indicating determination results; and a voltage setting unit for setting a voltage for one end of the phase compensation impedance element higher than a lower output voltage limit for the error amplifier when the determination signal indicates that the voltage output by the error amplifier is lower than the reference voltage, or for canceling setting of the voltage when the determination signal indicates that the voltage output by the error amplifier is higher than the reference voltage. | 12-25-2014 |