Frank Carr
Frank Carr, Dove Canyon, CA US
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20110067083 | Fully Integrated Tuner Architecture - An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. | 03-17-2011 |
Frank Carr, Newport Coast, CA US
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20090102592 | Multi-Primary Distributed Active Transformer Amplifier Power Supply and Control - An integrated power combiner is disclosed. The power combiner includes a first circular geometry primary winding having one or more inductive elements, such as an active winding with one or more driver stages. A circular geometry secondary winding is disposed adjacent to the first primary winding, such as an active winding with one or more driver stages. A second circular geometry primary winding is disposed adjacent to the secondary winding and has one or more inductive elements. One or more connections are provided between one or more of the inductive elements of the first circular geometry primary winding and one or more of the inductive elements of the second circular geometry primary winding. | 04-23-2009 |
20110003573 | System and Method for Performing RF Filtering - A method of filtering and a RF filtering circuit comprising a LO adapted to generate in-phase and quadrature LO signals; a quadrature passive mixer operatively connected to the LO; a filtering impedance operatively connected to the quadrature passive mixer, wherein the voltage at an input node of the quadrature passive mixer comprises the voltage across the filtering impedance up-converted to a frequency of a LO signal received by the quadrature passive mixer. Preferably, the voltage across the filtering impedance comprises a frequency of an input signal of the quadrature passive mixer down-converted by a frequency of the in-phase and quadrature LO signals and filtered by the filtering impedance. | 01-06-2011 |
Frank Carr, Tustin, CA US
Patent application number | Description | Published |
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20100283548 | MULTI-PRIMARY DISTRIBUTED ACTIVE TRANSFORMER AMPLIFIER POWER SUPPLY AND CONTROL - An integrated power combiner is disclosed. The power combiner includes a first circular geometry primary winding having one or more inductive elements, such as an active winding with one or more driver stages. A circular geometry secondary winding is disposed adjacent to the first primary winding, such as an active winding with one or more driver stages. A second circular geometry primary winding is disposed adjacent to the secondary winding and has one or more inductive elements. One or more connections are provided between one or more of the inductive elements of the first circular geometry primary winding and one or more of the inductive elements of the second circular geometry primary winding. | 11-11-2010 |
20110175685 | MULTI-PRIMARY DISTRIBUTED ACTIVE TRANSFORMER AMPLIFIER POWER SUPPLY AND CONTROL - An integrated power combiner is disclosed. The power combiner includes a first circular geometry primary winding having one or more inductive elements, such as an active winding with one or more driver stages. A circular geometry secondary winding is disposed adjacent to the first primary winding, such as an active winding with one or more driver stages. A second circular geometry primary winding is disposed adjacent to the secondary winding and has one or more inductive elements. One or more connections are provided between one or more of the inductive elements of the first circular geometry primary winding and one or more of the inductive elements of the second circular geometry primary winding. | 07-21-2011 |
Frank Carr, New Coast, CA US
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20080259219 | UNIVERSAL TUNER FOR MOBILE TV - A tuner for use in mobile television devices comprises at least one RF front end component comprising a LNA adapted to amplify mobile television signals; a PLL circuit to generate signals; and a pair of mixers to receive the signals from the LNA and the PLL circuit and downconvert the signals; an analog baseband component connected to the RF front end component, wherein the analog baseband component comprises I and Q channel signal paths each comprising a tunable high order impedance filter; at least one signal amplification stage; and a signal filter stage connected to the signal amplification stage, wherein the analog baseband component further comprises a plurality of switches operatively connected to the I and Q channel signal paths, and wherein the plurality of switches are selectively opened and closed in multiple configurations in order to allow the tuner to receive mobile TV signals for all mobile TV standards. | 10-23-2008 |
20090021228 | INTEGRATED CMOS DC-DC CONVERTER IMPLEMENTATION IN LOW-VOLTAGE CMOS TECHNOLOGY USING LDO REGULATOR - An electrical circuit and method of power management of a cellular telephone includes a battery adapted to produce a battery voltage; a LDO regulator operatively connected to the battery and adapted to provide a constant supply voltage from the battery voltage; and a DC-DC converter operatively connected to the LDO regulator, wherein the DC-DC converter is adapted to step down the constant supply voltage to a lower voltage level, wherein the LDO regulator and the DC-DC converter are embedded on a single integrated circuit chip. The constant supply voltage equals 3.6V at an output of the LDO, and the constant supply voltage is applied to an input of the DC-DC converter. Moreover, the battery voltage equals at most 5.5V. | 01-22-2009 |
20090115458 | CMOS COMPARATOR WITH HYSTERESIS - A complementary metal oxide semiconductor (CMOS) comparator circuit includes a plurality of p-type metal-oxide-semiconductor (PMOS) transistors receiving an input voltage signal, a plurality of n-type metal-oxide-semiconductor (NMOS) transistors operatively connected to the PMOS transistors and adapted to receive the input voltage signal, and an inverter adapted to invert the input voltage signal into an output voltage signal. An effective aspect ratio of the PMOS and NMOS transistors may be dependent on the level of the output voltage signal from the inverter. When a digital output of the inverter is “1”, the effective aspect ratio of the NMOS transistor is increased by turning on a second NMOS transistor, and a threshold voltage of the inverter is decreased. | 05-07-2009 |
Frank Carr, Dove Canyon GB
Patent application number | Description | Published |
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20080284919 | Fully integrated tuner architecture - An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. | 11-20-2008 |
Frank Carr, Babraham GB
Patent application number | Description | Published |
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20120289417 | T Cell Epitope Databases - The invention relates to databases of T cell epitopes, especially helper T cell epitopes, for rapid interrogation of protein sequences for the presence of T cell epitopes. The invention includes full or partial databases and data structures of T cell epitopes including epitopes identified especially by ex vivo T cell assays with test peptides and includes T cell epitopes identified by extrapolation of data from test peptides. The present invention also includes high throughput methods for determining the T cell epitope activity of peptides for subsequent inclusion in databases and data structures including methods where subsets of T cell especially regulatory T cells are removed or inhibited from T cell assays in order to maximize the sensitivity of detection of T cell epitope activity. | 11-15-2012 |