Patent application number | Description | Published |
20100275841 | DEPOSITION SOURCE - A deposition source capable of uniformly producing a deposition film. The deposition source includes a furnace, a first heating unit surrounding the furnace to heat the furnace and a second heating unit spaced-apart from the first heating unit by an interval and surrounding the furnace to heat the furnace, wherein the second heating unit comprises a plurality of separate sub-heating units that surround the furnace. | 11-04-2010 |
20100275842 | Evaporating apparatus - Provided is an evaporating apparatus that deposits a deposition material onto a treatment object. The evaporating apparatus includes a base, a deposition source, and first and second correction units. The deposition source deposits the deposition material onto the treatment object. The base is disposed separately from the treatment object. The deposition source is placed on a surface of the base. The first and second correction units located between the deposition source and the treatment object. The first and second correction units are disposed on outer regions of the deposition source and face each other. Each of the first and second correction units rotates to control the thickness of a layer formed by the deposition material deposited on the treatment object. | 11-04-2010 |
20100279021 | APPARATUS FOR DEPOSITING ORGANIC MATERIAL AND DEPOSITING METHOD THEREOF - An apparatus for depositing an organic material and a depositing method thereof, wherein a deposition process is performed with respect to a second substrate while transfer and alignment processes are performed with respect to a first substrate in a chamber, so that loss of an organic material wasted in the transfer and alignment processes can be reduced, thereby maximizing material efficiency and minimizing a processing tack time. The apparatus includes a chamber having an interior divided into a first substrate deposition area and a second substrate deposition area, an organic material deposition source transferred to within ones of the first and second substrate deposition areas to spray particles of an organic material onto respective ones of first and second substrates and a first transferring unit to rotate the organic material deposition source in a first direction from one of the first and second substrate deposition areas to an other of the first and second substrate deposition areas. | 11-04-2010 |
20100304025 | DEPOSITION APPARATUS AND METHOD OF CONTROLLING THE SAME - A deposition apparatus including a plurality of reaction chambers, and a method of controlling the deposition apparatus. The deposition apparatus includes a first chamber to deposit a first deposition material onto a deposition body, a second chamber to deposit a second and different deposition material onto the deposition body, a third chamber to deposit the first deposition material onto the deposition body, a transfer chamber connected to the first through third chambers, the transfer chamber to transfer the deposition body to ones of the first through third chambers and a control unit to transport the deposition body from the transfer chamber to ones of the first through third chambers. | 12-02-2010 |
20110073042 | Substrate Centering Device and Organic Material Deposition System - A substrate centering device for an organic material deposition system comprises: a plurality of substrate support holders configured to be reciprocally movable in a facing direction within an organic material deposition chamber and supporting both side portions of a substrate loaded by a robot; a substrate centering unit configured to be reciprocally movable at each of the substrate support holders and centering the substrate by guiding both side portions of the substrate; and a plurality of substrate clampers configured to be reciprocally movable in a vertical direction at each of the substrate support holders, and clamping the substrate that has been centered by the substrate centering unit. | 03-31-2011 |
20130302134 | SUBSTRATE CENTERING DEVICE AND ORGANIC MATERIAL DEPOSITION SYSTEM - A substrate centering device for an organic material deposition system comprises: a plurality of substrate support holders configured to be reciprocally movable in a facing direction within an organic material deposition chamber and supporting both side portions of a substrate loaded by a robot; a substrate centering unit configured to be reciprocally movable at each of the substrate support holders and centering the substrate by guiding both side portions of the substrate; and a plurality of substrate clampers configured to be reciprocally movable in a vertical direction at each of the substrate support holders, and clamping the substrate that has been centered by the substrate centering unit. | 11-14-2013 |
20130309403 | APPARATUS FOR DEPOSITING ORGANIC MATERIAL AND DEPOSITING METHOD THEREOF - An apparatus for depositing an organic material and a depositing method thereof, wherein a deposition process is performed with respect to a second substrate while transfer and alignment processes are performed with respect to a first substrate in a chamber, so that loss of an organic material wasted in the transfer and alignment processes can be reduced, thereby maximizing material efficiency and minimizing a processing tack time. The apparatus includes a chamber having an interior divided into a first substrate deposition area and a second substrate deposition area, an organic material deposition source transferred to within ones of the first and second substrate deposition areas to spray particles of an organic material onto respective ones of first and second substrates and a first transferring unit to rotate the organic material deposition source in a first direction from one of the first and second substrate deposition areas to an other of the first and second substrate deposition areas. | 11-21-2013 |
Patent application number | Description | Published |
20100012980 | Contact Structures in Substrate Having Bonded Interface, Semiconductor Device Including the Same, Methods of Fabricating the Same - On embodiment of a contact structure may include a lower insulation layer on a lower substrate, an upper substrate on the lower insulation layer, a groove penetrating the upper substrate to extend into the lower insulation layer, the groove below an interface between the upper substrate and the lower insulation layer, an upper insulation layer in the groove, and a contact plug penetrating the upper insulation layer in the groove to extend into the lower insulation layer. | 01-21-2010 |
20100035386 | Method for forming semiconductor device having metallization comprising select lines, bit lines and word lines - A semiconductor device includes a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region, first transistors on the semiconductor substrate, a first protective layer covering the first transistors, a first insulation layer on the first protective layer, a semiconductor pattern on the first insulation layer in the first region, second transistors on the semiconductor pattern, a second protective layer covering the second transistors, the second protective layer having a thickness greater than that of the first protective layer, and a second insulation layer on the second protective layer and the first insulation layer of the second region. | 02-11-2010 |
20100195395 | Non-volatile memory device having vertical structure and method of operating the same - A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string. | 08-05-2010 |
20110002178 | VERTICAL NON-VOLATILE MEMORY DEVICE, METHOD OF FABRICATING THE SAME DEVICE, AND ELECTRIC-ELECTRONIC SYSTEM HAVING THE SAME DEVICE - Provided is a vertical non-volatile memory device having a metal source line. The vertical non-volatile memory device includes cell string units that are formed on first portions of a semiconductor substrate and are vertically arranged with respect to a surface of the semiconductor substrate, impurity regions formed on second portions of the semiconductor substrate between the cell string units, conductive lines formed on the impurity regions, and spacers that are formed on the sidewalls of the cell string units and insulate the conductive lines from the cells string units. | 01-06-2011 |
20110018036 | VERTICAL NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines. | 01-27-2011 |
20110024816 | FLASH MEMORY DEVICE HAVING VERTICLE CHANNEL STRUCTURE - A flash memory device having a vertical channel structure. The flash memory device includes a substrate having a surface that extends in a first direction, a channel region having a pillar shape and extending from the substrate in a second direction that is perpendicular to the first direction, a gate dielectric layer formed around the channel region, a memory cell string comprising a plurality of transistors sequentially formed around the channel region in the second direction, wherein the gate dielectric layer is disposed between the plurality of transistors and the channel region, and a bit line connected to one of the plurality of transistors, and surrounding a side wall and an upper surface of one end of the channel region so as to directly contact the channel region. | 02-03-2011 |
20110227141 | NON-VOLATILE MEMORY DEVICES HAVING VERTICAL CHANNEL STRUCTURES AND RELATED FABRICATION METHODS - A memory device having a vertical channel structure is disclosed. The memory device includes a plurality of gate lines extending substantially parallel to one another along a surface of a substrate, and a connection unit electrically connecting the plurality of gate lines. The connection unit includes a first portion laterally extending along the surface of the substrate, a second portion extending substantially perpendicular to the surface of the substrate, and a supporting insulating layer extending in a cavity defined by the first and second portions of the connection unit. Related fabrication methods are also discussed. | 09-22-2011 |
20120009767 | METHOD FOR FORMING SEMICONDUCTOR DEVICE HAVING METALLIZATION COMPRISING SELECT LINES, BIT LINES AND WORD LINES - A semiconductor device includes a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region, first transistors on the semiconductor substrate, a first protective layer covering the first transistors, a first insulation layer on the first protective layer, a semiconductor pattern on the first insulation layer in the first region, second transistors on the semiconductor pattern, a second protective layer covering the second transistors, the second protective layer having a thickness greater than that of the first protective layer, and a second insulation layer on the second protective layer and the first insulation layer of the second region. | 01-12-2012 |
20120077320 | MANUFACTURING SEMICONDUCTOR DEVICES - A semiconductor device includes a semiconductor pattern on a substrate, gate structures on sidewalls of the semiconductor pattern, the gate structures being spaced apart from one another, insulating interlayers among the gate structures, wherein an uppermost insulating interlayer is lower than an upper face of the semiconductor pattern, a common source line contacting the substrate and protruding above the uppermost insulating interlayer, an etch stop layer pattern on the semiconductor pattern and on the common source line wherein the common source line protrudes above the uppermost insulating interlayer, an additional insulating interlayer on the uppermost insulating interlayer, and contact plugs extending through the additional insulating interlayer so as to make contact with the semiconductor pattern and the common source line, respectively. | 03-29-2012 |
20130044545 | NON-VOLATILE MEMORY DEVICE HAVING VERTICAL STRUCTURE AND METHOD OF OPERATING THE SAME - A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string. | 02-21-2013 |
20130279233 | VERTICAL NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines. | 10-24-2013 |
20140048873 | SEMICONDUCTOR DEVICES - A semiconductor device includes a semiconductor pattern on a substrate, gate structures on sidewalls of the semiconductor pattern, the gate structures being spaced apart from one another, insulating interlayers among the gate structures, wherein an uppermost insulating interlayer is lower than an upper face of the semiconductor pattern, a common source line contacting the substrate and protruding above the uppermost insulating interlayer, an etch stop layer pattern on the semiconductor pattern and on the common source line wherein the common source line protrudes above the uppermost insulating interlayer, an additional insulating interlayer on the uppermost insulating interlayer, and contact plugs extending through the additional insulating interlayer so as to make contact with the semiconductor pattern and the common source line, respectively. | 02-20-2014 |
20140197481 | VERTICAL TYPE SEMICONDUCTOR DEVICES - A vertical type semiconductor device includes first and second word line structures that include first and second word lines. The word lines surround a plurality of pillar structures, which are provided to connect the word lines to corresponding string select lines. Connecting patterns electrically connect pairs of adjacent first and second word lines in a same plane. The device may be a nonvolatile memory device or a different type of device. | 07-17-2014 |
20140199815 | METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a vertical type memory device includes stacking a first lower insulating layer, one layer of a lower sacrificial layer and a second lower insulating layer on a substrate, forming a stacking structure by stacking sacrificial layers and insulating layers, and etching an edge portion of the stacking structure to form a preliminary stepped shape pattern structure. The preliminary stepped shape pattern structure has a stepped shape edge portion. A pillar structure making contact with a surface of the substrate is formed. The preliminary stepped shape pattern structure, the lower sacrificial layer, and the first and second lower insulating layers are partially etched to form a first opening portion and a second opening portion to form a stepped shape pattern structure. The second opening portion cuts at least an edge portion of the lower sacrificial layer. | 07-17-2014 |
20140293703 | NON-VOLATILE MEMORY DEVICE HAVING VERTICAL STRUCTURE AND METHOD OF OPERATING THE SAME - A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string. | 10-02-2014 |