Patent application number | Description | Published |
20080280212 | METHOD FOR PHOTOMASK FABRICATION UTILIZING A CARBON HARD MASK - Methods for forming a photomask using a carbon hard mask are provided. In one embodiment, a method of forming a photomask includes etching a chromium layer through a patterned carbon hard mask layer in the presence of a plasma formed from a process gas containing chlorine and carbon monoxide. | 11-13-2008 |
20090183322 | ELECTROSTATIC SURFACE CLEANING - Embodiments of the present invention generally provide apparatus and methods for cleaning a substrate, such as a mask. One embodiment of the present invention provides an apparatus for cleaning a substrate comprising a substrate support configured to receive and support the substrate, a collecting tip connected with an electrostatic power source, wherein the collecting tip is configured to pickup particles on a surface of the substrate using electrostatic force, and an indexing mechanism configured to provide relative movement between the collecting tip and the substrate support. | 07-23-2009 |
20090186282 | CONTAMINATION PREVENTION IN EXTREME ULTRAVIOLET LITHOGRAPHY - Embodiments of the present invention provide methods and apparatus for removing debris particles using a stream of charged species. One embodiment of the present invention provides an apparatus for removing debris particles from a beam of radiation comprising a charged species source configured to dispense electrically charged species, and a collecting plate biased electrically opposite to the charged species from the charged species source, wherein the collecting plate and the charged species source are disposed on opposite sides of the beam of radiation, a stream of charged species from the charged species source to the collecting plate intersects the beam of radiation, the stream of charged species is configured to attach and remove debris particles from the beam of radiation by electrostatic force, and the collecting plate is configured to receive the charged species and the debris particles removed from the beam of radiation. | 07-23-2009 |
20090325387 | METHODS AND APPARATUS FOR IN-SITU CHAMBER DRY CLEAN DURING PHOTOMASK PLASMA ETCHING - Embodiments of the invention include method for in-situ chamber dry clean after photomask plasma etching. In one embodiment, the method includes placing a photomask upon a support pedestal, introducing a process gas into a process chamber, forming a plasma from the process gas, etching a chromium containing layer disposed on the photomask in the presence of the plasma, removing the photomask from the support pedestal, placing a dummy substrate on the pedestal and performing an in-situ dry cleaning process by flowing a cleaning gas containing O | 12-31-2009 |
20100028813 | BACKSIDE CLEANING OF SUBSTRATE - A pellicle cover, system, and method for cleaning a photomask are disclosed. A pellicle cover is disposed over a photomask and pellicle without damaging the markings surrounding the mask pattern area. The pellicle cover can be practicably implemented in an improved photomask cleaning system and process in which the backside of the photomask may be cleaned without removing the pellicle from the patterned surface. | 02-04-2010 |
20100078039 | METHOD AND APPRATUS FOR MASK PELLICLE ADHESIVE RESIDUE CLEANING - Aspects of the invention generally provide methods and apparatus for cleaning adhesive residual on a photomask substrate. In one embodiment, the apparatus includes a processing cell, a support assembly configured to receive a photomask substrate disposed thereon disposed in the processing cell, a protection head assembly disposed above and facing the support assembly, and a head actuator configured to control the elevation of the protection head assembly relative to an upper surface of the support assembly. A cleaning device is provided and positioned to interact with the photomask substrate disposed on the support assembly. In another embodiment, a method of cleaning a periphery region of a photomask substrate includes providing a photomask substrate having a periphery portion and a center portion disposed on a support assembly in a processing cell, lowering a protection cover disposed in the processing cell to cover the center portion of the photomask substrate, providing a brush in the processing cell to clean the periphery portion of the photomask substrate. | 04-01-2010 |
20100276391 | INDUCTIVELY COUPLED PLASMA REACTOR HAVING RF PHASE CONTROL AND METHODS OF USE THEREOF - Methods of operating inductively coupled plasma (ICP) reactors having ICP sources and substrate bias with phase control are provided herein. In some embodiments, a method of operating a first plasma reactor having a source RF generator inductively coupled to the first plasma reactor on one side of a substrate support surface of a substrate support within the first plasma reactor and a bias RF generator coupled to the substrate support on an opposing side of the substrate support surface, wherein the source RF generator and the bias RF generator provide respective RF signals at a common frequency may include selecting a desired value of a process parameter for a substrate to be processed; and adjusting the phase between respective RF signals provided by the source RF generator and the bias RF generator to a desired phase based upon a predetermined relationship between the process parameter and the phase. | 11-04-2010 |
20110073564 | METHOD AND APPARATUS FOR HIGH EFFICIENCY GAS DISSOCIATION IN INDUCTIVE COUPLE PLASMA REACTOR - Embodiments of the present invention relate to method and apparatus for providing processing gases to a process chamber with improved plasma dissociation efficiency. One embodiment of the present invention provides a baffle nozzle assembly comprising an outer body defining an extension volume connected to a processing chamber. A processing gas is flown to the processing chamber through the extension volume which is exposed to power source for plasma generation. | 03-31-2011 |
20110162797 | METHOD AND APPARATUS FOR PHOTOMASK PLASMA ETCHING - A method and apparatus for etching photomasks is provided herein. In one embodiment, the apparatus comprises a process chamber having a support pedestal adapted for receiving a photomask. An ion-neutral shield is disposed above the pedestal and a deflector plate assembly is provided above the ion-neutral shield. The deflector plate assembly defines a gas flow direction for process gases towards the ion-neutral shield, while the ion-neutral shield is used to establish a desired distribution of ion and neutral species in a plasma for etching the photomask. | 07-07-2011 |
20110312157 | WAFER DICING USING FEMTOSECOND-BASED LASER AND PLASMA ETCH - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a femtosecond-based laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits. | 12-22-2011 |
20120103939 | METHODS AND APPARATUS FOR CONTROLLING PHOTORESIST LINE WIDTH ROUGHNESS - The present invention provides methods and an apparatus for controlling and modifying line width roughness (LWR) of a photoresist layer. In one embodiment, an apparatus for controlling a line width roughness of a photoresist layer disposed on a substrate includes a chamber body having a top wall, side wall and a bottom wall defining an interior processing region, a microwave power generator coupled to the to the chamber body through a waveguild, and one or more coils or magnets disposed around an outer circumference of the chamber body adjacent to the waveguide, and a gas source coupled to the waveguide through a gas delivery passageway. | 05-03-2012 |
20120305184 | DYNAMIC ION RADICAL SIEVE AND ION RADICAL APERTURE FOR AN INDUCTIVELY COUPLED PLASMA (ICP) REACTOR - Embodiments described herein provide apparatus and methods of etching a substrate using an ion etch chamber having a movable aperture. The ion etch chamber has a chamber body enclosing a processing region, a substrate support disposed in the processing region and having a substrate receiving surface, a plasma source disposed at a wall of the chamber body facing the substrate receiving surface, an ion-radical shield disposed between the plasma source and the substrate receiving surface, and a movable aperture member between the ion-radical shield and the substrate receiving surface. The movable aperture member is actuated by a lift assembly comprising a lift ring and lift supports from the lift ring to the aperture member. The ion-radical shield is supported by shield supports disposed through the aperture member. The aperture size, shape, and/or central axis location may be changed using inserts. | 12-06-2012 |
20120305185 | APPARATUS AND METHODS FOR DRY ETCH WITH EDGE, SIDE AND BACK PROTECTION - Embodiments of the present invention generally relate to a method and apparatus for plasma etching substrates and, more specifically, to a method and apparatus with protection for edges, sides and backs of the substrates being processed. Embodiments of the present invention provide an edge protection plate with an aperture smaller in size than a substrate being processed, wherein the edge protection plate may be positioned in close proximity to the substrate in a plasma chamber. The edge protection plate overlaps edges and/or sides on the substrate to provide protection to reflective coatings on the edge, sides, and back of the substrate. | 12-06-2012 |
20120318773 | METHODS AND APPARATUS FOR CONTROLLING PHOTORESIST LINE WIDTH ROUGHNESS WITH ENHANCED ELECTRON SPIN CONTROL - The present invention provides methods and an apparatus for controlling and modifying line width roughness (LWR) of a photoresist layer with enhanced electron spinning control. In one embodiment, an apparatus for controlling a line width roughness of a photoresist layer disposed on a substrate includes a processing chamber having a chamber body having a top wall, side wall and a bottom wall defining an interior processing region, a support pedestal disposed in the interior processing region of the processing chamber, and a plasma generator source disposed in the processing chamber operable to provide predominantly an electron beam source to the interior processing region. | 12-20-2012 |
20120322011 | METHODS AND APPARATUS FOR PERFORMING MULTIPLE PHOTORESIST LAYER DEVELOPMENT AND ETCHING PROCESSES - The present invention provides methods and an apparatus controlling and minimizing process defects in a development process, and modifying line width roughness (LWR) of a photoresist layer after the development process, and maintaining good profile control during subsequent etching processes. In one embodiment, a method for forming features on a substrate includes developing and removing exposed areas in the photosensitive layer disposed on the substrate in the electron processing chamber by predominantly using electrons, removing contaminants from the substrate by predominantly using electrons, and etching the non-photosensitive polymer layer exposed by the developed photosensitive layer in the electron processing chamber by predominantly using electrons. | 12-20-2012 |
20120322233 | WATER SOLUBLE MASK FOR SUBSTRATE DICING BY LASER AND PLASMA ETCH - Methods of dicing substrates having a plurality of ICs. A method includes forming a mask comprising a water soluble material layer over the semiconductor substrate. The mask is patterned with a femtosecond laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then etched through the gaps in the patterned mask to singulate the IC and the water soluble material layer washed off. | 12-20-2012 |
20120322234 | IN-SITU DEPOSITED MASK LAYER FOR DEVICE SINGULATION BY LASER SCRIBING AND PLASMA ETCH - Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off. | 12-20-2012 |
20120322235 | WAFER DICING USING HYBRID GALVANIC LASER SCRIBING PROCESS WITH PLASMA ETCH - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a galvanic laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits. | 12-20-2012 |
20120322236 | WAFER DICING USING PULSE TRAIN LASER WITH MULTIPLE-PULSE BURSTS AND PLASMA ETCH - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits. | 12-20-2012 |
20120322237 | LASER AND PLASMA ETCH WAFER DICING USING PHYSICALLY-REMOVABLE MASK - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The patterned mask is then separated from the singulated integrated circuits. | 12-20-2012 |
20120322238 | LASER AND PLASMA ETCH WAFER DICING USING WATER-SOLUBLE DIE ATTACH FILM - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution. | 12-20-2012 |
20120322239 | HYBRID LASER AND PLASMA ETCH WAFER DICING USING SUBSTRATE CARRIER - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The semiconductor wafer is supported by a substrate carrier. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits while supported by the substrate carrier. | 12-20-2012 |
20120322242 | MULTI-STEP AND ASYMMETRICALLY SHAPED LASER BEAM SCRIBING - Methods of dicing substrates by both laser scribing and plasma etching. A method includes laser ablating material layers, the ablating leading with a first irradiance and following with a second irradiance, lower than the first. Multiple passes of a beam adjusted to have different fluence level or multiple laser beams having various fluence levels may be utilized to ablate mask and IC layers to expose a substrate with the first fluence level and then clean off redeposited materials from the trench bottom with the second fluence level. A laser scribe apparatus employing a beam splitter may provide first and second beams of different fluence from a single laser. | 12-20-2012 |
20130005152 | INCREASED DEPOSITION EFFICIENCY AND HIGHER CHAMBER CONDUCTANCE WITH SOURCE POWER INCREASE IN AN INDUCTIVELY COUPLED PLASMA (ICP) CHAMBER - Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C). | 01-03-2013 |
20130017668 | WAFER DICING USING HYBRID SPLIT-BEAM LASER SCRIBING PROCESS WITH PLASMA ETCHAANM Lei; Wei-ShengAACI San JoseAAST CAAACO USAAGP Lei; Wei-Sheng San Jose CA USAANM Eaton; BradAACI Menlo ParkAAST CAAACO USAAGP Eaton; Brad Menlo Park CA USAANM Yalamanchili; Madhava RaoAACI Morgan HillAAST CAAACO USAAGP Yalamanchili; Madhava Rao Morgan Hill CA USAANM Singh; SaravjeetAACI Santa ClaraAAST CAAACO USAAGP Singh; Saravjeet Santa Clara CA USAANM Kumar; AjayAACI CupertinoAAST CAAACO USAAGP Kumar; Ajay Cupertino CA USAANM Iyer; AparnaAACI SunnyvaleAAST CAAACO USAAGP Iyer; Aparna Sunnyvale CA US - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a split-beam laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits. | 01-17-2013 |
20130040231 | METHOD FOR ETCHING A MOLYBDENUM LAYER SUITABLE FOR PHOTOMASK FABRICATION - Methods for fabricating a photomask are disclosed herein. In one embodiment, a method for fabricating a photomask includes providing a filmstack having a molybdenum layer and a light-shielding layer in a processing chamber, patterning a first resist layer on the light-shielding layer, etching the light-shielding layer using the first resist layer as an etch mask, and etching the molybdenum layer using the patterned light-shielding layer and the patterned first resist layer as a composite mask. | 02-14-2013 |
20130048606 | METHODS FOR IN-SITU CHAMBER DRY CLEAN IN PHOTOMASK PLASMA ETCHING PROCESSING CHAMBER - Embodiments of the invention include methods for in-situ chamber dry cleaning a plasma processing chamber utilized for photomask plasma fabrication process. In one embodiment, a method for in-situ chamber dry clean after photomask plasma etching includes performing an in-situ pre-cleaning process in a plasma processing chamber, supplying a pre-cleaning gas mixture including at least an oxygen containing gas into the plasma processing chamber while performing the in-situ pre-cleaning process, providing a substrate into the plasma processing chamber, performing an etching process on the substrate, removing the substrate from the substrate, and performing an in-situ post cleaning process by flowing a post cleaning gas mixture including at least an oxygen containing gas into the plasma processing chamber. | 02-28-2013 |
20130224665 | ATOMIC LAYER DEPOSITION LITHOGRAPHY - Methods and apparatus for performing an atomic layer deposition lithography process are provided in the present disclosure. In one embodiment, a method for forming features on a material layer in a device includes pulsing a first reactant gas mixture to a surface of a substrate disposed in a processing chamber to form a first monolayer of a material layer on the substrate surface, directing an energetic radiation to treat a first region of the first monolayer, and pulsing a second reactant gas mixture to the substrate surface to selectively form a second monolayer on a second region of the first monolayer. | 08-29-2013 |
20130267076 | WAFER DICING USING HYBRID MULTI-STEP LASER SCRIBING PROCESS WITH PLASMA ETCH - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits. | 10-10-2013 |
20130280890 | LASER AND PLASMA ETCH WAFER DICING USING UV-CURABLE ADHESIVE FILM - Laser and plasma etch wafer dicing using UV-curable adhesive films is described. In an example, a method includes forming a mask above the semiconductor wafer. The semiconductor wafer is coupled to a carrier substrate by a UV-curable adhesive film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The UV-curable adhesive film is then irradiated with ultra-violet (UV) light. The singulated integrated circuits are then detached from the carrier substrate. | 10-24-2013 |
20130299088 | LASER AND PLASMA ETCH WAFER DICING USING WATER-SOLUBLE DIE ATTACH FILM - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution. | 11-14-2013 |
20140004685 | LASER AND PLASMA ETCH WAFER DICING WITH A DOUBLE SIDED UV-CURABLE ADHESIVE FILM | 01-02-2014 |
20140015109 | METHOD OF DICED WAFER TRANSPORTATION - Methods of dicing semiconductor wafers, and transporting singulated die, are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a water soluble material layer over and between the plurality of singulated dies, above the dicing tape. | 01-16-2014 |
20140017879 | UNIFORM MASKING FOR WAFER DICING USING LASER AND PLASMA ETCH - Uniform masking for wafer dicing using laser and plasma etch is described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits having bumps or pillars includes uniformly spinning on a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits. | 01-16-2014 |
20140017880 | LASER, PLASMA ETCH, AND BACKSIDE GRIND PROCESS FOR WAFER DICING - Front side laser scribing and plasma etch are performed followed by back side grind to singulate integrated circuit chips (ICs). A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to advance a front of an etched trench partially through the semiconductor wafer thickness. The front side mask is removed, a backside grind tape applied to the front side, and a back side grind performed to reach the etched trench, thereby singulating the ICs. | 01-16-2014 |
20140017881 | LASER SCRIBING AND PLASMA ETCH FOR HIGH DIE BREAK STRENGTH AND CLEAN SIDEWALL - In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a multi-plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation. | 01-16-2014 |
20140017882 | METHOD OF COATING WATER SOLUBLE MASK FOR LASER SCRIBING AND PLASMA ETCH - Methods of using a hybrid mask composed of a first water soluble film layer and a second water-soluble layer for wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a hybrid mask above the semiconductor wafer. The hybrid mask is composed of a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer. The method also involves patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also involves etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits. | 01-16-2014 |
20140045103 | METHODS FOR CONTROLLING DEFECTS FOR EXTREME ULTRAVIOLET LITHOGRAPHY (EUVL) PHOTOMASK SUBSTRATE - Methods for providing a silicon layer on a photomask substrate surface with minimum defeats for fabricating film stack thereon for EUVL applications are provided. In one embodiment, a method for forming a silicon layer on a photomask substrate includes performing an oxidation process to form a silicon oxide layer on a surface of a first substrate wherein the first substrate comprises a crystalline silicon material, performing an ion implantation process to define a cleavage plane in the first substrate, and bonding the silicon oxide layer to a surface of a second substrate, wherein the second substrate is a quartz photomask. | 02-13-2014 |
20140057414 | MASK RESIDUE REMOVAL FOR SUBSTRATE DICING BY LASER AND PLASMA ETCH - Methods of dicing substrates having a plurality of ICs. A method includes forming a mask and patterning the mask with a femtosecond laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is etched through the gaps in the patterned mask to singulate the IC. The mask is removed and metallized bumps on the diced substrate are contacted with an inorganic acid solution to remove mask residues. | 02-27-2014 |
20140057446 | METHOD OF SILICON ETCH FOR TRENCH SIDEWALL SMOOTHING - Methods of silicon etch for trench sidewall smoothing are described. In one embodiment, a method involves smoothing a sidewall of a trench formed in a semiconductor wafer via plasma etching. The method includes directionally etching the semiconductor wafer with plasma generated from a fluorine gas to smooth the sidewall of the trench, the trench having a protective layer formed by plasma generated by a second process gas such as oxygen or a polymerization gas. In another embodiment, a method involves etching a semiconductor wafer to generate a trench having a smooth sidewall. The method includes plasma etching the semiconductor wafer with one or more first process gases including a fluorine gas, simultaneously performing deposition and plasma etching the semiconductor wafer with one or more second process gases including a fluorine gas and a polymerization gas mix, and performing deposition with one or more third process gases including a polymerization gas. | 02-27-2014 |
20140065797 | IN-SITU DEPOSITED MASK LAYER FOR DEVICE SINGULATION BY LASER SCRIBING AND PLASMA ETCH - Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off. | 03-06-2014 |
20140106542 | LASER AND PLASMA ETCH WAFER DICING WITH PARTIAL PRE-CURING OF UV RELEASE DICING TAPE FOR FILM FRAME WAFER APPLICATION - Methods and systems of laser and plasma etch wafer dicing using UV-curable adhesive films. A method includes forming a mask covering ICs formed on the wafer. The semiconductor wafer is coupled to a film frame by a UV-curable adhesive film. A pre-cure of the UV-curable adhesive film cures a peripheral portion of the adhesive extending beyond an edge of the wafer to improve the exposed adhesive material's resistance to plasma etch and reduce hydrocarbon redeposition within the etch chamber. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the ICs. A center portion of the UV-curable adhesive is then cured and the singulated ICs detached from the film. | 04-17-2014 |
20140120697 | WAFER DICING USING FEMTOSECOND-BASED LASER AND PLASMA ETCH - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits. Each of the trenches has a width. The semiconductor wafer is plasma etched through the trenches to form corresponding trench extensions and to singulate the integrated circuits. Each of the corresponding trench extensions has the width. | 05-01-2014 |
20140120698 | WAFER DICING USING HYBRID MULTI-STEP LASER SCRIBING PROCESS WITH PLASMA ETCH - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits. | 05-01-2014 |
20140144585 | HYBRID LASER AND PLASMA ETCH WAFER DICING USING SUBSTRATE CARRIER - Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The semiconductor wafer is supported by a substrate carrier. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits while supported by the substrate carrier. | 05-29-2014 |
20140154615 | METHOD FOR ETCHING EUV MATERIAL LAYERS UTILIZED TO FORM A PHOTOMASK - A method and apparatus for etching photomasks are provided herein. In one embodiment, a method of etching an ARC layer or an absorber layer disposed on a photomask includes transferring a film stack into an etching chamber, the film stack having an ARC layer or an absorber layer partially exposed through a patterned layer, providing a gas mixture including at least one fluorine containing gas in to a processing chamber, applying a source RF power to form a plasma from the gas mixture, applying a first type of RF bias power to the substrate for a first period of time, applying a second type of RF bias power away from the substrate for a second period of time, and etching the ARC layer or the absorber layer through the patterned layer in the presence of the plasma. | 06-05-2014 |
20140174659 | WATER SOLUBLE MASK FOR SUBSTRATE DICING BY LASER AND PLASMA ETCH - Methods of dicing substrates having a plurality of ICs are disclosed. A method includes forming a mask comprising a water soluble material layer over the semiconductor substrate. The mask is patterned with a femtosecond laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then etched through the gaps in the patterned mask to singulate the IC and the water soluble material layer is washed off. | 06-26-2014 |
20140179084 | WAFER DICING FROM WAFER BACKSIDE - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. For example, a method includes applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside. The dicing tape is removed from the wafer backside to expose a die attach film disposed between the wafer backside and the dicing tape. Alternatively, if no die attach film is initially disposed between the wafer backside and the dicing tape, a die attach film is applied to the wafer backside at this operation. A water soluble mask is applied to the wafer backside. Laser scribing is performed on the wafer backside to cut through the mask, the die attach film and the wafer, including all layers included within the front side and backside of the wafer. A plasma etch is performed to treat or clean surfaces of the wafer exposed by the laser scribing. A wafer backside cleaning is performed and a second dicing tape is applied to the wafer backside. The protection tape is the removed from the wafer front side. | 06-26-2014 |
20140190632 | METHOD AND APPARATUS FOR PHOTOMASK PLASMA ETCHING - A method and apparatus for etching photomasks is provided herein. In one embodiment, a method of etching a photomask includes providing a process chamber having a substrate support pedestal adapted to receive a photomask substrate thereon. An ion-radical shield is disposed above the pedestal. A substrate is placed upon the pedestal beneath the ion-radical shield. A process gas is introduced into the process chamber and a plasma is formed from the process gas. The substrate is etched predominantly with radicals that pass through the shield. | 07-10-2014 |
20140213041 | LASER AND PLASMA ETCH WAFER DICING WITH ETCH CHAMBER SHIELD RING FOR FILM FRAME WAFER APPLICATIONS - Laser and plasma etch wafer dicing where a mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a film frame by an adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The laser scribing exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask while the film frame is maintained at an acceptably low temperature with a chamber shield ring configured to sit beyond the wafer edge and cover the frame. The shield ring may be raised and lowered, for example, on lifter pins to facilitate transfer of the wafer on frame. | 07-31-2014 |
20140213042 | SUBSTRATE DICING BY LASER ABLATION & PLASMA ETCH DAMAGE REMOVAL FOR ULTRA-THIN WAFERS - Methods of dicing substrates having a plurality of ICs. A method includes forming a mask, patterning the mask with a femtosecond laser scribing process to provide a patterned mask with gaps, and ablating through an entire thickness of a semiconductor substrate to singulate the IC. Following laser-based singulation, a plasma etch is performed to remove a layer of semiconductor sidewall damaged by the laser scribe process. In the exemplary embodiment, a femtosecond laser is utilized and a 1-3 μm thick damage layer is removed with the plasma etch. Following the plasma etch, the mask is removed, rendering the singulated die suitable for assembly/packaging. | 07-31-2014 |
20140253887 | CONTAMINATION PREVENTION FOR PHOTOMASK IN EXTREME ULTRAVIOLET LITHOGRAPHY APPLICATION - Embodiments of the present invention provide methods and apparatus for removing debris particles using a stream of charged species. In one embodiment, an apparatus for removing debris particles from a beam of radiation includes a mask station comprising a chamber body, a mask stage disposed in the mask station, and a conductive plate having an opening formed therein, wherein the conductive plate is disposed in a spaced apart relationship to the mask stage in the mask station, defining an interior volume between the mask stage and the conductive plate. | 09-11-2014 |
20140255830 | APPARATUS AND METHODS FOR FABRICATING A PHOTOMASK SUBSTRATE FOR EUV APPLICATIONS - An apparatus and methods utilized a DC or AC power to supply through a conductive substrate support pedestal to a conductive photomask substrate during a photomask substrate manufacturing process for EUV or other advanced lithography applications are provided. In one embodiment, an apparatus for processing a photomask includes a substrate support pedestal configured to receive a conductive photomask, wherein the conductive photomask is fabricated from a dielectric material substrate with a conductive coating, and at least a conductive path formed in the substrate support pedestal in contact with the photomask substrate configured to be conductive. | 09-11-2014 |
20140256148 | METHOD AND APPARATUS FOR HIGH EFFICIENCY GAS DISSOCIATION IN INDUCTIVE COUPLED PLASMA REACTOR - Embodiments of the present disclosure relate to method and apparatus for providing processing gases to a process chamber with improved plasma dissociation efficiency. One embodiment of the present disclosure provides a baffle nozzle assembly comprising an outer body defining an extension volume connected to a processing chamber. A processing gas is flown to the processing chamber through the extension volume which is exposed to power source for plasma generation. | 09-11-2014 |
20140273401 | SUBSTRATE LASER DICING MASK INCLUDING LASER ENERGY ABSORBING WATER-SOLUBLE FILM - Methods of dicing substrates having a plurality of ICs. A method includes forming a mask comprising a laser energy absorbing material layer soluble in water over the semiconductor substrate. The laser energy absorbing material layer may be UV curable, and either remain uncured or be cured prior to removal with a water rinse. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate may then be plasma etched through the gaps in the patterned mask to singulate the IC with the laser energy absorbing mask protecting the ICs for during the plasma etch. The soluble mask is then dissolved subsequent to singulation. | 09-18-2014 |
20140273490 | METHOD FOR IMPROVING CD MICRO-LOADING IN PHOTOMASK PLASMA ETCHING - Embodiments of the present invention provides methods to etching a mask layer, e.g., an absorber layer, disposed in a film stack for manufacturing a photomask in EUV applications and phase shift and binary photomask applications. In one embodiment, a method of etching an absorber layer disposed on a photomask includes transferring a film stack into an etching chamber, the film stack having a chromium containing layer partially exposed through a patterned photoresist layer, providing an etching gas mixture including Cl | 09-18-2014 |
20140335679 | METHODS FOR ETCHING A SUBSTRATE - In some embodiments, a method for etching features into a substrate may include exposing a substrate having a photoresist layer disposed atop the substrate to a first process gas to form a polymer containing layer atop sidewalls and a bottom of a feature formed in the photoresist layer, wherein the first process gas is selectively provided to a first area of the substrate via a first set of gas nozzles disposed within a process chamber and; exposing the substrate to a second process gas having substantially no oxygen to etch the feature into the substrate, wherein the second process gas is selectively provided to a second area of the substrate via a second set of gas nozzles disposed in the process chamber. | 11-13-2014 |
20140346641 | WAFER DICING WITH WIDE KERF BY LASER SCRIBING AND PLASMA ETCHING HYBRID APPROACH - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, approaches for wafer dicing with wide kerf by using a laser scribing and plasma etching hybrid approach are described. For example, a method of dicing a semiconductor wafer including a plurality of integrated circuits separated by dicing streets involves forming a mask above the semiconductor wafer, the mask having a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide a patterned mask having a pair of parallel gaps for each dicing street, exposing regions of the semiconductor wafer between the integrated circuits. Each gap of each pair of parallel gaps is separated by a distance. The method also involves etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits. | 11-27-2014 |
20140356768 | CHARGED BEAM PLASMA APPARATUS FOR PHOTOMASK MANUFACTURE APPLICATIONS - Embodiments of the present invention generally provide an apparatus and methods for etching photomasks using charged beam plasma. In one embodiment, an apparatus for performing a charged beam plasma process on a photomask includes a processing chamber having a chamber bottom, a chamber ceiling and chamber sidewalls defining an interior volume, a substrate support pedestal disposed in the interior volume, a charged beam generation system disposed adjacent to the chamber sidewall, and a RF bias electrode disposed in the substrate support. | 12-04-2014 |
20140363952 | LASER, PLASMA ETCH, AND BACKSIDE GRIND PROCESS FOR WAFER DICING - Front side laser scribing and plasma etch are performed followed by back side grind to singulate integrated circuit chips (ICs). A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to advance a front of an etched trench partially through the semiconductor wafer thickness. The front side mask is removed, a backside grind tape applied to the front side, and a back side grind performed to reach the etched trench, thereby singulating the ICs. | 12-11-2014 |
20140367041 | WAFER DICING USING FEMTOSECOND-BASED LASER AND PLASMA ETCH - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits. Each of the trenches has a width. The semiconductor wafer is plasma etched through the trenches to form corresponding trench extensions and to singulate the integrated circuits. Each of the corresponding trench extensions has the width. | 12-18-2014 |
20140370708 | PHOTORESIST TREATMENT METHOD BY LOW BOMBARDMENT PLASMA - Methods for reducing the line width roughness on a photoresist pattern are provided herein. In some embodiments, a method of processing a patterned photoresist layer disposed atop a substrate includes flowing a process gas into a processing volume of a process chamber having the substrate disposed therein; forming a plasma within the process chamber from the process gas, wherein the plasma has a ion energy of about 1 eV to about 10 eV; and etching the patterned photoresist layer with species from the plasma to at least one of smooth a line width roughness of a sidewall of the patterned photoresist layer or remove debris. | 12-18-2014 |
20140370709 | METHODS FOR REDUCING LINE WIDTH ROUGHNESS AND/OR CRITICAL DIMENSION NONUNIFORMITY IN A PATTERNED PHOTORESIST LAYER - Methods for reducing line width roughness and/or critical dimension nonuniformity in a photoresist pattern are provided herein. In some embodiments, a method of reducing line width roughness along a sidewall of a patterned photoresist layer disposed atop a substrate includes: (a) depositing a first layer atop the sidewall of the patterned photoresist layer; (b) etching the first layer and the sidewall after depositing the first layer to reduce the line width roughness of the patterned photoresist layer. In some embodiments, (a)-(b) may be repeated until the line width roughness is substantially smooth. | 12-18-2014 |
20140377937 | METHOD OF COATING WATER SOLUBLE MASK FOR LASER SCRIBING AND PLASMA ETCH - Methods of using a hybrid mask composed of a first water soluble film layer and a second water-soluble layer for wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a hybrid mask above the semiconductor wafer. The hybrid mask is composed of a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer. The method also involves patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also involves etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits. | 12-25-2014 |
20150011073 | LASER SCRIBING AND PLASMA ETCH FOR HIGH DIE BREAK STRENGTH AND SMOOTH SIDEWALL - In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a hybrid plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch with a plasma based on a combination of NF | 01-08-2015 |
20150028446 | WAFER DICING WITH WIDE KERF BY LASER SCRIBING AND PLASMA ETCHING HYBRID APPROACH - Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, approaches for wafer dicing with wide kerf by using a laser scribing and plasma etching hybrid approach are described. For example, a method of dicing a semiconductor wafer including a plurality of integrated circuits separated by dicing streets involves forming a mask above the semiconductor wafer, the mask having a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide a patterned mask having a pair of parallel gaps for each dicing street, exposing regions of the semiconductor wafer between the integrated circuits. Each gap of each pair of parallel gaps is separated by a distance. The method also involves etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits. | 01-29-2015 |
20150037915 | METHOD AND SYSTEM FOR LASER FOCUS PLANE DETERMINATION IN A LASER SCRIBING PROCESS - In embodiments, a method of laser scribing a mask disposed over a semiconductor wafer includes determining a height of the semiconductor over which a mask layer is disposed prior to laser scribing the mask layer. In one embodiment the method includes: determining a height of the semiconductor wafer under the mask in a dicing street using an optical sensor and patterning the mask with a laser scribing process. The laser scribing process focuses a scribing laser beam at a plane corresponding to the determined height of the semiconductor wafer in the dicing street. Examples of determining the height of the semiconductor wafer can include directing a laser beam to the dicing street of the semiconductor wafer, which is transmitted through the mask and reflected from the wafer, and identifying an image on a surface of the wafer under the mask with a camera. | 02-05-2015 |
20150064878 | WAFER DICING METHOD FOR IMPROVING DIE PACKAGING QUALITY - In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation while also removing an oxidation layer from metal bumps on the wafer. In one embodiment, a method includes forming a mask over the semiconductor wafer covering the plurality of ICs, the plurality of ICs including metal bumps or pads with an oxidation layer. The method includes patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the ICs. The method includes plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the plurality of ICs and remove the oxidation layer from the metal bumps or pads. | 03-05-2015 |
20150079760 | ALTERNATING MASKING AND LASER SCRIBING APPROACH FOR WAFER DICING USING LASER SCRIBING AND PLASMA ETCH - Alternating masking and laser scribing approaches for wafer dicing using laser scribing and plasma etch are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits includes forming a first mask above the semiconductor wafer. The first mask is patterned with a first laser scribing process to provide a patterned first mask with a first plurality of scribe lines exposing regions of the semiconductor wafer between the integrated circuits. Subsequent to patterning the first mask with the first laser scribing process, a second mask is formed above the patterned first mask. The second mask is patterned with a second laser scribing process to provide a patterned second mask with a second plurality of scribe lines exposing regions of the semiconductor wafer between the integrated circuits. The second plurality of scribe lines is aligned with and overlaps the first plurality of scribe lines. The semiconductor wafer is plasma etched through the second plurality of scribe lines to singulate the integrated circuits. | 03-19-2015 |
20150079761 | Wafer Dicing from Wafer Backside and Front Side - Approaches for backside laser scribe plus front side laser scribe and plasma etch dicing of a wafer or substrate are described. For example, a method of dicing a semiconductor wafer having a plurality of integrated circuits on a front side thereof and metallization on a backside thereof involves patterning the metallization on the backside with a first laser scribing process to provide a first plurality of laser scribe lines on the backside. The method also involves forming a mask on the front side. The method also involves patterning, from the front side, the mask with a second laser scribing process to provide a patterned mask with a second plurality of scribe lines exposing regions of the semiconductor wafer between the integrated circuits, wherein the second plurality of scribe lines is aligned with the first plurality of scribe lines. The method also involves plasma etching the semiconductor wafer through the second plurality of scribe lines to singulate the integrated circuits. | 03-19-2015 |