Patent application number | Description | Published |
20100028813 | BACKSIDE CLEANING OF SUBSTRATE - A pellicle cover, system, and method for cleaning a photomask are disclosed. A pellicle cover is disposed over a photomask and pellicle without damaging the markings surrounding the mask pattern area. The pellicle cover can be practicably implemented in an improved photomask cleaning system and process in which the backside of the photomask may be cleaned without removing the pellicle from the patterned surface. | 02-04-2010 |
20100276391 | INDUCTIVELY COUPLED PLASMA REACTOR HAVING RF PHASE CONTROL AND METHODS OF USE THEREOF - Methods of operating inductively coupled plasma (ICP) reactors having ICP sources and substrate bias with phase control are provided herein. In some embodiments, a method of operating a first plasma reactor having a source RF generator inductively coupled to the first plasma reactor on one side of a substrate support surface of a substrate support within the first plasma reactor and a bias RF generator coupled to the substrate support on an opposing side of the substrate support surface, wherein the source RF generator and the bias RF generator provide respective RF signals at a common frequency may include selecting a desired value of a process parameter for a substrate to be processed; and adjusting the phase between respective RF signals provided by the source RF generator and the bias RF generator to a desired phase based upon a predetermined relationship between the process parameter and the phase. | 11-04-2010 |
20110162797 | METHOD AND APPARATUS FOR PHOTOMASK PLASMA ETCHING - A method and apparatus for etching photomasks is provided herein. In one embodiment, the apparatus comprises a process chamber having a support pedestal adapted for receiving a photomask. An ion-neutral shield is disposed above the pedestal and a deflector plate assembly is provided above the ion-neutral shield. The deflector plate assembly defines a gas flow direction for process gases towards the ion-neutral shield, while the ion-neutral shield is used to establish a desired distribution of ion and neutral species in a plasma for etching the photomask. | 07-07-2011 |
20120305185 | APPARATUS AND METHODS FOR DRY ETCH WITH EDGE, SIDE AND BACK PROTECTION - Embodiments of the present invention generally relate to a method and apparatus for plasma etching substrates and, more specifically, to a method and apparatus with protection for edges, sides and backs of the substrates being processed. Embodiments of the present invention provide an edge protection plate with an aperture smaller in size than a substrate being processed, wherein the edge protection plate may be positioned in close proximity to the substrate in a plasma chamber. The edge protection plate overlaps edges and/or sides on the substrate to provide protection to reflective coatings on the edge, sides, and back of the substrate. | 12-06-2012 |
20130048606 | METHODS FOR IN-SITU CHAMBER DRY CLEAN IN PHOTOMASK PLASMA ETCHING PROCESSING CHAMBER - Embodiments of the invention include methods for in-situ chamber dry cleaning a plasma processing chamber utilized for photomask plasma fabrication process. In one embodiment, a method for in-situ chamber dry clean after photomask plasma etching includes performing an in-situ pre-cleaning process in a plasma processing chamber, supplying a pre-cleaning gas mixture including at least an oxygen containing gas into the plasma processing chamber while performing the in-situ pre-cleaning process, providing a substrate into the plasma processing chamber, performing an etching process on the substrate, removing the substrate from the substrate, and performing an in-situ post cleaning process by flowing a post cleaning gas mixture including at least an oxygen containing gas into the plasma processing chamber. | 02-28-2013 |
20140154615 | METHOD FOR ETCHING EUV MATERIAL LAYERS UTILIZED TO FORM A PHOTOMASK - A method and apparatus for etching photomasks are provided herein. In one embodiment, a method of etching an ARC layer or an absorber layer disposed on a photomask includes transferring a film stack into an etching chamber, the film stack having an ARC layer or an absorber layer partially exposed through a patterned layer, providing a gas mixture including at least one fluorine containing gas in to a processing chamber, applying a source RF power to form a plasma from the gas mixture, applying a first type of RF bias power to the substrate for a first period of time, applying a second type of RF bias power away from the substrate for a second period of time, and etching the ARC layer or the absorber layer through the patterned layer in the presence of the plasma. | 06-05-2014 |
20140273490 | METHOD FOR IMPROVING CD MICRO-LOADING IN PHOTOMASK PLASMA ETCHING - Embodiments of the present invention provides methods to etching a mask layer, e.g., an absorber layer, disposed in a film stack for manufacturing a photomask in EUV applications and phase shift and binary photomask applications. In one embodiment, a method of etching an absorber layer disposed on a photomask includes transferring a film stack into an etching chamber, the film stack having a chromium containing layer partially exposed through a patterned photoresist layer, providing an etching gas mixture including Cl | 09-18-2014 |
20140356768 | CHARGED BEAM PLASMA APPARATUS FOR PHOTOMASK MANUFACTURE APPLICATIONS - Embodiments of the present invention generally provide an apparatus and methods for etching photomasks using charged beam plasma. In one embodiment, an apparatus for performing a charged beam plasma process on a photomask includes a processing chamber having a chamber bottom, a chamber ceiling and chamber sidewalls defining an interior volume, a substrate support pedestal disposed in the interior volume, a charged beam generation system disposed adjacent to the chamber sidewall, and a RF bias electrode disposed in the substrate support. | 12-04-2014 |
20150090401 | NOVEL ELECTRODES FOR ETCH - An electrode having a first portion and a second portion is formed over a substrate to couple to a bias RF power. The first portion is configured to compensate for an electric field at the second portion to even out a distribution of an etching strength over a workpiece placed over the electrode. | 04-02-2015 |
20150364347 | DIRECT LIFT PROCESS APPARATUS - The present disclosure provides a substrate support assembly includes a substrate pedestal having an upper surface for receiving and supporting a substrate, a cover plate disposed on the substrate support pedestal, and two or more lift pins movably disposed through the substrate support pedestal and the cover plate. The cover plate includes a disk body having a central opening. The two or more lift pins are self supportive. Each of the two or more lift pins comprises one or more contact pads, and the contact pads of the lift pins extend into to the central opening of the cover plate to receive and support a substrate at an edge region of the substrate. | 12-17-2015 |
Patent application number | Description | Published |
20090016415 | Methods, computer program products and apparatus providing improved quantization - Thus, the exemplary embodiments of the invention describe methods, computer program products and apparatus that provide improved quantization, as may be useful within the context of a communication system (e.g., a wireless communication system) that has a relay node. In one non-limiting, exemplary embodiment, a method includes: receiving a transmission having source data from an information source; determining an estimate of the source data using a quantization technique based on maximizing data throughput; and transmitting a message including the determined estimate towards an information destination. | 01-15-2009 |
20090304096 | SYSTEM AND METHOD FOR RANDOMIZED ANTENNA ALLOCATION IN ASYNCHRONOUS MIMO MULTI-HOP NETWORKS - A system and method for simultaneous and asynchronous transmissions in multi-antenna multi-hop networks. The system and method employ randomized and non-greedy resource allocation to counter starvation. The system and method define a class of asynchronous random access protocols subsuming MIMO systems via two components. Residual Capacity Estimation and Randomized Resource Allocation. The system and method realize the first asynchronous MIMO MAC protocol that counters flow starvation in multi-hop networks. Randomized and non-greedy antenna allocation coupled with local residual capacity estimation results in previously-starving nodes capturing a fair share of system resources while simultaneously exploiting throughput gains available to multi-antenna systems. | 12-10-2009 |
20110064010 | DIRECTIONAL COMMUNICATION ON MOBILE DEVICES - In general, the invention relates to a wireless network interface card (WNIC). The WNIC includes an integrated circuit and a computer readable medium including executable instructions, which when executed by the integrated circuit perform a method, the method including selecting a first directional antenna of a number of directional antennas on a mobile communications device, sending a first data packet using the first directional antenna, and determining whether the first antenna is valid using a transmission strength threshold. | 03-17-2011 |
20140016515 | SYSTEM AND METHOD FOR FULL DUPLEX CANCELLATION - Disclosed herein are systems, methods, and computer-readable storage media for enabling improved cancellation of self-interference in full-duplex communications, or the transmitting and receiving of communications in a single frequency band without requiring time, frequency, or code divisions. The system estimates the signal strength and phase of a self-interference signal, generates a cancellation signal based on this estimate, then uses the cancellation signal to suppress the self-interference before sampling received analog signal. After applying the cancellation signal, the system samples and digitizes the remaining analog signal. The digitized signal is then subjected to additional digital cancellation, allowing for extraction of the desired signal. | 01-16-2014 |
20160036582 | SYSTEM AND METHOD FOR FULL DUPLEX CANCELLATION - Disclosed herein are systems, methods, and computer-readable storage media for enabling improved cancellation of self-interference in full-duplex communications, or the transmitting and receiving of communications in a single frequency band without requiring time, frequency, or code divisions. The system estimates the signal strength and phase of a self-interference signal, generates a cancellation signal based on this estimate, then uses the cancellation signal to suppress the self-interference before sampling received analog signal. After applying the cancellation signal, the system samples and digitizes the remaining analog signal. The digitized signal is then subjected to additional digital cancellation, allowing for extraction of the desired signal. | 02-04-2016 |
Patent application number | Description | Published |
20080212355 | Compact Virtual Ground Diffusion Programmable ROM Array Architecture, System and Method - A compact, shared source line and bit line architecture for a diffusion programmable ROM. In one embodiment, a ROM circuit or instance includes a plurality of storage cells organized as an array of rows columns. A shared source line is associated with a first pair of adjacent columns, the shared source line being maintained at a predetermined level, wherein source terminals of storage cells in the adjacent columns are electrically coupled to the shared source line. A shared bit line is associated with a second pair of adjacent columns, the shared bit line being maintained at the predetermined level, wherein drain terminals of storage cells in the adjacent columns are electrically coupled to the shared bit line. | 09-04-2008 |
20100027312 | Compact Virtual Ground Diffusion Programmable ROM Array Architecture, System and Method - A compact, shared source line and bit line architecture for a diffusion programmable ROM. In one embodiment, a ROM circuit or instance includes a plurality of storage cells organized as an array of rows columns. A shared source line is associated with a first pair of adjacent columns, the shared source line being maintained at a predetermined level, wherein source terminals of storage cells in the adjacent columns are electrically coupled to the shared source line. A shared bit line is associated with a second pair of adjacent columns, the shared bit line being maintained at the predetermined level, wherein drain terminals of storage cells in the adjacent columns are electrically coupled to the shared bit line. | 02-04-2010 |
20110013444 | LOW LEAKAGE ROM ARCHITECURE - A Read only memory (ROM) with minimum leakage includes a ROM array including a first transistor, wherein a drain, a source, a gate, and a bulk of the first transistor is electrically connected to a logic zero in the idle state for ensuring zero junction and sub-threshold leakage current. The drain of the first transistor is electrically connected to a main bit line through a second transistor. The second transistor includes a gate, electrically connected to a first decoding circuit, a drain, electrically connected to the main bit line. A first reference bit line is electrically connected to a drain of a third transistor, wherein gate of the third transistor is electrically connected to a second decoding circuit for generating a stop read signal. A second reference bit line, electrically connected to the first decoding circuit through a first sensing unit for generating a stop pre-charge signal. | 01-20-2011 |
20110063893 | SYSTEMS AND METHODS FOR REDUCING MEMORY ARRAY LEAKAGE IN HIGH CAPACITY MEMORIES BY SELECTIVE BIASING - A source-biasing mechanism for leakage reduction in SRAM in which SRAM cells are arranged into a plurality of sectors. In standby mode, the SRAM cells in a sector in the plurality of sectors are deselected and a source-biasing potential is provided to the SRAM cells of the plurality sectors. In working mode, the source-biasing potential provided to the SRAM cells of a selected sector in the plurality of sectors is deactivated and the SRAM cells in a physical row within the selected sector are read while the remaining SRAM cells in the unselected sectors continue to be source-biased. The source-biasing potential provided to the SRAM cells that are in standby mode can be set to different voltages based on the logical state of control signals. | 03-17-2011 |
Patent application number | Description | Published |
20100114758 | SYSTEM AND METHOD FOR PROVIDING INSTANT-DECISION, FINANCIAL NETWORK-BASED PAYMENT CARDS - A system and method for issuance of a financial network-based payment card (generally known as a “credit card”) almost instantaneously after application, wherein an applicant applies for a credit card by entering data into a data entry system, advantageously by filling in a plurality of predefined forms in a computer-based data entry system. The applicant's data is sent via a data network to a central decision center, which approves or disapproves the application. If the application is approved, data is generated and delivered to a card production system, which embosses and magnetically encodes a card blank. The card is then delivered to the applicant. | 05-06-2010 |
20110288990 | SYSTEM AND METHOD FOR PROVIDING INSTANT-DECISION, FINANCIAL NETWORK-BASED PAYMENT CARDS - A system and method for issuance of a financial network-based payment card (generally known as a “payment card” or a “credit card”) almost instantaneously after application, wherein an applicant applies for a credit card by entering data into a data entry system using a handheld electronic device, advantageously by filling in a plurality of predefined forms in a computer-based data entry system. The applicant's data is sent via a data network to a central decision center, which approves or disapproves the application. If the application is approved, data is generated, a payment card is activated, and a result of the determination to issue is sent to the handheld electronic device | 11-24-2011 |
Patent application number | Description | Published |
20120079394 | CO-BRANDS FOR USER INTERFACE IN TRAVEL BOOKING - Co-brands, virtual wrappers for web sites that allow clients to expand client inventories across different web sites, are disclosed. Different types of travel inventory can be provided across these web sites. A client can create different URLs, domains, look and feel, product filters, pricing rules, business logic, payment methods, languages, currencies, etc. off a single instance. A client can create a co-brand and, using an administrator application, configure its settings to target specific geographic locations, targets markets or even themes. Additionally, co-brands are used to allow third party vendors to direct traffic to client sites. Co-brand tools are designed to make items such as navigation, images, buttons, domain names, colors, fonts, languages and currencies. Co-brands make it easier for travel companies to have sites based on demographics, destination, and events that can lead to greater adoption and conversion. | 03-29-2012 |