Patent application number | Description | Published |
20080250381 | PARAMETER ADJUSTMENT METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND RECORDING MEDIUM - A parameter adjustment method for a plurality of manufacturing devices to form a pattern of a semiconductor device on a substrate using the manufacturing devices includes: adjusting a parameter adjustable for a manufacturing device serving as a reference manufacturing device so as to fall within a range of a predetermined permissible variation and defining the adjusted parameter as a reference parameter of the reference manufacturing device; obtaining a first shape of a pattern of a semiconductor device to be formed on a substrate using the reference manufacturing device from a mask to form the pattern on the substrate when the reference parameter is set to the reference manufacturing device and defining the obtained first shape as a reference finished shape; defining an adjustable parameter of another to-be-adjusted manufacturing device as a to-be-adjusted parameter of the to-be-adjusted manufacturing device; obtaining a second shape of the pattern formed on the substrate using the to-be-adjusted manufacturing device from the mask when the defined to-be-adjusted parameter is set to the to-be-adjusted manufacturing device and defining the obtained second shape as a to-be-adjusted finished shape; calculating a difference amount between the reference finished shape and the to-be-adjusted finished shape; repeatedly calculating the difference amount by changing the to-be-adjusted parameter until the difference amount becomes equal to or less than a predetermined reference value; outputting as a parameter of the to-be-adjusted manufacturing device the to-be-adjusted parameter having the difference amount equal to or less than the predetermined reference value or the to-be-adjusted parameter having the difference amount which becomes equal to or less than the predetermined reference value through the repeated calculation. | 10-09-2008 |
20090014841 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING - A first region having a first pattern which includes a first minimum dimension, a second region having a second pattern which includes a second minimum dimension larger the first minimum dimension, the second region being arranged adjacent to the first region, wherein a boundary between the first region and the second region is sectioned by a width which is twice of more of a minimum dimension which exists in an adjacent region. | 01-15-2009 |
20090019418 | Lithography simulation method, mask pattern preparation method, semiconductor device manufacturing method and recording medium - A lithography simulation method includes: taking in design data of a pattern to be formed on a substrate and mask data to prepare a mask pattern used in forming a latent image of the pattern on the substrate by transmission of an energy ray; obtaining the latent image of the pattern by calculation of an intensity of the energy ray; locally changing, at least in a portion corresponding to a pattern to be interested, a relative position in a direction of the intensity of the energy ray between a latent image curve and a reference intensity line in accordance with a distance between the pattern to be interested and a pattern of a neighboring region, the latent image curve being an intensity distribution curve of the energy ray constituting the latent image, the reference intensity line being defined to specify a position of an edge of the pattern to be interested; and calculating a distance between intersections of a portion of the latent image curve corresponding to the pattern to be interested and the reference intensity line in the changed relative position to define an interested line width of the pattern to be interested. | 01-15-2009 |
20090186429 | Method for correcting a mask pattern, system for correcting a mask pattern, program, method for manufacturing a photomask and method for manufacturing a semiconductor device - A computer implemented method for correcting a mask pattern includes: predicting a displacement of a device pattern by using a mask pattern to form the device pattern and a variation of a process condition; determinating an optical proximity correction value so that the displacement falls within a displacement tolerance of the device pattern; and correcting the mask pattern using the optical proximity correction value. | 07-23-2009 |
20090192643 | PROCESS CONTROLLER, PROCESS CONTROL METHOD, AND COMPUTER-READABLE RECORDING MEDIUM - A process control method comprises adjusting a process condition in consideration of a performance variation among a plurality of manufacturing apparatuses, the performance variation affecting a finished shape of a pattern used to manufacture a semiconductor device, running a simulation of the finished shape under the adjusted process condition, extracting a dangerous point of the pattern affecting satisfaction from the result of the simulation, comparing a first process capability serving as a judgment standard to find whether a production schedule of the device is achieved with a second capability serving to form a dangerous pattern containing the dangerous point, and improving the second process when the second process capability is lower than the first process capability. | 07-30-2009 |
20090239177 | MASK PATTERN DATA GENERATION METHOD, MASK MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND PATTERN DATA GENERATION PROGRAM - According to an aspect of the present invention, there is provided a mask pattern data generation method including: a first step of obtaining a mask data representing from a design pattern by performing a process simulation with a process parameter having a first value; a second step of obtaining a finished pattern from the mask data by performing the process simulation with the process parameter having a different value; a third step of verifying whether a dimensional error therebetween is within an allowable range; and a fourth step of: if the dimensional error is within the allowable range, determining the mask pattern data; and if the dimensional error is not within the allowable range, repeating the above steps by updating the process parameter until the dimensional error becomes within the allowable range. | 09-24-2009 |
20090258446 | PATTERN VERIFICATION METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND RECORDING MEDIA - A pattern verification method according to an embodiment includes, dividing a pattern data region or a pattern formation region formed based on the pattern data to a plurality of unit regions, calculating a pattern area ratio with respect to each unit region, calculating differences in the amount of the pattern area ratio between each unit region and adjacent unit regions thereto, setting the number or density of measurement point with respect to each unit region to the pattern of the pattern data region or the pattern formation region according to the difference in the amount of pattern area ratio, measuring the pattern size at each measurement point, and verifying whether the size measurement value is within a predetermined range or not. | 10-15-2009 |
20090258503 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND COMPUTER READABLE MEDIUM FOR STORING PATTERN SIZE SETTING PROGRAM - A method of manufacturing a semiconductor device, which forms a pattern by performing pattern transformation steps multiple times, comprises setting finished pattern sizes for patterns to be formed in each consecutive two pattern transformation steps among the plurality of pattern transformation steps based on a possible total amount of in-plane size variation of the patterns to be formed in the consecutive two pattern transformation steps. | 10-15-2009 |
20100003819 | DESIGN LAYOUT DATA CREATING METHOD, COMPUTER PROGRAM PRODUCT, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A design layout data creating method includes creating design layout data of a semiconductor device such that patterns formed on a wafer when patterns corresponding to the design layout data are formed on the wafer have a pattern coverage ratio within a predetermined range in a wafer surface and total peripheral length of the patterns formed on the wafer when the patterns corresponding to the design layout are formed on the wafer is pattern peripheral length within a predetermined range. | 01-07-2010 |
20100021825 | MASK PATTERN DATA CREATION METHOD AND MASK - A mask pattern data creation method includes: determining whether or not a spacing of adjacent assist pattern feature data is not more than a prescribed spacing, based on: initial position data indicating an initially set position of the assist pattern feature data determined based on an illumination condition; and initial size data indicating an initially set size of the assist pattern feature data satisfying a size condition to not optically form an image on the transfer destination; and moving at least one of the adjacent assist pattern feature data or reducing a size of the at least one to increase the spacing of the assist pattern feature data to exceed a prescribed spacing in the case where it is determined that the spacing of the assist pattern feature data is not more than the prescribed spacing. | 01-28-2010 |
20100030545 | PATTERN SHAPE PREDICTING METHOD AND PATTERN SHAPE PREDICTING APPARATUS - A pattern shape predicting method comprising: predicting, with simulation, an intensity distribution of a pattern image concerning a pattern shape of a pattern on substrate formed on a substrate based on pattern data; calculating a first pattern edge position from the intensity distribution of the pattern image; calculating a feature value of the intensity distribution of the pattern image in a predetermined range including the first pattern edge position; calculating a fluctuation amount of the first pattern edge position from the feature value using a correlation; and predicting a second pattern edge position taking into account the fluctuation amount with respect to the first pattern edge position. | 02-04-2010 |
20100035168 | PATTERN PREDICTING METHOD, RECORDING MEDIA AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A pattern predicting method according to one embodiment includes obtaining shape data of a target pattern from shape data of a second pattern to be formed by transferring a first pattern at predetermined process conditions by using a first neutral network, the target pattern being to be a target of the second pattern when the first pattern is transferred at the predetermined process conditions, so as to keep the transferred patterns within an acceptable range, the transferred patterns being formed by transferring the first pattern at process conditions changed from the predetermined process conditions and obtaining shape data of a new first pattern for forming the target pattern at the predetermined process conditions by using a second neutral network. | 02-11-2010 |
20100038795 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device according to an embodiment includes forming a first pattern having linear parts of a constant line width and a second pattern on a foundation layer, the second pattern including parts close to the linear parts of the first pattern and parts away from the linear parts of the first pattern and constituting closed loop shapes independently of the first pattern or in a state of being connected to the first pattern and carrying out a closed loop cut at the parts of the second pattern away from the linear parts of the first pattern. | 02-18-2010 |
20100081265 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, the method including: forming a first film on a target film; forming resist patterns on the first film; processing the first film with the resist patterns to form first patterns including: periodic patterns; and aperiodic patterns; removing the resist patterns; forming a second film over the target film; processing the second film to form second side wall patterns on side walls of the first patterns; removing the periodic patterns; and processing the target film with the aperiodic patterns and the second side wall patterns, thereby forming a target patterns including: periodic target patterns; aperiodic target patterns; and dummy patterns arranged between the periodic target patterns and the aperiodic patterns and arranged periodically with the periodic target patterns. | 04-01-2010 |
20100082144 | METHOD OF CALCULATING PATTERN-FAILURE-OCCURRENCE-REGION, COMPUTER PROGRAM PRODUCT, PATTERN-LAYOUT EVALUATING METHOD, AND SEMICONDUCTOR-DEVICE MANUFACTURING METHOD - Method of calculating pattern-failure-occurrence-region comprising calculating a pattern failure occurrence region using relation information and a layout used for forming a convex section, the relation information being a relation between a distance from a formed pattern in a film to cover the convex section on a substrate to the convex section and a region in the film in which a shape of the formed pattern cannot satisfy a predetermined condition because of influence of the convex section. | 04-01-2010 |
20100185313 | PATTERN DATA CREATING METHOD, COMPUTER PROGRAM PRODUCT, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A pattern data creating method comprising: referring to a first correspondence relation between an amount of dimension variation between a first pattern formed on a substrate and a second pattern formed by processing the substrate using the first pattern and either one of a pattern total surface area and a pattern boundary length of the first pattern; and creating pattern data for forming the first pattern. | 07-22-2010 |
20100190342 | PATTERN GENERATING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, COMPUTER PROGRAM PRODUCT, AND PATTERN-SHAPE-DETERMINATION-PARAMETER GENERATING METHOD - A pattern generating method includes: extracting, from a shape of a pattern generated on a substrate, a contour of the pattern shape; setting evaluation points as verification points for the pattern shape on the contour; calculating curvatures on the contour in the evaluation points; and verifying the pattern shape based on whether the curvatures satisfy a predetermined threshold set in advance. | 07-29-2010 |
20100216064 | SEMICONDUCTOR-DEVICE MANUFACTURING METHOD, COMPUTER PROGRAM PRODUCT, AND EXPOSURE-PARAMETER CREATING METHOD - A semiconductor-device manufacturing method includes: correcting a systematic component of process proximity effect, which occurs in a process other than exposure processing to thereby set a target pattern after exposure; adjusting an exposure parameter such that a difference between a dimension of the target pattern and a pattern dimension after the exposure is within tolerance; and forming, when an exposure margin calculated from the exposure parameter by using the exposure the random component of fluctuation in the process proximity effect is within the tolerance, a pattern on a semiconductor substrate with the adjusted exposure parameter. | 08-26-2010 |
20100241261 | PATTERN GENERATING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND COMPUTER PROGRAM PRODUCT - Pattern formation simulations are performed based on design layout data subjected to OPC processing with a plurality of process parameters set in process conditions. A worst condition of the process conditions is calculated based on risk points extracted from simulation results. The design layout data or the OPC processing is changed such that when a pattern is formed under the worst condition based on the changed design layout data or the changed OPC processing a number of the risk points or a risk degree of the risk points of the pattern is smaller than the simulation result. | 09-23-2010 |
20100266960 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND EXPOSURE DEVICE - A method of manufacturing a semiconductor device according to an embodiment includes determining a second exposure parameter including exposure parameters except for an exposure amount from a dimension distribution information so that a resist pattern of a first resist pattern formed based on a second pattern has a desired dimension in a plurality of regions to be shot within a surface of a wafer. | 10-21-2010 |
20110029937 | PATTERN EVALUATING METHOD, PATTERN GENERATING METHOD, AND COMPUTER PROGRAM PRODUCT - A pattern evaluating method includes generating a proximity pattern that affects a resolution performance of a circuit pattern around a lithography target pattern of the circuit pattern to be formed on the substrate, generating distribution information on a distribution of an influence degree to the resolution performance of the circuit pattern by using the lithography target pattern, calculating the influence degree to the resolution performance of the circuit pattern by the proximity pattern as a score by comparing the distribution information with the proximity pattern, and evaluating whether the proximity pattern is placed at an appropriate position in accordance with the circuit pattern based on the score. | 02-03-2011 |
20110047518 | PATTERN DETERMINING METHOD - According to the embodiments, a first representative point is set on outline pattern data on a pattern formed in a process before a processed pattern. Then, a minimum distance from the first representative point to a peripheral pattern is calculated. Then, area of a region with no pattern, which is sandwiched by the first representative point and the peripheral pattern, in a region within a predetermined range from the first representative point is calculated. Then, it is determined whether the first representative point becomes a processing failure by using the minimum distance and the area. | 02-24-2011 |
20110065028 | PATTERN GENERATING METHOD, MANUFACTURING METHOD OF MASK, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - According to the embodiments, each of a main pattern of a mask to be transferred onto a substrate by using a lithography process, a first assist pattern that improves a resolution of an on-substrate pattern obtained by transferring the main pattern onto the substrate, and a second assist pattern that suppresses a transfer property of the first assist pattern onto the substrate is placed as a mask pattern. | 03-17-2011 |
20110065030 | MASK PATTERN DETERMINING METHOD, MASK MANUFACTURING METHOD, AND DEVICE MANUFACTURING METHOD - According to one embodiment, a mask pattern determining method includes a mask-pattern dimension variation amount of a first photomask is derived. Moreover, a correspondence relationship between a target dimension value of an on-substrate test pattern formed by using a second photomask and a dimension allowable variation amount of a mask pattern formed on the second photomask is derived. Then, it is determined whether pattern formation is possible with a pattern dimension that needs to be formed when performing the pattern formation on a substrate by using the first photomask based on the mask-pattern dimension variation amount and the correspondence relationship. | 03-17-2011 |
20110069531 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a method of manufacturing a nonvolatile semiconductor storage device includes a memory-cell forming step, a first wire forming step, and a second wire forming step. The memory-cell forming step is forming dummy memory cells arranged at a predetermined space apart from an end memory cell located at an end of a group of memory cells set in contact with the same first or second wire among the memory cells, the dummy memory cells having a laminated structure same as that of the memory cells and being set in contact with no second wire. | 03-24-2011 |
20110154273 | METHOD OF GENERATING MASK PATTERN, MASK PATTERN GENERATING PROGRAM, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, in process simulation, it is verified whether sidewall patterns formed on sidewalls of a core material pattern or a transfer pattern formed by transferring the core material pattern form a closed loop. When it is determined as a result of the verification that the sidewall patterns form a closed loop, the mask pattern is changed. When it is determined as a result of the verification that the sidewall patterns do not form a closed loop, the mask pattern is adopted. | 06-23-2011 |
20110177458 | EXPOSURE DETERMINING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND COMPUTER PROGRAM PRODUCT - According to one embodiment, a deviation amount distribution of a two-dimensional shape parameter between a mask pattern formed on a mask and a desired mask pattern is acquired as a mask pattern map. Such that a deviation amount of the two-dimensional shape parameter between a pattern on substrate formed when the mask is subjected to exposure shot to form a pattern on a substrate and a desired pattern on substrate fits within a predetermined range, an exposure is determined for each position in the exposure shot in forming the pattern on substrate based on the mask pattern map. | 07-21-2011 |
20110294239 | SUB-RESOLUTION ASSIST FEATURE ARRANGING METHOD AND COMPUTER PROGRAM PRODUCT AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - According to a sub-resolution assist feature arranging method in embodiments, it is selected which of a rule base and a model base is set for which pattern region on pattern data corresponding to a main pattern as a type of the method of arranging the sub-resolution assist feature for improving resolution of the main pattern formed on a substrate. Then, the sub-resolution assist feature by the rule base is arranged in a pattern region set as the rule base and the sub-resolution assist feature by the model base is arranged in a pattern region set as the model base. | 12-01-2011 |
20110307845 | PATTERN DIMENSION CALCULATION METHOD AND COMPUTER PROGRAM PRODUCT - A pattern dimension calculation method according to one embodiment calculates a taper shape of a mask member used as a mask when a circuit pattern is processed in an upper layer of the circuit pattern formed on a substrate. The method calculates an opening angle facing the mask member from a shape prediction position on the circuit pattern on the basis of the taper shape. The method calculates a dimension of the circuit pattern according to the opening angle formed at the shape prediction position. | 12-15-2011 |
20120070985 | EXPOSURE METHOD AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, an exposure method is disclosed. The method can include applying light to a photomask by an illumination. The method can include converging diffracted beams emitted from the photomask by a lens. In addition, the method can include imaging a plurality of point images on an exposure surface. On the photomask, a light transmitting region is formed at a lattice point represented by nonorthogonal unit cell vectors, and in the illumination, a light emitting region is set so that three or more of the diffracted beams pass through positions equidistant from center of a pupil of the lens. | 03-22-2012 |
20120183906 | MASK PATTERN GENERATING METHOD, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND COMPUTER PROGRAM PRODUCT - According to a mask pattern generating method of the embodiments, an undesired pattern, which is transferred onto a substrate due to an auxiliary pattern when an on-substrate pattern is formed on the substrate by using a mask pattern in which the auxiliary pattern is placed, is extracted as an undesired transfer pattern. Then, the mask pattern is corrected by changing a size of the auxiliary pattern according to a size and a position of the undesired transfer pattern. | 07-19-2012 |
20120184109 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND COMPUTER READABLE MEDIUM FOR STORING PATTERN SIZE SETTING PROGRAM - A method of manufacturing a semiconductor device, which forms a pattern by performing pattern transformation steps multiple times, comprises setting finished pattern sizes for patterns to be formed in each consecutive two pattern transformation steps among the plurality of pattern transformation steps based on a possible total amount of in-plane size variation of the patterns to be formed in the consecutive two pattern transformation steps. | 07-19-2012 |
20120198396 | METHOD OF OPTIMIZING SEMICONDUCTOR DEVICE MANUFACTURING PROCESS, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND NON-TRANSITORY COMPUTER READABLE MEDIUM - A method of optimizing a semiconductor device manufacturing process according to an embodiment is a method of optimizing a semiconductor device manufacturing process in which a pattern based on circuit design is formed. The method of optimizing a semiconductor device manufacturing process according to the embodiment includes: at the time of calculation of a statistic amount based on a distribution of differences at a plurality of sites between a pattern formed by a first exposing apparatus in a first condition and a pattern formed by a second exposing apparatus in a second condition, calculating the statistic amount after applying weighting to the differences based on information on an electrical characteristic; and repeating the calculating with the second condition being changed, and selecting an condition in which the total sum becomes a minimum or equal to or less than a standard value as an optimized condition of the second exposing apparatus. | 08-02-2012 |
20120244707 | METHOD OF CORRECTING MASK PATTERN, COMPUTER PROGRAM PRODUCT, MASK PATTERN CORRECTING APPARATUS, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In the method of correcting a mask pattern according to the embodiments, a mask pattern correction amount for a reference flare value is calculated as a reference mask correction amount, for every type of patterns within the layout, and a change amount of the mask pattern correction amount corresponding to the change amount of the flare value is calculated as the change amount information. A mask pattern corresponding to the flare value of the pattern is created based on the reference mask correction amount and the change amount information corresponding to the pattern, extracted from the information having the pattern, the reference mask correction amount, and the change amount information correlated with each other, and based on a difference between the flare value of the pattern and the reference flare value. | 09-27-2012 |
20120246601 | PATTERN CORRECTING METHOD, MASK FORMING METHOD, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A pattern correcting method of an embodiment computes a distribution of pattern coverages on a design layout of a circuit pattern in the vicinity of a position that becomes an error pattern in a case where an on-substrate pattern is formed. Then, an area on the design layout in which a difference in the distribution of the pattern coverages becomes small by adding an addition pattern is set as an addition area. Next, addition pattern candidates to be added to the addition area are generated, an addition pattern to be added to the design layout is selected from the candidates on the basis of a predetermined selection criterion, and the addition pattern is added to the addition area. | 09-27-2012 |
20120311511 | MASK INSPECTION METHOD, MASK PRODUCTION METHOD, SEMICONDUCTOR DEVICE PRODUCTION METHOD, AND MASK INSPECTION DEVICE - A mask inspection method according to the embodiments, original data corresponding to a semiconductor integrated circuit pattern to be formed on a substrate is created. After that, original production simulation which mocks an original production process is performed on the original data to derive information relating to an original pattern shape in the case of forming an original pattern corresponding to the original data on an original. After that, whether or not the information relating to an original pattern shape satisfies a predetermined value decided based on the original production process is determined. | 12-06-2012 |
20130062771 | DESIGN METHOD OF WIRING LAYOUT, SEMICONDUCTOR DEVICE, PROGRAM FOR SUPPORTING DESIGN OF WIRING LAYOUT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, a design method of layout formed by a sidewall method is provided. The method includes: preparing a base pattern on which a plurality of first patterns extending in a first direction and arranged at a first space in a second direction intersecting the first direction and a plurality of second patterns extending in the first direction and arranged at a center between the first patterns, respectively, are provided; and drawing a connecting portion which extends in the second direction and connects two neighboring first patterns sandwiching one of the second patterns, and separating the one of the second patterns into two patterns not contacting the connecting portion. | 03-14-2013 |
20130063707 | PATTERN GENERATING METHOD, PATTERN FORMING METHOD, AND PATTERN GENERATING PROGRAM - One embodiment includes: a step of evaluating an amount of flare occurring through a mask at EUV exposure; a step of providing a dummy mask pattern on the mask based on the evaluated result of the amount of flare; and a step of executing a flare correction and an optical proximity correction on a layout pattern. The layout pattern is provided by the EUV exposure through the mask with the dummy mask pattern. | 03-14-2013 |
20130126959 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, there are provided a first shaped pattern in which a plurality of first holes are arranged and of which a width is periodically changed along an arrangement direction of the first holes, a second shaped pattern in which a plurality of second holes are arranged and of which a width is periodically changed along an arrangement direction of the second holes, and slits which are formed along the arrangement direction of the first holes and separate the first shaped pattern and the second shaped pattern. | 05-23-2013 |
20130159944 | FLARE MAP CALCULATING METHOD AND RECORDING MEDIUM - A flare map calculating method of an embodiment calculates an optical image intensity distribution in each division region set in a pattern region. Furthermore, an average value of the optical image intensity distribution is calculated in each division region. A pattern or plural patterns, which has a pattern density corresponding to the average value, is calculated as a corresponding density pattern in each division region. Furthermore, a density map, which represents a pattern density distribution within the pattern region, is generated based on the corresponding density pattern, and a flare map representing a flare intensity distribution within the pattern region is calculated by convolution integral of the density map and a point spread function. | 06-20-2013 |
20130168827 | DESIGN METHOD OF WIRING LAYOUT, SEMICONDUCTOR DEVICE, PROGRAM FOR SUPPORTING DESIGN OF WIRING LAYOUT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, a design method of layout formed by a sidewall method is provided. The method includes: preparing a base pattern on which a plurality of first patterns extending in a first direction and arranged at a first space in a second direction intersecting the first direction and a plurality of second patterns extending in the first direction and arranged at a center between the first patterns, respectively, are provided; and drawing a connecting portion which extends in the second direction and connects two neighboring first patterns sandwiching one of the second patterns, and separating the one of the second patterns into two patterns not contacting the connecting portion. | 07-04-2013 |
20130241073 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a plurality of wires arranged in parallel at a predetermined pitch, a plurality at first contacts that are each connected to an odd-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to a wiring direction of the wires, and a plurality of second contacts that are each connected to an even-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to the wiring direction of the wires in such a way as to be offset from the first contacts in the wiring direction of the wires, in which the first contacts are offset from the second contacts by a pitch of the wires in an orthogonal direction with respect to the wiring direction of the wires. | 09-19-2013 |
20140059502 | PATTERN DATA GENERATION METHOD, PATTERN VERIFICATION METHOD, AND OPTICAL IMAGE CALCULATION METHOD - According to an embodiment, a pattern data generation method is provided. In the pattern data generation method, when a resist on a substrate is exposed using a mask, an optical image at a designated resist film thickness position is calculated using a mask pattern. Feature quantity related to a shape of a resist pattern at the resist film thickness position is extracted, based on the optical image. Also, whether the resist pattern is failed is determined, based on the feature quantity, and pattern data of a mask pattern determined as failed is corrected. | 02-27-2014 |
20140131879 | DESIGN METHOD OF WIRING LAYOUT, SEMICONDUCTOR DEVICE, PROGRAM FOR SUPPORTING DESIGN OF WIRING LAYOUT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, a design method of layout formed by a sidewall method is provided. The method includes: preparing a base pattern on which a plurality of first patterns extending in a first direction and arranged at a first space in a second direction intersecting the first direction and a plurality of second patterns extending in the first direction and arranged at a center between the first patterns, respectively, are provided; and drawing a connecting portion which extends in the second direction and connects two neighboring first patterns sandwiching one of the second patterns, and separating the one of the second patterns into two patterns not contacting the connecting portion. | 05-15-2014 |
20140183702 | DESIGN METHOD OF WIRING LAYOUT, SEMICONDUCTOR DEVICE, PROGRAM FOR SUPPORTING DESIGN OF WIRING LAYOUT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, a design method of layout formed by a sidewall method is provided. The method includes: preparing a base pattern on which a plurality of first patterns extending in a first direction and arranged at a first space in a second direction intersecting the first direction and a plurality of second patterns extending in the first direction and arranged at a center between the first patterns, respectively, are provided; and drawing a connecting portion which extends in the second direction and connects two neighboring first patterns sandwiching one of the second patterns, and separating the one of the second patterns into two patterns not contacting the connecting portion. | 07-03-2014 |
20140242498 | PRODUCTION METHOD AND EVALUATION APPARATUS FOR MASK LAYOUT - According to one embodiment, a production method for a mask layout of an exposure mask includes evaluating a candidate layout by comparison between an imaged image group and a reference image group. The imaged image group is composed of a plurality of imaged images of patterns formed by performing lithography under a plurality of levels of exposure condition using the candidate layout. The reference image group is composed of a plurality of reference images produced by simulation on assumption of a plurality of levels of the exposure condition. | 08-28-2014 |