Patent application number | Description | Published |
20100266991 | FLIGHT SIMULATION SYSTEM - A flight simulation system capable of simulating multiple aircraft through interchangeable instrument panels, throttle quadrants, and control devices (stick and/or yoke). The system has multiple visual displays capable of displaying simulated outside views and instrument displays (e.g. multiple aircraft, avionics suites, gauges, etc.). The instrument panels simulating a particular type of aircraft and containing switches, knobs, and/or buttons of approximately the same type and approximately the same location as in the simulated aircraft. The system containing a communications system compatible with standard pilot headsets and a pilot key for logging, storage, and permissions. | 10-21-2010 |
20100266992 | INTERCHANGEABLE INSTRUMENT PANEL OVERLAY SYSTEM FOR A FLIGHT SIMULATOR - An interchangeable instrument panel overlay system for a flight simulator interchangeable with another simulating a different aircraft. Each instrument panel simulating a particular type of aircraft and containing switches, knobs, and/or buttons of approximately the same type and approximately the same location as in the simulated aircraft. The instrument panels capable of simulating a variety of avionics suites, gauges, and/or other equipment. The instrument panels capable of being affixed over a visual display displaying avionics suites, gauges, and/or other equipment. | 10-21-2010 |
20100266993 | INTERCHANGEABLE INSTRUMENT PANEL, THROTTLE QUADRANT, AND CONTROL DEVICE SYSTEM - An interchangeable instrument panel, throttle quadrant, and control device (stick and/or yoke) for a flight simulation system each independently interchangeable with another simulating a different aircraft. Each instrument panel simulating a particular type of aircraft and containing switches, knobs, and/or buttons of approximately the same type and approximately the same location as in the simulated aircraft. The instrument panels capable of simulating a variety of avionics suites, gauges, and other equipment. Each throttle quadrant simulating a particular type of aircraft (e.g. single engine; multi-engine; knob/pull style; lever style). | 10-21-2010 |
20100266994 | MOTION PLATFORM FOR A FLIGHT SIMULATION SYSTEM - A motion platform providing motion for roll, pitch, heave, surge, yaw, and sway from only three electric motors. Each motor moving one of three frames in a particular direction (roll, pitch, or yaw) via either a pulley style system or a direct system. The motion platform having a control system to precisely move the motion platform in response to received commands. The motion platform capable of operating in a room with at least eight foot ceilings and one standard power outlet. The motion platform utilizing pneumatic cylinders and infrared beams as safety devices. | 10-21-2010 |
Patent application number | Description | Published |
20100019806 | STACKED CASCODE CURRENT SOURCE - Apparatus are provided for a stacked cascode current source. An apparatus is provided for an electrical device comprising an input node and an output node. A first transistor stack is coupled to the input node. The first transistor stack includes a first transistor and a second transistor. A drain terminal and a gate terminal of the first transistor are coupled to the input node. A drain terminal of the second transistor is coupled to a source terminal of the first transistor and a gate terminal of the second transistor is coupled to the input node. A second transistor stack coupled to the first transistor stack and the output node to create a current mirror for the first transistor stack. | 01-28-2010 |
20100083754 | MATCHED MULTIPLIER CIRCUIT HAVING REDUCED PHASE SHIFT FOR USE IN MEMS SENSING APPLICATIONS - Apparatus and methods are provided for multiplier circuits having reduced phase shift. A multiplier circuit comprises an input node for an input signal and an output node for an output signal. A first multiplier is coupled to the input node and has a first multiplier output, wherein the first multiplier multiplies the input signal by a first signal to produce a second signal at the first multiplier output. A second multiplier is coupled to the output node and is matched to the first multiplier. The second multiplier multiplies the output signal by a third signal to produce a fourth signal at a second multiplier output. An amplifier is coupled to the first multiplier output and the second multiplier output and produces the output signal at an amplifier output coupled to the output node based upon the second signal and the fourth signal. | 04-08-2010 |
20100207797 | DIGITALLY ADJUSTABLE QUANTIZATION CIRCUIT - Apparatus and methods are provided for converting an analog input signal to a digital output value. A quantization circuit comprises an input node and a comparator array, wherein each comparator of the comparator array is coupled to the input node. A voltage divider arrangement is coupled to the comparator array and configured to establish a respective threshold voltage for each comparator of the comparator array. The comparator array generates a digital code based on the input signal and the respective threshold voltage for each comparator. A control node is coupled to the voltage divider arrangement, wherein the control node and the voltage divider arrangement are cooperatively configured to adjust the threshold voltage for at least one comparator of the comparator array in response to a control signal at the control node. | 08-19-2010 |
20100259318 | SENSOR DEVICE WITH REDUCED PARASITIC-INDUCED ERROR | 10-14-2010 |
20130027092 | Digital Output Driver - A digital output driver is disclosed. In accordance with some embodiments of the present disclosure, a digital output driver may comprise at least one of an output-source PMOS configured to source current during at least a portion of a low-to-high transition of a digital output, wherein the output-source PMOS is configured to mirror a reference PMOS configured to be driven at its gate by a first amplifier and to be biased by a first reference current, and an output-sink NMOS configured to sink current during at least a portion of a high-to-low transition of the digital output, wherein the output-sink NMOS is configured to mirror a reference NMOS configured to be driven at its gate by a second amplifier and to be biased by a second reference current. | 01-31-2013 |