Patent application number | Description | Published |
20080248771 | CALIBRATION TECHNIQUES FOR FREQUENCY SYNTHESIZERS - In one embodiment, this disclosure describes a frequency synthesizer for use in a wireless communication device, or similar device that requires precision frequency synthesis but small amounts of noise. In particular, the frequency synthesizer may include a phase locked loop (PLL) and an integrated voltage controlled oscillator (VCO). The frequency synthesizer may implement one or more calibration techniques to quickly and precisely calibrate the VCO. In this manner, the analog gain of the VCO can be significantly reduced, which may improve performance of the wireless communication device. Also, the initial state of the PLL may be improved to reduce lock time of the PLL, which may enhance performance of the wireless communication device. | 10-09-2008 |
20100323616 | DEVICES FOR CONVEYING WIRELESS POWER AND METHODS OF OPERATION THEREOF - Exemplary embodiments are directed to wireless power. A method may comprise receiving wireless power with a receiver and charging an accumulator with energy from the received wireless power. The method may further include conveying energy from the accumulator to an energy storage device upon a charging level of the accumulator reaching a threshold level. | 12-23-2010 |
20110025408 | SWITCHES WITH BIAS RESISTORS FOR EVEN VOLTAGE DISTRIBUTION - Switches with connected bulk for improved switching performance and bias resistors for even voltage distribution to improve reliability are described. In an exemplary design, a switch may include a plurality of transistors coupled in a stack and at least one resistor coupled to at least one intermediate node in the stack. The transistors may have (i) a first voltage applied to a first transistor in the stack and (ii) a second voltage that is lower than the first voltage applied to bulk nodes of the transistors. The resistor(s) may maintain matching bias conditions for the transistors when they are turned off. In one exemplary design, one resistor may be coupled between the source and drain of each transistor. In another exemplary design, one resistor may be coupled between each intermediate node and the first voltage. The resistor(s) may maintain the source of each transistor at the first voltage. | 02-03-2011 |
20110115431 | SELECTIVE WIRELESS POWER TRANSFER - Exemplary embodiments are directed to selective wireless power transfer. A method may include transferring wireless power to at least one electronic device while varying at least one parameter of the wireless power transfer according to a wireless power transfer scenario. | 05-19-2011 |
20110133794 | PHASE LOCKED LOOP WITH DIGITAL COMPENSATION FOR ANALOG INTEGRATION - A phase locked loop (PLL) device includes a digital differentiator configured to differentiate a digital loop signal to at least partially compensate for the integration of an analog current signal by an analog integrator. A digital to analog converter (DAC) includes a current source output stage that generates the analog current signal based on an digital input signal. The analog integrator integrates the analog current signal to generate a voltage control signal for controlling a voltage controlled oscillator (VCO). | 06-09-2011 |
20110133799 | CONFIGURABLE DIGITAL-ANALOG PHASE LOCKED LOOP - A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop. | 06-09-2011 |
20110248668 | ENERGY STORAGE DEVICE SECURITY - Exemplary embodiments are directed to energy storage device security. An energy storage device may include at least one energy storage cell and a controller. The controller may be configured to request device identification data from an electronic device coupled to the energy storage device and compare the device identification data to device identification data stored in the energy storage device. The controller may be further configured to enable energy to be conveyed from the at least one energy storage cell to the electronic device if the device identification matches the stored device identification data. | 10-13-2011 |
20130181756 | CONFIGURABLE DIGITAL-ANALOG PHASE LOCKED LOOP - A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop. | 07-18-2013 |
20130229212 | PHASE LOCKED LOOP WITH DIGITAL COMPENSATION FOR ANALOG INTEGRATION - A method of performing modulation of a data signal at a phase-locked loop (PLL) includes generating, at an upper frequency port of the PLL, a digital loop signal based at least in part on the data signal. The method further includes differentiating the digital loop signal to generate a digital input signal and converting the digital input signal to an analog current signal. A first feedback signal is generated based on the analog current signal. The method further includes generating, at a lower frequency port of the PLL, a second feedback signal based on the first feedback signal and further based on the data signal. According to further embodiments, apparatuses and a computer-readable medium are disclosed. | 09-05-2013 |
20140179251 | Apparatus and method of harmonic selection for mixing with a received signal - A method of harmonic selection for mixing with a received signal includes receiving a radio frequency (RF) signal and determining a variable gain setting from among a plurality of gain settings or from a range of gain settings. The variable gain setting is based on the RF signal. The method further includes selecting a harmonic to provide to an input of a mixer to generate an output signal. A baseband signal or an intermediate frequency signal is generated from the output signal. The harmonic is selected based on the variable gain setting. An apparatus includes a harmonic selector that is configured to generate an indication of a selected harmonic. The harmonic is selected based on a variable gain setting determined from among a plurality of gain settings or from a range of gain settings. Based on the selected harmonic, a mixer generates an output signal. A baseband signal or an intermediate signal is generated from the output signal. | 06-26-2014 |
Patent application number | Description | Published |
20090072912 | OSCILLATOR SIGNAL GENERATION WITH SPUR MITIGATION IN A WIRELESS COMMUNICATION DEVICE - Techniques for generating oscillator signals in a wireless communication device are described. A phase-locked loop (PLL) may be used to generate an oscillator signal for a selected frequency channel. Different PLL settings may be used for the blocks in the PLL for different frequency channels. The different PLL settings may be for different PLL loop bandwidths, different amounts of charge pump current, different frequency equations associated with different sets of high and low divider ratios, different frequency division schemes associated with different prescaler ratios and/or different integer divider ratios, high side or low side injection for a super-heterodyne receiver or transmitter, and/or different supply voltages for one or more circuit blocks such as an oscillator. A suitable set of PLL settings may be selected for each frequency channel such that adverse impact due to spurs can be mitigated. | 03-19-2009 |
20140098906 | TRANSMIT DIVERSITY ARCHITECTURE WITH OPTIMIZED POWER CONSUMPTION AND AREA FOR UMTS & LTE SYSTEMS - A method and apparatus for providing total power from one transmit path. The method provides the steps of: selecting a transmit path and closing a first switch, located after a digital to analog converter. A second switch between the two transmit paths is then closed in order to provide for the use of at least one low-pass filter in each transmit path. The signal is then processed through the at least one low pass filter in each transmit path. The signal is then processed through at least one mixer in each transmit path. After the mixer, the signal is then processed through at least one driver amplifier in each transmit path, and one-half of the total power is allocated to each of two transmission paths. A third switch is then closed after the at least one power amplifier in each transmit path to force the half-power from one transmit path into one output. | 04-10-2014 |
20150063509 | BLOCKER FILTERING FOR NOISE-CANCELLING RECEIVER - Techniques for improving rejection of out-of-band interference in a noise-cancelling receive architecture. In an aspect, capacitors blocking in-band signals and passing through out-of-band signals destructively couple an auxiliary mixer output to a mixer output. In a further aspect, cross-coupling capacitors are provided to couple a first signal path with a second signal path of the noise-cancelling receive signal path. Baseband poly phase cross-coupling blocker filtering is further provided for out-of-band interference cancellation to create notch responses at blocker offset frequencies. The techniques disclosed may readily be adapted for multi-phase local oscillator systems. | 03-05-2015 |
20150085902 | RFDAC Transmitter Using Multiphase Image Select FIR DAC and Delta Sigma Modulator with Multiple Rx Band NTF Zeros - A transmitter includes a delta-sigma modulator characterized by a noise transfer function having a multitude of zeroes positioned substantially near a frequency band of a receive signal. The transmitter further includes, in part, a multi-phase digital-to-analog (DAC) converter converting an output signal of the delta-sigma modulator to an analog signal. The DAC is characterized by a transfer function that passes the desired signal to its output and attenuates a multitude of images of the sampling clock signal. The transmitter transmits at a frequency defined by an odd multiple of a fraction of the sampling clock signal frequency. The DAC includes a number of stages each pair of which is associated with one of the images being attenuated. The delta-sigma modulator includes a multitude of stages each associated with a different one of the zeroes. Each stage of said delta-sigma modulator optionally receives three tap coefficients. | 03-26-2015 |
20150094004 | HARMONIC REJECTIVE PASSIVE UP CONVERTER - Methods and apparatuses are presented for harmonic reject upconverting a baseband signal using at least one quadrature passive upconversion mixer. In some embodiments, an apparatus may include a first quadrature passive mixer configured to receive a first baseband input and a first LO input, and a second quadrature passive mixer configured to receive a second baseband input and a second LO input. A first output of said first passive mixer may be directly connected to a first output of said second passive mixer and together coupled to a first amplifier input. A second output of said first passive mixer may be directly connected to a second output of said second passive mixer and together coupled to a second amplifier input. The transmitter may be configured to output an upconverted signal with at least one rejected harmonic spurious mixing product based on the first and second amplifier inputs. | 04-02-2015 |
20150180523 | RECONFIGURABLE CARRIER-AGGREGATION RECEIVER AND FILTER - A device includes, a reconfigurable baseband filter configured to receive a communication signal having a first carrier and a second carrier, the first carrier and the second carrier having non-contiguous respective frequencies, the reconfigurable baseband filter having a first filter portion and a second filter portion, the first filter portion and the second filter portion each comprising respective first and second amplification stages, and a plurality of switches associated with the first filter portion and the second filter portion, the plurality of switches for configuring the reconfigurable baseband filter into a plurality of sub-filters, each configured to generate at least one of a low pass filter output and a bandpass filter output. | 06-25-2015 |
20150229272 | TRI-PHASE DIGITAL POLAR MODULATOR - Exemplary embodiments are related to a tri-phase digital polar modulator. A device may include a modulator configured to generate a primary phase modulated signal including the most significant bits (MSBs) of a modulated signal, a leading phase modulated signal including a first least significant bits (LSB) of the modulated signal, and a lagging phase modulated signal including a second LSB of the modulated signal. The device may also include a combination unit configured to add the primary phase modulated signal, the leading phase modulated signal, and the lagging phase modulated signal | 08-13-2015 |
Patent application number | Description | Published |
20080306596 | INTERBODY FUSION DEVICE AND ASSOCIATED METHODS - A method and apparatus is provided for use in spinal fusion procedures. An interbody fusion device has a first piece that is a load bearing device designed to bear the axial loading from the end plates of adjacent vertebrae. A second piece of the interbody fusion device is a retention device whose function is to prevent migration of the load bearing device. One or more fasteners secure the retention device to the vertebrae above and below the load bearing device. The fasteners cause the end plates of the vertebrae to compress the end plates to the load bearing device to facilitate proper fusion. | 12-11-2008 |
20090105824 | SPINAL FUSION DEVICE AND ASSOCIATED METHODS - A method and apparatus is provided for use in spinal fusion procedures. An exemplary interbody fusion device includes a synthetic non-metallic radiolucent interbody spacer having an opening formed between its top and bottom surfaces. A cancellous allograft plug is configured to be disposed within the opening formed in the spacer. The cancellous allograft plug can be reconstituted with a material that will help to facilitate fusion of the vertebrae. | 04-23-2009 |
20120264213 | Device and method for delivering mechanically released cells from liposcuction aspirates - A lipoaspirate collection device to aid in the collection and processing of human tissue and fluid obtained during liposuction for use in point-of-care cell therapy. The collection device includes a collection body and a collection cap. The collection cap may have a fluid port, a lipoaspirate port, a vacuum port, and a relief valve. Within the central cavity of the collection device, a cone shaped may be positioned such that the apex of the cone is positioned underneath the lipoaspirate inlet through which the lipoaspirate fluid and tissue are introduced. | 10-18-2012 |
20120277867 | Interbody fusion device and associated methods - A medical device comprising a non-enclosed housing configured to fit between two adjacent vertebrae; one or more housing fasteners extending at least partially through the housing, one or more driving mechanisms operationally positioned in relationship to at least one housing fastener, such that activation of at least one driving mechanism engages and drives at least one housing fastener to compress into at least one adjacent vertebrae and one or more plates removably coupled to the housing. | 11-01-2012 |
20120277872 | Interbody fusion device with snap on anterior plate and associated methods - A method and apparatus is provided for use in spinal fusion procedures. An interbody fusion device has a first piece that is a load bearing device designed to bear the axial loading from the end plates of adjacent vertebrae. A second piece of the interbody fusion device is a retention device whose function is to prevent migration of the load bearing device. One or more fasteners secure the retention device to the vertebrae above and below the load bearing device. The fasteners cause the end plates of the vertebrae to compress the end plates to the load bearing device to facilitate proper fusion. The device includes a snap in mechanism for coupling the first piece to the second piece. | 11-01-2012 |
20120277873 | Interbody fusion device with lipped anterior plate and associated methods - A method and apparatus is provided for use in spinal fusion procedures. An interbody fusion device has a first piece that is a load bearing device designed to bear the axial loading from the end plates of adjacent vertebrae. A second piece of the interbody fusion device is a retention device whose function is to prevent migration of the load bearing device. One or more fasteners secure the retention device to the vertebrae above and below the load bearing device. The fasteners cause the end plates of the vertebrae to compress the end plates to the load bearing device to facilitate proper fusion. The second piece can be configured to include lips that abut the apothyseal rings during, with the plate including bores angled such that fasteners penetrate the apothyseal rings. | 11-01-2012 |