Patent application number | Description | Published |
20150196004 | Pet Waste System - A pet waste system using litter to absorb pet waste. Netting is used to hold the litter in the receptacle, further preventing, among other things, the litter from being kicked up by a pet. The litter generally comprises an organic, non-living material. The litter and/or receptacle can be delivered on a scheduled, recurring basis to a user of the pet waste system. | 07-16-2015 |
20160029589 | PET WASTE SYSTEM - A pet waste system using litter to absorb pet waste. A means to secure the litter is used to hold the litter in a receptacle, further preventing, among other things, the litter from being kicked up by a pet. The litter generally comprises an organic, non-living material. The litter and/or receptacle can be delivered on a scheduled, recurring basis to a user of the pet waste system. | 02-04-2016 |
20160044979 | SUN SHIELD GARMENT - A sun shield garment having a shoulder cover portion and two sleeve portions, leaving certain areas such as the underarms and torso uncovered to maximize breathability and comfort while maximizing sun protection of key areas. A hood, thumbholes and a zippered stuff sack or pocket can also be provided in the garment for additional sun protection and utility. | 02-18-2016 |
Patent application number | Description | Published |
20080232592 | Method and apparatus for performing selective encryption/decryption in a data storage system - One embodiment of the present invention provides a system for performing selective encryption/decryption in a data storage system. During operation, the system receives a data block from a storage medium at an input/output layer, wherein the input/output layer serves as an interface between the storage medium and a buffer cache. Next, the system determines whether the data block is an encrypted data block. If not, the system stores the data block in the buffer cache. Otherwise, if the data block is an encrypted data block, the system retrieves a storage-key, wherein the storage-key is associated with a subset of storage, which is associated with the encrypted data block. Using the storage-key, the system then decrypts the encrypted data block to produce a decrypted data block. Finally, the system stores the decrypted data block in the buffer cache, wherein the data block remains encrypted in the storage medium. | 09-25-2008 |
20090323932 | Method and apparatus for encrypting data to facilitate resource savings and detection of tampering - One embodiment of the present invention provides a system that facilitates encrypting data. During operation, the system receives unencrypted data to be encrypted. Next, the system preprocesses the unencrypted data to create preprocessed unencrypted data, wherein preprocessing the unencrypted data involves generating a salt (wherein the salt facilitates in determining if the subsequently encrypted data has been altered) and concatenating the salt and the unencrypted data to create the preprocessed unencrypted data. Next, the system encrypts the preprocessed unencrypted data to create the encrypted data. Because the salt has already been applied to the plaintext data, it does not need to be reapplied during the encryption phase as is typically done in encryption. Finally, the system stores a copy of the salt with the encrypted data. | 12-31-2009 |
20100008499 | Method and apparatus for generating random data-encryption keys - One embodiment of the present invention provides a system that facilitates generating random data-encryption keys for data files. During operation, the system receives a command at a computer system to create a data file that may include encrypted data. This data file includes a wrapped data-encryption key to facilitate encrypting and decrypting data. In response to the command, the system generates a bit pattern to be used as the wrapped data-encryption key. Finally, the system creates the data file, which includes the bit pattern as the wrapped data-encryption key. | 01-14-2010 |
20110113050 | DATA MASKING WITH AN ENCRYPTED SEED - A method and apparatus is provided for generating a masked value from a cryptographically transformed value by using the cryptographically transformed value as a random seed, without decrypting the cryptographically transformed value. A query is evaluated against a set of data to produce a result. The result may be cryptographically transformed or unencrypted. If the result is unencrypted, the result may be cryptographically transformed to produce a random seed. If the result is already cryptographically transformed, then the result is used as the random seed. The random seed is used to generate a masked value, without decrypting the cryptographically transformed random seed value. The masked value conforms to a particular data characteristic such as a data format or a data type, which may be determined from metadata stored in a database, received with a query, or gleaned from unencrypted data. The masked value is returned as a result of the query. | 05-12-2011 |
20120131057 | NON-DETERMINISTIC AUDIT LOG PROTECTION - Embodiments of the present disclosure provide a system that performs non-deterministic auditing. The system audits an operation, a record associated with which is maintained in an audit log. In one embodiment, the system subsequently determines whether the operation satisfies one or more criteria. In response to the operation satisfying the criteria, the system protects the audit log. In a further embodiment, the system protects the audit log based on a probability distribution, which indicates a frequency of audit log protection. | 05-24-2012 |
20130144901 | REAL-TIME DATA REDACTION IN A DATABASE MANAGEMENT SYSTEM - A database server receives a data request from a client. In response to the data request, the database server selects, from a database, actual data that satisfies criteria specified by the data request. The database server retrieves the selected actual data from the database. Also in response to the data request, the database server redacts the retrieved data in real time without modifying the actual data contained within the database. This may be accomplished by the prior insertion of masking operators into a top SELECT clause of a query representation generated during semantic analysis. The database server returns the redacted data to the client as a reply to the data request. | 06-06-2013 |
20140304298 | Real-Time Data Redaction In A Database Management System - A database server receives a data request from a client. In response to the data request, the database server selects, from a database, actual data that satisfies criteria specified by the data request. The database server retrieves the selected actual data from the database. Also in response to the data request, the database server redacts the retrieved data in real time without modifying the actual data contained within the database. This may be accomplished by the prior insertion of masking operators into a top SELECT clause of a query representation generated during semantic analysis. The database server returns the redacted data to the client as a reply to the data request. | 10-09-2014 |
Patent application number | Description | Published |
20130257521 | CONTROLLING OVER VOLTAGE ON A CHARGE PUMP POWER SUPPLY NODE - A charge pump driver circuit has a first charge switch that couples a first node of a flying capacitor to a first power supply node, and a second charge switch that couples a second node of the capacitor to a second power supply node. Control circuitry is coupled to open the second charge switch and discharge the second node of the capacitor, in response to a control signal. Other embodiments are also described and claimed. | 10-03-2013 |
20130328576 | MEASUREMENT OF TRANSISTOR GATE SOURCE CAPACITANCE ON A DISPLAY SYSTEM SUBSTRATE USING A REPLICA TRANSISTOR - Better performance can be provided for a display system that has semiconductor microelectronic components such as demultiplexors, gate line and data line drivers, and pixel switches formed on the display substrate, e.g., a glass substrate that constitutes part of an active matrix display panel. A gate source capacitance of a constituent transistor of one of these microelectronic components, e.g., a pixel thin film transistor (TFT) that is part of a particular display element, may be measured using a replica component that emulates the behavior of the component. | 12-12-2013 |
20130328749 | VOLTAGE THRESHOLD DETERMINATION FOR A PIXEL TRANSISTOR - A display is disclosed that includes a transparent substrate and a plurality of pixel transistors that are formed on the transparent substrate to generate an image for display. A transistor drive circuit is used to drive the pixel transistors to generate the image. The transistor drive circuit may include a gate driver. Further, a test circuit may be used to: adjust voltages that are applied by the gate driver to a pixel transistor; and determine the voltage of the gate driver when a current spike has occurred to the pixel transistor which causes the pixel transistor to turn on. Once this threshold voltage for the gate driver to turn on the pixel transistor has been determined, it may be stored in a storage device for future use by the gate driver. Other embodiments are also described and claimed. | 12-12-2013 |
20130328846 | CHARACTERIZATION OF TRANSISTORS ON A DISPLAY SYSTEM SUBSTRATE USING A REPLICA TRANSISTOR - Better performance can be provided for a display system that has semiconductor microelectronic components such as demultiplexors, gate line and data line drivers, and pixel switches formed on the display substrate, e.g., a glass substrate that constitutes part of an active matrix display panel. A constituent transistor of one of these microelectronic components, e.g., a pixel thin film transistor (TFT) that is part of a particular display element, may be characterized using a replica component that emulates the behavior of the component. | 12-12-2013 |
20130328847 | DEVICES AND METHODS FOR COMMON ELECTRODE MURA PREVENTION - Methods and devices employing mura prevention circuitry, are provided. In one example, a method may include supplying a first voltage pathway between a common electrode driver and a common electrode of an electronic display device and supplying a second voltage pathway between the common electrode driver and ground. Mura prevention circuitry may be supplied that activates the first voltage pathway when the electronic display device is turned on and an activation gate signal is provided from a gate corresponding to the common electrode driver. Further, the mura prevention circuitry may activate the second voltage pathway when the electronic display device is turned off or no activation gate signal is provided from the gate corresponding to the common electrode driver. | 12-12-2013 |
20130328852 | MEASUREMENT OF TRANSISTOR THRESHOLD VOLTAGE ON A DISPLAY SYSTEM SUBSTRATE USING A REPLICA TRANSISTOR - Better performance can be provided for a display system that has semiconductor microelectronic components such as demultiplexors, gate line and data line drivers, and pixel switches formed on the display substrate, e.g., a glass substrate that constitutes part of an active matrix display panel. A threshold voltage of a constituent transistor of one of these microelectronic components, e.g., a pixel thin film transistor (TFT) that is part of a particular display element, may be measured using a replica component that emulates the behavior of the component. | 12-12-2013 |
20140062845 | SYSTEMS AND METHODS FOR MEASURING SHEET RESISTANCE - The present disclosure is directed to systems and methods for determining sheet resistance values in a liquid crystal display (LCD) panel. In certain embodiments, a system for determining sheet resistance values in an LCD panel may include a display driver integrated circuit (IC). The display driver IC may include a first switch coupled to a first input/output (I/O) pad and a second I/O pad such that the first I/O pad is configured to couple to a voltage source and the second I/O pad is configured to couple to a current source. The display driver IC may also include a second switch coupled to a third I/O pad and the second I/O pa such that the second switch has substantially the same geometry as the first switch and the third I/O pad is configured to couple to a thin-film transistor (TFT) layer of the display panel. | 03-06-2014 |
20140071111 | REDUCTION OF CONTENTION BETWEEN DRIVER CIRCUITRY - An electronic display includes a display panel. The display panel includes a pixel array and receives a supply voltage. The display panel also includes a panel driver configured to generate a gate line voltage. The panel driver also supplies the gate line voltage to the display panel based on a comparison between the gate line voltage and the supply voltage. | 03-13-2014 |
20140125645 | TESTING OF INTEGRATED CIRCUIT TO SUBSTRATE JOINTS - A method for testing integrated circuit-to-substrate joints that electrically connect an IC to a substrate. An ammeter is coupled to a test node of the driver IC, while the test node is coupled to a current source, and a measured current output of the ammeter is recorded. A voltmeter is coupled to the test node while the test node is coupled to an end node of a group of dummy IC-to-substrate joints that are daisy chained; a first measured voltage output of the voltmeter is then recorded. The IC then couples the test node to another end node of the daisy chained dummy joints, and a second measured voltage output is recorded. A resistance or admittance value for the electrical connection of the IC to the substrate is then computed, using the first and second measured voltage outputs and the measured current output. Other embodiments are also described and claimed. | 05-08-2014 |
20140132585 | DEVICES AND METHODS FOR REDUCING POWER CONSUMPTION OF A DEMULTIPLEXER - The present disclosure relates to devices and methods for reducing power consumption of a display. One electronic display includes a first switch coupled between a first gate of a first transistor and a second gate of a second transistor to selectively connect the first gate to the second gate. The display includes a second switch coupled between the second gate of the second transistor and a third gate of a third transistor to selectively connect the second gate to the third gate. The display also includes driving circuitry that controls the first switch to connect the first gate to the second gate to share a first charge between the first and second gates. The driving circuitry also controls the second switch to connect the second gate to the third gate to share a second charge between the second and third gates. Accordingly, power consumption of the display may be reduced. | 05-15-2014 |
20140139415 | DISPLAY DRIVER PRECHARGE CIRCUITRY - Systems and methods for efficiently generating display driver timing signals are provided. In one example, display driver circuitry of an electronic display may provide a negative voltage from a negative voltage supply to display control circuitry during a first period and may provide a positive voltage from a positive voltage supply to the display control circuitry during a second period. After providing the negative voltage during the first period but before providing the positive voltage during the second period, the display driver circuitry may precharge the capacitance of the display control circuitry to ground. In this way, the positive voltage supply substantially does not supply charge to raise the voltage on the capacitance of the display control circuitry from the negative voltage to ground. | 05-22-2014 |
20150109276 | Organic Light Emitting Diode Displays with Improved Driver Circuitry - An electronic device may be provided with an organic light-emitting diode display. The display may include row driver circuitry that provides an emission control signal at an output terminal to display pixels. The emission control signals may enable or disable light emission by the pixels. The row driver circuitry may include a bootstrapping capacitor that stores charge for boosting a gate signal at an intermediate node for a pull-up transistor above a power supply voltage. The row driver circuitry may include a pull-down transistor coupled to the intermediate node. The source terminal of the pull-down transistor may be coupled to the output terminal or an additional pull-down transistor may be stacked with the pull-down transistor to reduce leakage current. Charge pump circuitry may be coupled to the intermediate node to ensure that the intermediate node is maintained at a voltage above the power supply voltage. | 04-23-2015 |
20150109279 | Organic Light Emitting Diode Displays with Improved Driver Circuitry - An electronic device may be provided with an organic light-emitting diode display. The display may include row driver circuitry that provides an emission control signal at an output terminal to display pixels. The emission control signals may enable or disable light emission by the pixels. The row driver circuitry may include a bootstrapping capacitor that stores charge for boosting a gate signal at an intermediate node for a pull-up transistor above a power supply voltage. The row driver circuitry may include a pull-down transistor coupled to the intermediate node. The source terminal of the pull-down transistor may be coupled to the output terminal or an additional pull-down transistor may be stacked with the pull-down transistor to reduce leakage current. Charge pump circuitry may be coupled to the intermediate node to ensure that the intermediate node is maintained at a voltage above the power supply voltage. | 04-23-2015 |
20160063659 | Electronic Device Display With Electrostatic Discharge Recovery Capabilities - An electronic device may be provided with a housing such as a metal housing in which a display is mounted. Control circuitry in the electronic device such as a system-on-chip integrated circuit may produce image data. A display driver integrated circuit may receive the image data from the system-on-chip integrated circuit and may display the image data on the display. In the absence of electrostatic discharge, the display driver integrated circuit may operate normally and may generate a heartbeat signal. When disrupted due to electrostatic discharge, the display driver circuitry may cease production of the heartbeat signal. The system-on-chip integrated circuit can implement a watchdog timer. If the watchdog timer times out because the heartbeat signal is not received within a timeout period, the system-on-chip integrated circuit may reset the display. | 03-03-2016 |
20160063907 | Electronic Device Resistant to Radio-Frequency Display Interference - An electronic device may be provided with wireless circuitry and a display. A display driver integrated circuit in the display may have a spectrum analyzer circuit. An antenna may monitor for wireless signals. The display driver integrated circuit may use the spectrum analyzer circuit to analyze the wireless signals and determine whether there is a potential for visible display artifacts. In the presence of conditions that can lead to display artifacts, the display driver integrated circuit may adjust a gate driver control signal. Adjustments to the gate driver control signal may be made using adjustable signal dividers. The adjustments to the gate driver control signal eliminate the visible display artifacts. | 03-03-2016 |
Patent application number | Description | Published |
20110058547 | PROCESS AND SYSTEM FOR AN INTEGRATED CARRIER ETHERNET EXCHANGE - An Ethernet exchanger is coupled to two or more Ethernet networks to exchange information among the two or more Ethernet networks using virtual circuits. A first Ethernet network is associated with a first carrier and a first port of the Ethernet exchanger. A second Ethernet network is associated with a second carrier and a second port of the Ethernet exchanger. Network information of the first Ethernet network and network information of the second Ethernet network are provided by the respective first carrier and the second carrier and stored in a database. A virtual circuit is provisioned to interconnect the first Ethernet network and the second Ethernet network based on a partnership between the first carrier and the second carrier and based on the stored information about the first network and the second network. The virtual circuit is associated with the first port and the second port. The stored information about the first network or the second network is reusable for subsequent provisioning of other virtual circuits associated with the first carrier or the second carrier. | 03-10-2011 |
20110058565 | REAL TIME CONFIGURATION AND PROVISIONING FOR A CARRIER ETHERNET EXCHANGE - An Ethernet switch platform is configured to receive and process a provisioning order to establish a logical virtual circuit interconnecting a physical port associated with a buying carrier and a physical port associated with a selling carrier to set up a private network to private network connection between the buying and selling carriers. The virtual circuit is established with parameters called for in a request for quote (RFQ) initiated by the buying carrier and in a response to the RFQ submitted by the selling carrier. Information from the RFQ and from the response together with information previously stored in a relational database is extracted and used to fill out the provisioning order. The information extracted from the database include profile information and network service information associated with the buying and selling carriers. | 03-10-2011 |
20110060657 | ON LINE WEB PORTAL FOR PRIVATE NETWORK SERVICE PROVIDERS - A web-enabled user interface is provided to enable the carriers of private networks to interact and to offer services to one another. The web-enabled user interface is integrated to a switch fabric configured to provide interconnection services for the carriers. The web-enabled user interface is configured to enable the carriers to assign different roles to different representatives. Each of the representatives is granted certain rights and permissions by an administrator representative based on the representative's role. The web-enabled user interface is configured to present to each representative a unique interface based on their roles thus providing each representative a unique experience. | 03-10-2011 |
20110060846 | NETWORK TO NETWORK INTERFACE (NNI) FOR MULTIPLE PRIVATE NETWORK SERVICE PROVIDERS - An Ethernet exchanger connected to private Ethernet networks of participating carriers to enable the private Ethernet networks to be interconnected at a common point. The Ethernet exchanger not biased to any participating carrier and is configured to receive, translate and transmit frames from one private Ethernet network to another private Ethernet network. The frame translation is performed by the Ethernet exchanger is based on the profiles of the participating carriers. The profiles are created based on information provided by the participating carriers using templates presented by an online web portal. | 03-10-2011 |
20130013442 | REAL TIME CONFIGURATION AND PROVISIONING FOR A CARRIER ETHERNET EXCHANGE - An Ethernet switch platform is configured to receive and process a provisioning order to establish a logical virtual circuit interconnecting a physical port associated with a buying carrier and a physical port associated with a selling carrier to set up a private network to private network connection between the buying and selling carriers. The virtual circuit is established with parameters called for in a request for quote (RFQ) initiated by the buying carrier and in a response to the RFQ submitted by the selling carrier. Information from the RFQ and from the response together with information previously stored in a relational database is extracted and used to fill out the provisioning order. The information extracted from the database include profile information and network service information associated with the buying and selling carriers. | 01-10-2013 |
20130018753 | ON LINE WEB PORTAL FOR PRIVATE NETWORK SERVICE PROVIDERS - A web-enabled user interface is provided to enable the carriers of private networks to interact and to offer services to one another. The web-enabled user interface is integrated to a switch fabric configured to provide interconnection services for the carriers. The web-enabled user interface is configured to enable the carriers to assign different roles to different representatives. Each of the representatives is granted certain rights and permissions by an administrator representative based on the representative's role. The web-enabled user interface is configured to present to each representative a unique interface based on their roles thus providing each representative a unique experience. | 01-17-2013 |
Patent application number | Description | Published |
20130322154 | SENSE AMPLIFIER CIRCUITRY FOR RESISTIVE TYPE MEMORY - Example embodiments include a resistive type memory current sense amplifier circuit including differential output terminals, first and second input terminals, pre-charge transistors, and current modulating transistors coupled directly to the pre-charge transistors. The pre-charge configuration provides high peak currents to charge the bit line and reference line during a “ready” or “pre-charge” stage of operation of the current sense amplifier circuit. The current modulating transistors are configured to operate in a saturation region mode during at least a “set” or “amplification” stage. The current modulating transistors continuously average a bit line current and a reference line current during the “set” or “amplification” stage, thereby improving noise immunity of the circuit. During a “go” or “latch” stage of operation, a logical value “0” or “1” is latched at the differential output terminals based on positive feedback of a latch circuit. | 12-05-2013 |
20140003124 | SENSE AMPLIFIER CIRCUITRY FOR RESISTIVE TYPE MEMORY | 01-02-2014 |
20140112053 | Write driver in sense amplifier for resistive type memory - Example embodiments include a level shifting write driver in a sense amplifier for a resistive type memory. The write driver may include a cross-coupled latch circuit, a first output section, a second output section, and an input section. The first output section includes one or more first driving transistors to drive a first current through the first output section and not through the cross-coupled latch. The second output section includes one or more second driving transistors configured to drive a second current through the second output section and not through the cross-coupled latch. The current flows of the outputs sections are isolated from the latch circuit. In some embodiments, no two PMOS type transistors are serially connected, thereby reducing the consumption of die area. In some embodiments, a single control signal is used to operate the write driver. | 04-24-2014 |
20150043266 | ENHANCED TEMPERATURE RANGE FOR RESISTIVE TYPE MEMORY CIRCUITS WITH PRE-HEAT OPERATION - Example embodiments include devices, systems, and methods for enhancing an operating temperature range for resistive type memory devices. After powering up the resistive type memory die, the die temperature of the resistive type memory die is sensed. If the sensed die temperature is less than a predefined temperature threshold, one or more heaters proximately disposed to one or more memory cells of the resistive type memory die are enabled. The heaters are disabled responsive to the sensed die temperature being greater than a predefined temperature threshold. Memory write operations are enabled responsive to the sensed die temperature being greater than the predefined temperature threshold. After enabling the memory write operations, an enabled state of the memory write operations is maintained until the resistive type memory die is powered down. If the die temperature happens to fall below the predefined temperature threshold at a later time, additional heat is produced. | 02-12-2015 |