Patent application number | Description | Published |
20100214765 | Straw cup with variable lights - The present invention relates to a straw cup with variable lights, primarily comprising of a set of light-emitting diodes surrounding the inside of the cup's straw, a circuit controller board, and power switch; when the power is activated, the liquid inside the straw's cup refracts and directs light, increasing the variation and brilliance of the twinkling lights and thus further increasing the variation of the straw cup's multicolored lights. | 08-26-2010 |
20110204825 | Light stick with a dazzling effect - This invention is a light stick with a dazzling effect, comprising a handle, a dazzle layer and a transparent tube; on the upper part of the handle there is an illuminated body with a number of light-emitting diodes (LEDs); the body of the handle has a battery and a number of on/off switch; the dazzle layer is fitted inside the transparent tube which is then placed over the illuminated body, then joined together with the handle; in this way a light stick with a changing dazzling effect is provided. | 08-25-2011 |
20120176779 | LUMINOUS PRODUCT STRUCTURE - This invention is a luminous product structure, in particular one that takes advantage of the special design of a product's dazzling body to create a dazzling effect, making the product more attractive; it includes a casing and a luminous unit; the casing has a dazzling casing which has a series of multiangular diamond-cut dazzling bodies joined to surrounding raised strips; the luminous unit comprises of a circuit board and a luminous unit and can be fitted into inside of the casing, the aforementioned design allowing the luminous unit to glitter and, in conjunction with the multi-face light refraction special feature, effectively increasing the novelty and added-value of the product. | 07-12-2012 |
20140240962 | CUP WITH TWINKLING LIGHT EFFECTS - This invention provides a cup with twinkling light effects, primarily comprising an inner cup, an outer cup, and a light unit, with the lower half of the inner cup having a number of arched convex strips, and the base of which has diamond-facet of concave and convex cones. As a result, when the light unit at the base of the outer cup is activated, the effects of the arched convex strips and diamond facets cause the cup to produce numerous refractions of the light source, creating twinkling rays of light with dazzling variation. | 08-28-2014 |
20140268681 | EXERCISE WRISTBAND WHICH CAN EXTEND ILLUMINATION TIME - An exercise wristband that can extend illumination time, comprised of a translucent, flexible wristband and lighting unit, wherein the surface of the wristband has a 3D embossed and colored concave and convex design or text, and the underside has an insertion slot and cover. A lighting unit fits inside the insertion slot in the wristband and includes a light component, Integrated Circuit board (IC board), and a highly sensitive vibration switch. | 09-18-2014 |
Patent application number | Description | Published |
20080296689 | Nanotube dual gate transistor and method of operating the same - A nanotube dual gate transistor and associated method of use are provided. The nanotube dual gate transistor includes a substrate, a nanotube material, a source conductor and a drain conductor, a top gate and a back gate. The nanotube material is formed over the substrate having a nanotube channel with a first end and a second end. The source conductor is coupled to the first end of the nanotube channel and the drain conductor is coupled to the second end of the nanotube channel. The back gate is formed under one or more of the devices for receiving a DC signal for establishing a desired optimal operational state of the device(s). The top gate is formed over the nanotube channel for receiving an AC signal for high frequency operation of the device(s) with low gate capacitance. | 12-04-2008 |
20090116696 | SYSTEM, METHOD AND MACHINE-READABLE MEDIUM FOR CHARACTERIZING NANOTUBE MATERIALS - A computer implemented method of characterizing a nanotube material by sampling a region of the nanotube material using a scanning electron microscope (SEM) to obtain at least one image, and analyzing the at least one image using an image processing algorithm to characterize the nanotube material. | 05-07-2009 |
20090189146 | Multifinger Carbon Nanotube Field-Effect Transistor - A multifinger carbon nanotube field-effect transistor (CNT FET) is provided in which a plurality of nonotube top gated FETs are combined in a finger geometry along the length of a single carbon nanotube, an aligned array of nanotubes, or a random array of nanotubes. Each of the individual FETs are arranged such that there is no geometrical overlap between the gate and drain finger electrodes over the single carbon nanotube so as to minimize the Miller capacitance (Cgd) between the gate and drain finger electrodes. A low-K dielectric may be used to separate the source and gate electrodes in the multifinger CNT FET so as t further minimize the Miller capacitance between the source and gate electrodes. | 07-30-2009 |
20120273781 | Device and Method For RF Characterization of Nanostructures and High Impedance Devices - A method and device are provided for the RF characterization of nanostructures and high impedance devices. A two-terminal electronic nanostructure device is fabricated by dividing a length of a nanostructure into a plurality of shorter, identical nanostructures using a plurality of finger electrodes electrically connected in parallel. The nanostructure may include a single walled carbon nanotube subdivided into shorter identical copies of a metallic nanotube segment by situating multiple finger electrodes along the length of the single walled carbon nanotube. Each of the subdivided shorter nanotube segments are connected in parallel. This arrangement allows for close impedance matching to radio frequency (RF) systems, and serves as an important technique in understanding and characterizing metallic (and even semiconducting) nanotubes at RF and microwave frequencies. | 11-01-2012 |
Patent application number | Description | Published |
20080297239 | OPTIMIZED GAIN FILTERING TECHNIQUE WITH NOISE SHAPING - A noise shaping and voltage gain filtering third order electrical circuit and method comprises at least one pair of input resistors; a Frequency Dependent Negative Resistance (FDNR) filter positioned in between the at least one pair of input resistors; a feedback resistor; and an amplifier operatively connected to the feedback resistor and the at least one pair of input resistors, wherein as an electrical signal is introduced to the electrical circuit, the FDNR filter is adapted to filter signal blockers out of the electrical signal prior to the electrical signal reaching the amplifier for signal amplification, wherein the FDNR filter does not contribute noise to a signal-to-noise ratio (SNR) of the electrical signal, and wherein a transfer function of the FDNR filter is substantially elliptical in shape. | 12-04-2008 |
20090045876 | LOW NOISE, LOW POWER, HIGH LINEARITY DIFFERENTIAL AMPLIFIER WITH A CAPACITIVE INPUT IMPEDANCE - A low noise, low power differential two-stage amplifier includes a first stage comprising a pair of electrical devices that sense an input signal difference across the pair of electrical devices; and a control feedback loop operatively connected to the first stage, wherein the first stage in combination with the control loop feedback is adapted to place an exact copy of the signal across a first pair of resistive components, wherein the first pair of resistive components are adapted to generate a differential signal current, wherein the control feedback loop is adapted to ensure that the differential signal current goes a second pair of resistive components to generate a voltage output. Preferably, the first and second pair of resistive components are in ratio to produce the exact copy of the signal with some gain at an output of the first stage. | 02-19-2009 |
20090273374 | HIGH LINEARITY VOLTAGE TO CURRENT CONVERSION - A system and method for performing voltage to current conversion, the system comprising of a first set of devices that senses the input voltage signal through its input terminal and replicates said input voltage across a second set of devices which then converts said replicated input voltage signal to an output current signal; a third set of devices that transfers the output current signal to output terminals; a differential feedback loop comprising an amplifier positioned between a first one of the first set of devices and a first one of the third set of devices; and a common mode feedback loop that regulates the output average voltage to a reference voltage. | 11-05-2009 |
20120270603 | DEVICE, SYSTEM, AND METHOD FOR PROVIDING WIRELESS DATA ACCESS, DIGITAL TV ACCESS, RADIO, AND STORAGE CAPABILITY - A portable memory device dimensioned and configured as any of a removable flash memory card, a USB flash drive, and a jump drive and a method of wireless communication, wherein the portable memory device comprises a single housing component; a data storage component within the single housing component; and a wireless receiver operatively connected to the data storage component and within the single housing component, wherein the wireless receiver is adapted to receive wireless signals comprising radio signals, satellite signals, TV signals, and Bluetooth™ specification signals, and wherein the wireless receiver is adapted to wirelessly communicate with a LAN. The portable memory device may further comprise an interface component adapted to connect to a host computing device. Preferably, the TV signals comprise mobile TV signals. | 10-25-2012 |
20130099871 | Multi-Phase Voltage Controlled Oscillator Using Capacitance Degenerated Single Ended Transconductance Stage and Inductance/Capacitance Load - An electrical circuit includes a first transistor having a first source, a first drain, and a first gate, whereby the first transistor receives an input voltage through the first gate. An output voltage terminal outputs voltage from the first transistor and is connected to the first drain. A second transistor includes a second source, a second drain, and a second gate, whereby the second transistor receives a bias voltage through the second gate, and wherein the first source is connected to the second drain. A first capacitor is connected to the first source, the second source, and the second drain. An inductor is connected to the first drain. A second capacitor is connected in parallel with the inductor and further connected to the first drain. | 04-25-2013 |
20130215540 | High Voltage Electrostatic Discharge Clamp Using Deep Submicron CMOS Technology - An ESD circuit includes a plurality of MOS devices arranged in a stack, wherein each of the MOS devices comprises a source, a drain, and a gate; a voltage source inputting a supply voltage to the stack of MOS devices; a first plurality of resistors dividing the supply voltage to each source and each drain of the MOS devices in the stack; a second plurality of resistors biasing the supply voltage to each gate of the MOS devices in the stack; an inverter device operatively connected to the second plurality of resistors; a time lag circuit that turns the inverter device on and off; and a plurality of capacitors pulling the voltage to each gate of the MOS devices in the stack to the supply voltage upon the inverter device turning off. | 08-22-2013 |
Patent application number | Description | Published |
20120190733 | COMPOUNDS AND METHODS FOR ENHANCING HAIR GROWTH - The present invention provides a method for stimulating hair growth in a mammalian species or converting vellus hair or intermediate hair to terminal hair or stimulating hair follicles to increase hair growth and one or more properties selected from the group consisting of luster, sheen, brilliance, gloss, glow, shine or patina of hair associated with the follicles or increasing one or more of: length, thickness, number, and density, of eyelash hair or eyebrow hair comprising applying to the skin of a patient a composition comprising an effective amount of an EP | 07-26-2012 |
20120270915 | FATTY ACID AMIDE HYDROLASE INHIHIBITORS FOR TREATING PAIN - Compounds of Formula 1 are described herein. These compounds may be administered to a patient for treatment of suffering from pain or other FAAH mediated conditions. | 10-25-2012 |
20120295972 | Ester Derivatives of Bimatoprost Compositions and Methods - Provided herein, inter alia, are prodrugs of bimatoprost, methods of using the same and compositions including the same. | 11-22-2012 |
20120302588 | METHOD OF ENHANCING HAIR GROWTH - Methods and compositions for stimulating the growth of hair are disclosed wherein said compositions include bimatoprost and minoxidil in a vehicle for topical application to the skin of a mammal, e.g. a human, whereby the combination of bimatoprost and minoxidil produces a faster onset of hair growth in humans or other mammals and wherein said composition brings about a synergestic result of faster onset of hair growth as compared to compositions comprising bimatoprost and minoxidil, alone. | 11-29-2012 |
20120329843 | FATTY ACID AMIDE HYDROLASE INHIHIBITORS FOR TREATING PAIN - The present invention provides a method of treating a patient suffering from pain or other FAAH mediated conditions by administering a fatty acid amide inhibiting amount of a compound represented by the formula: | 12-27-2012 |
20130131135 | COMPOUNDS ACT AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides a compound, that is a 1-[(2-{[(alkyl or aryl)methyl]oxy}halo or haloalkyl substituted-phenyl)alkyl]-5-hydrocarbyl or substituted hydrocarbyl-1H-pyrazole carboxylic acid or alkylenylcarboxylic acid or a hydrocarbyl or substituted hydrocarbyl sulfonamide of said carboxylic acid or said alkylenylcarboxylic acid, provided however said compound is not a 3-carboxylic acid, a sulfonamide thereof, or a 3-methylenylcarboxylic acid. The compound may be represented by the following formula | 05-23-2013 |
20130150417 | COMPOUNDS ACT AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides compounds, that are N-alkyl-2-(1-(5-substituted-2-(3-oxo-3-(trifluoromethylsulfon-amido)propyl)benzyppyrrolidin-2-ypoxazole-4-carboxamide wherein the 5 substituent is selected from the group consisting of halo and alkyloxy radicals. The compound may be represented by the following formula wherein R | 06-13-2013 |
20130165492 | COMPOUNDS ACTING AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides a compound, that is | 06-27-2013 |
20130165665 | COMPOUNDS ACTING AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides a compound that is represented by the following general formula | 06-27-2013 |
20130165666 | COMPOUNDS ACTING AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides a compound that is represented by the following general formula | 06-27-2013 |
20130184463 | COMPOUNDS ACTING AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides a compound, that is a 1-({halo-2-[(2-hydrocarbyl or substituted hydrocarbyl)oxy]phenyl}methyl)-(fused bicyclic nitrogen heteroaryl) carboxylic acid or an ester or sulfonamide thereof. The compound may be represented by the following formula | 07-18-2013 |
20130253028 | COMPOUNDS ACT AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides a compound, that is a 1-[(2-{[(alkyl or aryl)methyl]oxy}halo or haloalkyl substituted-phenyl)alkyl]-5-hydrocarbyl or substituted hydrocarbyl-1H-pyrazole carboxylic acid or alkylenylcarboxylic acid or a hydrocarbyl or substituted hydrocarbyl sulfonamide of said carboxylic acid or said alkylenylcarboxylic acid, provided however said compound is not a 3-carboxylic acid, a sulfonamide thereof, or a 3-methylenylcarboxylic acid. The compound may be represented by the following formula | 09-26-2013 |
20130324606 | Ester Derivatives of Bimatoprost Compositions and Methods - Provided herein, inter alia, are prodrugs of bimatoprost, methods of using the same and compositions including the same. | 12-05-2013 |
20140121258 | COMPOUNDS ACT AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides a compound, that is a 1-[(2-{[(alkyl or aryl)methyl]oxyl}halo or haloalkyl substituted-phenyl)alkyl]-5-hydrocarbyl or substituted hydrocarbyl-1H-pyrazole carboxylic acid or alkylenylcarboxylic acid or a hydrocarbyl or substituted hydrocarbyl sulfonamide of said carboxylic acid or said alkylenylcarboxylic acid, provided however said compound is not a 3-carboxylic acid, a sulfonamide thereof, or a 3-methylenylcarboxylic acid. The compound may be represented by the following formula (I). Wherein R1, R2, R3, R4, R5, R6, X, W, X and Y are as defined in the specification. The compounds may be administered to treat DP1, FP, EP1, TP and/or EP4 receptor mediated diseases or conditions. | 05-01-2014 |
20140187596 | FATTY ACID AMIDE HYDROLASE INHIHIBITORS FOR TREATING PAIN - The present invention provides a method of treating a patient suffering from pain or other FAAH mediated conditions by administering a fatty acid amide inhibiting amount of a compound represented by the formula: wherein R | 07-03-2014 |
20140249192 | COMPOUNDS ACT AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides compounds, that are N-alkyl-2-(1-(5-substituted-2-(3-oxo-3-(trifluoromethylsulfonamido)propyl)benzyl)pyrrolidin-2-yl)oxazole-4-carboxamide wherein the 5 substituent is selected from the group consisting of halo and alkyloxy radicals. The compound may be represented by the following formula | 09-04-2014 |
20140275200 | INHIBITION OF NEOVASCULARIZATION BY SIMULTANEOUS INHIBITION OF PROSTANOID IP AND EP4 RECEPTORS - There are provided inter alia methods and compounds useful for decreasing neovascularization (e.g., choroidal neovascularization) in a subject in need thereof. | 09-18-2014 |
20140275238 | INHIBITION OF NEOVASCULARIZATION BY INHIBITION OF PROSTANOID IP RECEPTORS - There are provided inter alia methods and compounds useful for decreasing choroidal neovascularization in a subject in need thereof. | 09-18-2014 |
20140275266 | PROSTANOID RECEPTOR AGONIST COMPOUNDS AND METHODS OF USE FOR SAME - Embodiments described herein are directed to prostanoid (IP) receptor agonist compounds, including cicaprost and certain prodrugs, and methods of preparation and use for the same. Certain embodiments are directed to the use of cicaprost and certain prodrugs in the treatment of topical and ocular conditions. | 09-18-2014 |
20150080446 | COMPOUNDS ACT AT MULTIPLE PROSTAGLANDIN RECEPTORS GIVING A GENERAL ANTI-INFLAMMATORY RESPONSE - The present invention provides a compound, that is a 1-[(2-{[(alkyl or aryl)methyl]oxy}halo or haloalkyl substituted-phenyl)alkyl]-5-hydrocarbyl or substituted hydrocarbyl-1H-pyrazole carboxylic acid or alkylenylcarboxylic acid or a hydrocarbyl or substituted hydrocarbyl sulfonamide of said carboxylic acid or said alkylenylcarboxylic acid, provided however said compound is not a 3-carboxylic acid, a sulfonamide thereof, or a 3-methylenylcarboxylic acid. The compound may be represented by the following formula | 03-19-2015 |
20150119367 | Phosphate Esters of Bimatoprost and the Prostamides - Provided herein, inter alia, are prodrugs of bimatoprost, methods of using the same and compositions including the same. | 04-30-2015 |
20150210689 | ANTAGONISTS ACTING AT MULTIPLE PROSTAGLANDIN RECEPTORS FOR THE TREATMENT OF INFLAMMATION - Compounds, processes for their preparation, pharmaceutical compositions containing such compounds and their use in treating therapeutic conditions, in particular conditions mediated by the action of ligands on the FP, DP, EP | 07-30-2015 |
Patent application number | Description | Published |
20100203559 | Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses SNAP-25 compositions, methods of making α-SNAP-25 antibodies that bind an epitope comprising a carboxyl-terminus at the P | 08-12-2010 |
20100233741 | IMMUNO-BASED RETARGETED ENDOPEPTIDASE ACTIVITY ASSAYS - The present specification discloses SNAP-25 immune response inducing compositions, methods of making α-SNAP-25 antibodies that selectively binds to an epitope comprising a SNAP-25 having a carboxyl-terminus at the P | 09-16-2010 |
20100233802 | CELLS USEFUL FOR IMMUNO-BASED BOTULINUM TOXIN SEROTYPE A ACTIVITY ASSAYS - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 09-16-2010 |
20120122128 | IMMUNO-BASED BOTULINUM TOXIN SEROTYPE A ACTIVITY ASSAYS - The present specification discloses SNAP-25 compositions, methods of making α-SNAP-25 antibodies that bind an epitope comprising a carboxyl-terminus at the P | 05-17-2012 |
20120149103 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 06-14-2012 |
20120149104 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 06-14-2012 |
20120149105 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 06-14-2012 |
20120149106 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 06-14-2012 |
20120156769 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 06-21-2012 |
20120156774 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 06-21-2012 |
20120156775 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 06-21-2012 |
20120156776 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 06-21-2012 |
20120164728 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 06-28-2012 |
20120208271 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 08-16-2012 |
20120208272 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 08-16-2012 |
20120214229 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 08-23-2012 |
20120214231 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 08-23-2012 |
20120225436 | Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses SNAP-25 compositions, methods of making α-SNAP-25 antibodies that bind an epitope comprising a carboxyl-terminus at the P | 09-06-2012 |
20130040368 | IMMUNO-BASED BOTULINUM TOXIN SEROTYPE A ACTIVITY ASSAYS - The present specification discloses SNAP-25 compositions, methods of making α-SNAP-25 antibodies that bind an epitope comprising a carboxyl-terminus at the P | 02-14-2013 |
20130236963 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 09-12-2013 |
20130267010 | Immuno-Based Retargeted Endopeptidase Activity Assays - The present specification discloses a retargeted endopeptidase pharmaceutical wherein the activity has been determined by the methods disclosed. | 10-10-2013 |
20140093957 | Cells Useful for Immuno-Based Botulinum Toxin Serotype A Activity Assays - The present specification discloses clonal cell lines susceptible to BoNT/A intoxication, methods of producing such clonal cell lines, and methods of detecting Botulinum toxin serotype A activity using such clonal cell lines. | 04-03-2014 |
20140248644 | Highly Sensitive Cell-Based Assay to Detect the Presence of Active Botulinum Neurotoxin Serotype-A - The present specification discloses methods for detecting extremely low amounts of botulinum neurotoxin serotype A in samples, including complex matrices like blood, plasma, and serum. | 09-04-2014 |
Patent application number | Description | Published |
20090063696 | SYSTEM AND METHODS FOR HIGH RATE HARDWARE-ACCELERATED NETWORK PROTOCOL PROCESSING - Disclosed is a system and methods for accelerating network protocol processing for devices configured to process network traffic at relatively high data rates. The system incorporates a hardware-accelerated protocol processing module that handles steady state network traffic and a software-based processing module that handles infrequent and exception cases in network traffic processing. | 03-05-2009 |
20100228810 | METHOD AND SYSTEM FOR UNCONSTRAINED FREQUENCY DOMAIN ADAPTIVE FILTERING - Aspects of a method and system for unconstrained frequency domain adaptive filtering include one or more circuits that are operable to select one or more time domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency domain coefficients. A time-adjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency domain coefficients. | 09-09-2010 |
20110202781 | System and Method for Loop Timing Update of Energy Efficient Physical Layer Devices Using Subset Communication Techniques - A system and method for loop timing update of energy efficient physical layer devices using subset communication techniques. During a quiet period during which a subset of communication channels are transitioned from an active mode to a low-power mode, circuitry in the active channel can be designed to track, on behalf of the inactive channels, the phase drift due to the frequency offset. This tracking of the frequency estimation error would reduce the time required to perform a timing update for the communication channels when transitioning back to the active mode. | 08-18-2011 |
20110305173 | PHASE AND FREQUENCY RE-LOCK IN SYNCHRONOUS ETHERNET DEVICES - A first PHY may be coupled to a second PHY via a network link. The first PHY may transition from a role of timing master for the network link to a role of timing slave for the network link. During a first time interval subsequent to the transition, the PHYs may communicate half-duplex over the link while the first PHY synchronizes to a transmit clock of the second PHY. During a second time interval, the PHYs may communicate full-duplex while the second Ethernet PHY synchronizes to a transmit clock of the first PHY. Also during the second time interval, the first PHY may determine that the first PHY and the second PHY are synchronized. Subsequent to the determination, the PHYs may begin full-duplex communication of data on the network link. | 12-15-2011 |
20120063296 | Systems and Methods for Providing a Dual-Master Mode in a Synchronous Ethernet Environment - Embodiments of a dual-master mode Ethernet node are provided herein. The dual-master mode Ethernet node includes a first multiplexer configured to select between a local oscillator signal and a primary reference source (PRS) signal to provide a reference clock signal, a digital phase-locked loop (DPLL) configured to generate a master clock signal based on the reference clock signal, a phase rotator configured to rotate a phase of the master clock signal based on a frequency error between the master clock signal and an extracted clock signal to generate a slave clock signal, and a second multiplexer configured to select between the master clock signal and the slave clock signal to provide a transmit clock signal. The dual-master mode Ethernet node can dynamically generate the transmit clock based on either the extracted clock or the PRS without re-performing the auto-negotiation process. | 03-15-2012 |
20140043954 | SYSTEMS AND METHODS FOR IMPLEMENTING ENERGY-EFFICIENT ETHERNET COMMUNICATIONS - Systems and methods for implementing an Energy-Efficient Ethernet (EEE) communication are provided. In some aspects, a method includes identifying an EEE signal configured to be communicated via a first set of wires. The method also includes processing the EEE signal such that the processed EEE signal is configured to be communicated via a second set of wires. The second set of wires including fewer wires than the first set of wires. The method also includes communicating the processed EEE signal via the second set of wires. | 02-13-2014 |
20140044133 | SYSTEMS AND METHODS FOR IMPLEMENTING BI-DIRECTIONAL SYNCHRONIZATION PROPAGATION - Systems and methods for implementing bi-directional synchronization propagation between first and second communication devices are provided. The devices are arranged in a loop-timing configuration. A method includes detecting, by the second communication device, a switching signal comprising an indication to switch a timing role of the second communication device and engaging, by the second communication device, in a synchronization handshake with the first communication device over a communication link based on the detection of the switching signal. Engaging in the synchronization handshake includes determining whether the first communication device is configured to support bi-directional synchronization propagation. The method includes switching the timing role of the second communication device based on the synchronization handshake. | 02-13-2014 |
20140079101 | METHOD AND SYSTEM FOR UNCONSTRAINED FREQUENCY DOMAIN ADAPTIVE FILTERING - Aspects of a method and system for unconstrained frequency domain adaptive filtering include one or more circuits that are operable to select one or more time domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency domain coefficients. A time-adjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency domain coefficients. | 03-20-2014 |
20140112376 | REDUCED PAIR ETHERNET TRANSMISSION SYSTEM - A system for reduced pair Ethernet transmission. The system includes an interleaver that is operable to receive sets of four code symbols from a physical channel sub-layer (PCS) encoder, wherein each code symbol of each set of four code symbols is associated with one of four channels, and interleave the sets of four code symbols to generate a plurality of interleaved code symbols. The system further includes a serializer that is operable to serialize the plurality of interleaved code symbols to generate a plurality of interleaved and serialized code symbols. The system further includes a transmitter that is operable to transmit the plurality of interleaved and serialized code symbols over an Ethernet medium comprising a single twisted pair of wires. | 04-24-2014 |
Patent application number | Description | Published |
20120103768 | Magnetically Actuated Micro-Electro-Mechanical Capacitor Switches in Laminate - Magnetically actuated micro-electro-mechanical capacitor switches in laminate are disclosed. According to one embodiment, an apparatus comprises a first layer comprising a coil and magnetic element, the magnetic element made from one of nickel and iron; a second layer comprising a flexible member, wherein a permanent magnet is attached to the flexible member; a conductive plate having an insulating dielectric coating, the conductive plate attached to one of the flexible member or a magnet; and a third layer comprising a transmission line and magnetic material, wherein the transmission line comprises one or more of a signal conductor and one or more ground conductors in near proximity. | 05-03-2012 |
20120275079 | FREQUENCY ADDRESSABLE MICROACTUATORS - Frequency addressable micro-actuators having one or more movable resonating elements actuators, such as cantilevers, can be forced into oscillation by, e.g., electromagnetic actuation. The movable structure is designed to latch at a certain amplitude using one of several latching techniques, such as a near-field magnetic field. In operation, the movable element is driven into resonance, producing a large amplitude, which results in the structure latching. Through resonance, a small force applied in a repeating manner can result in the latching of the actuator, an operation which would normally require a large force. If two or more units, each with different harmonic frequencies, are placed under the same influence, only the one with a harmonic response to the driving force will latch. A single influencing signal may be used to latch more than one device on demand by tuning the frequency to match the natural frequency of the device of interest. | 11-01-2012 |
20120279845 | Use of Micro-Structured Plate for Controlling Capacitance of Mechanical Capacitor Switches - Micro capacitive switches and methods of manufacturing micro capacitive switches at variable nominal capacitance value using micro-structures on the contact plates of the same dimension. In a preferred embodiment, a separately manufactured contact plate can be mounted to a movable magnet in order to be actuated to “on” and “off” state of the capacitive switch. Depending on the contact plate's surface condition, variable contact capacitance at “on” state can be precisely specified by geometrical properties of the micro-structures on the surface, such as the density, size and depth. | 11-08-2012 |
Patent application number | Description | Published |
20080265989 | Filterless class-D speaker driver with less switching - Methods for designing a filterless class-D amplifier and driver are described herein. In the exemplary embodiment, a feedback loop is used to stabilize the filterless class-D amplifier. A pulse width modulated (PWM) output signal is generated by adding a comparator input signal to a comparative signal, and comparing the sum to a peak voltage, which can be a peak value of the comparative signal. A limit of one PWM sample will be generated half per period of the comparative signal, resulting in lower dynamic switching noise and a decreased sensitivity to jitter noise than conventional filterless class-D amplifiers. | 10-30-2008 |
20090315688 | METHOD AND SYSTEM FOR PROCESSING AUDIO SIGNALS FOR HANDSET VIBRATION - Aspects of a method and system for processing audio signals for handset vibration are provided. In this regard, an electronic device may control vibrations generated by a vibration transducer based on audio signals processed by the electronic device. The vibration transducer may be started and/or stopped based on the audio signal. For example, the vibration transducer may be controlled based on a rhythm and/or tempo of the audio signal and/or a content type of the audio signal. The electronic device may control a pattern and/or a frequency at which the transducer is started and/or stopped based on the audio signal. An intensity of generated vibrations may be varied based on the audio signal. A duration of the generated vibrations may be controlled based on the audio signal. The vibration transducer may be controlled based on an event occurring on the electronic device that triggered the processing of the audio signal. | 12-24-2009 |
20120013402 | Closed-loop class-d amplifier with modulated reference signal and related method - Disclosed is a closed-loop class-D amplifier circuit including a modulated reference signal generator that provides a modulated reference signal in a feed-forward path, where the reference signal is modulated corresponding to an input signal. The closed-loop class-D amplifier circuit further includes a comparator to generate a control signal based on a comparison of the modulated reference signal and a correction signal, which in turn is produced by filtering a combination of the input signal and a feedback signal. The closed-loop class-D amplifier circuit also includes a pulse generator to generate a pulse-width-modulated signal to drive an output stage of the closed-loop class-D amplifier based on the control signal. | 01-19-2012 |
20120025910 | Switching amplifier with enhanced supply rejection and related method - Disclosed is a switching amplifier having an enhanced supply rejection. The switching amplifier comprises a digital modulator that provides a modulated signal. The switching amplifier further comprises a closed-loop analog driver that is coupled to the digital modulator. As disclosed, the closed-loop analog driver is configured to re-modulate a modulation signal that corresponds to the modulated signal. An output stage of the switching amplifier is driven by the re-modulated signal, thereby providing enhanced supply rejection. In one embodiment, the modulated signal is produced by a digital pulse-width modulator (PWM) circuit of a Class-D amplifier, and has a pulse rate substantially less than a clock rate of the digital PWM circuit. In one embodiment, the switching amplifier is implemented as an audio amplifier in a mobile communication device such as a cellular telephone. | 02-02-2012 |
20130154736 | Transient Signal Suppression for a Class-D Audio Amplifier Arrangement - A Class-D amplifier arrangement is disclosed that implements an auxiliary feedback loop and a primary feedback loop. The auxiliary feedback loop operates upon an input signal when the Class-D amplifier arrangement is operating under a power-up condition and a power-down condition so that a modulated signal is confined within the auxiliary feedback loop during the power-up condition and the power-down condition. The confinement of the modulated signal within the auxiliary feedback loop during the power-up condition and the power-down condition diverts transient signals coupled onto the modulated signal from an output device. The primary feedback loop operates upon the input signal when the Class-D amplifier arrangement is operating under a normal condition so that the modulated signal is introduced to the output device during the normal condition. | 06-20-2013 |
20140079246 | Distortion Limiter and Automatic Power Control for Drivers - Systems and methods are disclosed to provide automatic power control for a driver circuit. Embodiments disclosed herein enable a driver circuit to automatically decrease the gain of amplified input signals when output power exceeds a threshold. Further, embodiments disclosed herein enable a driver circuit to automatically increase the gain of amplified input signals when battery supply voltage drops to avoid unwanted output signal distortion. By using reference signals for battery power and amplified signal input, the amplifiers of the driver circuit can be automatically adjusted until an equilibrium is reached. | 03-20-2014 |
Patent application number | Description | Published |
20100150285 | Method And System For A Combined Signal Detection For Physical Layer Communication Devices - Communication devices coupled via a communication link may comprise physical layer devices that may be operable to determine presence of a received signal and to mitigate noise in the signal prior to processing and/or validating the signal. Analog and/or digital signal processing may be utilized to process the signal and/or mitigate noise in the signal. Noise mitigation may comprise near-end crosstalk cancelling and/or echo cancelling and/or may utilize local transmit signal information. Subsequent to noise mitigation, samples of the noise reduced signal may be accumulated and/or an average signal strength and/or average signal power level may be determined. The average signal strength and/or average signal power level may be compared to one or more thresholds which may be configurable and/or programmable. | 06-17-2010 |
20100228810 | METHOD AND SYSTEM FOR UNCONSTRAINED FREQUENCY DOMAIN ADAPTIVE FILTERING - Aspects of a method and system for unconstrained frequency domain adaptive filtering include one or more circuits that are operable to select one or more time domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency domain coefficients. A time-adjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency domain coefficients. | 09-09-2010 |
20100322078 | Parallel Detection of Remote LPI Request and Send Zero Mode - Embodiments of the present invention enable robust and quick parallel detection of the remote LPI request signal (rem_lpi_req) and SEND ZERO mode (SEND_Z) defined in the Energy Efficient Ethernet (EEE) standard. Embodiments do not rely on energy detection for detecting SEND_Z. Therefore, SEND_Z can be detected reliably and with minimal latency. In addition, since SEND_Z and rem_lpi_req are detected in parallel, embodiments are not concerned with the false detection of rem_lpi_req (before SEND_Z is detected) or the need to disable detection of rem_lpi_req (after SEND_Z is detected). | 12-23-2010 |
20110022699 | Method And System For PHY Initiated Wake-Up In Energy Efficient Ethernet Networks - One or both link partners coupled via an Ethernet link may comprise a PHY device operable to initiate a wake-up interval. The PHY device may monitor parameters that may indicate Ethernet link status. Exemplary parameters may comprise a timer, communication performance metrics and/or configuration parameters. From a low power mode, the PHY device may generate a wake state idle symbol based on the monitoring and may communicate it to a local and/or a remote MAC. The local and/or remote MAC may establish a wake-up interval. The wake-up interval may comprise synchronization, circuit adaption and updating of communication parameters, which may enable control of noise cancellation functions and/or equalization functions. One or both of the link partners may transition to a low power mode after the wake-up interval and/or to an active state after the wake-up interval. | 01-27-2011 |
20110202781 | System and Method for Loop Timing Update of Energy Efficient Physical Layer Devices Using Subset Communication Techniques - A system and method for loop timing update of energy efficient physical layer devices using subset communication techniques. During a quiet period during which a subset of communication channels are transitioned from an active mode to a low-power mode, circuitry in the active channel can be designed to track, on behalf of the inactive channels, the phase drift due to the frequency offset. This tracking of the frequency estimation error would reduce the time required to perform a timing update for the communication channels when transitioning back to the active mode. | 08-18-2011 |
20130034009 | System and Method for Dynamic Power Control for Energy Efficient Physical Layer Communication Devices - A system and method for dynamic power control for energy efficient physical layer communication devices. Energy-efficiency features are continually being developed to conserve energy in links between such energy-efficient devices. These energy-efficient devices interoperate with many legacy devices that have already been deployed. In these links, energy savings can be produced by having a local receiver enter an energy saving state based upon the receipt of standard IDLE signals. | 02-07-2013 |
20150188586 | METHOD AND SYSTEM FOR A COMBINED SIGNAL DETECTION FOR PHYSICAL LAYER COMMUNICATION DEVICES - Communication devices coupled via a communication link may comprise physical layer devices that may be operable to determine presence of a received signal and to mitigate noise in the signal prior to processing and/or validating the signal. Analog and/or digital signal processing may be utilized to process the signal and/or mitigate noise in the signal. Noise mitigation may comprise near-end crosstalk cancelling and/or echo cancelling and/or may utilize local transmit signal information. Subsequent to noise mitigation, samples of the noise reduced signal may be accumulated and/or an average signal strength and/or average signal power level may be determined. The average signal strength and/or average signal power level may be compared to one or more thresholds which may be configurable and/or programmable. | 07-02-2015 |
Patent application number | Description | Published |
20130124943 | Techniques For Storing Data in Stuck Memory Cells - A data storage system includes a memory circuit and a control circuit. The control circuit is operable to receive data bits provided for storage in memory cells of the memory circuit. The control circuit is operable to compare each of the data bits provided for storage in a corresponding one of the memory cells having a stuck-at fault to a value of the stuck-at fault, and to invert each of the data bits having a different value than the value of the stuck-at fault of the corresponding one of the memory cells to generate encoded data bits. The control circuit is operable to generate redundant bits that indicate the encoded data bits to invert to regenerate the data bits. | 05-16-2013 |
20140101370 | APPARATUS AND METHOD FOR LOW POWER LOW LATENCY HIGH CAPACITY STORAGE CLASS MEMORY - A method and a storage system are provided for implementing enhanced solid-state storage class memory (eSCM) including a direct attached dual in line memory (DIMM) card containing dynamic random access memory (DRAM), and at least one non-volatile memory, for example, Phase Change memory (PCM), Resistive RAM (ReRAM), Spin-Transfer-Torque RAM (STT-RAM), and NAND flash chips. An eSCM processor controls selectively allocating data among the DRAM, and the at least one non-volatile memory primarily based upon a data set size. | 04-10-2014 |
20140101516 | Encoding and Decoding Data to Accommodate Memory Cells Having Stuck-At Faults - A data storage system includes a memory circuit that has memory cells and a control circuit that is operable to receive data bits provided for storage in the memory cells. The control circuit is operable to receive a first matrix. Each row of the first matrix corresponds to a unique one of the data bits. The control circuit is operable to generate a second matrix having only the rows of the first matrix that correspond to the data bits provided for storage in a subset of the memory cells having stuck-at faults. The control circuit is operable to generate a third matrix having linearly independent columns of the second matrix. The control circuit is operable to encode the data bits to generate encoded data bits and redundant bits using the third matrix. | 04-10-2014 |
20140101517 | Encoding and Decoding Redundant Bits to Accommodate Memory Cells Having Stuck-At Faults - A data storage system has a memory circuit that comprises memory cells and a control circuit that receives data bits provided for storage in the memory cells. The control circuit encodes the data bits to generate a first set of redundant bits and encoded data bits, such that the encoded data bits selected for storage in a first subset of the memory cells with first stuck-at faults have digital values of corresponding ones of the first stuck-at faults. The control circuit encodes the first set of redundant bits to generate a second set of redundant bits. The control circuit performs logic functions on the second set of redundant bits and the encoded data bits to generate a third set of redundant bits, such that redundant bits in the third set of redundant bits selected for storage in a second subset of the memory cells with second stuck-at faults have digital values of corresponding ones of the second stuck-at faults. | 04-10-2014 |
20140156713 | Deadline-Based Scheduling in a Distributed File System - Approaches for retrieving files from a replicated file system. A component receives, from a requestor, a request for a copy of a data unit. The component identifies a plurality of storage nodes that each stores a complete copy of the data unit. The component sends, to the plurality of storage nodes, an instruction to retrieve a copy of the data unit within a specified period of time. At each storage node receiving an instruction, a determination of whether the copy of the data unit may be retrieved within the specified period of time is made, and if so, the copy of the data unit is provided to the component only if the copy of the data unit was actually retrieved within the specified period. The component provides the first copy of the data unit it receives to the requestor and discards any subsequently received copies of the data unit. | 06-05-2014 |
20140164821 | Techniques For Encoding and Decoding Using a Combinatorial Number System - A data storage system includes a memory circuit having memory cells and a control circuit. The control circuit is operable to receive data bits provided for storage in the memory cells. A subset of the memory cells have predetermined stuck-at faults. The control circuit is operable to compute a binomial coefficient for each of the predetermined stuck-at faults based on a bit position of a corresponding one of the predetermined stuck-at faults within the memory cells. The control circuit is operable to add together the binomial coefficients to generate an encoded number using a combinatorial number system. The control circuit is operable to generate a first set of redundant bits that indicate the encoded number. The first set of redundant bits are used to decode bits read from the memory cells to regenerate the data bits. | 06-12-2014 |
20140164873 | Techniques For Storing Bits in Memory Cells Having Stuck-at Faults - A data storage system includes a memory circuit comprising memory cells and a control circuit. The control circuit generates a first set of redundant bits indicating bit positions of the memory cells having stuck-at faults in response to a first write operation if a first rate of the stuck-at faults in the memory cells is greater than a first threshold. The control circuit is operable to encode data bits to generate encoded data bits and a second set of redundant bits that indicate a transformation performed on the data bits to generate the encoded data bits in response to a second write operation if a second rate of stuck-at faults in the memory cells is greater than a second threshold. The encoded data bits stored in the memory cells having the stuck-at faults match digital values of corresponding ones of the stuck-at faults. | 06-12-2014 |
20150081933 | ACK-LESS PROTOCOL FOR NOTICING COMPLETION OF READ REQUESTS - The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received. | 03-19-2015 |
20150081947 | DOORBELL-LESS ENDPOINT-INITIATED PROTOCOL FOR STORAGE DEVICES - The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received. | 03-19-2015 |
20150081956 | DOORBELL-LESS PROTOCOL FOR SOLID STATE DRIVE INTERFACE - The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received. | 03-19-2015 |
20150177994 | DOORLESS PROTOCOL HAVING MULTIPLE QUEUE READ REQUESTS IN FLIGHT - The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received. | 06-25-2015 |
20150199177 | RANDOM NUMBER GENERATOR BY SUPERPARAMAGNETISM - In one general embodiment, a system includes at least one magnetic nanoparticle; a heating device for heating the at least one magnetic nanoparticle to induce a paramagnetic thermal instability in the at least one magnetic nanoparticle whereby a magnetization of the magnetic nanoparticle randomly switches between different detectable magnetic states upon heating thereof; and a magnetoresistance reading device for detecting an instantaneous magnetic state of the magnetic nanoparticle. | 07-16-2015 |
Patent application number | Description | Published |
20110141775 | NON-DISSIPATIVE START UP CIRCUIT - A start up circuit constituted of: a first alternating current lead; a second alternating current lead, said second alternating current lead exhibiting an opposing phase of said first alternating current lead; a first capacitor, a first end of said first capacitor coupled to said first alternating current lead; a second capacitor, a first end of said second capacitor coupled to said second alternating current lead; a breakdown diode coupled between a second end of said first capacitor and a second end of said second capacitor; and a third capacitor coupled in parallel with said breakdown diode. A direct current power is developed across the breakdown diode without requiring dissipative elements. | 06-16-2011 |
20110187283 | DIMMING INPUT SUITABLE FOR MULTIPLE DIMMING SIGNAL TYPES - A lighting circuit constituted of: a single dimming input; a pulse width modulation acceptance circuit arranged to convert a pulse width modulated dimming signal received at the single dimming input into a local dimming signal, the local dimming signal exhibiting a predetermined format; an analog voltage level acceptance circuit arranged to convert an analog voltage dimming signal received at the single dimming input into the local dimming signal exhibiting the predetermined format; and a luminaire driving circuit responsive to the local dimming signal. | 08-04-2011 |
20120025735 | FLYBACK WITH SWITCHING FREQUENCY RESPONSIVE TO LOAD AND INPUT VOLTAGE - A power source constituted of: a power factor corrector controller; an electronically controlled switch responsive to the power factor corrector controller; a first inductor serially connected with the electronically controlled switch and arranged to pass a direct current there through when the electronically controlled switch is closed; a second inductor magnetically coupled to the first inductor and coupled to provide power to a load in a flyback arrangement; a third inductor magnetically coupled to the first inductor, a first end of the third inductor arranged to provide a representation of the voltage level of the direct current when the electronically controlled switch is closed, and to provide a representation of the voltage level of the power provided to the load when the electronically controlled switch is open; and an off time control circuit in communication with the power factor corrector controller and responsive to the third inductor representations. | 02-02-2012 |
20130069615 | EMI SUPPRESSION WITH SHIELDED COMMON MODE CHOKE - A power supply arrangement constituted of: an isolated power supply having a primary side and a secondary side, the secondary side electrically isolated from the primary side; a common mode choke having a first winding and a second winding wound on a common core, the common mode choke coupled between the primary side of the isolated power supply and an AC mains; and a shielding surrounding the common mode choke, the shielding coupled to a common potential of the secondary side of the isolated power supply. | 03-21-2013 |
Patent application number | Description | Published |
20100241923 | Communication device employing LDPC (Low Density Parity Check) coding with Reed-Solomon (RS) and/or binary product coding - Communication device employing LDPC (Low Density Parity Check) coding with Reed-Solomon (RS) and/or binary product coding. An LDPC code is concatenated with a RS code or a binary product code (e.g., using row and column encoding of matrix formatted bits) thereby generating coded bits for use in generating a signal that is suitable to be launched into a communication channel. Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. and various implementations of cyclic redundancy check (CRC) may accompany the product coding and/or additional ECC/FEC employed. The redundancy of such coded signals as generated using the principles herein are in the range of approximately 20% thereby providing a significant amount of redundancy and a high coding gain. Soft decision decoding may be performed on such coded signal generated herein. | 09-23-2010 |
20100241925 | Forward Error Correction (FEC) scheme for communications - Forward error correction (FEC) scheme for communications. Appropriate selection/arrangement of bits of an information bit sequence undergo one or more types of subsequent encoding to generate a coded bit sequence that may subsequently undergo appropriate processing to generate a continuous time signal to be launched within a communication channel. In some embodiments, an information bit sequence, after being partitioning into a number of information bit groups, initially undergoes a first encoding within a first encoding module thereby generating a number of redundancy/parity bit groups (e.g., e.g., each redundancy/parity bit group corresponding to one of the information bit groups). Then, after performing any desired and appropriate selection/arrangement of bits within the redundancy/parity bit groups and the information bit groups, second encoding within a second encoding module is performed thereon to generate additional redundancy/parity bits. In addition, interleaving may be performing at various stages of the encoding processing. | 09-23-2010 |
20100241926 | Communication device employing binary product coding with selective additional Cyclic Redundancy Check (CRC) therein - Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein. Product code encoding (e.g., employing row and column encoding of matrix formatted bits, selectively with interleaving and/or permutation of the bits therein) may be combined with additional error correction code (ECC) or forward error correction (FEC) coding thereby generating coded bits for use in generating a signal to be launched into a communication channel. Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. The redundancy of such coded signals as generated using the principles herein is in the range of approximately 7%, and hard decision decoding may be performed on such coded signals generated herein. In accordance with decoding such signals, various bit decisions (within certain iterations) may be selectively ignored and/or reverted back to previous bit decisions. | 09-23-2010 |
20110052216 | Electronic dispersion compensation within optical communications using reconstruction - Electronic dispersion compensation within optical communications using reconstruction. Within a communication system that includes any optical network portion, segment, or communication link, etc., that optical component/portion of the communication system is emulated within the electronic domain. For example, in a communication device having receiver functionality, deficiencies that may be incurred by the at least one optical portion of the communication system are compensated in the electronic domain of the communication device having the receiver functionality by employing reconstruction logic and/or circuitry therein. Multiple decision feedback equalizers (DFE) circuitries, implemented in the electronic domain, may be employed to provide feedback from different portions of the receiver functionality in accordance with performing compensation of optical incurred deficiencies (e.g., dispersion, non-linearity, inter-symbol interference (ISI), etc.). Within a communication device's receiver portion, equalization and compensation is performed in the electronic domain as adapted for high speed applications and higher order modulation schemes. | 03-03-2011 |
20120179949 | METHOD AND SYSTEM FOR ENCODING FOR 100G-KR NETWORKING - In one embodiment, a coding method that uses certain forward error correcting codes based on a given transcoding method and delivers the codes according to burst interleaving. | 07-12-2012 |
20130147645 | ENCODING METHODS AND SYSTEMS FOR BINARY PRODUCT CODES - A data encoding circuit and a corresponding method is provided. The data encoding circuit includes a first data formatter in communication with an encoder section. The first data formatter is configured to receive blocks of source data in serial and output parallel two dimensional source data. The encoder receives the parallel two dimensional source data and that computes a plurality of serial row parity bits and a plurality of parallel column parity bits of an error correcting code from the parallel two dimensional source data. A second data formatter communicates with the encoder section and receives the parallel column parity bits and outputs serial column parity bits. A multiplexer section multiplexes the blocks of source data, the serial row parity bits, and the serial column parity bits into an output stream including the blocks of source data encoded by the error correcting code. | 06-13-2013 |
20130208771 | TRANSCODING SCHEME TECHNIQUES - Disclosed herein are certain embodiments of a coding system and method that guarantee a pair of sync bits in a transcoded block will appear on the same physical lane. Embodiments may then use this property for data synchronization and to guarantee a bit transition in a certain amount of time on a physical lane. Embodiments of a coding system and process for configuring alignment marker blocks are also disclosed. | 08-15-2013 |
20130235886 | Reduced Complexity Transcoding - Efficient transcoding and decoding techniques are widely applicable across multiple different transcoding formats. The techniques find many applications in, as one example, high speed networking. The techniques provide reduced computational and implementation complexity. The techniques may also improve the processing latency compared with other transcoding techniques. | 09-12-2013 |
20130262941 | Data Alignment Over Multiple Physical Lanes - High speed communication networks divide data traffic into multiple physical lanes. For example, the IEEE standard 40 G/100 G supports sending Ethernet frames at 40/100 gigabits per second over multiple 10/25 Gb/s lanes. Techniques are disclosed for aligning the data across the physical lanes. | 10-03-2013 |
20140053042 | Communication device employing binary product coding with selective additional Cyclic Redundancy Check (CRC) therein - Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein. Product code encoding (e.g., employing row and column encoding of matrix formatted bits, selectively with interleaving and/or permutation of the bits therein) may be combined with additional error correction code (ECC) or forward error correction (FEC) coding thereby generating coded bits for use in generating a signal to be launched into a communication channel Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. The redundancy of such coded signals as generated using the principles herein is in the range of approximately 7%, and hard decision decoding may be performed on such coded signals generated herein. In accordance with decoding such signals, various bit decisions (within certain iterations) may be selectively ignored and/or reverted back to previous bit decisions. | 02-20-2014 |
20140122976 | METHOD AND APPARATUS FOR UMBRELLA CODING - A communication system and a method are disclosed. The communication system includes an encoder configured to encode source data and output an encoded frame including a mother code or a plurality of concatenated daughter codes based on an encoding option. The mother code and the plurality of concatenated daughter codes have a same number of coded data symbols. The mother code includes a first source number of source symbols and a first parity number of parity symbols. The daughter code includes fewer source symbols and fewer parity symbols than the mother code. | 05-01-2014 |
20140173384 | METHOD AND SYSTEM FOR ENCODING FOR 100G-KR NETWORKING - Aspects of a method and system for encoding in 100G-KR networking are described. In one example embodiment, a coding method uses certain forward error correcting codes based on a given transcoding method and delivers the codes according to burst interleaving. In another example, a coding method includes receiving source data from a plurality of physical lanes, combining data from the physical lanes to generate a block, transcoding the block, and encoding a data stream including the transcoded block. | 06-19-2014 |
20140201604 | Methods and Systems For 2-Dimensional Forward Error Correction Coding - A communication system and a method are disclosed. The communication system includes an encoder configured to encode source data and output an encoded frame including a plurality of rows and a plurality of columns. The plurality of rows include a row component code. The plurality of columns include a column component code. The row component code is configured to achieve a lower bit error rate than the column component code in communication channels having a same signal to noise ratio. | 07-17-2014 |
20150120955 | Alignment Markers in Multi-Lane Networking - A marker spacing between two consecutive alignment marker (AM) blocks is defined for virtual lanes in a multi-virtual-lane networking protocol. A system using the networking protocol includes circuitry configured to identify virtual and physical lane groupings and numbers based on the AM blocks. The system may use error coding groups to allow for distribution of the AM blocks to the physical lanes in integer numbers of error correction blocks. The identification scheme may be based on sequences derived from a known bit pattern and the bit inverse of the bit pattern. The system may include matching units identify instances of the bit pattern and its bit inverse. | 04-30-2015 |
20150244498 | Data Alignment over Multiple Physical Lanes - High speed communication networks divide data traffic into multiple physical lanes. For example, the IEEE standard 40G/100G supports sending Ethernet frames at 40/100 gigabits per second over multiple 10/25 Gb/s lanes. Techniques are disclosed for aligning the data across the physical lanes. | 08-27-2015 |