Patent application number | Description | Published |
20090215265 | Low-stain polishing composition - The invention is an aqueous composition useful for chemical mechanical polishing of a patterned semiconductor wafer containing a copper interconnect metal. The aqueous composition includes an oxidizer, an inhibitor for the copper interconnect metal, 0.001 to 15 weight percent of a water soluble modified cellulose, non-saccaride water soluble polymer, 0 to 15 complexing agent for the copper interconnect metal, 0 to 15 weight percent phosphorus compound, 0.05 to 20 weight percent of an acid compound that is capable of complexing copper ions, and water; and the solution has an acidic pH. | 08-27-2009 |
20090215266 | Polishing Copper-Containing patterned wafers - An aspect of the invention provides a method for polishing a patterned semiconductor wafer containing a copper interconnect metal with a polishing pad. The method includes the following: a) providing an aqueous polishing solution, the polishing solution containing an benzotriazole (BTA) inhibitor and a copper complexing compound and water; b) polishing the patterned wafer with the aqueous polishing solution and the polishing pad in a manner that dissolves copper into Cu | 08-27-2009 |
20100029079 | Chemical mechanical polishing composition and methods relating thereto - A chemical mechanical polishing composition useful for chemical mechanical polishing of a patterned semiconductor wafer containing a nonferrous metal. The chemical mechanical polishing composition comprises an inhibitor for the nonferrous metal; a copolymer of poly(ethylene glycol)methyl ether (meth)acrylate and 1-vinylimidazole; and water. | 02-04-2010 |
20110073800 | Abrasive-free chemical mechanical polishing compositions - The aqueous abrasive-free composition is useful for chemical mechanical polishing of a patterned semiconductor wafer containing a nonferrous metal. The composition includes an oxidizer, an inhibitor for the nonferrous metal, 0 to 15 weight percent water soluble modified cellulose, 0 to 15 weight percent phosphorus compound, 0.005 to 5 weight percent of an acidic polymer, and water. The acidic polymer has a methacrylic acid portion having a carbon number of 4 to 250. The methacrylic acid portion includes either methacrylic acid or an acrylic acid/methacrylic acid copolymer. The acidic polymer including a segment from a mercapto-carboxylic acid chain transfer agent. | 03-31-2011 |
20130217230 | Chemical Mechanical Polishing Composition And Methods Relating Thereto - A method for chemical mechanical polishing of a semiconductor wafer containing a nonferrous metal is provided, comprising: providing a chemical mechanical polishing composition comprising 1 to 25 wt % of an oxidizer; 0.01 to 15 wt % of an inhibitor for the nonferrous metal; 0.005 to 5 wt % of a copolymer of poly(ethylene glycol) methyl ether(meth)acrylate and 1-vinylimidazole; and water; wherein the chemical mechanical polishing composition has an acidic pH; providing a chemical mechanical polishing pad; providing a semiconductor wafer containing the nonferrous metal; creating dynamic contact between the chemical mechanical polishing pad and the semiconductor wafer; and, dispensing the polishing solution at or near the interface between the chemical mechanical polishing pad and the semiconductor wafer. | 08-22-2013 |
20160027663 | METHOD FOR CHEMICAL MECHANICAL POLISHING SUBSTRATES CONTAINING RUTHENIUM AND COPPER - A method for chemical mechanical polishing of a substrate comprising ruthenium and copper. | 01-28-2016 |
Patent application number | Description | Published |
20100240980 | Wan-Based Remote Mobile Monitoring Method And Device Of Electrophysiological Data - A WAN-based remote mobile monitoring method and device of electrophysiological data, including microprocessor circuit, electrophysiological signal sampling processing circuit, data storage circuit, image liquid crystal circuit, real-time clock, emergent calling circuit, working power supply management circuit, wireless network interface circuit, USB interface circuit, etc, has the in-built binding IP address of the remote electrophysiological data monitoring server, TCP/IP protocol, PPP protocol and BlueTooth protocol. Application controls self-adaptive analysis computing, exception event warning and alarming privilege graded setting, event data package combination, network digital communication, data storage circuit area management, safety information data storage management and remote emergent calling of the remote mobile monitoring devices. It can have access to Internet in motion and roaming access to Internet by inter-network switch, and have access to the exterior networks wirelessly including Internet, LAN, ADSL, VDSL, ISDN, etc, for digital communication with the remote electrophysiological data monitoring server. | 09-23-2010 |
Patent application number | Description | Published |
20080285332 | Bit-Alterable, Non-Volatile Memory Management - Methods and apparatuses for storage of data in bit-alterable, non-volatile memories. In some embodiments, an array of memory locations implemented as bit-alterable, non-volatile memory configured as a plurality of blocks of memory locations; and control circuitry coupled with the array of memory locations to cause a block of data to be stored in the array of memory spanning a boundary between a first block of memory locations and a second block of memory locations. One or more processors access system data during initialization of an electronic system by retrieving data from a pre-selected location in a bit-alterable, non-volatile memory without scanning multiple memory locations to locate the system data. | 11-20-2008 |
20090043770 | Method of Realizing Commands Synchronization in Supporting Multi-Threading Non-Volitale Memory File System - A method may be used in a multi-threading non-volatile memory file system. The method comprises creating a data structure to store progress information on one or more concurrent operations to access a file system of a non-volatile memory; and executing the one or more concurrent operations based on the progress info. | 02-12-2009 |
20100161931 | METHOD OF MANAGING SECTORS OF A NON-VOLATILE MEMORY - Machine-readable media, methods, apparatus and system for managing sectors of a non-volatile memory are described. In some embodiments, a plurality of file segments may be written to a plurality of memory sectors ( | 06-24-2010 |
20100162038 | Nonvolatile/Volatile Memory Write System and Method - Methods and systems provide memory handling for memory systems with mixed volatile and nonvolatile memory types. In various embodiments, the method or system maintains a page table that marks memory pages in nonvolatile memory as write-protected. When a write is attempted to a write-protected page in nonvolatile memory, a fault is generated. In response to the fault, memory contents of the write-protected nonvolatile page are moved to a page location in a volatile memory. | 06-24-2010 |
20100169602 | Method and Apparatus for Efficient Memory Placement - A memory profiling system profiles memory objects in various memory devices and identifies memory objects as candidates to be moved to a more efficient memory device. Memory object profiles include historical read frequency, write frequency, and execution frequency. The memory object profile is compared to parameters describing read and write performance of memory types to determine candidate memory types for relocating memory objects. Memory objects with high execution frequency may be given preference when relocating to higher performance memory devices. | 07-01-2010 |
20110145476 | Persistent Content in Nonvolatile Memory - Applications may request persistent storage in nonvolatile memory. The persistent storage is maintained across power events and application instantiations. Persistent storage may be maintained by systems with or without memory management units. | 06-16-2011 |
20110161550 | SUB-OS VIRTUAL MEMORY MANAGEMENT LAYER - A binary memory image in system is modified. The system may or may not already have virtual memory management enabled. Virtual memory management is enabled and/or modified by inserting a sub-OS virtual memory management layer in the binary memory image. Part of the binary memory image may be compressed to make room for the sub-OS virtual memory management layer. | 06-30-2011 |
20120124315 | METHOD OF MANAGING DATA ON A NON-VOLATILE MEMORY - Machine-reading media and method for managing data in a non-volatile memory. The method comprises the steps: a plurality of first logical offsets may be assigned to a plurality of first fragments of a first memory block, a first fragment of the plurality of first fragments may store data; a plurality of second logical offsets may be assigned to a plurality of second fragments of a second memory block, a second fragment of the plurality of second fragments may be associated with the first fragment, a second logical offset assigned to the second fragment may be identical to a first logical offset assigned to the first fragment; then, data may be copied from the first fragment to the second fragment. | 05-17-2012 |
20140266390 | TRANSCONDUCTANCE CIRCUIT AND FREQUENCY MIXER - The present invention provides a transconductance circuit and a frequency mixer. The transconductance circuit includes: a first transistor, a second transistor, a first impedor, a second impedor, a first input network, and a second input network, where a gate of the first transistor is connected to a source of the second transistor through the first input network and the first impedor; and a gate of the second transistor is connected to a source of the first transistor through the second input network and the second impedor. The present invention can enable a current that passes through a transconductance circuit to be reused between a first transistor and a second transistor, thereby improving the gain efficiency of the transconductance circuit and improving performance of the transconductance circuit. | 09-18-2014 |
20150378889 | PERSISTENT CONTENT IN NONVOLATILE MEMORY - Applications may request persistent storage in nonvolatile memory. The persistent storage is maintained across power events and application instantiations. Persistent storage may be maintained by systems with or without memory management units. | 12-31-2015 |
Patent application number | Description | Published |
20090107147 | Gas turbine fuel injector with removable pilot liquid tube - A fuel injector for a gas turbine engine is disclosed. The fuel injector includes an injector housing having a longitudinal axis. The injector housing includes one or more fuel galleries annularly disposed about the longitudinal axis, and a compressed air inlet. The fuel injector also includes a premix barrel having a proximal end and a distal end circumferentially disposed about the longitudinal axis. The premix barrel is fluidly coupled to the fuel galleries and the compressed air inlet at the proximal end and is configured to couple to a combustor of the gas turbine engine at the distal end. The fuel injector also includes a substantially cylindrical pilot assembly disposed radially inwards of the premix barrel having a first end and a second end. The second end is coupled to the injector housing and the first end is located proximate the distal end of the premix barrel. The fuel injector further includes a pilot liquid tube having a third end and a fourth end disposed radially inwards of the pilot assembly. The fourth end is removably coupled to the injector housing and the third end is located proximate the first end of the pilot assembly. | 04-30-2009 |
20090133402 | Gas turbine fuel injector with insulating air shroud - A fuel injector for a gas turbine engine is disclosed. The fuel injector includes an injector housing extending from a first end to a second end along a longitudinal axis. The second end of the housing is fluidly coupled to a combustor of the turbine engine and the housing includes a liquid fuel gallery annularly disposed about the longitudinal axis. The fuel injector also includes a stem extending longitudinally from the first end of the housing to a third end. The stem includes a liquid tube configured to deliver liquid fuel to the fuel injector. The fuel injector also includes an annular shell extending along the longitudinal axis from the first end to the third end and circumferentially disposed about the stem. The fuel injector further includes an insulating air shroud formed inside the shell. The air shroud includes a layer of air between the shell and the stem. | 05-28-2009 |
20090241547 | Gas turbine fuel injector for lower heating capacity fuels - A fuel injector for a gas turbine engine includes a stem extending along a longitudinal axis from a proximal end to a distal end. The stem includes one or more fuel tubes configured to deliver a fuel toward the distal end of the stem, and a pilot assembly coupled to the distal end of the stem. The pilot assembly includes one or more components configured to inject fuel into a combustor of the engine. The fuel injector also includes a substantially tubular premix barrel extending along the longitudinal axis from a first end to a second end. The premix barrel is circumferentially disposed about the stem and configured to couple with the combustor at the second end. The fuel injector also includes an annular premix duct formed between the premix barrel and the stem. The premix duct includes an air inlet port at the first end, and a plurality of first orifices located downstream of the air inlet port. The first orifices are configured to inject fuel from the fuel tube into the premix duct. The premix duct also includes a plurality of second orifices located downstream of the first orifices. The second orifices are configured to inject fuel from the fuel tube into the premix duct. | 10-01-2009 |
20120324900 | PHASE AND AMPLITUDE MATCHED FUEL INJECTOR - A fuel injector for a turbine engine may include a body member disposed about a longitudinal axis, and a barrel member located radially outwardly from the body member. The fuel injector may also include an annular passageway extending between the body member and the barrel member from a first end to a second end. The first end may be configured to be fluidly coupled to a compressor of the turbine engine and the second end may be configured to be fluidly coupled to a combustor of the turbine engine. The fuel injector may also include a perforated plate positioned proximate the first end of the passageway. The perforated plate may be configured to direct compressed air into the annular passageway with a first pressure drop. The fuel injector may also include at least one fuel discharge orifice positioned downstream of the perforated plate. The at least one fuel discharge orifice may be configured to discharge a fuel into the annular passageway with a second pressure drop. The second pressure drop may have a value between about the first pressure drop and about 1.75 times the first pressure drop. | 12-27-2012 |
20130232987 | GAS TURBINE FUEL INJECTOR WITH INSULATING AIR SHROUD - A fuel injector for a gas turbine engine is disclosed. The fuel injector includes an injector housing extending from a first end to a second end along a longitudinal axis. The second end of the housing is fluidly coupled to a combustor of the turbine engine and the housing includes a liquid fuel gallery annularly disposed about the longitudinal axis. The fuel injector also includes a stem extending longitudinally from the first end of the housing to a third end. The stem includes a liquid tube configured to deliver liquid fuel to the fuel injector. The fuel injector also includes an annular shell extending along the longitudinal axis from the first end to the third end and circumferentially disposed about the stem. The fuel injector further includes an insulating air shroud formed inside the shell. The air shroud includes a layer of air between the shell and the stem. | 09-12-2013 |
Patent application number | Description | Published |
20110230157 | EQUIVALENT RADIO FREQUENCY NOTCH FILTER, RADIO FREQUENCY CHIP, AND RECEIVER - An equivalent radio frequency (RF) notch filter, an RF chip, and a receiver are provided. The equivalent RF notch filter includes: a local oscillation (LO) circuit, configured to provide a LO frequency signal; configured to be connected in parallel with the main chain, and down-convert signals of the main chain; and a frequency selective circuit realized by impedance difference, configured to provide different impedances for down-converted signals with different frequencies from the mixing circuit, so as to absorb the signals that need to be suppressed. | 09-22-2011 |
20140253399 | Wideband Slot Antenna for Wireless Communication Devices - An antenna comprising a conductive base comprising a west edge, an east edge, a north edge, a south edge, and a center axis, a left slot of nonconductive material extending from the south edge toward the north edge and positioned between the west edge and the center axis, and a right slot of nonconductive material extending from the south edge toward the north edge and positioned between the east edge and the center axis. | 09-11-2014 |
20160104945 | Antenna System and Terminal - An antenna system includes a first antenna and a second antenna, where the first antenna and the second antenna are connected in parallel to an antenna feeding point, and a phase-shift apparatus is connected in series between the first antenna or the second antenna and the antenna feeding point, so that an imaginary part of impedance at the antenna feeding point is canceled out near a central frequency channel number. The antenna system provides an expansion in radio frequency bandwidth in free space and an increase in average efficiency. | 04-14-2016 |
Patent application number | Description | Published |
20120194722 | DYNAMIC RANGE EXTENSION FOR CMOS IMAGE SENSORS FOR MOBILE APPLICATIONS - Aspects of the invention provide dynamic range extension for CMOS image sensors for mobile applications. An embodiment of the invention may comprise setting for each pixel in a pixel array one of a plurality of integration times and one of a plurality of signal gains, wherein the settings may be used to generate corresponding digital data for each pixel in the pixel array. The corresponding digital data for adjacent pixels for the same color plane may then be grouped into a superpixel, where each pixel has associated with it a different combination of integration time and signal gain. | 08-02-2012 |
20120195502 | DYNAMIC RANGE EXTENSION FOR CMOS IMAGE SENSORS FOR MOBILE APPLICATIONS - A system for processing images may comprise a pixel configuration circuitry enabled to set for each pixel in a pixel array one of a plurality of integration times and one of a plurality of signal gains. A column analog-to-digital converter may be enabled to generate a corresponding digital data for a pixel in the pixel array, and digital processing circuitry may be enabled to interpolate output data from the corresponding digital data for pixels grouped into pixel groups, wherein the pixel group comprises a target pixel and neighboring pixels in a same color plane. | 08-02-2012 |
20120306674 | AUTOMATIC OFFSET ADJUSTMENT FOR DIGITAL CALIBRATION OF COLUMN PARALLEL SINGLE-SLOPE ADCS FOR IMAGE SENSORS - Various embodiments of the present invention include enabling, during a calibration phase, a counter to count one less than a number of clock periods associated with a determined offset. The counted number of the clock periods is stored in calibration memory. In a conversion phase, inverted outputs are loaded from the calibration memory to the counter, where the counter is enabled to count the clock periods to determine a digital equivalent value of an analog signal amplitude. | 12-06-2012 |
20150036035 | RESET NOISE REDUCTION FOR PIXEL READOUT WITH PSEUDO CORRELATED DOUBLE SAMPLING - Provided are an imaging device implementing pseudo correlated double sampling (CDS), and an imaging method and a control method of the image device. The imaging device includes: a pixel array comprising a pixel configured to generate a current in response to incident light; a readout circuit configured to read out a plurality of output signals of the pixel, the plurality of output signals corresponding to a plurality of consecutive integration periods of the pixel within an aggregating period; and an aggregator configured to aggregate the plurality of output signals read out by the readout circuit to obtain a final aggregated output corresponding to illuminance for the aggregating period, wherein the readout circuit is configured to read out the plurality of output signals by, for each output signal, sampling a signal voltage of the pixel and sampling a subsequent reset voltage of the pixel and obtaining a difference therebetween. | 02-05-2015 |
20150146089 | IMAGING SYSTEMS AND METHODS WITH PIXEL SENSITIVITY ADJUSTMENTS - Imaging systems, such as time-of-flight imaging systems, and methods with pixel sensitivity adjustments. An embodiment includes a method, comprising: for a plurality of pixels having a first output and a second output, measuring the first outputs and the second outputs in response to a demodulation signal; and adjusting the demodulation signal such that a combination of the first outputs is substantially similar to a combination of the second outputs. | 05-28-2015 |
20160093343 | LOW POWER COMPUTATION ARCHITECTURE - An embodiment includes a system, comprising a first memory; a plurality of first circuits, wherein each first circuit is coupled to the memory; and includes a second circuit configured to generate a first output value in response to an input value received from the first memory; and an accumulator configured to receive the first output value and generate a second output value; and a controller coupled to the memory and the first circuits, and configured to determine the input values to be transmitted from the memory to the first circuits. | 03-31-2016 |
20160094768 | SYSTEMS AND METHODS OF SELECTIVE OUTPUT FOR REDUCING POWER - An embodiment includes a system, comprising: a buffer configured to store a plurality of events, each event including a plurality of bits; an output circuit configured to output events from the buffer; and a controller coupled to the buffer and the output circuit and configured to: cause the output circuit to output a first event from the buffer; and select a second event from the buffer to be output by the output circuit after the first event based on bits associated with the first event. | 03-31-2016 |