Patent application number | Description | Published |
20110108879 | LIGHT-EMITTING DEVICE - A light-emitting device comprising a semiconductor light-emitting stack, comprising a light emitting area; an electrode formed on the semiconductor light-emitting stack, wherein the electrode comprises a current injected portion and an extension portion; a current blocking structure formed between the current injected portion and the semiconductor light-emitting stack, and formed between a first part of the extension portion and the semiconductor light-emitting stack; and an electrical contact structure formed between a second part of the extension portion and the semiconductor light-emitting stack. | 05-12-2011 |
20110121291 | LIGHT-EMITTING ELEMENT AND THE MANUFACTURING METHOD THEREOF - A light-emitting element includes a light-emitting stack for emitting light and a substrate structure including: a first substrate disposed under the light-emitting stack and having a first surface facing the light-emitting stack; and a second substrate disposed under the light-emitting stack and having a second surface facing the light-emitting stack; and a reflective layer formed between the first substrate and the second substrate and having an inclined angle not perpendicular to the first surface. | 05-26-2011 |
20120061694 | LIGHT-EMITTING STRUCTURE - An embodiment of the present application discloses a light-emitting structure, comprising a first unit; a second unit; a trench formed between the first unit and the second unit, and having a less steep sidewall and a steeper sidewall steeper than the less steep sidewall; and an electrical connection arranged on the less steep sidewall. | 03-15-2012 |
20130001624 | LIGHT-EMITTING DEVICE - A light-emitting device includes a semiconductor light-emitting stack; a current injected portion formed on the semiconductor light-emitting stack; an extension portion having a first branch radiating from the current injected portion and having a first width, and a first length greater than the first width, and a second branch extending from the first branch and having a second width larger than the first width, and a second length greater than the second width; and an electrical contact structure between the second branch and the semiconductor light-emitting stack. | 01-03-2013 |
20130015473 | LIGHT-EMITTING DEVICEAANM CHEN; CHAO-HSINGAACI Hsinchu CityAACO TWAAGP CHEN; CHAO-HSING Hsinchu City TWAANM CHUNG; CHIEN-KAIAACI Hsinchu CityAACO TWAAGP CHUNG; CHIEN-KAI Hsinchu City TWAANM LIU; HSIN-MAOAACI Hsinchu CityAACO TWAAGP LIU; HSIN-MAO Hsinchu City TWAANM YAO; CHIU-LINAACI Hsinchu CityAACO TWAAGP YAO; CHIU-LIN Hsinchu City TWAANM HUANG; CHIEN-FUAACI Hsinchu CityAACO TWAAGP HUANG; CHIEN-FU Hsinchu City TW - The application provides a light-emitting device, comprising a substrate; a plurality of first light-emitting diode units on the substrate, wherein every first light-emitting diode unit has a first electrode structure; and a plurality of second light-emitting diode units among the plurality of first light-emitting diode units, wherein every second light-emitting diode unit has a second electrode structure. The second electrode structure of the second light-emitting diode unit is flipped over and electrically connected with the adjacent first electrode structure of the first light-emitting diode unit. | 01-17-2013 |
20130286733 | METHOD OF PROGRAMMING/READING A NON-VOLATILE MEMORY WITH A SEQUENCE - A method of programming/reading a multi-bit per cell non-volatile memory with a sequence is disclosed. A plurality of less-significant-bit pages are programmed, and a plurality of consecutive most-significant-bit pages of a plurality of consecutive word lines are programmed one after the other in a consecutive order. The most-significant-bit pages through all word lines in at least one memory block of the non-volatile memory are programmed or read after the less-significant-bit pages through all the word lines in the at least one memory block are programmed or read. | 10-31-2013 |
20130341667 | LIGHT-EMITTING DEVICE - A light-emitting device includes a semiconductor light-emitting stack; a current injected portion formed on the semiconductor light-emitting stack; an extension portion having a first branch radiating from the current injected portion and a second branch extending from the first branch; an electrical contact structure between the second branch and the semiconductor light-emitting stack and having a first width; and a current blocking structure located right beneath the electrical contact structure and having a second width larger than the first width. | 12-26-2013 |
20140346544 | Light-Emitting Element Having a Reflective Structure with High Efficiency - A light-emitting element includes a reflective layer; a first transparent layer on the reflective layer; a light-emitting stack having an active layer on the first transparent layer; and a cavity formed in the first transparent layer. | 11-27-2014 |
Patent application number | Description | Published |
20090109688 | Photoelectronic device - A photoelectronic device including a carrier, a light-emitting component mounted on the carrier; a patterned structure deposited on the carrier and around the light-emitting component; and a transparent sealing structure formed above the light-emitting component. The patterned structure mentioned above can cause the transparent sealing structure to be focused above the light-emitting component, and restrained in the patterned structure. The transparent sealing structure with predetermined proportional configuration is obtained by controlling the quantity of the transparent sealing structure. Therefore light efficiency of the photoelectronic device can be greatly improved. | 04-30-2009 |
20100025714 | LIGHT-EMITTING DEVICE CONTAINING A COMPOSITE ELECTROPLATED SUBSTRATE - The application is related to a method of forming a substrate of a light-emitting diode by composite electroplating. The application illustrates a light-emitting diode comprising the following elements: a light-emitting epitaxy structure, a reflective layer disposed on the light-emitting epitaxy structure, a seed layer disposed on the reflective layer, a composite electroplating substrate disposed on the seed layer by composite electroplating, and a protection layer disposed on the composite electroplating substrate. | 02-04-2010 |
20110266581 | LIGHT-EMITTING DEVICE CONTAINING A COMPOSITE ELECTROPLATED SUBSTRATE - The application is related to a method of forming a substrate of a light-emitting diode by composite electroplating. The application illustrates a light-emitting diode comprising the following elements: a light-emitting epitaxy structure, a reflective layer disposed on the light-emitting epitaxy structure, a seed layer disposed on the reflective layer, a composite electroplating substrate disposed on the seed layer by composite electroplating, and a protection layer disposed on the composite electroplating substrate. | 11-03-2011 |
Patent application number | Description | Published |
20140351433 | NETWORK DEVICE AND OPERATING METHOD THEREOF - A network device and an operating method thereof are disclosed, where the network device includes a setting unit and a connection unit coupled with the setting unit. The setting unit sets a first port as a predetermined port for a communication protocol, and the connection unit allows a client device to use the communication protocol to connect to the first port. When a client device sends a port-change request, the setting unit changes the predetermined port to a second port according to the port-change request. The connection unit maintains a communication between the first port and the client device and further allows another client device to use the communication protocol to connect to the second port. | 11-27-2014 |
20150032868 | ACCESS POINT WITH CAPABILITY OF DYNAMICALLY ADJUSTING CURRENT CCA THRESHOLD VALUE AND OPERATING METHOD THEREOF - An access point with capability of dynamically adjusting a present clear channel assessment (CCA) threshold value and an operating method of the access point are disclosed herein. The operating method includes, sensing a channel status through a receiving module, determining whether to transmit data through a transmission module according to the channel status and the present CCA threshold value, calculating a transmission error rate according to the data is successfully transmitted through the transmission module or not, and dynamically adjusting the present CCA threshold value according to the transmission error rate. In such an operation, the present CCA threshold value can be adjusted to a suitable value, and the access point can avoid abandoning its data transmission task due to the interferences of wireless signals from other access points or workstations located beyond the cell size of the access point. | 01-29-2015 |
20150365503 | METHOD FOR DETERMINING MAXIMUM SEGMENT SIZE - A method for determining a maximum segment size is disclosed. The method is used in an access point. The method includes: detecting a first MSS value between the access point and at least one device; setting a TCP MSS value of at least one TCP session established by the access point as a second MSS value; comparing the first MSS value with the second MSS value, and choosing a minimum value among the first MSS value and the second MSS value as a maximum value; and recording all the MSS values between the access point and the subsequent devices and the maximum value into a device MSS table. | 12-17-2015 |
Patent application number | Description | Published |
20090237762 | HOLOGRAM MEDIA READING APPARATUS - A hologram media reading apparatus including a reference light source, a stop with gray level aperture, and an optical sensor is provided. The reference light source is disposed on one side of a hologram medium, and capable of emitting a reference light beam. The reference light beam is transmitted to the hologram medium. The stop with gray level aperture and the reference light source are disposed on the same side or opposite sides of the hologram medium. The stop with gray level aperture has a light transmissive region, an opaque region, and a transmittance gradually varying region. The opaque region surrounds the light transmissive region. The transmittance gradually varying region surrounds the light transmissive region. A part of the reference beam from the hologram medium passes through the stop with gray level aperture and is transmitted to the optical sensor. | 09-24-2009 |
20090238059 | HOLOGRAPHIC RECORDING MEDIUM AND ENCODING/DECODING METHOD THEREOF - A holographic recoding medium is provided, having holographic pages. Each page has reference mark (RM) placement areas at fixed locations for placing RM patterns. The reference marks are used to calibrate data images of data areas each of which is enclosed by at least three RM regions. Hidden information of the medium is stored by an specific encoded pattern based on existence, types and arrangements of the RM marks. | 09-24-2009 |
20100014409 | HOLOGRAPHIC DATA STORING METHOD AND STORING DEVICE - A holographic data storing method includes the steps of: encoding original data to generate holographic data according to a codeword to symbol relation; and recording a hologram corresponding to the holographic data onto a holographic storage medium. In the codeword to symbol relation, a plurality of sample symbols corresponds to a plurality of codewords. Each of the sample symbols corresponds to a pattern having N*N pixels. There are M bright pixels in the N*N pixels, wherein N and M are positive integers and M is smaller than N*N. A hamming distance of the sample symbols is greater than or equal to 4, and a two-dimensional run-length of the sample symbols is greater than or equal to 2. | 01-21-2010 |
20100061640 | METHOD AND APPARATUS FOR DETECTING CODE OF HOLOGRAPHIC DATA PAGE - A method and an apparatus for detecting code of a holographic data page are provided. First, image information of at least one special pattern in the holographic data page is captured, and the captured image information is integrated into a characteristic symbol (CS) of the holographic data page. Then, the CS of the holographic data page is compared with a plurality of predetermined characteristic symbols (PCSs) to obtain a similarity between the CS and each of the PCSs. Thereafter, the PCS having the highest similarity to the CS is selected as the code information of the holographic data page. | 03-11-2010 |
20110154162 | DATA WRITING METHOD FOR A FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND FLASH MEMORY STORAGE APPARATUS USING THE SAME - A data writing method for a flash memory, and a flash memory controller and a flash memory storage apparatus using the same are provided. First, data is received from a host system. Next, the data is divided into at least one frame. Afterwards, an error checking and correcting (ECC) code corresponding to the frame is generated so as to form at least one ECC frame. Then, the ECC frame is divided into a plurality of frame segments. Finally, the frame segments are written into a flash memory chip according to a non-sequentially ranking order. | 06-23-2011 |
20110258495 | METHODS OF CALCULATING COMPENSATION VOLTAGE AND ADJUSTING THRESHOLD VOLTAGE AND MEMORY APPARATUS AND CONTROLLER - Methods of calculating a compensation voltage and adjusting a threshold voltage, a memory apparatus, and a controller are provided. In the present invention, data is written into a rewritable non-volatility memory, and the data is then read from the rewritable non-volatility memory and compared with the previously written data to obtain error bit information. The compensation voltage of the threshold voltage is calculated according to the error bit information, and the threshold voltage is adjusted according to the compensation voltage. | 10-20-2011 |
20110258496 | DATA READING METHOD, MEMORY STORAGE APPARATUS AND MEMORY CONTROLLER THEREOF - A data reading method for a writable non-volatile memory module having physical pages is provided. The method includes grouping the physical pages into a plurality of physical page groups. The method also includes reading first data from a physical page of a first physical page group by applying a first threshold voltage set. The method still includes, when the first data can be corrected by an error checking and correcting circuit and an error bit number corresponding to the first data is not smaller than an error bit number threshold, calculating compensation voltages for the first threshold voltage set. The method further includes adjusting the first threshold voltage set by the compensation voltages and applying the adjusted first threshold voltage set to read data from the physical pages of the first physical page group. Accordingly, data stored in the rewritable non-volatile memory module can be correctly read. | 10-20-2011 |
20110317488 | DATA READING METHOD AND CONTROL CIRCUIT AND MEMORY CONTROLLER USING THE SAME - A data reading method for a flash memory module is provided. The method includes applying a bit-data-read voltage to get read data from memory cells of the flash memory module. The method also includes setting a minus-adjustment-bit-data-read voltage and a plus-adjustment-bit-data-read voltage corresponding to the bit-data-read voltage based on an error-distribution estimated value and applying the minus-adjustment-bit-data-read voltage and the plus-adjustment-bit-data-read voltage to obtain soft values corresponding to the read data from the memory cells. The method further includes calculating a soft-information estimated value corresponding to each bit of the read data according to the soft-values. Accordingly, the method can effectively obtain soft information. | 12-29-2011 |
20120072805 | MEMORY STORAGE DEVICE, MEMORY CONTROLLER THEREOF, AND METHOD THEREOF FOR GENERATING LOG LIKELIHOOD RATIO - A memory storage device, a memory controller, and a log likelihood ratio (LLR) generation method are provided. A read data corresponding to a first storage state is obtained from memory cells of a flash memory chip in the memory storage device by using bit data read voltages. An error checking and correcting procedure is performed on the read data to obtain a second storage state corresponding to the read data when the read data is written. An amount of storage error is obtained in storage states satisfying a statistic number, and a storage error means that data is in the second storage state when being written and is in the first storage state when being read. A logarithmic operation is executed according to the statistic number, an amount of the storage states, and the amount of storage error to generate a first LLR of the read data. | 03-22-2012 |
20120144267 | DATA READING METHOD, MEMORY STORAGE APPARATUS, AND CONTROLLER THEREOF - A data reading method for a rewritable non-volatile memory module is provided, wherein the rewritable non-volatile memory module has a plurality of physical pages. The data reading method includes grouping the physical pages into a plurality of physical page groups and configuring a corresponding threshold voltage set for each of the physical page groups. The data reading method also includes respectively reading data from the physical pages of the physical page groups by using the corresponding threshold voltage sets. The data reading method further includes when data read from one of the physical pages of one of the physical page groups cannot be corrected by using an error checking and correcting (ECC) circuit, updating the threshold voltage set corresponding to the physical page group. | 06-07-2012 |
20120311402 | DATA READING METHOD, MEMORY CONTROLLER, AND MEMORY STORAGE DEVICE - A data reading method adapted to a rewritable non-volatility memory module having physical blocks is provided, wherein each physical block has a plurality of physical pages. In the data reading method, each physical page is partitioned into bit data areas, where at least one of the bit data areas has a data length different from that of the other bit data areas. Data is written into the bit data areas. Data in each bit data area is corresponding to an ECC frame. The data is read from the bit data areas. Because the at least one of bit data areas has a relatively short data length, the error correction capability is improved and the data can be correctly read. An error bit information is obtained according to the read data. A log likelihood ratio (LLR) lookup table or a threshold voltage is adjusted according to the error bit information. | 12-06-2012 |
20150113353 | DECODING METHOD, DECODING CIRCUIT, MEMORY STORAGE DEVICE AND CONTROLLING CIRCUIT UNIT - A decoding method, a memory storage device, a memory controlling circuit unit and a decoding circuit for low density parity code (LDPC) are provided. The decoding method includes: reading a data bit of each memory cell; performing a parity check procedure on the data bits to generate a plurality of checks; in an iterative decoding of LDPC, obtaining a reliability message of each data bit according to the checks and deciding an index of an error bit from the data bits according to the reliability messages; determining whether the index of the error bit and the checks comply with a parity criteria; and if the index of the error bit and the checks comply with the parity criteria, stopping the iterative decoding and outputting the index of the error bit. Accordingly, a decoding latency is decreased. | 04-23-2015 |
20150358036 | DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT - A decoding method, a memory storage device and a memory control circuit unit are provided. The decoding method includes: sending a read command sequence for reading multiple memory cells so as to obtain multiple first bits; determining whether the first bits have a first error; if the first bits have the first error, executing a first iteration decoding procedure on the first bits so as to obtain multiple second bits, and recording first bit flipping information of the first iteration decoding procedure; determining whether the second bits have a second error; and If the second bits have the at least one second error, executing a second iteration decoding procedure on the second bits according to the first bit flipping information so as to obtain multiple third bits. | 12-10-2015 |