Patent application number | Description | Published |
20080203491 | RADIATION HARDENED FINFET - The embodiments of the invention provide a structure and method for a rad-hard FinFET or mesa. More specifically, a semiconductor structure is provided having at least one fin or mesa comprising a channel region on an isolation region. A doped substrate region is also provided below the fin, wherein the doped substrate region has a first polarity opposite a second polarity of the channel region. The isolation region contacts the doped substrate region. The structure further includes a gate electrode covering the channel region and at least a portion of the isolation region. The gate electrode comprises a lower portion below the channel region of the fin, wherein the lower portion of the gate electrode comprises a height that is at least one-half of a thickness of the fin. | 08-28-2008 |
20080217730 | METHODS OF FORMING GAS DIELECTRIC AND RELATED STRUCTURE - Methods of forming a gas dielectric and a related structure are disclosed. In one embodiment, the method includes providing a wiring level including at least one conductive portion within a sacrificial dielectric; forming a nanofiber layer over the wiring level; vaporizing the sacrificial dielectric by heating; evacuating the vaporized sacrificial layer; and sealing pores in the nanofiber layer. | 09-11-2008 |
20080257156 | Carbon Nanotubes As Low Voltage Field Emission Sources for Particle Precipitators - An air particle precipitator and a method of air filtration comprise a housing unit; a first conductor in the housing unit; a second conductor in the housing unit; and a carbon nanotube grown on the second conductor. Preferably, the first conductor is positioned opposite to the second conductor. The air particle precipitator further comprises an electric field source adapted to apply an electric field to the housing unit. Moreover, the carbon nanotube is adapted to ionize gas in the housing unit, wherein the ionized gas charges gas particulates located in the housing unit, and wherein the first conductor is adapted to trap the charged gas particulates. The air particle precipitator may further comprise a metal layer over the carbon nanotube. | 10-23-2008 |
20080271606 | CHEMICAL AND PARTICULATE FILTERS CONTAINING CHEMICALLY MODIFIED CARBON NANOTUBE STRUCTURES - A carbon nanotube filter, a use for a carbon nanotube filter and a method of forming a carbon nanotube filter. The method including (a) providing a carbon source and a carbon nanotube catalyst; (b) growing carbon nanotubes by reacting the carbon source with the nanotube catalyst; (c) forming chemically active carbon nanotubes by forming a chemically active layer on the carbon nanotubes or forming chemically reactive groups on sidewalls of the carbon nanotubes; and (d) placing the chemically active nanotubes in a filter housing. | 11-06-2008 |
20080282893 | CHEMICAL AND PARTICULATE FILTERS CONTAINING CHEMICALLY MODIFIED CARBON NANOTUBE STRUCTURES - A carbon nanotube filter. The filter including a filter housing; and chemically active carbon nanotubes within the filter housing, the chemically active carbon nanotubes comprising a chemically active layer formed on carbon nanotubes or comprising chemically reactive groups on sidewalls of the carbon nanotubes; and media containing the chemically active carbon nanotubes. | 11-20-2008 |
20080284992 | EXPOSURES SYSTEM INCLUDING CHEMICAL AND PARTICULATE FILTERS CONTAINING CHEMICALLY MODIFIED CARBON NANOTUBE STRUCTURES - An exposure system for exposing a photoresist layer on a top surface of a wafer to light. The exposure system including: an environment chamber containing a light source, one or more focusing lenses, a mask holder, a slit and a wafer stage, the light source, all aligned to an optical axis, the wafer stage moveable in two different orthogonal directions orthogonal to the optical axis, the mask holder and the slit moveable in one of the two orthogonal directions; a filter in a sidewall of the environment chamber, the filter including: a filter housing containing chemically active carbon nanotubes, the chemically active carbon nanotubes comprising a chemically active layer formed on carbon nanotubes or comprising chemically reactive groups on sidewalls of the carbon nanotubes; and means for forcing air or inert gas first through the filter then into the environment chamber and then out of the environment chamber. | 11-20-2008 |
20080286466 | CHEMICAL AND PARTICULATE FILTERS CONTAINING CHEMICALLY MODIFIED CARBON NANOTUBE STRUCTURES - A carbon nanotube filter, a use for a carbon nanotube filter and a method of forming a carbon nanotube filter. The method including (a) providing a carbon source and a carbon nanotube catalyst; (b) growing carbon nanotubes by reacting the carbon source with the nanotube catalyst; (c) forming chemically active carbon nanotubes by forming a chemically active layer on the carbon nanotubes or forming chemically reactive groups on sidewalls of the carbon nanotubes; and (d) placing the chemically active nanotubes in a filter housing. | 11-20-2008 |
20080286971 | CMOS Gate Structures Fabricated by Selective Oxidation - A sidewall image transfer process for forming sub-lithographic structures employs a layer of sacrificial material that is deposited over a structure layer and covered by a cover layer. The sacrificial material layer and the cover layer are patterned with conventional resist and etched to form a sacrificial mandrel. The edges of the mandrel are oxidized or nitrided in a plasma at low temperature, after which the material layer and the cover layer are stripped, leaving sublithographic sidewalls. The sidewalls are used as hardmasks to etch sublithographic gate structures in the gate conductor layer. | 11-20-2008 |
20090014767 | CARBON NANOTUBE CONDUCTOR FOR TRENCH CAPACITORS - A trench-type storage device includes a trench in a substrate ( | 01-15-2009 |
20090087795 | METHOD AND APPARATUS FOR CLEANING A SEMICONDUCTOR SUBSTRATE IN AN IMMERSION LITHOGRAPHY SYSTEM - A method and apparatus for reduction and prevention of residue formation and removal of residues formed in an immersion lithography tool. The apparatus including incorporation of a cleaning mechanism within the immersion head of an immersion lithographic system or including a cleaning mechanism in a cleaning station of an immersion lithographic system. | 04-02-2009 |
20090121298 | FIELD EFFECT TRANSISTOR - A transistor. The transistor including: a well region in a substrate; a gate dielectric layer on a top surface of the well region; a polysilicon gate electrode on a top surface of the gate dielectric layer; spacers formed on opposite sidewalls of the polysilicon gate electrode; source/drain regions formed on opposite sides of the polysilicon gate electrode in the well region; a first doped region in the polysilicon gate electrode, the first doped region extending into the polysilicon gate electrode from a top surface of the polysilicon gate electrode; and a buried second doped region in the polysilicon gate electrode. | 05-14-2009 |
20090121343 | CARBON NANOTUBE STRUCTURES FOR ENHANCEMENT OF THERMAL DISSIPATION FROM SEMICONDUCTOR MODULES - Disclosed are embodiments of an improved semiconductor wafer structure having protected clusters of carbon nanotubes (CNTs) on the back surface and a method of forming the improved semiconductor wafer structure. Also disclosed are embodiments of a semiconductor module with exposed CNTs on the back surface for providing enhanced thermal dissipation in conjunction with a heat sink and a method of forming the semiconductor module using the disclosed semiconductor wafer structure. | 05-14-2009 |
20090231085 | RESISTOR AND DESIGN STRUCTURE HAVING RESISTOR MATERIAL LENGTH WITH SUB-LITHOGRAPHIC WIDTH - A resistor and design structure including at least one resistor material length in a dielectric, each of the least one resistor material length having a sub-lithographic width are disclosed. | 09-17-2009 |
20090231087 | RESISTOR AND DESIGN STRUCTURE HAVING SUBSTANTIALLY PARALLEL RESISTOR MATERIAL LENGTHS - A resistor and design structure including a pair of substantially parallel resistor material lengths separated by a first dielectric are disclosed. The resistor material lengths have a sub-lithographic dimension and may be spacer shaped. | 09-17-2009 |
20090278226 | STRUCTURE FOR CONDUCTIVE LINER FOR RAD HARD TOTAL DOSE IMMUNITY AND STRUCTURE THEREOF - The invention relates to a design structure, and more particularly, to a design structure for a conductive liner for rad hard total dose immunity and a structure thereof. The structure includes at least one shallow trench isolation structure having oxide material and formed in an SIO. A dielectric liner is formed at an interface of the SIO within the at least one shallow trench isolation structure. A metal or metal alloy layer is formed in the at least one shallow trench isolation structure and between the dielectric liner and the oxide material. | 11-12-2009 |
20090280619 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING CONDUCTIVE LINER FOR RAD HARD TOTAL DOSE IMMUNITY - The invention relates to a method includes etching at least one shallow trench in at least an SIO layer; forming a dielectric liner at an interface of the SIO layer and the SIO layer; forming a metal or metal alloy layer in the shallow trench on the dielectric liner; and filling the shallow trench with oxide material over the metal or metal alloy. | 11-12-2009 |
20100119422 | CHEMICAL AND PARTICULATE FILTERS CONTAINING CHEMICALLY MODIFIED CARBON NANOTUBE STRUCTURES - A carbon nanotube filter. The filter including a filter housing; and chemically active carbon nanotubes within the filter housing, the chemically active carbon nanotubes comprising a chemically active layer formed on carbon nanotubes or comprising chemically reactive groups on sidewalls of the carbon nanotubes; and media containing the chemically active carbon nanotubes. | 05-13-2010 |
20100237389 | DESIGN STRUCTURE FOR HEAVY ION TOLERANT DEVICE, METHOD OF MANUFACTURING THE SAME AND STRUCTURE THEREOF - The invention relates to a design structure, and more particularly, to a design structure for a heavy ion tolerant device, method of manufacturing the same and a structure thereof. The structure includes a first device having a diffusion comprising a drain region and source region and a second device having a diffusion comprising a drain region and source region. The first and second device are aligned in an end-to-end layout along a width of the diffusion of the first device and the second device. A first isolation region separating the diffusion of the first device and the second device. | 09-23-2010 |
20110027951 | SHARED GATE FOR CONVENTIONAL PLANAR DEVICE AND HORIZONTAL CNT - A semiconductor structure in which a planar semiconductor device and a horizontal carbon nanotube transistor have a shared gate and a method of fabricating the same are provided in the present application. The hybrid semiconductor structure includes at least one horizontal carbon nanotube transistor and at least one planar semiconductor device, in which the at least one horizontal carbon nanotube transistor and the at least one planar semiconductor device have a shared gate and the at least one horizontal carbon nanotube transistor is located above a gate of the at least one planar semiconductor device. | 02-03-2011 |
20110088008 | METHOD FOR CONVERSION OF COMMERCIAL MICROPROCESSOR TO RADIATION-HARDENED PROCESSOR AND RESULTING PROCESSOR - A method is provided to convert commercial microprocessors to radiation-hardened processors and, more particularly, a method is provided to modify a commercial microprocessor for radiation hardened applications with minimal changes to the technology, design, device, and process base so as to facilitate a rapid transition for such radiation hardened applications. The method is implemented in a computing infrastructure and includes evaluating a probability that one or more components of an existing commercial design will be affected by a single event upset (SEU). The method further includes replacing the one or more components with a component immune to the SEU to create a final device. | 04-14-2011 |
20110266621 | FIELD EFFECT TRANSISTOR - A transistor. The transistor including: a well region in a substrate; a gate dielectric layer on a top surface of the well region; a polysilicon gate electrode on a top surface of the gate dielectric layer; spacers formed on opposite sidewalls of the polysilicon gate electrode; source/drain regions formed on opposite sides of the polysilicon gate electrode in the well region; a first doped region in the polysilicon gate electrode, the first doped region extending into the polysilicon gate electrode from a top surface of the polysilicon gate electrode; and a buried second doped region in the polysilicon gate electrode. | 11-03-2011 |
20120042298 | STRUCTURE HAVING SUBSTANTIALLY PARALLEL RESISTOR MATERIAL LENGTHS - A design structure including a pair of substantially parallel resistor material lengths separated by a first dielectric are disclosed. The resistor material lengths have a sub-lithographic dimension and may be spacer shaped. | 02-16-2012 |
20120168931 | CARBON NANOTUBE STRUCTURES FOR ENHANCEMENT OF THERMAL DISSIPATION FROM SEMICONDUCTOR MODULES - Disclosed are embodiments of an improved semiconductor wafer structure having protected clusters of carbon nanotubes (CNTs) on the back surface and a method of forming the improved semiconductor wafer structure. Also disclosed are embodiments of a semiconductor module with exposed CNTs on the back surface for providing enhanced thermal dissipation in conjunction with a heat sink and a method of forming the semiconductor module using the disclosed semiconductor wafer structure. | 07-05-2012 |
20140258958 | METHOD FOR CONVERSION OF COMMERCIAL MICROPROCESSOR TO RADIATION-HARDENED PROCESSOR AND RESULTING PROCESSOR - A method is provided to convert commercial microprocessors to radiation-hardened processors and, more particularly, a method is provided to modify a commercial microprocessor for radiation hardened applications with minimal changes to the technology, design, device, and process base so as to facilitate a rapid transition for such radiation hardened applications. The method is implemented in a computing infrastructure and includes evaluating a probability that one or more components of an existing commercial design will be affected by a single event upset (SEU). The method further includes replacing the one or more components with a component immune to the SEU to create a final device. | 09-11-2014 |