Patent application number | Description | Published |
20080203587 | SEMICONDUCTOR DEVICE INCLUDING CONDUCTIVE LINES WITH FINE LINE WIDTH AND METHOD OF FABRICATING THE SAME - A semiconductor device comprises a semiconductor substrate including a first core region and a second core region between which a cell array region is interposed, a first conductive line and a second conductive line extending to the first core region across the cell array region, and a third conductive line and a fourth conductive line extending to the second core region across the cell array region, wherein a line width of the first through fourth conductive lines is smaller than a resolution limit in a lithography process. | 08-28-2008 |
20080296637 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes first gate structures, second gate structures, a first capping layer pattern, a second capping layer pattern, first spacers, second spacers, third spacers, and a substrate having first impurity regions and second impurity regions. The first gate structures are arranged on the substrate at a first pitch. The second gate structures are arranged on the substrate at a second pitch greater than the first pitch. The first capping layer pattern has segments extending along side faces of the first gate structures and segments extending along the substrate. The second capping layer pattern has segments extending along the second gate structures and segments extending along the substrate. The first spacers and the second spacers are stacked on the second capping layer pattern. The third spacers are formed on the first capping layer pattern. | 12-04-2008 |
20110147800 | SEMICONDUCTOR DEVICE INCLUDING CONDUCTIVE LINES WITH FINE LINE WIDTH AND METHOD OF FABRICATING THE SAME - A semiconductor device comprises a semiconductor substrate including a first core region and a second core region between which a cell array region is interposed, a first conductive line and a second conductive line extending to the first core region across the cell array region, and a third conductive line and a fourth conductive line extending to the second core region across the cell array region, wherein a line width of the first through fourth conductive lines is smaller than a resolution limit in a lithography process. | 06-23-2011 |
20150102468 | CHIP-STACKED SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A chip-stacked semiconductor package includes a first chip having a first front surface, a first back surface, and a first connection member on the first front surface, the first back surface being opposite to the first front surface; a second chip having a second front surface, a second back surface, a second connection member and a first through-silicon via (TSV) electrically connected to the second connection member, the second back surface opposite to the second front surface, and the second connection member on the second front face; and a first sealing member between the first front surface and the second front surface, the first sealing member filling a space between the first connection member and the second connection member, the first connection member of the first chip and the second connection member of the second chip being symmetric with respect to each other. | 04-16-2015 |
Patent application number | Description | Published |
20110298288 | ENERGY STORAGE SYSTEM - An energy storage system includes a converter coupled between an inverter and both a power generator and a battery, thereby reducing the number of devices for circuit implementation and the size of a printed circuit board (PCB). The energy storage system is coupled to an electric power system that generates a system power, and the energy storage system includes a battery for generating a battery power and a converter coupleable to a power generator for generating an electric power and the battery in parallel, wherein the converter is configured to boost or drop a voltage of at least one of the electric power, the battery power, or the system power. | 12-08-2011 |
20110299303 | Inverter of new and renewable energy storage system - Provided is an inverter of a renewable energy storage system, which has an input port and an output port electrically insulated, and is compact and low-priced, while having a simplified circuit. The inverter includes a DC-DC converting unit connected to the DC link, and an inverting unit connected between the DC-DC converting unit and the power system, wherein the DC-DC converting unit is an unregulated DC-DC bus converter. | 12-08-2011 |
20110304212 | RENEWABLE ENERGY STORAGE SYSTEM - A bidirectional inverter of a renewable energy storage system is disclosed. In one embodiment, the bidirectional inverter includes a switching unit including a first switch connected to the DC link in series and a second switch connected to the DC link in parallel, an inductor electrically connected to the switching unit, a full-bridge switching unit electrically connected to the inductor, and a controller electrically connected to the switching unit, and the full-bridge switching unit. | 12-15-2011 |
20120013192 | ENERGY STORAGE SYSTEM - An energy storage system has a reduced number of capacitors for storing energy such as renewable energy, thereby reducing cost and improving stability of the system. The energy storage system is configured to store power from a power generating unit, and includes: a storage capacitor having a first end electrically coupled to one end of the power generating unit; a secondary battery having a first terminal electrically coupled to a second end of the storage capacitor, and a second terminal electrically coupled to another end of the power generating unit; and a first converter configured to selectively couple the storage capacitor and the secondary battery to a load. | 01-19-2012 |
Patent application number | Description | Published |
20100131335 | USER INTEREST MINING METHOD BASED ON USER BEHAVIOR SENSED IN MOBILE DEVICE - A method and apparatus for modeling interests of a user based on the user's behavior and surrounding information, according to information sensed in a mobile terminal, are provided. User interest information is extracted from a mobile terminal use record of the user, situation information of the user is extracted from the mobile terminal, and user interest in a corresponding situation is modeled based on the obtained interest information and situation information. | 05-27-2010 |
20100149347 | TERMINAL AND BLOGGING METHOD THEREOF - Disclosed are a terminal and a blogging method thereof. In the blogging method, a preview image displayed through a camera is recognized to acquire information of the preview image. It is determined whether there is a stored blog that has background information that is identical to the information of the preview image, and if a stored blog has background information that is identical to the information of the preview image, contents of the stored blog that uses the preview image as its background are imported and the imported contents are displayed on the preview image. | 06-17-2010 |
20100231507 | METHOD AND APPARATUS FOR PROVIDING CONTENT AND METHOD AND APPARATUS FOR DISPLAYING CONTENT - Provided are a method and apparatus for providing digital content and a method and apparatus for displaying digital content. In the displaying method, method of displaying content in a terminal, situational information including at least one of information regarding a user of the terminal and information regarding an external environment is collected, whether the collected situational information conforms to display conditions of the content is determined, and then, the content is selectively displayed based on a result of the determining. | 09-16-2010 |
20120270568 | METHODS, SYSTEM AND APPARATUS FOR SHARING AND USING LOCATION INFORMATION IN PORTABLE TERMINAL - Methods, apparatus and a system are provided for sharing and using location information in a portable terminal. A setting indicating whether location-information sharing is activated is received for each application of the portable terminal that uses location information. The settings are transmitted to a server. An application for which location-information sharing is activated is executed. A request for sharing of location information with respect to the executed application is transmitted to the server. Location information of a portable terminal in which location-information sharing is activated for the executed application is received from the server. The received location information is processed through the executed application. | 10-25-2012 |
20130339383 | METHOD AND APPARATUS FOR PROVIDING SEMANTIC LOCATION IN ELECTRONIC DEVICE - A location recognition method is provided. The method includes determining location search targets in a DataBase (DB) including location information on the basis of first network information, selecting at least one place from the determined location search targets on the basis of second network information, measuring a relative distance by using first signal strength and second signal strength with respect to the selected at least one place, and recognizing the selected at least one place as a current location on the basis of the relative distance. Accordingly, various personalized service scenarios can be provided to the user. | 12-19-2013 |
20150026824 | DEVICE AND METHOD FOR PROVIDING USER ACTIVITY INFORMATION IN PORTABLE TERMINAL - A device and a method for providing user activity information in a portable terminal are provided. The method includes receiving and storing log data from a specific application, generating user situation information representing a current status of a user based on the stored log data, and transmitting the generated user situation information to the specific application. | 01-22-2015 |
Patent application number | Description | Published |
20100220105 | Image Processors, Electronic Device Including the Same, and Image Processing Methods - An image processor for combining video data and graphic data is provided. The image processor includes a scaler that is configured to scale compressed graphic data in a horizontal direction using bilinear scaling, to scale a horizontally scaled graphic data in a vertical direction using line copy, and to process a data value of a pixel at a border of a vertically scaled graphic data based on a data value of the compressed graphic data and a data combiner that is configured to combine video data with processed graphic data output from the scaler. | 09-02-2010 |
20100309237 | METHOD AND DEVICE FOR DRIVING A PLURALITY OF DISPLAY DEVICES - A device includes a plurality of display modules configured to commonly receive a stream of video data from a controller and a video control masking unit. Each display module includes a display device. The video control masking unit receives one or more control signals that indicate how the video data is to be displayed by the display modules, and further receives at least one of: a clock signal for clocking the stream of video data that is provided in common to the plurality of display modules, and a data enable signal for enabling the display modules to process the video data; and in response thereto the video control masking unit masks at least one of the clock signal and the data enable signal to generate a plurality of masked signals each corresponding to one of the display modules, and provides each of the masked signals to the corresponding display module. | 12-09-2010 |
20110102465 | IMAGE PROCESSOR, ELECTRONIC DEVICE INCLUDING THE SAME, AND IMAGE PROCESSING METHOD - An image processor includes a rotation block and a scaler which share a line buffer block with each other. The image processor receives rearranged pixel data from a memory unit based on rotation information for generating a rotated image and performs scaling on the rearranged pixel data. | 05-05-2011 |
20110109766 | CAMERA MODULE FOR REDUCING SHUTTER DELAY, CAMERA INCLUDING THE SAME, AND METHOD OF DRIVING THE SAME - A camera module includes an image sensor configured to convert an optical signal received through a lens into an electrical signal and generate full-size image data, an image signal processing unit configured to calibrate and output the full-size image data, a first memory unit configured to periodically receive and store the full-size image data from the image signal processing unit, a scaling unit configured to scale down the full-size image data received from the first memory unit and periodically output scaled-down image data to a display device, and an encoder configured to receive the full-size image data stored in the first memory unit, convert it into a compressed file in a predetermined format, and output the compressed file upon opening of a shutter. | 05-12-2011 |
20110242412 | Display Controller, Method For Operating The Display Controller, And Display System Having The Display Controller - The display controller includes a decoder, a control circuit, and a video output logic circuit. The decoder is configured to decode a first display command and output a decoding signal and first synchronizing information indicating the first display command is received. The control circuit is configured to generate a first control signal based on second synchronizing information and the decoding signal. The second synchronizing information is output from a second display controller and indicates a second display command is received. The video output logic circuit is configured to send a part of video data stored in a video source and a plurality of first timing control signals for displaying the part of the video data on a display to the display based on the first control signal. | 10-06-2011 |
20110276735 | INTERCONNECT, BUS SYSTEM WITH INTERCONNECT AND BUS SYSTEM OPERATING METHOD - Provided are an interconnect, a bus system with interconnect, and bus system operating method. The bus system includes a master, slaves access by the master, and an interconnect. The interconnect connects the master with the slaves in response to selection bits identified in a master address provided by the master. | 11-10-2011 |
20120075262 | UNDER-RUN COMPENSATION CIRCUIT, METHOD THEREOF, AND APPARATUSES HAVING THE SAME - An under-run compensation circuit is provided. The under-run compensation circuit is configured to receive a clock signal, data, and an under-run detection signal that indicates whether or not an under-run is occurring. The under-run compensation circuit is further configured to output the clock signal and the data when receiving the under-run detection signal that indicates that an under-run is not occurring. The under-run compensation circuit is additionally configured to output the clock signal and dummy data when receiving the under- run detection signal that indicates that an under-run is occurring. | 03-29-2012 |
20120194512 | THREE-DIMENSIONAL IMAGE DATA DISPLAY CONTROLLER AND THREE-DIMENSIONAL IMAGE DATA DISPLAY SYSTEM - A display controller can include a blending coefficient storing unit and an image mixing unit. The blending coefficient storing unit can store blending coefficients. The image mixing unit can receive left-eye image data and right-eye image data, and generate three-dimensional image data by performing a blending operation on the left-eye image data and the right-eye image data using the blending coefficients stored in the blending coefficient storing unit. | 08-02-2012 |
20120195503 | IMAGE PROCESSING DEVICE - An image processing device includes a first image enhancer and a second image enhancer. The first image enhancer receives first image data and generates first image enhancement information by analyzing the first image data. The second image enhancer receives second image data and generates second image enhancement information by analyzing the second image data. The first image enhancer converts the first image data into first enhanced image data based on the first image enhancement information and the second image enhancement information. The second image enhancer converts the second image data into second enhanced image data based on the first image enhancement information and the second image enhancement information. | 08-02-2012 |
20120242707 | METHOD FOR PROCESSING IMAGE AND EVICES USING THE METHOD - A scaler is provided and includes filters each receiving input pixel data and scaling the input pixel data using a scaling factor to generate a scaled pixel value, and a plurality of mixers, less than the plurality of filters. A first mixer performs a first blending operation on a first scaled pixel value and a second scaled pixel value provided by different filters. A second mixer performs a second blending operation on the blended result of the first mixer and a third scaled pixel value provided by anther filter. | 09-27-2012 |
20130073762 | SYSTEM ON CHIP, ELECTRONIC SYSTEM INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME - A system-on-chip (SoC), an electronic system including the same, and a method of operating the same are provided. The method includes setting real-time information indicating whether a master block is a real-time block in a real-time information register of the master block. A weight is set in a weight register of the master block. Buffer information of the master block is checked. A quality-of-service (QoS) signal is generated using the buffer information and the weight. A priority of the master block to use the bus is determined based on the QoS signal. | 03-21-2013 |
20130093761 | DISPLAY CONTROLLER AND RELATED METHOD OF OPERATION - A display controller comprises a merger and an alpha blender. The merger is configured to mix a first left frame comprising first left pixel data and a first right frame comprising first right pixel data based on a three-dimensional (3D) display format, and further configured and to output a first mixed frame and a second mixed frame. The alpha blender is configured to blend the first mixed frame and the second mixed frame to produce a first blended frame. | 04-18-2013 |
20130155036 | DEVICES AND METHOD OF ADJUSTING SYNCHRONIZATION SIGNAL PREVENTING TEARING AND FLICKER - A display controller includes a synchronization signal adjusting circuit, which adjusts at least one of the delay and the pulse width of a synchronization signal generated in a display driver and outputs an adjusted synchronization signal, and a transmission timing control circuit configured to control the transmission timing of display data, which will be transmitted to the display driver, in response to the adjusted synchronization signal. | 06-20-2013 |
20140028692 | SYSTEM ON CHIP AND ELECTRONIC SYSTEM INCLUDING THE SAME - A system on chip (SoC) includes a first display subsystem configured to perform first and second imaging functions and a second display subsystem configured to only perform the first imaging function. The SoC is configured to activate one of the display subsystems and deactivate the other display subsystem based on a comparison of a current frame of image data and a previous frame of image data. | 01-30-2014 |
20140078198 | METHODS AND DEVICES FOR CONTROLLING OPERATIONS OF AN ORGANIC LIGHT-EMITTING DIODE DISPLAY - In one example embodiment, a method of operating an image data processing circuit which controls an operation of an organic light-emitting diode (OLED) display includes transforming at least one first RGB value into at least one luminance value and at least one chroma value. The method further includes adjusting the at least one luminance value and the at least one chroma value based on at least one first control value. The method further includes generating at least one second RGB value based on the at least one adjusted luminance value and the at least one adjusted chroma value. The method further includes outputting the second RGB values to the OLED display. | 03-20-2014 |
20140201407 | INTERCONNECT, BUS SYSTEM WITH INTERCONNECT AND BUS SYSTEM OPERATING METHOD - Provided are an interconnect, a bus system with interconnect, and bus system operating method. The bus system includes a master, slaves access by the master, and an interconnect. The interconnect connects the master with the slaves in response to selection bits identified in a master address provided by the master. | 07-17-2014 |
20140218378 | SYSTEM ON CHIP FOR UPDATING PARTIAL FRAME OF IMAGE AND METHOD OF OPERATING THE SAME - A system on chip (SoC) and a method of operating the same are provided. The SoC includes a central processing unit (CPU) controlling a memory operation and a display operation on a current frame of an image based on generation of the image and an interrupt signal; an image generator requesting data of the current frame from a memory according to control of the CPU; a UD unit determining whether the current frame is updated, detecting whether an update region is a partial frame based on virtual addresses included in a request of the image generator, and outputting the interrupt signal corresponding to the update region to the CPU; a memory controller storing the update region in the memory according to the control of the CPU; and a display controller accessing the memory and outputting the update region to a display device according to the control of the CPU. | 08-07-2014 |
20150062111 | SYSTEMS, SYSTEM COMPONENTS AND METHODS FOR OPERATING THE SAME - In one embodiment, the converter is configured to receive a first sync signal from a display driver and to convert the first sync signal into a second sync signal. The second sync signal is for controlling image sensing. | 03-05-2015 |
20150213787 | DISPLAY CONTROLLER AND DISPLAY SYSTEM INCLUDING THE SAME - A display controller includes a scaler which is configured to receive a frame image, scale up the frame image to generate a high resolution frame image based on a quality of the frame image and information about a display device, and output the frame image or the high resolution frame image to the display device for display. A method of controlling image display includes: receiving a frame image; determining whether to scale up the frame image to generate a high resolution frame image based on a quality of the frame image and information about a display device; scaling up the frame image according to a result of the determining; and outputting the frame image or the high resolution frame image for display at the display device. | 07-30-2015 |
20150228088 | DISPLAY DEVICE AND METHOD FOR IMAGE UPDATE OF THE SAME - Provided are a display device and a method for updating an image of the same. The display device includes a display unit, a processing unit for compressing both image data corresponding to an updated region of the display unit and image data corresponding to a peripheral region adjacent to the updated region together and generating compressed image data, and a display driving unit for receiving the compressed image data and decompressing the image data, wherein the display unit displays an image corresponding to the updated region by the decompressed image data. | 08-13-2015 |
20150294647 | DISPLAY SYSTEM - A display system is provided. The display system includes a perframe controller configured to receive a frame synchronization signal and to change values of M and N in synchronization with at least one pulse of the frame synchronization signal, where M and N are natural numbers; and a fractional divider configured to generate and output a pixel clock signal by dividing an input clock signal by a division ratio of N/M. | 10-15-2015 |
20160055830 | HOST AND MULTI-DISPLAY SYSTEM INCLUDING THE SAME - A system on chip (SoC) for transmitting data packets to a display driver integrated circuit (IC) controlling a plurality of displays is provided. The SoC includes a first register, and a central processing unit (CPU) configured to set first values in the first register to adjust a frame rate of each of the displays. A tearing effect (TE) signal detection circuit is configured to detect a TE signal output from the display driver IC. A data transmission circuit is configured to generate a plurality of frame rate adjustment signals using the detected TE signal and the first values and to control transmission timings of the data packets transmitted to the displays using the frame rate adjustment signals. | 02-25-2016 |
20160063939 | DISPLAY PANEL CONTROLLER AND DISPLAY DEVICE INCLUDING THE SAME - A display panel controller includes a display driver integrated circuit that drives a display panel to display a still image at a predetermined frame rate, an application processor that provides the display driver integrated circuit with still image data for implementing the still image and a plurality of control signals generated by a timing controller, and a synchronization controller that controls a frame synchronization of the display panel based on a minimum refresh rate of the display panel. | 03-03-2016 |
20160093024 | APPLICATION PROCESSOR FOR DETERMINING DATA TRANSMISSION ORDER BASED ON POSITION OF DISPLAY AND DEVICES INCLUDING THE SAME - A portable electronic device comprises a double-sided display including a first display side and a second display side formed on a side opposite the first display side; a direct memory access (DMA) controller configured to read first image data from a memory; at least one sensor configured to detect at least one of a position change of the double-sided display and a movement of a user's pupil and to output a detection signal; a status signal generator configured to interpret the detection signal output and to output a status signal; a transmission order determiner configured to receive the first image data from the DMA controller, to determine a transmission order of the first image data based on the status signal, and to output second image data corresponding to the determined transmission order; and a display driver integrated circuit (IC) configured to transmit the second image data to the display. | 03-31-2016 |
Patent application number | Description | Published |
20130284987 | THERMOELECTRIC MATERIAL WITH IMPROVED IN FIGURE OF MERIT AND METHOD OF PRODUCING SAME - A nanocomposite including: a thermoelectric material nanoplatelet; and a metal nanoparticle disposed on the thermoelectric material nanoplatelet. | 10-31-2013 |
20140137916 | THERMOELECTRIC MATERIAL, THERMOELECTRIC ELEMENT AND MODULE INCLUDING THE SAME, AND METHOD OF PREPARING THE THERMOELECTRIC MATERIAL - A thermoelectric material including a 3-dimensional nanostructure, wherein the 3-dimensional nanostructure includes a 2-dimensional nanostructure connected to a 1-dimensional nanostructure. | 05-22-2014 |
20140174494 | THERMOELECTRIC MATERIAL, THERMOELECTRIC ELEMENT AND APPARATUS INCLUDING THE SAME, AND PREPARATION METHOD THEREOF - A thermoelectric material including a compound represented by Formula 1: | 06-26-2014 |
20140342488 | Preparation Method of Manufacturing Thermoelectric Nanowires Having Core/Shell Structure - Disclosed is a preparation method of manufacturing a thermoelectric nanowire having a core/shell structure. The preparation method of thermoelectric nanowire includes preparing a substrate provided with an oxide layer formed thereon, and forming a Bi thin film on the oxide layer, heat treating a structure produced during forming the Bi thin film to induce compressive stress due to differences in coefficients of thermal expansion between the substrate, the oxide layer and the Bi thin film, to grow a Bi single crystal nanowire on the Bi thin film, and cooling the substrate of a structure on which the nanowire is grown to a low temperature, and sputtering a thermoelectric material on the Bi single crystal nanowire in a cooled state to manufacture a thermoelectric nanowire having a core/shell structure of Bi/thermoelectric material. | 11-20-2014 |
20140352748 | THERMOELECTRIC MATERIAL, THERMOELECTRIC ELEMENT, AND MODULE INCLUDING THE SAME, AND PREPARATION METHOD THEREOF - A thermoelectric material including: a two dimensional nanostructure having a core and a shell on the core. Also, a thermoelectric element and a thermoelectric apparatus including the thermoelectric material, and a method of preparing the thermoelectric material. | 12-04-2014 |
20140352750 | COMPOSITE THERMOELECTRIC MATERIAL, THERMOELECTRIC ELEMENT AND MODULE INCLUDING THE SAME, AND PREPARATION METHOD THEREOF - A composite thermoelectric material comprising a matrix comprising a thermoelectric semiconductor; and a nanoscale heterophase dispersed in the matrix, wherein the thermoelectric semiconductor comprises an element belonging to Group 15 of the Periodic Table of the Elements, and the heterophase comprises a transition metal element. | 12-04-2014 |