Leidel
Chris Leidel, Somerville, MA US
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20140329997 | ACOUSTIC BIOREACTOR PROCESSES - A series of multi-dimensional acoustic standing waves is set up inside a growth volume of a bioreactor. The acoustic standing waves are used to hold a cell culture in place as a nutrient fluid stream flows through the cell culture. Biomolecules produced by the cell culture are collected by the nutrient fluid stream and separated downstream of the cell culture. | 11-06-2014 |
David J. Leidel, Arlington, TX US
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20100154670 | HIGH PERFORMANCE POWDERED METAL MIXTURES FOR SHAPED CHARGE LINERS | 06-24-2010 |
David John Leidel, Arlington, TX US
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20160003600 | AN INITIATOR HAVING AN EXPLOSIVE SUBSTANCE OF A SECONDARY EXPLOSIVE - An initiator comprises: a first explosive substance, wherein the first explosive substance comprises a secondary explosive, and wherein at least the first explosive substance is capable of being initiated. The initiator comprises effectively no primary explosive. The secondary explosive can be a thermally-stable secondary explosive. A method of using an initiator comprises: initiating the initiator. | 01-07-2016 |
Erik Leidel, Heidelberg DE
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20120304165 | METHOD FOR INSTALLING AND SIMULTANEOUSLY UPDATING OPERATING SYSTEM SOFTWARE - A method for installing operating system software on a machine computer for controlling machines includes: | 11-29-2012 |
John Leidel, Mckinney, TX US
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20150324290 | HYBRID MEMORY CUBE SYSTEM INTERCONNECT DIRECTORY-BASED CACHE COHERENCE METHODOLOGY - A system includes a plurality of host processors and a plurality of hybrid memory cube (HMC) devices configured as a distributed shared memory for the host processors. An HMC device includes a plurality of integrated circuit memory die including at least a first memory die arranged on top of a second memory die, and at least a portion of the memory of the memory die is mapped to include at least a portion of a memory coherence directory; and a logic base die including at least one memory controller configured to manage three-dimensional (3D) access to memory of the plurality of memory die by at least one second device, and logic circuitry configured to implement a memory coherence protocol for data stored in the memory of the plurality of memory die. | 11-12-2015 |
John D. Leidel, Mckinney, TX US
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20130332711 | SYSTEMS AND METHODS FOR EFFICIENT SCHEDULING OF CONCURRENT APPLICATIONS IN MULTITHREADED PROCESSORS - Systems and methods which provide a modular processor framework and instruction set architecture designed to efficiently execute applications whose memory access patterns are irregular or non-unit stride as disclosed. A hybrid multithreading framework (HMTF) of embodiments provides a framework for constructing tightly coupled, chip-multithreading (CMT) processors that contain specific features well-suited to hiding latency to main memory and executing highly concurrent applications. The HMTF of embodiments includes an instruction set designed specifically to exploit the high degree of parallelism and concurrency control mechanisms present in the HMTF hardware modules. The instruction format implemented by a HMTF of embodiments is designed to give the architecture, the runtime libraries, and/or the application ultimate control over how and when concurrency between thread cache units is initiated. For example, one or more bit of the instruction payload may be designated as a context switch bit (CTX) for expressly controlling context switching. | 12-12-2013 |
20150324319 | INTERCONNECT SYSTEMS AND METHODS USING HYBRID MEMORY CUBE LINKS - System on a Chip (SoC) devices include two packetized memory busses for conveying local memory packets and system interconnect packets. In an in-situ configuration of a data processing system two or more SoCs are coupled with one or more hybrid memory cubes (HMCs). The memory packets enable communication with local HMCs in a given SoC's memory domain. The system interconnect packets enable communication between SoCs and communication between memory domains. In a dedicated routing configuration each SoC in a system has its own memory domain to address local HMCs and a separate system interconnect domain to address HMC hubs, HMC memory devices, or other SoC devices connected in the system interconnect domain. | 11-12-2015 |
20150356022 | VIRTUAL ADDRESS TABLE - The present disclosure includes apparatuses and methods related to virtual address tables. An example method comprises generating an object file that comprises: an instruction comprising a number of arguments; and an address table comprising a number of indexed address elements. Each one of the number of indexed address elements can correspond to a virtual address of a respective one of the number of arguments, wherein the address table can serves as a target for the number of arguments. The method can include storing the object file in a memory. | 12-10-2015 |
20160098209 | MULTIDIMENSIONAL CONTIGUOUS MEMORY ALLOCATION - The present disclosure is related to multidimensional contiguous memory allocation. Multidimensional contiguous memory allocation can include receiving an allocation request for an amount of memory that is contiguous in a multiple dimensions of the memory and determining whether the memory includes a region corresponding to the requested amount that is a candidate as being unallocated based on information indicating a maximum number of contiguous unallocated allocable portions of the memory. In response to determining that the memory includes the candidate region, the method can include determining whether the candidate region is unallocated based on a subset of information indicating whether each allocable portion of the memory is allocated. The subset of information corresponds to the candidate region only. | 04-07-2016 |
Martin Leidel, Miesbach DE
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20080200808 | DISPLAYING ANATOMICAL PATIENT STRUCTURES IN A REGION OF INTEREST OF AN IMAGE DETECTION APPARATUS - A method and device for detecting and displaying an anatomical patient structure in a region of interest of a movable image detection apparatus such as an ultrasound probe. After the region of interest is defined in a patient coordinate system, movement of the image detection apparatus can be tracked, and the position of the region of interest can be changed or shifted to compensate for the movement of the image detection apparatus. | 08-21-2008 |
20090093702 | DETERMINING AND IDENTIFYING CHANGES IN THE POSITION OF PARTS OF A BODY STRUCTURE - The present invention relates to a method for determining and/or identifying a change in the position of a part of a body structure relative to a marker device by means of a data processing device, comprising the steps of: | 04-09-2009 |
Matthew Leidel, Wind Lake, WI US
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20160138916 | LEVEL - A level includes a frame having a top planar surface, a bottom planar surface, and a web coupling the top planar surface to the bottom planar surface. The top planar surface and the bottom planar surface are parallel. The level further includes a vial supported by the frame. The vial has a longitudinal axis passing through a center of the vial and a body defining an interior containing a liquid and an indicator bubble. The level further includes a plurality of LEDs. Each of the LEDs has a light emitting point, and each of the plurality of LEDs is positioned adjacent an end of the vial and is oriented such that the light emitting point is positioned within the interior of the body of the vial. | 05-19-2016 |
Udo Leidel, Worms DE
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20130165689 | PROCESS FOR PREPARING ONE OR MORE COMPLEXING AGENTS SELECTED FROM METHYLGLYCINEDIACETIC ACID, GLUTAMIC ACID DIACETIC ACID AND SALTS THEREOF - Process for preparing one or more complexing agents selected from methylglycinediacetic acid, glutamic acid diacetic acid and salts thereof | 06-27-2013 |