Satoru
Kudo Satoru, Tokyo JP
Patent application number | Description | Published |
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20100291423 | ELECTRIC STORAGE DEVICE - A substantially U-shaped sealing strip and a sealing strip are formed on an outer container of the electric storage device as first sealing strips by heat sealing processing so as to surround an electrode housing portion. Further, a safety valve portion having a narrower sealing width than other sites is formed in the center of the substantially U-shaped sealing strip. Furthermore, a second sealing strip is formed on the outer container to oppose the safety valve portion at a predetermined distance. When an internal pressure of the electrode housing portion exceeds a prescribed value due to overcharge, etc., a sealing surface of the safety valve portion peels away, thereby opening the safety valve portion such that gas in the electrode housing portion is discharged from the opened safety valve portion. Electrode material and an electrolyte are also discharged, but trapped by the second sealing strip. | 11-18-2010 |
Matsumoto Satoru, Seongnam-Si KR
Patent application number | Description | Published |
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20100008006 | POWER DEVICE AND SAFETY CONTROL METHOD THEREOF - Disclosed herein are a power device and a safety control method thereof which can detect an abnormal state of a power line. The power device includes a detector to detect current of alternating current (AC) power applied to an electronic appliance, and a controller to compare a value of the detected current with an abnormal current reference value set according to an operation mode of the electronic appliance and interrupt the AC power if the detected current value is larger than the abnormal current reference value. The controller changes the abnormal current reference value according to the operation mode. | 01-14-2010 |
20100122841 | Printed circuit board assembly of electronic appliance - Disclosed herein is a printed circuit board assembly of an electronic appliance including a plurality of boards on which electrical parts to perform functions necessary for the electronic appliance are separately arranged according to the specification of the electronic appliance. The printed circuit board assembly is divided into a plurality of boards, such that electrical parts having a common specification and electrical parts having different specifications are arranged on different boards, thereby optimizing the printed circuit board assembly and configuring the boards according to the specification of the electronic appliance without loss. Microprocessors are arranged on the boards, and the boards are connected to each other in a serial communication, thereby reducing the number of wiring harnesses (W/H) and thus configuring the printed circuit board assembly with high reliability. Furthermore, the boards are connected to each other in an insulation manner, thereby configuring the boards in an anti-resistance structure. | 05-20-2010 |
Yamada Satoru, Seoul KR
Patent application number | Description | Published |
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20100202241 | WORD LINE DRIVING CIRCUIT AND METHOD - A word line driving circuit includes an address decoding signal generating unit and a word line voltage supply unit. The address decoding signal generating unit includes inverter chain receiving and delaying a first address decoding signal and outputting the delayed first address decoding signal. The word line voltage supply unit includes a pull-up driver that supplies the delayed first address signal to a selected word line in response to a second address decoding signal. The inverter chain includes an NMOS transistor outputting the delayed first address signal and a source terminal of the NMOS transistor receives a set voltage that is higher than a ground voltage and lower than a high voltage. | 08-12-2010 |
20110124173 | Method of Manufacturing Semiconductor Device - Methods of manufacturing a semiconductor device include forming a gate electrode on a semiconductor substrate, forming spacers on side walls of the gate electrode, and doping impurities into the semiconductor substrate on both sides of the spacers to form highly doped impurity regions. The spacers are selectively etched to expose portions of the semiconductor substrate, and more lightly doped impurity regions are formed in the semiconductor substrate between the highly doped impurity regions and the gate electrode. | 05-26-2011 |