Patent application number | Description | Published |
20090011463 | Pcka Modifications and Enhanced Protein Expression in Bacillus - The present invention provides cells that have been genetically manipulated to have an altered capacity to produce expressed proteins, wherein the pckA gene has been modified or deleted. In particular, the present invention relates to Gram-positive microorganisms, such as | 01-08-2009 |
20090156430 | PROMOTER AND PLASMID SYSTEM FOR GENETIC ENGINEERING - This invention provides a series of low-copy number plasmids comprising restriction endonuclease recognition sites useful for cloning at least three different genes or operons, each flanked by a terminator sequence, the plasmids containing variants of glucose isomerase promoters for varying levels of protein expression. The materials and methods are useful for genetic engineering in microorganisms, especially where multiple genetic insertions are sought. | 06-18-2009 |
20110046014 | PROMOTER AND PLASMID SYSTEM FOR GENETIC ENGINEERING - This invention provides a series of low-copy number plasmids comprising restriction endonuclease recognition sites useful for cloning at least three different genes or operons, each flanked by a terminator sequence, the plasmids containing variants of glucose isomerase promoters for varying levels of protein expression. The materials and methods are useful for genetic engineering in microorganisms, especially where multiple genetic insertions are sought. | 02-24-2011 |
Patent application number | Description | Published |
20110177774 | DYNAMIC GENERATION, DELIVERY, AND EXECUTION OF INTERACTIVE APPLICATIONS OVER A MOBILE BROADCAST NETWORK - Systems, apparatus and methods provide an automatic capability for generating interactivity event applications for execution on receiver devices within a broadcast network based upon interactivity event application data, information and sequence logic. Interactivity event content providers may provide to a broadcast network interactivity event application data, event metadata information and sequence logic a broadcast network. Such applications may be transmitted via the broadcast network. Transmitted applications may be activated in receiver devices in response to receiving a signal from a real-time broadcast stream. Activation signals may be used to synchronize application activation with an event in a media program so downloaded applications may be activated in synchrony with broadcast programs. Interactive applications may be dynamically generated at run time. Multiple interactive applications may be generated from a same set of interactivity application data, each targeting different types of devices. Signaling mechanisms may signal multiple return unicast channels for user responses. | 07-21-2011 |
20140024331 | METHODS AND APPARATUS FOR INCREASING EMERGENCY CALL SUCCESS RATE BY REDUCING RETRIES IN THE SAME DOMAIN - Certain aspects of the present disclosure relate to techniques for increasing the emergency call success rate by reducing the number of retries in a same domain. According to one aspect, a multi-mode user equipment may measure a first time period upon a first attempt of establishing an emergency call in a first RAT network. The UE may use a configurable parameter to determine a number of times that the UE may retry the emergency call in the first RAT network after expiration of the first time period without establishing the emergency call or after a failed attempt of the emergency call during the first time period. The UE may switch to a second RAT network if the UE fails in establishing the emergency call in the first RAT network after retrying the determined number of times. | 01-23-2014 |
20150063227 | METHOD AND APPARATUS FOR PROCESSING EMERGENCY CALLS - A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus initiates a call attempt in an internet protocol multimedia subsystem (IMS) based on a dialed number, the dialed number including an emergency number. The apparatus receives a session initiation protocol (SIP) message in response to the call attempt. The apparatus determines in response to the SIP message whether to retry the call attempt as a normal call in a circuit-switched (CS) domain for an operator or as an emergency call in the CS domain for the operator. In an aspect, the determining is based at least in part on either an indication in the SIP message or on a characteristic of the operator. | 03-05-2015 |
20150065143 | ENHANCE PERFORMANCE OF MAKING AN EMERGENCY CALL DURING RADIO LINK FAILURE OVER RADIO ACCESS TECHNOLOGY - Methods, systems, apparatuses and devices are described for managing a call during radio link failure. In one embodiment, radio link failure over a radio access technology may be detected during or after a call setup procedure. A public land mobile network and an equivalent public land mobile network may be selected. An initial search for cells of the radio access technology may be performed over the selected public land mobile network and the equivalent public land mobile network. The initial search may be performed once or twice based on a configurable parameter. | 03-05-2015 |
Patent application number | Description | Published |
20100200537 | Nano-patterned metal electrode for solid oxide fuel cell - The current invention provides a method of fabricating nano-pore structured dense Pt electrodes using particle masking and LB deposition methods. The pore size and TPB density are easily tunable by changing initial size of the masking silica particles and the spacing between them. Compared to the solid oxide fuel cell MEAs with porous Pt electrode deposited by conventional DC sputtering method, fuel cell MEAs with the nano structured electrodes fabricated according to the current invention showed thermal and microstructural stability and superior I-V performance at 400˜450° C. Also, EIS spectra showed significant improvement in the oxygen reduction kinetics by increasing the density of charge transfer sites at the TPB. A nearly linear scaling relationship between TPB density and fuel cell performance was also demonstrated. | 08-12-2010 |
20110076589 | Nano-patterned electrolytes in solid oxide fuel cells - A nano-patterned membrane electrode assembly (MEA) is provided, which includes an electrolyte membrane layer having a three-dimensional close-packed array of hexagonal-pyramids, a first porous electrode layer, disposed on a top surface of the electrolyte membrane layer that conforms to a top surface-shape of the three-dimensional close-packed array of hexagonal-pyramids, and a second porous electrode layer disposed on a bottom surface of said electrolyte membrane layer that conforms to a bottom surface-shape of the three-dimensional close-packed array of hexagonal-pyramids, where a freestanding nano-patterned MEA is provided. | 03-31-2011 |
20110095389 | Optoelectronic Semiconductor Device and Method of Fabrication - An optoelectronic device comprising an optically active layer that includes a plurality of domes is presented. The plurality of domes is arrayed in two dimensions having a periodicity in each dimension that is less than or comparable with the shortest wavelength in a spectral range of interest. By virtue of the plurality of domes, the optoelectronic device achieves high performance. A solar cell having high energy-conversion efficiency, improved absorption over the spectral range of interest, and an improved acceptance angle is presented as an exemplary device. | 04-28-2011 |
20110121431 | Substrate Comprising a Nanometer-scale Projection Array - A method for forming a substrate comprising nanometer-scale pillars or cones that project from the surface of the substrate is disclosed. The method enables control over physical characteristics of the projections including diameter, sidewall angle, and tip shape. The method further enables control over the arrangement of the projections including characteristics such as center-to-center spacing and separation distance. | 05-26-2011 |
20140080308 | RADICAL-COMPONENT OXIDE ETCH - A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents combine with a nitrogen-and-hydrogen-containing precursor. Reactants thereby produced etch the patterned heterogeneous structures with high silicon oxide selectivity while the substrate is at high temperature compared to typical Siconi™ processes. The etch proceeds without producing residue on the substrate surface. The methods may be used to remove silicon oxide while removing little or no silicon, polysilicon, silicon nitride or titanium nitride. | 03-20-2014 |
20140154889 | DRY-ETCH FOR SELECTIVE TUNGSTEN REMOVAL - Methods of selectively etching tungsten relative to silicon-containing films (e.g. silicon oxide, silicon carbon nitride and (poly)silicon) as well as tungsten oxide are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H | 06-05-2014 |
20140179111 | SELECTIVE TITANIUM NITRIDE ETCHING - Methods of etching exposed titanium nitride with respect to other materials on patterned heterogeneous structures are described, and may include a remote plasma etch formed from a fluorine-containing precursor. Precursor combinations including plasma effluents from the remote plasma are flowed into a substrate processing region to etch the patterned structures with high titanium nitride selectivity under a variety of operating conditions. The methods may be used to remove titanium nitride at faster rates than a variety of metal, nitride, and oxide compounds. | 06-26-2014 |
20140199850 | DRY-ETCH FOR SELECTIVE OXIDATION REMOVAL - Methods of selectively etching tungsten oxide relative to tungsten, silicon oxide, silicon nitride and/or titanium nitride are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H | 07-17-2014 |
20140262038 | PROCESSING SYSTEMS AND METHODS FOR HALIDE SCAVENGING - Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools. | 09-18-2014 |
20140271097 | PROCESSING SYSTEMS AND METHODS FOR HALIDE SCAVENGING - Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools. | 09-18-2014 |
20140273406 | PROCESSING SYSTEMS AND METHODS FOR HALIDE SCAVENGING - Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools. | 09-18-2014 |
20140273481 | PROCESSING SYSTEMS AND METHODS FOR HALIDE SCAVENGING - Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools. | 09-18-2014 |
20140273488 | PROCESSING SYSTEMS AND METHODS FOR HALIDE SCAVENGING - Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools. | 09-18-2014 |
20140273489 | PROCESSING SYSTEMS AND METHODS FOR HALIDE SCAVENGING - Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools. | 09-18-2014 |
Patent application number | Description | Published |
20100086863 | LITHOGRAPHIC PROCESSING METHOD, AND DEVICE MANUFACTURED THEREBY - A method of splitting a lithographic pattern into two sub-patterns, includes generating test structures corresponding to structures of interest in the lithographic pattern, varying the test structures through a selected range of dimensions, simulating an image of the test structures, determining an image quality metric for the simulated image, analyzing the determined image quality metric to determine pitch ranges for which split improves the image quality metric and ranges for which split does not improve the image quality metric, and generating the two sub-patterns in accordance with the determined pitch ranges. | 04-08-2010 |
20100221669 | METHOD, PROGRAM PRODUCT AND APPARATUS FOR PERFORMING DOUBLE EXPOSURE LITHOGRAPHY - A method of generating complementary masks based on a target pattern having features to be imaged on a substrate for use in a multiple-exposure lithographic imaging process. The method includes the steps of: defining an initial H-mask corresponding to the target pattern; defining an initial V-mask corresponding to the target pattern; identifying horizontal critical features in the H-mask having a width which is less than a predetermined critical width; identifying vertical critical features in the V-mask having a width which is less than a predetermined critical width; assigning a first phase shift and a first percentage transmission to the horizontal critical features, which are to be formed in the H-mask; and assigning a second phase shift and a second percentage transmission to the vertical critical features, which are to be formed in the V-mask. The method further includes the step of assigning chrome to all non-critical features in the H-mask and the V-mask. The non-critical features are those features having a width which is greater than or equal to the predetermined critical width. The non-critical features are formed in the H-mask and the V-mask utilizing chrome. The target pattern is then imaged on the substrate by imaging both the H-mask and V-mask. | 09-02-2010 |
20110014552 | Method and Apparatus for Performing Dark Field Double Dipole Lithography (DDL) - A method of generating complementary masks for use in a dark field double dipole imaging process. The method includes the steps of identifying a target pattern having a plurality of features, including horizontal and vertical features; generating a horizontal mask based on the target pattern, where the horizontal mask includes low contrast vertical features. The generation of the horizontal mask includes the steps of optimizing the bias of the low contrast vertical features contained in the horizontal mask; and applying assist features to the horizontal mask. The method further includes generating a vertical mask based on the target pattern, where the vertical mask contains low contrast horizontal features. The generation of the vertical mask includes the steps of optimizing the bias of low contrast horizontal features contained in the vertical mask; and applying assist features to the vertical mask. | 01-20-2011 |
20110236808 | Method and Apparatus for Performing Dark Field Double Dipole Lithography (DDL) - A method of generating complementary masks for use in a dark field double dipole imaging process. The method includes the steps of identifying a target pattern having a plurality of features, including horizontal and vertical features; generating a horizontal mask based on the target pattern, where the horizontal mask includes low contrast vertical features. The generation of the horizontal mask includes the steps of optimizing the bias of the low contrast vertical features contained in the horizontal mask; and applying assist features to the horizontal mask. The method further includes generating a vertical mask based on the target pattern, where the vertical mask contains low contrast horizontal features. The generation of the vertical mask includes the steps of optimizing the bias of low contrast horizontal features contained in the vertical mask; and applying assist features to the vertical mask. | 09-29-2011 |
20110318927 | Multiple Patterning Lithography Using Spacer and Self-Aligned Assist Patterns - The present invention relates to lithographic apparatuses and processes, and more particularly to multiple patterning lithography for printing target patterns beyond the limits of resolution of the lithographic apparatus. Self-aligned assist pattern (SAP) is derived from original design layout in an automated manner using geometric Boolean operations based on some predefined design rules, and are included in the mask layout for efficient self-alignment of various sub-layouts of the target pattern during a multiple patterning lithography process. SAP can be of any shape and size, and can have continuous features (e.g., a ring), or discontinuous (e.g., bars not connected to each other) features. An end-to-end multiple patterning lithography using spacer and SAP may use positive tone lithography, and/or negative tone lithography for line and/or space printing. | 12-29-2011 |
20120122023 | Method and Apparatus for Performing Model-Based OPC for Pattern Decomposed Features - A method for decomposing a target circuit pattern containing features to be imaged into multiple patterns. The process includes the steps of separating the features to be printed into a first pattern and a second pattern; performing a first optical proximity correction process on the first pattern and the second pattern; determining an imaging performance of the first pattern and the second pattern; determining a first error between the first pattern and the imaging performance of the first pattern, and a second error between the second pattern and the imaging performance of said second pattern; utilizing the first error to adjust the first pattern to generate a modified first pattern; utilizing the second error to adjust the second pattern to generate a modified second pattern; and applying a second optical proximity correction process to the modified first pattern and the modified second pattern. | 05-17-2012 |
20120208113 | Lithographic Processing Method, and Device Manufactured Thereby - A method of splitting a lithographic pattern into two sub-patterns, includes generating test structures corresponding to structures of interest in the lithographic pattern, varying the test structures through a selected range of dimensions, simulating an image of the test structures, determining an image quality metric for the simulated image, analyzing the determined image quality metric to determine pitch ranges for which split improves the image quality metric and ranges for which split does not improve the image quality metric, and generating the two sub-patterns in accordance with the determined pitch ranges. | 08-16-2012 |
20130055171 | Method, Program Product and Apparatus for Performing Double Exposure Lithography - A method of generating complementary masks based on a target pattern having features to be imaged on a substrate for use in a multiple-exposure lithographic imaging process is disclosed. The method includes defining an initial H-mask and an initial V-mask corresponding to the target pattern; identifying horizontal critical features in the H-mask and vertical critical features in the V-mask; assigning a first phase shift and a first percentage transmission to the horizontal critical features, which are to be formed in the H-mask; and assigning a second phase shift and a second percentage transmission to the vertical critical features, which are to be formed in the V-mask. The method further includes the step of assigning chrome to all non-critical features in the H-mask and the V-mask. | 02-28-2013 |
20130182940 | Method and Apparatus for Performing Model-Based OPC for Pattern Decomposed Features - A method for decomposing a target circuit pattern containing features to be imaged into multiple patterns. The process includes the steps of separating the features to be printed into a first pattern and a second pattern; performing a first optical proximity correction process on the first pattern and the second pattern; determining an imaging performance of the first pattern and the second pattern; determining a first error between the first pattern and the imaging performance of the first pattern, and a second error between the second pattern and the imaging performance of said second pattern; utilizing the first error to adjust the first pattern to generate a modified first pattern; utilizing the second error to adjust the second pattern to generate a modified second pattern; and applying a second optical proximity correction process to the modified first pattern and the modified second pattern. | 07-18-2013 |
Patent application number | Description | Published |
20110296239 | SYSTEM FOR HANDLING STORAGE SYSTEM REQUESTS - A file storage system that uses a server to communicate between a client and a storage system. The server receives a file storage request pertaining to a file, generates and stores a file record for the request and forwards the request to a file storage system. The server performs either an internal retry or forwards a no-file response from the storage system to the client computer in response to receiving a no-file file status from the storage system depending on an amount of elapsed time from the time the server initially receives the file storage request. | 12-01-2011 |
20110296240 | EFFICIENT METHOD FOR HANDLING STORAGE SYSTEM REQUESTS - A method of storing and retrieving digital files from a storage system comprising requesting one or more files through a server which compares the timestamp of each file to the present time to determine an elapsed time for each file. The server then requests a storage system for each file having an elapsed time less than or equal to a pre-determined time limit using an internal-retry request and requests from the storage system each file having an elapsed time greater than a pre-determined time limit using a fail-fast request. | 12-01-2011 |
20120323988 | TASK ALLOCATION IN A COMPUTER NETWORK - A method of allocating computing tasks in a communication network comprises providing a server that sends a request with an expiration time over the network to one or more processor computers for an allocation of a processing task to be performed by the server computer. The server computer performs the allocated processing task to completion if it's received within the expiration time and only if a higher priority task is not received before processing is completed. | 12-20-2012 |
20120324095 | IMAGE PROCESSING IN A COMPUTER NETWORK - A method of allocating computing tasks in a computer network when servers receive processing tasks that are unequally distributed among the server computers. A task-available message is sent over the computer network from a server having a heavy task load to the other server computers. The task-available message is processed by at least one of the other server computer by requesting a task. | 12-20-2012 |
20120324096 | IMAGE PROCESSING IN A COMPUTER NETWORK - A plurality of server computers connected to computer network processes tasks that are unequally distributed among the server computers. A server sends a task-available message over the computer network to the remaining server computers to request assistance. The received task-available message is processed by some of the servers while others of the servers do not process the message because they are too busy. The servers that process the message respond by requesting a task from the message sending server. | 12-20-2012 |
20120324111 | TASK ALLOCATION IN A COMPUTER NETWORK - Server computers send requests over a network for an allocation of server tasks and processing tasks, the processing task requests having an associated expiration time. The plurality of server computers process received server tasks provided to the server computers in response to the requests, and process processing tasks within the expiration time in response to the requests for processing tasks. The server computers perform the allocated processing tasks only if there are no pending server tasks. | 12-20-2012 |
Patent application number | Description | Published |
20100240590 | PEPTIDES AND RELATED MOLECULES THAT BIND TO TALL-1 - The present invention concerns therapeutic agents that modulate the activity of TALL-1. In accordance with the present invention, modulators of TALL-1 may comprise an amino acid sequence Dz | 09-23-2010 |
20100254975 | ALPHA-4 BETA-7 HETERODIMER SPECIFIC - There are disclosed alpha4beta7 heterodimer-specific antigen binding proteins, nucleic acids encoding them, and methods of making and using them. | 10-07-2010 |
20120177662 | ALPHA-4-BETA-7 HETERODIMER SPECIFIC ANTAGONIST ANTIBODY - There are disclosed alpha4beta7 heterodimer-specific antigen binding proteins, nucleic acids encoding them, and methods of making and using them. | 07-12-2012 |
20120183561 | ALPHA-4-BETA-7 HETERODIMER SPECIFIC ANTAGONIST ANTIBODY - There are disclosed alpha4beta7 heterodimer-specific antigen binding proteins, nucleic acids encoding them, and methods of making and using them. | 07-19-2012 |
20130302354 | ALPHA-4-BETA-7 HETERODIMER SPECIFIC ANTAGONIST ANTIBODY - There are disclosed alpha4beta7 heterodimer-specific antigen binding proteins, nucleic acids encoding them, and methods of making and using them. | 11-14-2013 |
20140234334 | PEPTIDES AND RELATED MOLECULES THAT BIND TO TALL-1 - The present invention concerns therapeutic agents that modulate the activity of TALL-1. In accordance with the present invention, modulators of TALL-1 may comprise an amino acid sequence Dz | 08-21-2014 |
20140302036 | PROTEINS SPECIFIC FOR BAFF AND B7RP1 - Described herein are bispecific proteins specific for BAFF and B7RP1, nucleic acids encoding such proteins, methods of making such proteins, and uses for such proteins. | 10-09-2014 |
20140322209 | ADMINISTRATION OF ALPHA4BETA7 HETERO- DIMER-SPECIFIC ANTIBODY - There is provided a method of treating a subject afflicted with a condition that is associated with inappropriate trafficking of cells expressing alpha4beta7 to the gastrointestinal tract, comprising administering to the subject an alpha4beta7 heterodimer specific antibody in an amount and at an interval sufficient to ameliorate the condition. | 10-30-2014 |
20150086563 | ALPHA-4-BETA-7 HETERODIMER SPECIFIC ANTAGONIST ANTIBODY - There are disclosed alpha4beta7 heterodimer-specific antigen binding proteins, nucleic acids encoding them, and methods of making and using them. | 03-26-2015 |
Patent application number | Description | Published |
20100146186 | Program Control of a non-volatile memory - A method of storing data onto a non-volatile memory includes receiving, from a host, first data that is originally assigned to a first storage area, programming the first data to a second storage area, receiving second data from the host, and while receiving the second data from the host, programming, to the first storage area, the first data that has been programmed to the second storage area, wherein the second data is received from the host simultaneously with the first data being programmed to the first storage area. The second storage area is capable of having data stored thereon faster than the first storage area. | 06-10-2010 |
20100318721 | PROGRAM FAILURE HANDLING IN NONVOLATILE MEMORY - In a nonvolatile memory system, data received from a host by a memory controller is transferred to an on-chip cache, and new data from the host displaces the previous data before it is written to the nonvolatile memory array. A safe copy is maintained in on-chip cache so that if a program failure occurs, the data can be recovered and written to an alternative location in the nonvolatile memory array. | 12-16-2010 |
20100318839 | DATA RECOVERY IN MULTI-LEVEL CELL NONVOLATILE MEMORY - In a nonvolatile memory array, data is stored in multi-level cells (MLC) as upper-page data and lower-page data. Safe copies of both upper-page and lower-page data are stored in on-chip cache during programming. If a write fail occurs, data is recovered from on-chip cache. The controller does not have to maintain safe copies of data. | 12-16-2010 |
20120297111 | Non-Volatile Memory And Method With Improved Data Scrambling - A memory device cooperating with a memory controller scrambles each unit of data using a selected scrambling key before storing it in an array of nonvolatile memory cells. This helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. For a given page of data having a logical address and for storing at a physical address, the key is selected from a finite sequence thereof as a function of both the logical address and the physical address. In a block management scheme the memory array is organized into erase blocks, the physical address is the relative page number in each block. When logical address are grouped into logical groups and manipulated as a group and each group is storable into a sub-block, the physical address is the relative page number in the sub-block. | 11-22-2012 |
20140040681 | DEVICE BASED WEAR LEVELING - A system for improving the management and usage of blocks based on intrinsic endurance may be used to improve memory usage for flash memory, such as a memory card. The overall card endurance may be extended by cycling blocks with higher intrinsic endurance over the lowest endurance target of the worst block. This may be accomplished by managing blocks with different intrinsic endurance values internally or by partitioning the blocks with different intrinsic endurance values externally for different usage. | 02-06-2014 |
Patent application number | Description | Published |
20110216747 | METHOD AND SYSTEM FOR ACCURATE CLOCK SYNCHRONIZATION THROUGH INTERACTION BETWEEN COMMUNICATION LAYERS AND SUB-LAYERS FOR COMMUNICATION SYSTEMS - Time synchronization in a wireless communication system comprises transmitting a synchronization frame from a transmitter to a receiver over a wireless communication medium. The synchronization frame includes a timestamp indicating the transmitter local time when a symbol at a predefined position of the synchronization frame is placed on the wireless communication medium for transmission. The synchronization frame is received at the receiver which determines a receiving time comprising the receiver local time when said symbol of the synchronization frame was received at the physical layer of the receiver. Time synchronizing is performed by determining a difference between said timestamp and said receiving time, and adjusting the receiver local time based on said difference to time synchronize the receiver with the transmitter. | 09-08-2011 |
20110256828 | METHOD AND SYSTEM FOR RESPONDER-AWARE RELAY STATION SELECTION IN WIRELESS COMMUNICATION NETWORKS - Responder-aware relay station selection in a wireless communication network is provided. One implementation includes evaluating operational parameters of multiple candidate wireless relay stations, and selecting a wireless relay station among the multiple candidate wireless relay stations based on the evaluation. A wireless communication is transmitted to the selected wireless relay station over a wireless communication medium. | 10-20-2011 |
20110273533 | METHOD AND SYSTEM FOR COMMUNICATION OF STEREOSCOPIC THREE DIMENSIONAL VIDEO INFORMATION - Communication of stereoscopic three dimensional (3D) video information. One embodiment comprises wireless communication of stereoscopic 3D video information including an uncompressed first eye view video frame and a corresponding stereoscopic uncompressed second eye view video frame, from a transmitting wireless station to a receiving wireless station. In one embodiment, a set of pixels in an uncompressed first eye view video frame is transmitted over a wireless communication medium. Pixel information in a set of pixels in an uncompressed second eye view video frame corresponding to the first eye view set of pixels is reduced to generate a reduced set of pixels. The reduced set of pixels is transmitted over the wireless communication medium. At the receiving wireless station, an uncompressed second eye view video set of pixels is reconstructed based on said first eye view set of pixels and said reduced set of pixels. | 11-10-2011 |
20110273622 | METHOD AND SYSTEM FOR CHROMA PARTITIONING AND RATE ADAPTATION FOR UNCOMPRESSED VIDEO TRANSMISSION IN WIRELESS NETWORKS - A method and system for transmission of video information is provided. A transmitting wireless station performs chroma partitioning of pixels in a video frame into different partitions. The chroma partitioning includes separating luminance (Y) information from chrominance information (C | 11-10-2011 |
20120002103 | METHOD AND APPARATUS FOR PROVIDING QUALITY OF SERVICE FOR WIRELESS VIDEO TRANSMISSION USING MULTI-BAND OPERATION - A system implementing a method for multi-band wireless communication packetizes a block of source video information into a first packet, and packetizes the block of source video information into a second packet corresponding to the first packet, wherein the first packet and the second packet include corresponding video information. The first packet and the second packet are transmitted from a transmitting multi-band wireless station comprising a first radio for communication over a first wireless band, and a second radio for communication over a second wireless band. The first packet is transmitted over the first wireless band and the second packet is transmitted over the second wireless band. The first wireless band operates at a higher transmission rate than the second wireless band. A multi-band receiving wireless station reconstructs the source video based on packets arriving on different bands. | 01-05-2012 |
20120133827 | METHOD AND SYSTEM FOR SYNCHRONIZATION OF AUDIO/VIDEO (A/V) STREAM FORMAT CHANGE IN WIRELESS COMMUNICATION SYSTEMS - A protocol for wireless transmission of audio/video (A/V) information is provided. The protocol includes sending a request message from a requester to a responder for changing A/V format of an A/V stream transmission between the requester and the responder over a wireless communication medium. In reply to the request message, sending a response message from the responder to the requester for synchronizing the A/V format change. The requester and the responder changing the A/V format of the A/V stream in synchrony. | 05-31-2012 |
20120133828 | METHOD AND SYSTEM FOR WIRELESS VIDEO TRANSMISSION VIA DIFFERENT INTERFACES - A method and system is provided for wireless transmission of audio/video information via different wired AV interface formats. A method and system for wireless communication of audio/video AV information between AV devices includes receiving audio/video (AV) information from a first AV module via a first wired AV interface in a first AV device, applying interface dependent processing to the AV information, and transmitting the processed AV information from a wireless transceiver over a wireless channel to a wireless receiver of a second AV device. The second AV device includes a second wired AV interface and the first AV interface is of a different type than the second interface device. | 05-31-2012 |
20120135677 | METHOD AND SYSTEM FOR RELAY-INITIATED RELAY TEARDOWN OPERATIONS IN WIRELESS COMMUNICATION NETWORKS - Relay-initiated relay teardown operations in wireless communication networks. One embodiment comprises selecting a wireless relay among multiple candidate wireless relays and setting up relay operations using the selected wireless relay for wireless communication between wireless stations via the selected wireless relay. The selected wireless relay provides relay operations for wireless communication for wireless communication between wireless stations via the selected wireless relay. Terminating the relay operations is initiated by the selected wireless relay. | 05-31-2012 |
20120213208 | METHOD AND SYSTEM FOR SHARED COMMUNICATION MEDIUM IN WIRELESS COMMUNICATION SYSTEMS - Performing distributed contention-free communication channel reservation for wireless communication, is disclosed. One implementation involves providing access to a shared communication channel in a wireless network including multiple wireless stations, by performing distributed channel time reservation for contention-free access to a shared wireless channel by each wireless station, based on a prior successful contention by the wireless station for access to the channel in a wireless network. | 08-23-2012 |
20120224496 | METHOD AND SYSTEM FOR AUDIO/VIDEO CONNECTION MAINTENANCE - Embodiments of the invention provide connection maintenance for communication of audio/video (AV) information. One implementation comprises transmitting audio/video (AV) information as multiple spatial streams from a wireless transmitter to at least one wireless receiver over a wireless link, wherein each spatial stream is targeted to one of multiple AV devices connected to the wireless receiver. Receiving the AV information at the wireless receiver and providing the AV information from each spatial stream to a target AV device connected to the wireless receiver via a communication link, wherein each communication link corresponds to a spatial stream. Detecting connection status information for the wireless link and the communication links. Transmitting the connection status information from the wireless receiver to the wireless transmitter. | 09-06-2012 |
20130088641 | METHOD AND SYSTEM FOR WIRELESS COMMUNICATION OF AUDIO IN WIRELESS NETWORKS - A method and system for audio transmission in a wireless communication system which transmits digital video and digital audio in High-Definition Multimedia Interface (HDMI) format. Position information of audio packets within the HDMI frame is obtained. Digital audio information including the position information is transmitted from a data source device to a data sink device via a wireless communication medium. At the data sink device, an HDMI frame is reconstructed by inserting received audio packets into horizontal and vertical blanking periods of the HDMI frame. | 04-11-2013 |
Patent application number | Description | Published |
20100235176 | DYNAMIC INTERFACE BETWEEN BPSS CONVERSATION MANAGEMENT AND LOCAL BUSINESS MANAGEMENT - The present invention relates to devices and methods that coordinate an external conversation process between entities with an internal workflow of one of the entities. More particularly, it relates to devices and methods that are compliant with an inter-enterprise conversation process standard for routing electronic commerce documents between enterprises. Particular aspects of the present invention are described in the claims, specification and drawings. | 09-16-2010 |
20110016107 | Execution of query plans for database query within environments of databases - A database query is submitted to a first query optimizer to receive a first query plan from the first query optimizer. The first query plan is set as a current query plan. As an entry point, the current query plan is executed against the database within a given environment of the database. Where execution of the current query plan within the given environment is problematic, the execution of the current query plan is prematurely terminated, and the database query is submitted to a second query optimizer. Where a second query plan that is different than any previous query plan for the database query has been received from the second query optimizer, the second query plan is set as the current query plan, and a risk to the database in executing the current query plan is determined. Where the risk is less than a threshold, the entry point is proceeded to. | 01-20-2011 |
20120096244 | METHOD, SYSTEM, AND PRODUCT FOR PERFORMING UNIFORMLY FINE-GRAIN DATA PARALLEL COMPUTING - A method is disclosed that includes computing, using at least one uniformly fine-grain data parallel computing unit, a mean-square error regression within a regression clustering algorithm. The mean-square error regression is represented in the form of at least one summation of a vector-vector multiplication. A computer program product and a computer system are also disclosed. | 04-19-2012 |
20130013360 | DYNAMIC INTERFACE BETWEEN BPSS CONVERSATION MANAGEMENT AND LOCAL BUSINESS MANAGEMENT - The present invention relates to devices and methods that coordinate an external conversation process between entities with an internal workflow of one of the entities. More particularly, it relates to devices and methods that are compliant with an inter-enterprise conversation process standard for routing electronic commerce documents between enterprises. Particular aspects of the present invention are described in the claims, specification and drawings. | 01-10-2013 |
20140297261 | SYNONYM DETERMINATION AMONG N-GRAMS - A technique includes obtaining a plurality of n-grams from a plurality of messages, determining a temporal histogram for each n-gram, and determining synonyms among the n-grams based on a combination of a correlation of the histograms and a distance measure between n-grams. | 10-02-2014 |
20140304545 | RECOVERING A FAILURE IN A DATA PROCESSING SYSTEM - A technique of recovering a failure in a data processing system comprises restoring a checkpointed state in a last window, and resending all the input messages received at the second node during the failed window boundary. | 10-09-2014 |
20140304549 | RECOVERING A FAILURE IN A DATA PROCESSING SYSTEM - A technique of recovering a failure in a data processing system comprises recording a number of input channels and sequence numbers for a number of input tuples transferred to a recipient task, recording a number of output channels and sequence numbers for a number of output tuples, and if a failure occurs, resolving the input and output channels. | 10-09-2014 |
20140316831 | DYNAMIC INTERFACE BETWEEN BPSS CONVERSATION MANAGEMENT AND LOCAL BUSINESS MANAGEMENT - The present invention relates to devices and methods that coordinate an external conversation process between entities with an internal workflow of one of the entities. More particularly, it relates to devices and methods that are compliant with an inter-enterprise conversation process standard for routing electronic commerce documents between enterprises. Particular aspects of the present invention are described in the claims, specification and drawings. | 10-23-2014 |
Patent application number | Description | Published |
20110044364 | STRUCTURE AND METHOD FOR ACHIEVING SELECTIVE ETCHING IN (Ga,Al,In,B)N LASER DIODES - A structure and method that can be used to achieve selective etching in (Ga, Al, In, B) N laser diodes, comprising fabricating (Ga, Al, In, B) N laser diodes with one or more Al-containing etch stop layers. | 02-24-2011 |
20110170569 | SEMIPOLAR III-NITRIDE LASER DIODES WITH ETCHED MIRRORS - A semipolar {20-21} III-nitride based laser diode employing a cavity with one or more etched facet mirrors. The etched facet mirrors provide an ability to arbitrarily control the orientation and dimensions of the cavity or stripe of the laser diode, thereby enabling control of electrical and optical properties of the laser diode. | 07-14-2011 |
20110216795 | SEMI-POLAR III-NITRIDE OPTOELECTRONIC DEVICES ON M-PLANE SUBSTRATES WITH MISCUTS LESS THAN +/-15 DEGREES IN THE C-DIRECTION - An optoelectronic device grown on a miscut of GaN, wherein the miscut comprises a semi-polar GaN crystal plane (of the GaN) miscut x degrees from an m-plane of the GaN and in a c-direction of the GaN, where −1509-08-2011 | |
20120286241 | SUPPRESSION OF INCLINED DEFECT FORMATION AND INCREASE IN CRITICAL THICKNESS BY SILICON DOPING ON NON-C-PLANE (Al,Ga,In)N - A method for fabricating a III-nitride based semiconductor device, including (a) growing one or more buffer layers on or above a semi-polar or non-polar GaN substrate, wherein the buffer layers are semi-polar or non-polar III-nitride buffer layers; and (b) doping the buffer layers so that a number of crystal defects in III-nitride device layers formed on or above the doped buffer layers is not higher than a number of crystal defects in III-nitride device layers formed on or above one or more undoped buffer layers. The doping can reduce or prevent formation of misfit dislocation lines and additional threading dislocations. The thickness and/or composition of the buffer layers can be such that the buffer layers have a thickness near or greater than their critical thickness for relaxation. In addition, one or more (AlInGaN) or III-nitride device layers can be formed on or above the buffer layers. | 11-15-2012 |
20130100978 | HOLE BLOCKING LAYER FOR THE PREVENTION OF HOLE OVERFLOW AND NON-RADIATIVE RECOMBINATION AT DEFECTS OUTSIDE THE ACTIVE REGION - An (Al,In,B,Ga)N based device including a plurality of (Al,In,B,Ga)N layers overlying a semi-polar or non-polar GaN substrate, wherein the (Al,In,B,Ga)N layers include at least a defected layer, a blocking layer, and an active region, the blocking layer is between the active region and the defected layer of the device, and the blocking layer has a larger band gap than surrounding layers to prevent carriers from escaping the active region to the defected layer. One or more (AlInGaN) device layers are above and/or below the (Al,In,B,Ga)N layers. Also described is a nonpolar or semipolar (Al,In,B,Ga)N based optoelectronic device including at least an active region, wherein stress relaxation (Misfit Dislocation formation) is at heterointerfaces above and/or below the active region. | 04-25-2013 |
20140126599 | (Al,In,B,Ga)N BASED SEMIPOLAR AND NONPOLAR LASER DIODES WITH POLISHED FACETS - An (Al,In,B,Ga)N or III-nitride based laser diode epitaxially grown on orientations other than a c-plane orientation, namely various semipolar and nonpolar orientations, and having polished facets. The semipolar orientation may be a semipolar (11-22), (11-2-2), (101-1), (10-1-1), (20-21), (20-2-1), (30-31) or (30-3-1) orientation, and the nonpolar orientation may be a nonpolar (10-10) or (11-20) orientation. The facets are chemically mechanically or mechanically polished. | 05-08-2014 |
Patent application number | Description | Published |
20110173669 | Method and Apparatus for Transmitting Data in a Data Stream - The invention provides a method and apparatus that addresses and resolves the issues currently affecting the ability to offer Enhanced TV, in particular, those issues concerning timing and synchronization, interaction with other modules in the STB, and distribution. | 07-14-2011 |
20110179438 | Method and Apparatus for Transmitting Data in a Data Stream - The invention provides a method and apparatus that addresses and resolves the issues currently affecting the ability to offer Enhanced TV, in particular, those issues concerning timing and synchronization, interaction with other modules in the STB, and distribution. | 07-21-2011 |
20110179457 | Method and Apparatus for Transmitting Data in a Data Stream - The invention provides a method and apparatus that addresses and resolves the issues currently affecting the ability to offer Enhanced TV, in particular, those issues concerning timing and synchronization, interaction with other modules in the STB, and distribution. | 07-21-2011 |
20130291045 | Method and Apparatus for Transmitting Data in a Data Stream - The invention provides a method and apparatus that addresses and resolves the issues currently affecting the ability to offer Enhanced TV, in particular, those issues concerning timing and synchronization, interaction with other modules in the STB, and distribution. | 10-31-2013 |
20130312025 | Method and Apparatus for Transmitting Data in a Data Stream - The invention provides a method and apparatus that addresses and resolves the issues currently affecting the ability to offer Enhanced TV, in particular, those issues concerning timing and synchronization, interaction with other modules in the STB, and distribution. | 11-21-2013 |
20130312047 | Transmitting Timing Information for Content in a Data Stream - The invention provides a method and apparatus that addresses and resolves the issues currently affecting the ability to offer Enhanced TV, in particular, those issues concerning timing and synchronization, interaction with other modules in the STB, and distribution. | 11-21-2013 |
Patent application number | Description | Published |
20090298770 | MAMMALIAN RELAXIN RECEPTORS - High affinity relaxin receptors, polypeptide compositions related thereto, as well as nucleotide compositions encoding the same, are provided. These proteins, herein termed LGR7 and LGR8, are orphan leucine-repeat-containing, G protein-coupled receptors. These receptors have a wide and a unique tissue expression pattern. The receptors, particularly soluble fragments thereof, are useful as therapeutic agents capable of inhibiting the action of relaxin and InsL3. The receptors and fragments thereof also find use in the screening and design of relaxin agonists and antagonists. Conditions treatable with relaxin agonists or antagonists include prevention or induction of labor, treatment of endometriosis, treatment of skin conditions such as scleroderma that require collagen or extracellular matrix remodelling. Additionally, relaxin has been implicated in the dilation of blood vessels' smooth muscle cells directly and through release of nitric oxide and atrial natriuretic peptide. Relaxin has also been used in the treatment of severe chronic pain, particularly pain arising from stretching, swelling, or dislocation of tissues. | 12-03-2009 |
20110130332 | Relaxin Analogs - Human relaxin analogs, polypeptide compositions related thereto, as well as nucleotide compositions encoding the same, are provided. | 06-02-2011 |
20120066775 | Stresscopins and their Uses - The invention provides novel nucleic acids and polypeptides, referred to herein as stresscopin 1 and stresscopin 2, which preferentially activate the CRH-R2 receptor over the R1 receptor. Stresscopins, analogs and mimetics, and related CRH-R2 agonists suppress food intake and heat-induced edema; but do not induce substantial release of ACTH. Stresscopin also finds use in the recovery phase of stress responses, as an anti-inflammatory agent, as a hypotensive agent, as a cardioprotective agent, and in the treatment of psychiatric and anxiolytic disorders. Stresscopin nucleic acid compositions find use in identifying homologous or related proteins and the DNA sequences encoding such proteins; in producing compositions that modulate the expression or function of the protein; and in studying associated physiological pathways. | 03-15-2012 |
20120157379 | Gastric Inhibitory Peptide Variants and Their Uses - Novel gastric inhibitory peptide (GIP) polypeptide compositions are provided. Human GIP alleles encode an extended peptide, referred to herein as GIP55S or GIP55G, which is resistant to serum degradation, relative to the known mature GIP peptide. GIP55S or GIP55G peptides find use where it is desirable to modulate insulin secretion. | 06-21-2012 |
20130244938 | Relaxin Analogs - Human relaxin analogs, polypeptide compositions related thereto, as well as nucleotide compositions encoding the same, are provided. | 09-19-2013 |
20140155329 | Long-Acting Peptide Analogs - Long-acting agonistic analogs for CLR/RAMP receptors are provided that have an extended half-live in vivo. | 06-05-2014 |
20150025125 | Stresscopins and their Uses - The invention provides novel nucleic acids and polypeptides, referred to herein as stresscopin 1 and stresscopin 2, which preferentially activate the CRH-R2 receptor over the R1 receptor. Stresscopins, analogs and mimetics, and related CRH-R2 agonists suppress food intake and heat-induced edema; but do not induce substantial release of ACTH. Stresscopin also finds use in the recovery phase of stress responses, as an anti-inflammatory agent, as a hypotensive agent, as a cardioprotective agent, and in the treatment of psychiatric and anxiolytic disorders. Stresscopin nucleic acid compositions find use in identifying homologous or related proteins and the DNA sequences encoding such proteins; in producing compositions that modulate the expression or function of the protein; and in studying associated physiological pathways. | 01-22-2015 |
Patent application number | Description | Published |
20090144970 | FABRICATING AN ARRAY OF MEMS PARTS ON A SUBSTRATE - A method for fabricating a micro-electro-mechanical system (MEMS) device. The method comprises fabricating a MEMS part on a substrate, and detaching the MEMS part from the substrate. After detaching the MEMS part from the substrate, attaching the MEMS part to an application platform. | 06-11-2009 |
20090191661 | PLACING A MEMS PART ON AN APPLICATION PLATFORM USING A GUIDE MASK - A method for fabricating a micro-electro-mechanical system (MEMS) device. The method comprises placing a guiding mask on an application platform, the guiding mask including an opening that defines the position of a MEMS part to be placed on the application platform. The method further comprises placing the MEMS part into the opening of the guiding mask on the application platform, and removing the guiding mask from the application platform after the MEMS part is bonded to the application platform. | 07-30-2009 |
20100033201 | MEMS PROBE FABRICATION ON A REUSABLE SUBSTRATE FOR PROBE CARD APPLICATION - A Micro-Electro-Mechanical-Systems (MEMS) probe is fabricated on a substrate for use in a probe card. The probe has a bonding surface to be attached to an application platform of the probe card. The bonding surface is formed on a plane perpendicular to a surface of the substrate. An undercut is formed beneath the probe for detachment of the probe from the substrate. | 02-11-2010 |
20100109698 | PROBE ASSEMBLY ARRANGEMENT - A probe array is assembled on a probe card platform. Each of the probes in the probe array has a probe base that includes a gripping handle. The probe bases have two or more different shapes. The probe bases of different shapes are interleaved such that any two adjacent probes on the platform have probe bases of different shapes. The arrangement of the probes increases effective spacing between the probes to facilitate the maneuvering of a handling tool. | 05-06-2010 |
20100207654 | MEMS Interconnection Pins Fabrication on a Reusable Substrate for Probe Card Application - A Micro-Electro-Mechanical-Systems (MEMS) interconnection pin is fabricated on a sacrificial layer, which is formed on a conductive layer and a substrate. The MEMS interconnection pin has a pin base attached to a frame that has direct contact to the conductive layer. The sacrificial layer is then removed, at least partially, to detach the MEMS interconnection pin from the substrate. In one embodiment, the MEMS interconnection pin has a pin base, two springs extending out from two different surfaces of the pin base, and a tip portion attached to each spring. The tip portions include one or more contact tips to make contact to conductive subjects. | 08-19-2010 |
Patent application number | Description | Published |
20110175181 | Magnetic Tunnel Junction (MTJ) on Planarized Electrode - A magnetic tunnel junction (MTJ) with direct contact is manufactured having lower resistances, improved yield, and simpler fabrication. The lower resistances improve both read and write processes in the MTJ. The MTJ layers are deposited on a bottom electrode aligned with the bottom metal. An etch stop layer may be deposited adjacent to the bottom metal to prevent overetch of an insulator surrounding the bottom metal. The bottom electrode is planarized before deposition of the MTJ layers to provide a substantially flat surface. Additionally, an underlayer may be deposited on the bottom electrode before the MTJ layers to promote desired characteristics of the MTJ. | 07-21-2011 |
20120033490 | Generating a Non-Reversible State at a Bitcell Having a First Magnetic Tunnel Junction and a Second Magnetic Tunnel Junction - A method of generating a non-reversible state at a bitcell having a first magnetic tunnel junction (MTJ) and a second MTJ includes applying a program voltage to the first MTJ of the bitcell without applying the program voltage to the second MTJ of the bitcell. A memory device includes a bitcell having a first MTJ and a second MTJ and programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell. | 02-09-2012 |
20130114336 | THREE PORT MTJ STRUCTURE AND INTEGRATION - A two-transistor one-MTJ (2T1MTJ) three port structure includes two separate pin layer structures coupled to one free layer structure. The pin layer structures may include an anti-ferromagnetic layer (AFM) layer coupled to a pin layer. The free layer structure includes free layer coupled to a barrier layer and a cap layer. The free layer structure may include a thin barrier layer coupled to each of the pin layer stacks. The three port MTJ structure provides separate write and read paths which improve read sensing margin without increasing write voltage or current. The three port MTJ structure may be fabricated with a simple two step MTJ etch process. | 05-09-2013 |
20130215671 | MEMORY BIT REPAIR SCHEME - A memory device for providing memory bit repair. The memory device may include memory cells. Each of the memory cells may include a measurable characteristic that identifies a stored data value. At least one of the memory cells may have a measurable characteristic set to a defective bit state. A defective bit state may refer to a measurable characteristic set to be outside of a working measureable characteristic range. The defective bit state may enable memory bit repair by identifying the at least one memory cell as being defective. | 08-22-2013 |
20130294150 | METHOD AND APPARATUS FOR TESTING A RESISTIVE MEMORY ELEMENT - Methods and apparatus for testing a resistive memory element are provided. In an example, an initial test resistor in a resistance network coupled to a first input of a sense amplifier is selected, where the resistive memory element is coupled. to a second input of the sense amplifier and an output of the sense amplifier is measured. Another test resistor is selected based on the output of the sense amplifier and both the measuring the output step and the selecting another test resistor step are repeated until the output of the sense amplifier changes. A resistance of the resistive memory element is estimated based on the last test resistor selected, where the selected test resistors and the resistive memory element pass respective currents having substantially similar amplitudes and are coupled to respective access transistors having substantially similar properties. | 11-07-2013 |
20140010006 | NON-REVERSIBLE STATE AT A BITCELL HAVING A FIRST MAGNETIC TUNNEL JUNCTION AND A SECOND MAGNETIC TUNNEL JUNCTION - A memory device includes a magnetic tunnel junction (MTJ) bitcell. The MTJ bitcell includes a first MTJ and a second MTJ. The memory device further includes programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell. The non-reversible state corresponds to a value of the MTJ bitcell that is determined by comparing a first value read at the first MTJ and a second value read at the second MTJ. | 01-09-2014 |
20140048894 | MTP MTJ DEVICE - Systems and methods for multiple-time programmable (MTP) devices. An MTP device includes a magnetic tunnel junction (MTJ) device programmable to a plurality of states based on voltage applied across the MTJ device. The plurality of states include a first resistance state corresponding to a first binary value stored in the MTJ device based on a first voltage, a second resistance state corresponding to a second binary value stored in the MTJ device based on a second voltage, a third resistance state corresponding to a breakdown of a barrier layer of the MTJ device based on a third voltage, and a fourth resistance state corresponding to an open fuse based on a fourth voltage. | 02-20-2014 |
20140071741 | OTP CELL WITH REVERSED MTJ CONNECTION - A one time programming (OTP) apparatus unit cell includes magnetic tunnel junctions (MTJs) with reversed connections for placing the MTJ in an anti-parallel resistance state during programming. Increased MTJ resistance in its anti-parallel resistance state causes a higher programming voltage which reduces programming time and programming current. | 03-13-2014 |
20140073064 | MAGNETIC TUNNEL JUNCTION (MTJ) ON PLANARIZED ELECTRODE - A magnetic tunnel junction (MTJ) with direct contact is manufactured having lower resistances, improved yield, and simpler fabrication. The lower resistances improve both read and write processes in the MTJ. The MTJ layers are deposited on a bottom electrode aligned with the bottom metal. An etch stop layer may be deposited adjacent to the bottom metal to prevent overetch of an insulator surrounding the bottom metal. The bottom electrode is planarized before deposition of the MTJ layers to provide a substantially flat surface. Additionally, an underlayer may be deposited on the bottom electrode before the MTJ layers to promote desired characteristics of the MTJ. | 03-13-2014 |
20140139209 | MAGNETIC AUTOMATIC TESTING EQUIPMENT (ATE) MEMORY TESTER - Several novel features pertain to an automatic testing equipment (ATE) memory tester that includes a load board, a projected-field electromagnet, a positioning mechanism and a memory tester. The load board is for coupling to a die package that includes a magnetoresistive random access memory (MRAM) having several cells, where each cell includes a magnetic tunnel junction (MTJ). The projected-field electromagnet is for applying a portion of a magnetic field across the MRAM. The portion of the magnetic field may be substantially uniform. The positioning mechanism is coupled to the electromagnet and the load board, and is configured to position the electromagnet vertically about (above/below) the die package when the die package is coupled to the load board. The memory tester is coupled to the load board. The memory tester is for testing the MRAM when the substantially uniform portion of the magnetic field is applied across the MRAM. | 05-22-2014 |
20140254251 | MAGNETIC AUTOMATIC TEST EQUIPMENT (ATE) MEMORY TESTER DEVICE AND METHOD EMPLOYING TEMPERATURE CONTROL - In a particular embodiment, a method includes controlling a temperature within a chamber while applying a magnetic field. A device including a memory array is located in the chamber. The method includes applying a magnetic field to the memory array and testing the memory array during application of the magnetic field to the memory array at a target temperature. | 09-11-2014 |
Patent application number | Description | Published |
20110132884 | LASER MODULES AND PROCESSES FOR THIN FILM SOLAR PANEL LASER SCRIBING - Laser systems for laser scribing are provided. The systems include a remote module coupled to a laser module through a cable. The remote module includes a controller and a chiller. The laser module has at least a laser source and a cooling plate. The laser module is operable to remove material from at least a portion of a workpiece. The systems also include a plurality of termination modules coupled to the laser module through a plurality of optical fibers. Each of the termination modules includes a mechanical interface. The mechanical interface is coupled to a respective optical fiber. The systems further include a plurality of scanning devices operable to control a position of the output from the laser. Each of the scanning devices is coupled to a respective mechanical interface. | 06-09-2011 |
20110139755 | MULTI-WAVELENGTH LASER-SCRIBING TOOL - Multi-wavelength laser-scribing systems are disclosed. A system for scribing a workpiece includes a frame, a translation stage coupled with the frame to support the workpiece and translate the supported workpiece relative to the frame in a longitudinal direction, at least one laser operable to generate a first output having a first wavelength and generate a second output having a second wavelength, and at least one scanning device coupled with the frame and operable to control a position of the first and second outputs. Each of the first and second outputs are able to remove material from at least a portion of the workpiece. Laser assemblies that each include a laser and at least one scanning device can be arranged in rows to enhance the rate at which latitudinal scribe lines are formed. | 06-16-2011 |
20110253685 | LASER PROCESSING SYSTEM WITH VARIABLE BEAM SPOT SIZE - Systems for scribing a workpiece incorporate a motorized beam expander to change a laser beam spot size incident on a workpiece. A system includes a frame, a laser coupled with the frame and generating an output to remove material from at least a portion of a workpiece, a beam expander positioned along a path of the laser output and having a motorized mechanism operable to vary a beam expansion ratio applied to the laser output, and at least one scanning device coupled with the frame and operable to control a position of the laser output, after expansion, on the workpiece. The motorized beam expander can be used to selectively vary the width of a laser beam supplied to a scanning device so as to selectively vary the size of the laser beam incident on the workpiece. Alternatively, a variable aperture can be used instead of a beam expander. | 10-20-2011 |
20110308551 | METHOD AND APPARATUS FOR INDUCING TURBULENT FLOW OF A PROCESSING CHAMBER CLEANING GAS - Embodiments of the invention generally relate to apparatus and methods for cleaning chamber components using a cleaning plate. The cleaning plate is adapted to be positioned on a substrate support during a cleaning process, and includes a plurality of turbulence-inducing structures. The turbulence-inducing structures induce a turbulent flow of cleaning gas while the cleaning plate is rotated during a cleaning process. The cleaning plate increases the retention time of the cleaning gas near the showerhead during cleaning. Additionally, the cleaning plate reduces concentration gradients within the cleaning plate to provide a more effective clean. The method includes positioning a cleaning plate adjacent to a showerhead, and introducing cleaning gas to the space between the showerhead and the cleaning plate. A material deposited on the surface of the showerhead is then heated and vaporized in the presence of the cleaning gas, and then exhausted from the processing chamber. | 12-22-2011 |
20120012049 | HVPE CHAMBER - Embodiments disclosed herein generally relate to an HVPE chamber. The chamber may have one or more precursor sources coupled thereto. For example, a gallium source and a separate aluminum source may be coupled to the processing chamber to permit gallium nitride and aluminum nitride to be separately deposited onto a substrate in the same processing chamber. The nitrogen may be introduced to the processing chamber at a separate location from the precursors and at a lower temperature. The chamber has a truncated box shape formed by a curved cover which improves the flow of the nitrogen and precursor gases and the uniformity of the film deposition. | 01-19-2012 |
20120227667 | SUBSTRATE CARRIER WITH MULTIPLE EMISSIVITY COEFFICIENTS FOR THIN FILM PROCESSING - Substrate carrier having multiple emissivity coefficients for thin film processing and more particularly for support of a substrate during a deposition process epitaxially growing a film on the substrate. A front side of the carrier has a first carrier surface upon which the substrate is to be disposed, the first carrier surface having a first emissivity coefficient different than a second emissivity coefficient of a second carrier surface adjacent to the first carrier surface. Selection of the second emissivity coefficient independent of the first emissivity coefficient may modify an amount of energy radiated from the second carrier surface during processing of the substrate. In one embodiment, the second carrier surface has a second emissivity coefficient which is lower than the first emissivity coefficient to reduce heat loss from the carrier surface while maintaining high efficiency energy transfer between the carrier and a substrate. | 09-13-2012 |
20120234238 | INTEGRATED METROLOGY FOR WAFER SCREENING - Integrated wafer or substrate bow measurement modules are described. For example, a multi-chamber system includes a chamber housing a bow measurement module. In another example, a method of pre-screening a wafer includes inserting a wafer or a substrate into a multi-chamber system. A bow parameter of the wafer or the substrate is measured in a bow measurement module housed in a chamber of the multi-chamber system. | 09-20-2012 |
20120235115 | GROWTH OF III-V LED STACKS USING NANO MASKS - Methods, semiconductor material stacks and equipment for manufacture of light emitting diodes (LEDs) with improve crystal quality. A growth stopper is deposited between nuclei for a group III-V material, such as GaN, to form a nano mask. The group III-V material is laterally overgrown from a region of the nuclei not covered by the nano mask to form a continuous material layer with reduced dislocation density in preparation for subsequent growth of n-type and p-type layers of the LED. The lateral overgrowth from the nuclei may further recover the surface morphology of the buffer layer despite the presence of the nano mask. Presence of the growth stopper may further result in void formation on a substrate side of an LED stack to improve light extraction efficiency. | 09-20-2012 |
20120315741 | ENHANCED MAGNESIUM INCORPORATION INTO GALLIUM NITRIDE FILMS THROUGH HIGH PRESSURE OR ALD-TYPE PROCESSING - Enhanced magnesium incorporation into gallium nitride films through high pressure or ALD-type processing is described. In an example, a method of fabricating a group III-nitride film includes flowing a group III precursor, a nitrogen precursor, and a p-type dopant precursor into a reaction chamber having a substrate therein. A p-type doped group III-nitride layer is formed in the reaction chamber, above the substrate, while a total pressure in the reaction chamber is approximately in the range of 300-760 Torr. | 12-13-2012 |
20130023079 | FABRICATION OF LIGHT EMITTING DIODES (LEDS) USING A DEGAS PROCESS - Methods of fabricating light emitting diodes using a degas process are described. For example, a method includes providing a partially formed group III-V material layer stack of an LED. Contaminants are removed from the partially formed group III-V material layer stack by a degas process. Formation of the group III-V material layer stack of the LED is then completed. | 01-24-2013 |
Patent application number | Description | Published |
20110132867 | METHOD AND SYSTEM FOR IMPRINT LITHOGRAPHY - A method and apparatus of imprint lithography wherein the method includes depositing a material on a patterned surface of a conductive substrate, and pressing a transparent substrate and the conductive substrate together, wherein the pressing causes the material to conform to the patterned surface. Energy is applied to the material to form patterned material from the material. The transparent substrate and the conductive substrate are separated, wherein the patterned material adheres to the transparent substrate. | 06-09-2011 |
20120164389 | IMPRINT TEMPLATE FABRICATION AND REPAIR BASED ON DIRECTED BLOCK COPOLYMER ASSEMBLY - Imprinted apparatuses, such as Bit-Patterned Media (BPM) templates, Discrete Track Recording (DTR) templates, semiconductors, and photonic devices are disclosed. Methods of fabricating imprinted apparatuses using a combination of patterning and block copolymer (BCP) self-assembly techniques are also disclosed. | 06-28-2012 |
20140113064 | METHOD AND SYSTEM FOR OPTICAL CALIBRATION - A system and method of calibrating optical measuring equipment includes optically measuring discrete objects of a first known predictable pattern from a calibration apparatus, wherein the first known predictable pattern is a bit pattern. A recording surface optical reader is calibrated based on the optically measuring. Using the first known predictable pattern, contamination is filtered from the results of the optically measuring. | 04-24-2014 |
Patent application number | Description | Published |
20090007953 | Energy efficient micro combustion system for power generation and fuel processing - An integrated micro-scale power converter converts hydrocarbon fuel into electricity. The integrated micro-scale power converter includes a micromachined combustor adapted to convert hydrocarbon fuel into thermal energy and a micromachined thermoelectric generator adapted to convert the thermal energy into electrical energy. The combustion reaction in the combustor flows in a path in a first plane while the thermal energy flows in a second plane in the generator the second plane being nearly orthogonal or orthogonal to the first plane. The fuel handler in the combustor is adjacent and thermally isolated from the thermoelectric generator. The fuel handler may include a nozzle and gas flow switch, where the frequency of activation of the gas flow switch controls the amount of the fuel ejected from the nozzle. | 01-08-2009 |
20110181885 | Large Displacement Micro-Lamellar Grating Interferometer - A micro-lamellar grating interferometer for deriving the spectrum of an incident beam from a scene of interest from a generated interferogram is disclosed with a method for using the same. | 07-28-2011 |
20140090471 | Three-Axis Nano-Resonator Accelerometer Device and Method - An inertial measurement device and method for measuring acceleration in three axes. Three orthogonally disposed accelerometers are defined on a common planar substrate. At least one of the accelerometers is provided with a proof mass coupled to a nano-resonator element. The nano-resonator element is oscillated at a first predetermined frequency, which may be a first resonant frequency, and is altered to oscillate at a second frequency, which may be a second resonant frequency, in response to a resultant force produced by the acceleration of the proof mass. The degree of change in nano-resonator element output frequency is sensed and processed using suitable processing circuitry as a change in acceleration on the active axis. | 04-03-2014 |
20140158862 | Micro-Image Acquisition and Transmission System - A micro-image acquisition and transmission system is provided. In a preferred embodiment, the system is comprised of an image acquisition chip comprising an electronic imager, control electronics and a micro powered rotary stage comprising a transceiver array that acts as a hub to optically link a group of distributed image acquisition chips. A preferred embodiment is further comprised of a transceiver array chip comprising one or more micro-powered rotary stages having a transceiver array assembly disposed thereon. The micro-powered rotary stage is supported by a micro-brush bearing. | 06-12-2014 |
Patent application number | Description | Published |
20110202894 | Method and Apparatus for Versatile Controllability and Observability in Prototype System - Methods and systems for testing a prototype, the method including receiving, at a first interface component, a configuration parameter associated with a configured image representative of at least a portion of a user design and an associated verification module. The method further includes, sending, using the first interface component, the configured image to a device. A second interface component may be configured to send timing and control information to the verification module based on at least one of the configuration image and runtime control information received from the first interface component. In response to receiving the timing and control information from the second interface component, the verification module may control the device and/or monitor the device state of at least a portion of the user design. | 08-18-2011 |
20140351777 | PROTOTYPE AND EMULATION SYSTEM FOR MULTIPLE CUSTOM PROTOTYPE BOARDS - A system for emulating a circuit design is presented. The system includes a host workstation coupled by an emulation interface to a field programmable gate array (FPGA) configured to emulate and verify the circuit design when the host workstation is invoked to verify the circuit design. The emulation interface is configured to provide timing and control information for at least the verify. The system further includes computer readable storage medium including instructions, which when executed cause a computer to compile a portion of the circuit design and an associated verification module adapted to configure the FPGA. The compilation is in accordance with a description file. | 11-27-2014 |
20150040096 | EMULATION-BASED FUNCTIONAL QUALIFICATION - Techniques for emulation-based functional qualification are disclosed that use an emulation platform to replace simulation in mutation-based analysis. A method for functional qualification of an integrated circuit design includes receiving an integrated circuit design having one or more mutations. Emulation setup and activation simulation are performed in parallel to maximize computing resources. A prototype board can then be programmed according to the integrated circuit design and a verification module. A set of test patterns and response generated by a simulation of the integrated circuit using the set of test patterns are stored in a memory of the prototyping board allowing enumeration of mutants to occur at in-circuit emulation speed. | 02-05-2015 |