Saikia
Amitabh Saikia, Mountain View, CA US
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20160110352 | INFORMATION REDACTION FROM DOCUMENT DATA - Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for redacting data from a document collection generated for a set of documents that include personal information. The redaction of the data is based in part on a comparison of the document collection to a set of a personal documents of users for which the users have provided explicit approval to use in the processing of the document collection. | 04-21-2016 |
Anil Saikia, Hyderabad IN
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20140066630 | PROCESS FOR THE PREPARATION OF BIS-(1(2)H-TETRAZOL-5-YL)-AMINE MONOHYDRATE - A process for the preparation of Bis-(1(2)H-tetrazol-5-yl)-amine monohydrate. | 03-06-2014 |
Bishwajit Saikia, Jorhat IN
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20130331581 | 1,2,3-TRIAZOLE CONTAINING ARTEMISININ COMPOUNDS AND PROCESS FOR PREPARATION THEREOF - The present invention relates to 1,2,3-triazole containing artemisinin compounds and process for preparation thereof. Described herein is the synthesis, bioassay results and usefulness of the artemisinin derived compounds resulting from 1,3-di-polar cycloaddition reaction of artemisinin derived azide or alkyne with aliphatic or aromatic diazides. These 1,2,3-triazole containing artemisinin derived compounds embodied in this document are found to be active against various cancer cell-lines. | 12-12-2013 |
Dharmendra Saikia, Lucknow IN
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20120184576 | ANTIPSYCHOTIC AGENTS AND STANDARDIZED ANTIPSYCHOTIC FRACTIONS FROM RAUWOLFIA TETRAPHYLLA AND PROCESS OF THEIR ISOLATION - The present invention relates to bioactive extracts its fractions and isolation of compound from | 07-19-2012 |
Diganta Saikia, Taoyuan County TW
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20130157122 | SOLID POLYMER ELECTROLYTE COMPOSITION AND METHOD OF SYNTHESIZING THE SAME - A solid polymer electrolyte composition having good conductivity and better mechanical strength is provided. The solid polymer electrolyte composition includes at least one lithium salt and a crosslinking polymer containing at least a first segment, a second segment, a third segment, and a fourth segment. The first segment includes polyalkylene oxide and/or polysiloxane backbone. The second segment includes urea and/or urethane linkages. The third segment includes silane domain. The fourth segment includes phenylene structure. Moreover, the solid polymer electrolyte composition further includes an additive for improving ionic conductivity thereof. | 06-20-2013 |
Dipjyoti Saikia, Seongnam-Si, Gyeonggi-Do KR
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20160080263 | SDN-BASED SERVICE CHAINING SYSTEM - A method for providing service chaining in a software-defined network (SDN)-based network system, the method including: receiving, at a controller, a first packet-in message from a first switch of a plurality of switches, which has received a service request packet from a user, to indicate that the first switch does not have a corresponding entry in a field extracted from the service request packet; extracting from the packet-in message both a service identifier that identifies a type of a service requested through the service request packet and a user identifier that identifies the user; and searching an entry database for an entry list that enables the service request packet to be forwarded to a network function list that corresponds to the service identifier and the user identifier, with reference to a service table, a user table, and a network function table which are associated with one another. | 03-17-2016 |
20160087872 | DIVIDED HIERARCHICAL NETWORK SYSTEM BASED ON SOFTWARE-DEFINED NETWORKS - A divided hierarchical network system based on software-defined networks, the divided hierarchical network system including: an edge controller configured to: generate forwarding information in response to a flow forwarding inquiry from a lower level and respond to the request with the forwarding information; generate mapping information such that each of a plurality of edge ports of each of a plurality of switches that form the lower level corresponds to each of a plurality of virtual ports of one virtual switch; if it is not possible to generate forwarding information in response to a request received from a lower level for forwarding a flow that comprises edge ports, query forwarding information to an upper level regarding a flow in which the edge port is converted into a corresponding virtual port based on the mapping information. | 03-24-2016 |
Jyotirmoy Saikia, Mahadevapura IN
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20100192030 | METHOD AND APPARATUS FOR IMPLEMENTING A HIERARCHICAL DESIGN-FOR-TEST SOLUTION - Embodiments of the present invention provide methods and apparatuses for implementing hierarchical design-for-test (DFT) logic on a circuit. The hierarchical DFT logic implements DFT circuitry that can be dedicated to a module, and which can configure DFT circuitry for multiple modules to share a sequential input signal and/or to share a sequential output signal. During operation, the DFT circuitry for a first module can propagate a bit sequence from the sequential input signal to the DFT circuitry of a second module, such that the bit sequence can include a set of control signal values for controlling the DFT circuitry, and can include compressed test vectors for testing the modules. Furthermore, the DFT circuitry for the second module can generate a sequential response signal, which combines the compressed response vectors from the second module and a sequential response signal from the DFT circuitry of the first module. | 07-29-2010 |
Jyotirmoy Saikia, Pachatia IN
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20100017760 | TEST DESIGN OPTIMIZER FOR CONFIGURABLE SCAN ARCHITECTURES - Roughly described, a scan-based test architecture is optimized in dependence upon the circuit design under consideration. In one embodiment, a plurality of candidate test designs are developed. For each, a plurality of test vectors are generated in dependence upon the circuit design and the candidate test design, preferably using the same ATPG algorithm that will be used downstream to generate the final test vectors for the production integrated circuit device. A test protocol quality measure such as fault coverage is determined for each of the candidate test designs, and one of the candidate test designs is selected for implementation in an integrated circuit device in dependence upon a comparison of such test protocol quality measures. Preferably, only a sampling of the full set of test vectors that ATPG could generate, is used to determine the number of potential faults that would be found by each particular candidate test design. | 01-21-2010 |
20140059399 | TEST DESIGN OPTIMIZER FOR CONFIGURABLE SCAN ARCHITECTURES - Roughly described, a scan-based test architecture is optimized in dependence upon the circuit design under consideration. In one embodiment, a plurality of candidate test designs are developed. For each, a plurality of test vectors are generated in dependence upon the circuit design and the candidate test design, preferably using the same ATPG algorithm that will be used downstream to generate the final test vectors for the production integrated circuit device. A test protocol quality measure such as fault coverage is determined for each of the candidate test designs, and one of the candidate test designs is selected for implementation in an integrated circuit device in dependence upon a comparison of such test protocol quality measures. Preferably, only a sampling of the full set of test vectors that ATPG could generate, is used to determine the number of potential faults that would be found by each particular candidate test design. | 02-27-2014 |
Jyotirmoy Saikia, Bangalore IN
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20110258498 | Test Architecture Including Cyclical Cache Chains, Selective Bypass Scan Chain Segments, And Blocking Circuitry - A test architecture is described that adds minimal area overhead and increases encoding bandwidth by using one or more cyclical cache chains for a set of the test patterns provided to the scan chains of the design. A multiplexer associated with a scan chain can be used to bypass a segment of the scan chain that includes unknown values. Blocking circuitry can be programmed to completely block one or more scan chains including unknown values. | 10-20-2011 |
20110301907 | Accelerating Automatic Test Pattern Generation in a Multi-Core Computing Environment via Speculatively Scheduled Sequential Multi-Level Parameter Value Optimization - Systems and methods provide acceleration of automatic test pattern generation in a multi-core computing environment via multi-level parameter value optimization for a parameter set with speculative scheduling. The methods described herein use multi-core based parallel runs to parallelize sequential execution, speculative software execution to explore possible parameter sets, and terminate/prune runs when the optimum parameter value is found at a previous level. The present invention evaluates the design prior to the implementation of the compression IP so that it can define the configuration of DFT and ATPG to maximize the results of compression as measured by test data volume and test application time. | 12-08-2011 |
20140317463 | Scheme for Masking Output of Scan Chains in Test Circuit - Operating a scan chain of a test circuit of an integrated circuit to have either a single fanout or multiple fanout to a compressor. The test circuit receives a fanout control signal for configuring the fanout of the scan chain. If the fanout control signal indicates configuring of the scan chain with a single fanout, the output of the scan chain is sent to one input of a compressor. If the fanout control signal indicates configuring of the scan chain with multiple fanout, the output of the scan chain is sent to multiple inputs of the compressor. | 10-23-2014 |
20140372822 | Scheme for Masking Output of Scan Chains in Test Circuit - A method for masking scan chains in a test circuit of an integrated circuit is disclosed. A test pattern to be fed into the test circuit of the integrated circuit is generated. The generated test pattern can be used for detecting a primary fault, one or more secondary faults, and one or more tertiary faults. A mask to mask the output of the scan chains of the test circuit is generated. If a condition is not met, a mask that increases the total number of detectable faults is generated. If the condition is met, a mask that protects the primary fault of the test pattern is generated. | 12-18-2014 |
20150025819 | Handling of Undesirable Distribution of Unknown Values in Testing of Circuit Using Automated Test Equipment - A method for masking scan chains in a test circuit of an integrated circuit is disclosed. The test circuit includes multiple mask banks. Different mask patterns are stored in each of the mask banks. A first mask bank of the multiple mask banks is selected and the mask pattern stored in the selected first mask bank is used for masking the output of the scan chains of the test circuit during a first portion of a test cycle. A second mask bank of the multiple mask banks is selected and the ask pattern stored in the selected second mask bank is used for masking the output of the scan chains of the test circuit during a second portion of the test cycle. | 01-22-2015 |
Lakshi Saikia, Maharashtra IN
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20110015447 | Process for the Preparation of Primary Alkyl Glycerol Ethers Useful as Biofuel Additive from Glycerol - The present invention provides a process for the preparation of biofuels or biofuel additives from glycerol. More particularly, it provides a process for the preparation of glycerol-ethers by etherification of glycerol with an alcohol in the presence of solid acid catalyst. | 01-20-2011 |
Partha Pratim Saikia, Jorhat IN
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20130030044 | NEW SERIES OF ARTEMISININ DERIVATIVES AND PROCESS FOR PREPARATION THEREOF - This invention relates to the synthesis of certain novel Baylis-Hillman adducts of artremisinin derived aldehyde 2[10′β-deoxoartemisininyl]-ethanal. The capabilities of introduction of three functional groups into a molecule in one step using Baylis-Hillman reaction encouraged us to synthesize some highly functionalized derivatives of artemisinin. These highly functionalized artemisinin derivatives embodied in this document are found to be active against various cancer cell-lines | 01-31-2013 |
20130331581 | 1,2,3-TRIAZOLE CONTAINING ARTEMISININ COMPOUNDS AND PROCESS FOR PREPARATION THEREOF - The present invention relates to 1,2,3-triazole containing artemisinin compounds and process for preparation thereof. Described herein is the synthesis, bioassay results and usefulness of the artemisinin derived compounds resulting from 1,3-di-polar cycloaddition reaction of artemisinin derived azide or alkyne with aliphatic or aromatic diazides. These 1,2,3-triazole containing artemisinin derived compounds embodied in this document are found to be active against various cancer cell-lines. | 12-12-2013 |
Rakhi Saikia, Bangalore IN
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20150093795 | Cutinase Variants and Polynucleotides Encoding Same - The present invention relates tocutinasevariants. The present invention also relates to polynucleotides encoding the variants; nucleic acid constructs, vectors, and host cells comprising the polynucleotides; and methods of using the variants. | 04-02-2015 |
Ritwik Saikia, Bangalore IN
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20150242509 | Method and System of Crowd Sourcing Data Using Mobile Device - The present invention provides a method for performing analysis on crowdsource data using mobile devices. The method comprises the steps of receiving a query specific function, pushing one or more instances of the query specific function for execution to a set of mobile devices, triggering one or more instances of the query specific function to generate one or more crowdsource data sets associated with the set of mobile devices receiving the one or more crowdsource data sets and analyzing the one or more crowdsource data sets according to the query specific function. | 08-27-2015 |
Siddartha Saikia, Chennai IN
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20140203621 | SYSTEM FOR CONTROLLING SPEED OF TRAVEL IN A LONGWALL SHEARER - A shearer system for removing material along a mineable distance relative to a mining environment includes a rail assembly to support movement of a shearer carriage thereon. The system further includes a haulage motor structured and arranged to move the shearer carriage along the rail assembly. The system has a rotatably driven cutter that is positionable relative to the shearer carriage. The system further includes an actuator supported by the shearer carriage for changing a cutting height of the cutter. The system further includes a controller that can control a velocity of the shearer carriage based on a translation speed of the cutter, a maximum speed of the shearer carriage, a current cutter height, and a desired cutter height. Optionally, the controller can further control the velocity of the shearer carriage based on a predetermined stopping distance of the shearer carriage. | 07-24-2014 |