Patent application number | Description | Published |
20080298135 | METAL OXIDE SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING AN ARRAY STRUCTURE COMPRISING THE SAME DEVICES - The present invention discloses a metal oxide semiconductor (MOS) device and a method for operating an array structure comprising the same devices. The MOS device of the present invention comprises a device layer; an ion-implanted layer formed on the device layer and providing the source, the drain and the channel; and a gate structure formed on the ion-implanted layer. Via applying a bias voltage to the gate, the carrier density in the channel region is different from that in the source region or the drain region; thereby, the MOS device of the present invention can undertake programming, erasing and reading activities. The present invention can simplify the MOS device fabrication process, reduce the operating voltage, and promote the integration density of a 2-dimensional or 3-dimensional MOS device array. | 12-04-2008 |
20100213528 | METAL OXIDE SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING AN ARRAY STRUCTURE COMPRISING THE SAME DEVICES - The present invention discloses a metal oxide semiconductor (MOS) device and a method for operating an array structure comprising the same devices. The MOS device of the present invention comprises a device layer; an ion-implanted layer formed on the device layer and providing the source, the drain and the channel; and a gate structure formed on the ion-implanted layer. Via applying a bias voltage to the gate, the carrier density in the channel region is different from that in the source region or the drain region; thereby, the MOS device of the present invention can undertake programming, erasing and reading activities. The present invention can simplify the MOS device fabrication process, reduce the operating voltage, and promote the integration density of a 2-dimensional or 3-dimensional MOS device array. | 08-26-2010 |
20140256099 | METHOD OF CONVERTING BETWEEN NON-VOLATILE MEMORY TECHNOLOGIES AND SYSTEM FOR IMPLEMENTING THE METHOD - A method of designing a charge trapping memory array including designing a floating gate memory array layout. The floating gate memory layout includes a first type of transistors, electrical connections between memory cells of the floating gate memory array layout, a first input/output (I/O) interface, a first type of charge pump, and an I/O block. The method further includes modifying the floating gate memory array layout, using a processor, to replace the first type of transistors with a second type of transistors different than the first type of transistors. The method further includes determining an operating voltage difference between the I/O block and the second type of transistors. The method further includes modifying the floating gate memory array layout, using the processor, to modify the first charge pump based on the determined operating voltage difference. | 09-11-2014 |
20150095868 | METHOD OF CONVERTING BETWEEN NON-VOLATILE MEMORY TECHNOLOGIES AND SYSTEM FOR IMPLEMENTING THE METHOD - A method of designing a charge trapping memory array including designing a floating gate memory array layout. The floating gate memory layout includes a first type of transistors, electrical connections between memory cells of the floating gate memory array layout, a first input/output (I/O) interface, a first type of charge pump, and an I/O block. The method further includes modifying the floating gate memory array layout, using a processor, to replace the first type of transistors with a second type of transistors different than the first type of transistors. The method further includes determining an operating voltage difference between the I/O block and the second type of transistors. The method further includes modifying the floating gate memory array layout, using the processor, to modify the first charge pump based on the determined operating voltage difference. | 04-02-2015 |
Patent application number | Description | Published |
20090135570 | METHOD FOR IMPROVING EBG STRUCTURES AND MULTI-LAYER BOARD APPLYING THE SAME - A method for improving EBG (electromagnetic bandgap) structures is provided. First, a multi-layer board having at least one EBG unit is provided. Then, a maximum input impedance of the EBG unit under a predetermined frequency band is measured, in which a frequency corresponding to the maximum input impedance is a resonance frequency, and a capacitance is determined based on the resonance frequency. Besides, a minimum input impedance of the EBG unit is measured, and a logarithmic value corresponding to the maximum input impedance and a logarithmic value corresponding to the minimum input impedance are obtained so as to determine a resistance. Finally, an electronic device having the capacitance and the resistance is coupled to the EBG unit in parallel. | 05-28-2009 |
20090310295 | HEAT-DISSIPATING MECHANISM FOR USE WITH MEMORY MODULE - A heat-dissipating mechanism includes a first heat-dissipating device, a first positioning device, a second heat-dissipating device and a second positioning device. The first heat-dissipating device is contacted with a memory module. The first positioning device is disposed on the first heat-dissipating device and includes a protrusion. The second heat-dissipating device is connected with the first heat-dissipating device. The second positioning device has a positioning rail formed in the second heat-dissipating device and corresponding to the protrusion. The second heat-dissipating device is connected with the first heat-dissipating device when the protrusion of the first positioning device is embedded into the positioning rail second positioning device. | 12-17-2009 |
20100060379 | DELAY LINE FOR PRINTED CIRCUIT BROAD - A delay line for a printed circuit board (PCB) is disclosed. The delay line includes a first straight line, a second straight line and a third straight line. The second and third straight lines are respectively disposed at two sides of the first straight line. The first, second and third straight lines are parallel to each other and form a delay path. The current direction of the second straight line is opposite to that of the third straight line. | 03-11-2010 |
20100188817 | HEAT DISSIPATION DEVICE - A heat dissipation device is used for dissipating heat generated from a plurality of memory modules inserted on a motherboard. The memory modules are parallel to each other. Two hooks are disposed at two ends of the slot of each memory connector, respectively, to clamp the memory module corresponding to the slot when the memory module is inserted in the slot. The heat dissipation device includes two fixing frames, a connection frame, and two fans. The two fixing frames are disposed at two opposite ends of the memory connectors and fastened with the hooks at two ends of each slot, respectively. Additionally, the connection frame is connected between the two fixing frames. The two fans are disposed on the two fixing frames, respectively. An air inlet of one of the two fans faces an air outlet of the other one. | 07-29-2010 |
20100302732 | HEAT-DISSIPATING MECHANISM FOR USE WITH MEMORY MODULE - A heat-dissipating mechanism includes a first heat-dissipating device, a first positioning device, a second heat-dissipating device and a second positioning device. The first heat-dissipating device is contacted with a memory module. The first positioning device is disposed on the first heat-dissipating device and includes a protrusion. The second heat-dissipating device is connected with the first heat-dissipating device. The second positioning device has a positioning rail formed in the second heat-dissipating device and corresponding to the protrusion. The second heat-dissipating device is connected with the first heat-dissipating device when the protrusion of the first positioning device is embedded into the positioning rail second positioning device. | 12-02-2010 |
Patent application number | Description | Published |
20100188364 | GHOST RESOLUTION FOR A CAPACITIVE TOUCH PANEL - Ghost resolution sensing methods are provided for capacitive touch panels. When ghost is detected involving two points on a capacitive touch panel, for each of the two points, the intersected traces at that one are concurrently charged to sense the capacitance value from either one of the intersected traces, and according thereto, a real point and a ghost point can be distinguished from each other. Alternatively, the intersected traces are crisscross driven by two synchronous and in phase signals or synchronous but out of phase signals, to sense the capacitance values at the two points. Preferably, intersectional calibration is performed in conjunction therewith, to recognize the real points. | 07-29-2010 |
20110050614 | OBJECT POSITIONING FOR AN X-Y PROJECTED CAPACITIVE TOUCH PANEL - Methods are proposed for object positioning for an X-Y projected capacitive touch panel. In an embodiment, capacitance sensing under inphase excitation of traces is applied to set a base value when the capacitive touch panel is not touched and to obtain capacitances at intersections when the capacitive touch panel is touched, and the base value is compared with the measured capacitances to identify touch points. In other embodiments, X-Y projected sensing and all-point sensing are combined to reduce the amount of calculation and achieve the same positioning effect as an all-point capacitive touch panel. | 03-03-2011 |
20110050632 | MULTI-FIELD SENSING OF A CAPACITIVE TOUCH PANEL - A detect method of a capacitive touch panel alternately senses the traces of the capacitive touch panel to generate two series of fields, interpolates with the first fields to obtain interpolation fields having temporal coordinates identical to that of the second fields, and combines the second fields and the interpolation fields to generate reconstructed frames for coordinate calculation. Therefore, the capacitance sensing sequence of the traces is scheduled in a multi-field way to reduce the operation of the detector circuit of the capacitive touch panel. | 03-03-2011 |
20110050633 | DETECTOR CIRCUIT AND DETECT METHOD OF A CAPACITIVE TOUCH PANEL - A detector circuit and detect method of a capacitive touch panel conditionally abort detection of useless traces of the capacitive touch panel when the capacitive touch panel detects the traces thereof. For a selected trace, first several digital values obtained by detecting the selected trace are compared with a threshold value to identify whether the selected trace is useful or not, and if the selected trace is identified useless, an abort signal is triggered to abort detection of the selected trace. Therefore, the performance of the capacitive touch panel is improved with higher frame rate and less power consumption. | 03-03-2011 |
20110050634 | DETECTOR CIRCUIT AND DETECT METHOD OF A CAPACITIVE TOUCH PANEL - A detector circuit and detect method of a capacitive touch panel conditionally abort sensing of useless traces of the capacitive touch panel when the capacitive touch panel senses the traces thereof. For a selected trace, the trace voltage thereof is sampled to be compared with a threshold voltage. If the sampled voltage is lower than the threshold voltage, the sensing of this trace is aborted and thus the operation of the detector circuit is reduced to improve the performance of the capacitive touch panel. | 03-03-2011 |
20110050635 | BOUNDARY RESOLUTION IMPROVEMENT FOR A CAPACITIVE TOUCH PANEL - A capacitive touch panel has a plurality of traces including a boundary trace, and a virtual trace is defined outward of the boundary trace and assigned with a virtual coordinate and a virtual capacitance for interpolation to position a touch point around the boundary of the capacitive touch panel, thereby eliminating the non-addressable region of the capacitive touch panel. | 03-03-2011 |
20110267312 | SENSING UNIT, SENSING ARRANGEMENT AND SENSING METHOD FOR TOUCH PANEL APPLICATION - Two sensing units are configured as an exciter and a sensor connected to two trace lines, respectively, for mutual capacitance sensing from the capacitance units including these two trace lines. The two sensing units connect the two trace lines together to balance them to a same voltage level first, and then disconnect them from each other. Thereafter, the exciter connects the first trace line to an excitation node to induce a charge change on the second trace line, and the sensor senses the charge change to detect the variation of the mutual capacitance between the two trace lines. | 11-03-2011 |
20120019268 | CAPACITANCE SENSOR LAYOUT SCHEME FOR LINEARITY IMPROVEMENT - A capacitive touchpad includes a plurality of parallel traces configured in a capacitance sensor layout scheme such that the maximum sensor gap is smaller than the sensor pitch to improve the sensor response linearity of the capacitive touchpad. | 01-26-2012 |
20120256647 | CAPACITANCE SENSOR STRUCTURE - A capacitance sensor structure includes a first sensor in a first direction and a second sensor in a second direction for sensing a variation in the mutual capacitance between the first sensor and the second sensor by applying an excitation signal to the first sensor and detecting a response signal from the second sensor. The sensing area of the second sensor is intentionally reduced to be much smaller than the sensing area of the first sensor for noise performance improvement of the mutual capacitance sensing. | 10-11-2012 |
20120256877 | TWO-DIMENSIONAL CAPACITIVE TOUCH PANEL WITH SINGLE SENSOR LAYER - A two-dimensional capacitive touch panel includes three electrodes made from a single sensor layer, with the first one of the electrodes between the other two of the electrodes to establish mutual capacitances between the first electrode and the other two, respectively. The mutual capacitance between the first and second electrodes increases along a direction, and the mutual capacitance between the first and third electrodes decreases along a direction. The first electrode is applied with an excitation signal for sensing variations in the mutual capacitances to calculate a position in the direction that is touched by an external conductor. | 10-11-2012 |
20130215053 | ANTI-INTERFERENCE DRIVING METHOD OF TOUCH PANEL AND TOUCH PANEL DEVICE USING THE SAME - An anti-interference driving method of touch panel has steps of providing a touch panel and outputting multiple excitation signal sets to the respective driving lines of the touch panel. The touch panel has multiple driving lines and multiple receiving lines. Each driving line has multiple sub-driving lines. Each excitation signal set has multiple excitation signals sequentially outputted to the corresponding sub-driving lines. The excitation signals outputted to any adjacent two sub-driving lines are reversed in phase and a time gap between the excitation signals with reverse phases is less than a cycle of each excitation signal. Accordingly, two sensing signals having coupled capacitance values of a noise with different signs is obtained by using a receiving line to sense any adjacent two sub-driving lines and can be directly processed to remove the coupled capacitance value of the noise. | 08-22-2013 |
20130241870 | SCAN METHOD FOR INCREASING FRAME RATE OF TOUCH PANEL AND TOUCH PANEL DEVICE USING THE SAME - A scan method for increasing frame rate of a touch panel having multiple driving lines, multiple sensing lines and a scan cycle with multiple detection cycles, has steps of generating multiple sets of asynchronous excitation signals within each detection cycle with each set of excitation signals outputted to a corresponding driving line, and receiving capacitance sensing values from the sensing lines corresponding to the driving lines. In contrast to conventional scan methods only outputting one set of excitation signals within each detection cycle, the time required to scan entire driving lines is greatly reduced and the frame rate is increased. Additionally, as the multiple sets of asynchronous excitation signals are asynchronous, the interference to the capacitance sensing values sensed by the sensing circuit in response to the multiple sets of excitation signals won't occur. | 09-19-2013 |
20130249852 | STATISTICAL ANALYZING METHOD AND STATISTICAL QUALITY INDICATOR FOR RELIABILITY IMPROVEMENT OF A CAPACITIVE TOUCH DEVICE - For a capacitive touch device having a capacitive touch sensor to be sensed to generate sensed values, a sensing apparatus and method statistically analyze the sensed values generated in a certain time period to evaluate the sensing quality thereof, discard the poor reliable sensed values, and re-sense the capacitive touch sensor to generate new sensed values, by which the resultant output signal will have improved reliability. | 09-26-2013 |
20140160060 | DETECTING METHOD FOR A TOUCH DEVICE - A detecting method for a touch device, the method includes the steps of reading all sensed values of a frame associated with the touch device, computing a difference between a maximum sensed value and a minimum sensed value of all the sensed values of the frame, comparing the difference with a base value to generate a comparison result and executing a corresponding operation based on the comparison result. | 06-12-2014 |