Mun, KR
Byeong-Sang Mun, Cheonan-Si KR
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20130241188 | PRODUCTION METHOD FOR A SPLASH SHIELD USING A CONTINUOUS EXTRUSION-INJECTION-FOAMING MOULDING PROCESS - The present invention relates to a method for producing a splash shield, in which method a base-portion raw material comprising a plastic, glass fibers, a compatibilizer and rubber is subjected to melt extrusion while at the same time injection molding is performed, and then, without removing the injection-molded article from the injection mold, the injection mold is rotated in the open state, and the injection-molded article is conveyed to a foaming mold and subsequently undergoes flame treatment and a polyurethane foam molding step. A single process in the production method is used for the procedure in which the materials are separately compounded and pelletized and the procedure in which the injection-molded article is molded. | 09-19-2013 |
Byung Hee Mun, Gyeonggi-Do KR
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20100264766 | Rotor and Vibration Motor - A rotor is provided. The rotor includes a bearing yoke, a supporting member, a rotor substrate, a coil, and a weight coupled to the supporting member. The supporting member is coupled to the bearing yoke. The rotor substrate is supported by the supporting member. The coil is supported by the supporting member and electrically connected to the rotor substrate. The weight is coupled to the supporting member. | 10-21-2010 |
Byungjun Mun, Gumi KR
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20100253606 | PLASMA DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME - A plasma display panel and a method of manufacturing the same are provided. The plasma display panel includes a substrate and a plurality of electrodes that are positioned substantially parallel to each other on the substrate. The plurality of electrodes include a first electrode in a first area of the substrate and a second electrode in a second area of the substrate outside the first area. A shape of a cross section of the first electrode is different from a shape of a cross section of the second electrode. | 10-07-2010 |
Chang-Sup Mun, Incheon Metropolitan City KR
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20090023265 | ETCHING SOLUTION FOR REMOVAL OF OXIDE FILM, METHOD FOR PREPARING THE SAME, AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE - Provided are an anionic surfactant-containing etching solution for removal of an oxide film, preparation methods thereof, and methods of fabricating a semiconductor device using the etching solution. The etching solution includes a hydrofluoric acid (HF), deionized water, and an anionic surfactant. The anionic surfactant is a compound in which an anime salt is added as a counter ion, as represented by R | 01-22-2009 |
Chear-Yeon Mun, Yogin-Si KR
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20080277708 | SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME - A highly integrated semiconductor device has a device isolation layer demarcating a first active region in a first region of a substrate, and a second active region in a second region of the substrate. A first gate pattern and a second gate pattern are formed on the first active region and the second active region, respectively. A first spacer layer and a second spacer layer are formed over the gate patterns. Then, the second and first spacer layers in the first region are anisotropically etched to form a gate spacer on sidewalls of the first gate pattern. The gate spacer has a lower spacer section formed from the first spacer layer and an upper spacer section formed from the second spacer layer. Then, ions are implanted into the first active region. Subsequently, the upper spacer section and the second spacer layer on the first and second regions, respectively, are removed. A selective growth process is then performed to form a buffer insulating layer on the first active region beside the lower spacer sections. An etch stop layer and an interlayer dielectric may be then formed on the substrate. | 11-13-2008 |
Cheol Mun, Chungju-Si KR
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20110019755 | DATA TRANSMISSION METHOD AND APPARATUS BASED ON JOINT SPACE DIVISION MULTIPLE ACCESS TECHNOLOGY IN COLLABORATIVE DOWNLINK MIMO SYSTEM - A channel condition information feedback method and apparatus are provided for a collaborative wireless communication network using a multiple input multiple output antenna system. The apparatus includes a downlink channel estimator that estimates channels of adjacent base stations, groups base stations from among the adjacent base stations that are capable of collaborative communication, and obtains a maximum singular vector to base stations belonged to a same group; and a vector selector which selects a weight io vector most accurately representing the maximum singular vector and a complex variable most accurately representing the maximum singular vector in combination with the weight vector. | 01-27-2011 |
Cheol Mun, Gyeonggi-Do KR
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20120140663 | METHOD AND APPARATUS FOR FEEDBACK OF CHANNEL STATE INFORMATION IN A DISTRIBUTED ANTENNA SYSTEM (DAS)- BASED WIRELESS COMMUNICATION SYSTEM - Feedback methods and apparatuses are provided for efficiently feeding back downlink Channel State Information (CSI) using limited information in a DAS-based wireless communication system. A method includes determining, by a receiver, a candidate Antenna Port (AP) set from among a plurality of APs; selecting an active AP set from the candidate AP set; and transmitting the candidate AP set, the active AP set, and the downlink CSI of active APs included in the active AP set | 06-07-2012 |
20130182596 | METHOD AND APPARATUS FOR SENDING AND RECEIVING CHANNEL STATE INFORMATION IN MULTIPLE-INPUT MULTIPLE-OUTPUT NETWORK WIRELESS COMMUNICATION SYSTEMS - A method and an apparatus for sending and receiving channel state information in network Multiple-Input Multiple-Output (MIMO) wireless communication systems are provided. Hybrid feedback technology is provided to transfer complete Channel State Information (CSI) to a transmitter by efficiently combining limited amounts of long-term channel information and short-term channel information are In a down link MIMO network system. | 07-18-2013 |
Cheol Mun, Chungbuk KR
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20100284359 | METHOD AND APPARATUS FOR TRANSMITTING/RECEIVING DOWNLINK DATA IN WIRELESS COMMUNICATION NETWORK - Disclosed is C-SDMA and C-BF technology for effectively suppressing inter-cell interference from neighboring BTSs only by using partial channel information delivered from an AT over a limited uplink feedback channel in a collaborative wireless communication system employing an FDD scheme and including neighboring BTSs connected to each other through a high-speed wireline communication network. C-SDMA technology makes it possible to select the optimal feedback scheme by considering uplink feedback channel capacity allowed in the system. C-BF technology uses information on beamforming signal weight and main beamforming interference weight vectors to suppress collision between formed by weights that each BTS uses, thereby improving system transmission capacity. Technology providing higher system capacity is adaptively selected from among C-SDMA and C-BF by using limited feedback information, so that high system capacity is provided in various environmental conditions. | 11-11-2010 |
Dae Il Mun, Gwangju KR
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20090283189 | SNOW TIRE - The present invention discloses a snow tire for improving steering performance and braking performance while running on a general road surface. The snow tire of the present invention comprises a plurality of tread blocks | 11-19-2009 |
Dae-Seung Mun, Yongin-City KR
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20100012272 | Substrate etching apparatus - A substrate etching apparatus includes a supporting unit for supporting substrate in a vertical position and an etching solution supply unit disposed above the substrate to supply an etching solution to the top of the substrate such that the etching solution runs down both of faces of the substrate from the top of the substrate. | 01-21-2010 |
Dae-Won Mun, Gyeonggi-De KR
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20100169665 | METHOD FOR INDEXING ENCRYPTED COLUMN - The present invention relates to a method of creating indexes so that an index scan can be worked for columns in a database encrypted by means of secrete key cipher algorithm. The method of creating indexes according to the present invention comprises the steps of: re-encrypting to be able to maintain the sort ordering based on a plain text; creating new indexes based on the re-encrypted data; and configuring domain index architecture of encrypted columns so that the created index is used for the index scan in a query | 07-01-2010 |
Dal Yong Mun, Daejeon KR
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20120060991 | AIRLESS TIRE - Disclosed herein is an airless are which absorbs shock and holds pressure applied to the tire through an auxetic spoke buffer without using air pressure. The airless tire includes a cylindrical tread being in contact with the ground, an axle fixing section having a smaller circumference than the tread and disposed inside the tread, and an auxetic spoke buffer connecting the tread and the axle fixing section and providing a buffering function. Accordingly, the airless tire is transformed only to an extent to properly function as a fire when the spoke buffer is transformed by pressure or impact and fully returns to an original shape when pressure or impact is removed. | 03-15-2012 |
Du Hyun Mun, Anyang-Si KR
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20100061289 | METHOD OF PERFORMING AND SUPPORTING HANDOVER IN BROADBAND WIRELESS ACCESS SYSTEM - A method for performing a handover between MBS zones of a mobile station receiving multicast and broadcast service (MBS) data in a wireless access system is disclosed. The method for performing the handover between first and second MBS zones of the mobile station in a wireless access system includes receiving the MBS from a first base station belonging to the first MBS zone which uses a first MBS zone identifier (ID), requesting the handover between the first and second MBS zones, receiving parameter information including a second MBS zone identifier (ID), from the first base station, and receiving the MBS from a second base station belonging to the second MBS zone, using the parameter information, wherein the second MBS zone uses the second MBS zone identifier (ID) which is needed to receive the MBS. | 03-11-2010 |
20100165908 | METHOD FOR RECEIVING AND PROVIDING MULTICAST BROADCASTING SERVICE - A method for adaptively receiving and providing a multicast broadcasting service (MBS) according to at least one of capability and a channel status of a mobile station (MS) is disclosed. In more detail, a base station provides the MBS to MSs using different layers according to the capabilities and/or the channel statuses of the MSs, and the MSs adaptively receive the MBS according to the respective capabilities and/or the channel statuses of the MSs. | 07-01-2010 |
Gi-Tae Mun, Gyeonggi-Do KR
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20120023433 | METHOD AND APPARATUS FOR INPUTTING CHARACTER IN A PORTABLE TERMINAL - A method and apparatus for inputting a character in a portable terminal are provided. The method includes displaying a virtual keypad on a screen, inputting the character by detecting a user touch, predicting at least one next input character associated with the input character, and controlling at least one area between a key area of the predicted character and a key area of an unpredicted character in the virtual keypad so that the respective key area is displayed in different scale for distinction. | 01-26-2012 |
20120136933 | APPARATUS AND METHOD FOR SHARING CAPTURED DATA IN PORTABLE TERMINAL - An apparatus and method for acquiring captured data and for transmitting the acquired data to neighboring devices while acquiring the data and after completion of acquisition so as to share the data with other devices in same network. | 05-31-2012 |
20120157076 | APPARATUS AND METHOD FOR REMOTELY CONTROLLING IN MOBILE COMMUNICATION TERMINAL - An apparatus and a method for remote control at a mobile communication terminal includes a display unit that outputs a remote control screen when a remote control event occur; a communication unit either transmits or receives a remote control signal to or from an object terminal as well as data for storage when a remote control event occurs; a remote control processor processes the remote control signal received from the communication unit, and controls either the transmitting or receiving of data for storage; and a controller controls the remote control processor according to the received remote control signal, so as to transmit a storage data transmission or reception request message to the object terminal in response a respective on of a transmission or a reception request for the data for storage. | 06-21-2012 |
20120242582 | APPARATUS AND METHOD FOR IMPROVING CHARACTER INPUT FUNCTION IN MOBILE TERMINAL - A character input mode of a mobile terminal permits easier viewing of characters being entered on a virtual keyboard. An apparatus and a method permitting detection of misprinted/omitted character when performing a special character input mode An output manager outputs a character input screen including a virtual keyboard region and a character input field region when entering a character input mode, and outputs an auxiliary character input field showing information of currently input data on the virtual keyboard region. A display unit outputs the auxiliary character input field, the character input field, and the virtual keyboard. When an input of the virtual keyboard is detected, the output manager outputs information of data corresponding to an input position on the character input field and the auxiliary character input field. The character input mode preferably includes a mode for inputting at least one of text data, symbol data, and emoticon data. | 09-27-2012 |
20120293425 | APPARATUS AND METHOD FOR SUPPORTING ERASER FUNCTION OF DIGITIZER PEN IN DIGITIZER SYSTEM - An apparatus and method for supporting an eraser function of a digitizer pen in a digitizer system are provided. The method includes, if it is recognized that an eraser part of the digitizer pen gets contact on a reception device, determining a pressure of the eraser part contacting on a surface of the reception device and, according to the determined pressure, changing a frequency transmitted to the reception device. | 11-22-2012 |
20130002574 | APPARATUS AND METHOD FOR EXECUTING APPLICATION IN PORTABLE TERMINAL HAVING TOUCH SCREEN - An apparatus and method for defining objects representing respective applications, verifying an object used as an input tool by a user through an input size and an input shape which are input on a touch screen, and executing an application defined by the verified object. The apparatus preferably includes an object analyzing unit for verifying a touch input size and identifying a type of an object input on the touch screen and a controller for executing an associated application that corresponds to or is linked with the identified object. | 01-03-2013 |
20140240265 | METHOD OF CONTROLLING VIRTUAL KEYPAD AND ELECTRONIC DEVICE THEREFOR - An apparatus and method for controlling a virtual keypad in an electronic device. The method includes determining whether a touch is sensed, determining whether the touch is held during a reference time when the touch is sensed, determining whether a coordinate of the touch is included in a reference region when the touch is held during the reference time, and displaying the virtual keypad based on the coordinate of the touch when the coordinate of the touch is included in the reference region. | 08-28-2014 |
Hen-Hee Mun, Seocho- KR
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20090097552 | SIGNAL COMPRESSING SYSTEM - A multi-scanner scans a signal according to several different patterns. A scanning pattern selector determines which scanning pattern produced the most efficient coding result, for example, for runlength coding, and outputs a coded signal, coded most efficiently, and a selection signal which identifies the scanning pattern found to be most efficient. | 04-16-2009 |
Hyeran Mun, Gyeonggi-Do KR
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20120166309 | AUTHENTICATION SYSTEM AND AUTHENTICATION METHOD USING BARCODES - Disclosed is an authentication method using barcodes. the authentication method includes: converting into a first barcode and outputting, by a first user device, authentication related information provided from a service providing server; receiving, by a second user device, the first barcode; generating, by the second user device, signature information or authentication information on the authentication related information by using a signature key or a certificate; and providing, by the second user device, the signature information or the authentication information to the service providing server. | 06-28-2012 |
Hyeran Mun, Daejeon KR
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20120084567 | GROUP SIGNATURE SYSTEM AND METHOD PROVIDING CONTROLLABLE LINKABILITY - A group signature system includes: a key issuer server for generating a first parameter of a group public key, generating a corresponding master issuing key, and issuing a signature key to a user when a user device joins; an opener server for generating a second parameter of the group public key, and a corresponding master opening key and master linking key; and a linker server for checking whether two valid signatures have been linked by using the master linking key when the two signatures corresponding to a group public key are given. The group signature system further includes: a signature verifying unit for confirming a validity of the given signatures and a signer information confirming unit for confirming a validity of singer confirming information generated by the opener server. | 04-05-2012 |
20120163582 | DATA ENCODING AND DECODING APPARATUS AND METHOD THEREOF FOR VERIFYING DATA INTEGRITY - A data encoding apparatus for verifying data integrity by using a white box cipher includes: an encoding unit for encoding content by using a white box cipher table; and an arithmetic logic unit for performing an arithmetic logic operation on the white box cipher table and content information to output an encoded white box cipher table. The arithmetic logic operation is an exclusive OR operation. The content information is license information of the content or hash value of the license information of the content. | 06-28-2012 |
20120163654 | METHOD AND SYSTEM FOR TRACKING ILLEGAL DISTRIBUTOR AND PREVENTING ILLEGAL CONTENT DISTRIBUTION - A system for tracking an illegal distributor and preventing an illegal content distribution includes: a forensic mark generator for receiving content and a content identification code from a content providing apparatus to generate a forensic mark; a forensic mark database for storing the generated forensic mark; a forensic mark insertion unit for inserting the forensic mark into the content; and a content database for storing the content into which the forensic mark has been inserted. The system further includes a content transmitter for transmitting the content into which the forensic mark has been inserted to the content utilization apparatus. | 06-28-2012 |
20120170740 | CONTENT PROTECTION APPARATUS AND CONTENT ENCRYPTION AND DECRYPTION APPARATUS USING WHITE-BOX ENCRYPTION TABLE - A content protection apparatus using a white-box encryption table includes: a random number generation unit for generating a random number; a white-box encryption table for encrypting the random number and user information provided from a user to generate an encrypted output value; and an operation unit for performing an operation between the encrypted output value and data inputted from an outside to encrypt or decrypt the data. | 07-05-2012 |
Hye-Ran Mun, Gwangju KR
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20120099726 | CONTENT PROTECTION APPARATUS AND METHOD USING BINDING OF ADDITIONAL INFORMATION TO ENCRYPTION KEY - The present invention relates to a content protection apparatus and method using binding of additional information to an encryption key. The content protection apparatus includes an encryption unit for creating an encryption key required to encrypt data requested by a user terminal and then generating encrypted data in which the data is encrypted. An additional information management unit manages additional information including authority information about the encrypted data. A White-Box Cryptography (WBC) processing unit generates a WBC table required to bind the encryption key corresponding to the encrypted data to the additional information. A bound data generation unit generates bound data in which the encrypted key is bound to the additional information, using a cipher included in the WBC table. | 04-26-2012 |
20120159166 | METHOD OF VERIFYING KEY VALIDITY AND SERVER FOR PERFORMING THE SAME - Disclosed herein is a method of verifying key validity and a server for performing the method. The method is configured such that a service provision server verifies key validity in an anonymous service for providing local linkability. The service provision server receives a revocation list. A local revocation list is generated using the received revocation list and a secret key. A virtual index of a service user required to verify key validity is calculated. Whether a key of the service user is valid is verified, based on whether the virtual index is included in the local revocation list. | 06-21-2012 |
Hyo-Young Mun, Yongin-City KR
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20140017967 | METHOD OF MANUFACTURING DISPLAY PANEL - A method of manufacturing a display panel includes forming a mother panel on a base substrate, attaching an upper passivation film to the mother panel, detaching the base substrate from the mother panel, attaching a lower film to the mother panel, and cutting the mother panel to which the upper passivation film and the lower film are attached to form the display panel, the display panel being in a form of a cell unit. The display panel includes a display substrate, a display device layer, and a thin film encapsulation layer. | 01-16-2014 |
20140061610 | ORGANIC LIGHT EMITTING DEVICE AND MANUFACTURING METHOD THEREOF - A method for manufacturing an organic light emitting device includes: forming an organic light emitting display panel including a substrate provided on a support substrate, an organic light emitting element on the substrate, and a thin film encapsulating film covering the organic light emitting element; detaching the support substrate from the organic light emitting display panel; attaching a bottom protecting film to a bottom of the organic light emitting display panel, the bottom protecting film comprising a first electricity removing layer configured to remove static electricity; and cutting the organic light emitting display panel into a plurality of organic light emitting devices. | 03-06-2014 |
20140091288 | ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD OF MANUFACTURING THE SAME - An organic light emitting diode (OLED) display includes a display panel including a flexible substrate and a thin film encapsulation (TFE) for covering and protecting an organic light emitting element formed on the flexible substrate, a first protective film arranged on the TFE to be opposite to the TFE, a second protective film arranged on the flexible substrate to be opposite to the flexible substrate, a first adhesive disposed between the TFE and the first protective film, a second adhesive disposed between the flexible substrate and the second protective film, a third protective film arranged on the second protective film to be opposite to the second protective film, and a third adhesive disposed between the second protective film and the third protective film. | 04-03-2014 |
Hyunrok Mun, Changwon-Si KR
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20110232728 | Photovoltaic Module - A photovoltaic module has a reinforcement beam for strength reinforcement. The photovoltaic module includes a solar panel having one or more solar cells, a frame surrounding an edge of the solar panel, and a reinforcement beam connecting two separate sides of the frame at the rear of the solar panel, which is opposite to a light receiving surface of the solar panel upon which solar light is incident, the reinforcement beam having a hollow space defined therein. | 09-29-2011 |
Hyun Sam Mun, Suwon KR
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20100035671 | MOBILE COMMUNICATION TERMINAL CASE AND METHOD OF MANUFACTURING THE SAME - There is provided a mobile communication terminal case including: a case body of a mobile communication terminal having a first surface and a second surface opposite to the first surface, and a via hole formed through the first surface and the second surface; a conductive pattern provided on the first surface of the case body; a carrier film provided on the first surface of the case body to cover the conductive pattern; and conductive epoxy filling the via hole and having one end thereof in contact with the conductive pattern. | 02-11-2010 |
20110199269 | ANTENNA PATTERN FRAME, ELECTRONIC DEVICE PROVIDED WITH ANTENNA PATTERN FRAME AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE - There is provided an antenna pattern frame according to one embodiment of the present invention, including: a radiator frame that has an insertion groove formed on one surface of the radiator frame and is provided with a through part connected from one point of the insertion groove to an opposite surface to the one surface of the radiator frame; and a wire antenna that includes an antenna pattern part formed to be inserted into the insertion groove and an interconnection part formed to be exposed to the opposite surface by extending from the antenna pattern part and penetrating through the through part. | 08-18-2011 |
20110278186 | CASE OF ELECTRONIC DEVICE HAVING LOW FREQUENCY ANTENNA PATTERN EMBEDDED THEREIN, MOLD THEREFOR AND METHOD OF MANUFACTURING THEREOF - There is provided an electronic device case having a low frequency antenna pattern embedded therein, the case including: a radiator frame injection molded using a polymer mixture containing a magnetic substance component so that a radiator including a low frequency antenna pattern part is formed on one surface thereof; a case frame injection molded upwardly of the radiator frame and provided with the radiator embedded between the radiator frame and the case frame; and a boundary part forming a boundary between the radiator frame and the case frame and having a groove formed inwardly of the case frame. | 11-17-2011 |
20110279002 | CASE OF ELECTRONIC DEVICE HAVING ANTENNA PATTERN EMBEDDED THEREIN, AND MOLD THEREFOR AND METHOD OF MANUFACTURING THEREOF - There is provided a case of an electronic device having an antenna pattern embedded therein, the case including: a radiator frame injection molded so that a radiator including an antenna pattern part formed of a metal sheet is exposed on one surface thereof; a case frame injection molded upward of the radiator frame, such that the radiator is embedded between the radiator frame and the case frame; and a boundary part forming a boundary between the radiator frame and the case frame and having a groove formed inward of the case frame. | 11-17-2011 |
20110291899 | ANTENNA RADIATOR, METHOD OF MANUFACTURING ELECTRONIC DEVICE CASE HAVING PLURALITY OF ANTENNA PATTERN RADIATORS EMBEDDED THEREIN, AND ELECTRONIC DEVICE CASE - An antenna radiator includes a plurality of antenna pattern radiators including antenna pattern portions receiving or transmitting an external signal, respectively, a bridge configured to connect the antenna pattern portions, and a cutting assistance part formed in a connection portion between the bridge and the antenna pattern portions and facilitating detachment of the bridge from the antenna pattern portions. | 12-01-2011 |
20120039050 | ELECTRONIC DEVICE HAVING TRANSMISSION LINE PATTERN EMBEDDED IN CASE AND METHOD FOR MANUFACTURING THE SAME - There are provided an electronic device having a transmission line pattern embedded in a case and a method for manufacturing the same. The electronic device includes a line pattern body embedded in a case and including a line pattern for electrically connecting components to each other, terminal portions respectively disposed at portions of the line pattern corresponding to terminals of the components to be electrically connected, and exposed from the bottom of the case, and connection members connecting the terminals of the components with the terminal portions. | 02-16-2012 |
Jae Eop Mun, Gyeongsangnam-Do KR
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20120036700 | UNIVERSAL PLATFORM AND AIRCRAFT ASSEMBLY METHOD USING THE SAME - Disclosed herein are a universal platform and an assembly method of an aircraft using the same. The universal platform includes a plurality of scissor lifts arranged around an aircraft, wherein each of the plural scissor lifts includes a base frame, a support frame located above the base frame, a support table fixedly coupled to an upper portion of the support frame, a plurality of link members axially assembled to be mutually pivoted between the support frame and the base frame, a plurality of hydraulic cylinders coupled to the respective link members and the base frame so as to lift the support frame in upward and downward directions, and a slide member slidably coupled to the support table, and the slide member slides from the support table toward the aircraft so as to allow a worker to work according to height, and there is provided the assembly method of the aircraft using the universal platform, thereby contributing to improvement in productivity and in health of workers. | 02-16-2012 |
Jae Kyoung Mun, Daejon KR
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20140159050 | FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME - A field effect transistor is provided. The field effect transistor may include a capping layer on a substrate, a source ohmic electrode and a drain ohmic electrode on the capping layer, a first insulating layer and a second insulating layer stacked on the capping layer to cover the source and drain ohmic electrodes, a Γ-shaped gate electrode including a leg portion and a head portion, the leg portion being connected to the substrate between the source ohmic electrode and the drain ohmic electrode, and the head portion extending from the leg portion to cover a top surface of the second insulating layer, a first planarization layer on the second insulating layer to cover the Γ-shaped gate electrode, and a first electrode on the first planarization layer, the first electrode being connected to the source ohmic electrode or the drain ohmic electrode. | 06-12-2014 |
Jae-Kyoung Mun, Daejeon KR
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20080251858 | FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME - A field effect transistor having a T- or Γ-shaped fine gate electrode of which a head portion is wider than a foot portion, and a method for manufacturing the field effect transistor, are provided. A void is formed between the head portion of the gate electrode and a semiconductor substrate using an insulating layer having a multi-layer structure with different etch rates. Since parasitic capacitance between the gate electrode and the semiconductor substrate is reduced by the void, the head portion of the gate electrode can be made large so that gate resistance can be reduced. In addition, since the height of the gate electrode can be adjusted by adjusting the thickness of the insulating layer, device performance as well as process uniformity and repeatability can be improved. | 10-16-2008 |
20090146184 | SEMICONDUCTOR DEVICE WITH T-GATE ELECTRODE AND METHOD FOR FABRICATING THE SAME - Provided are a semiconductor device with a T-gate electrode capable of improving stability and a high frequency characteristic of the semiconductor device by reducing source resistance, parasitic capacitance, and gate resistance and a method of fabricating the same. In the semiconductor device, in order to form source and drain electrodes and the T-gate electrode on a substrate, first and second protective layers constructed with silicon oxide layers or silicon nitride layers are formed on sides of a supporting part under a head part of the T-gate electrode, and the second protective layer constructed with a silicon oxide layer or silicon nitride layer is formed on sides of the source and drain electrodes. Accordingly, it is possible to protect an activated region of the semiconductor device and reduce gate-drain parasitic capacitance and gate-source parasitic capacitance. | 06-11-2009 |
20090146724 | SWITCHING CIRCUIT FOR MILLIMETER WAVEBAND CONTROL CIRCUIT - Provided is a switching circuit for a millimeter waveband control circuit. The switching circuit for a millimeter waveband control circuit includes a switching cell disposed on a signal port path to match an interested frequency and including at least one transistor coupled vertically to an input/output transmission line and a plurality of ground via holes disposed symmetrically in an upper portion and a lower portion of the input/output transmission line; capacitors for stabilizing a bias of the switching cell; and bias pads coupled in parallel to the capacitor to control the switching cell. Therefore, the switching circuit may be useful to improve its isolation by simplifying its design and layout through the use of symmetrical structure of optimized switching cells without the separate use of different switch elements, and also to reduce its manufacturing cost through the improved yield of the manufacturing process and the enhanced integration since it is possible to reduce a chip size of an integrated circuit in addition to its low insertion loss. | 06-11-2009 |
20090170250 | TRANSISTOR OF SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a transistor of a semiconductor device and method of fabricating the same. The transistor includes: an epitaxy substrate disposed on a semi-insulating substrate and having a buffer layer, a first Si planar doping layer, a first conductive layer, a second Si planar doping layer, and a second conductive layer, which are sequentially stacked, the second Si planar doping layer having a doping concentration different from that of the first Si planar doping layer; a source electrode and a drain electrode diffusing into the first Si planar doping layer to a predetermined depth and disposed on both sides of the second conductive layer to form an ohmic contact; and a gate electrode disposed on the second conductive layer between the source and drain electrodes and being in contact with the second conductive layer. In this structure, both isolation and switching speed of the transistor can be increased. Also, the maximum voltage limit applied to the transistor is increased due to increases in gate turn-on voltage and threshold voltage and a reduction in parallel conduction element. As a result, the power handling capability of the transistor can be improved, thus improving a high-power low-distortion characteristic and an isolation characteristic. | 07-02-2009 |
20100133551 | HIGH-SPEED OPTICAL INTERCONNECTION DEVICE - Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors. | 06-03-2010 |
20110143507 | TRANSISTOR OF SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a transistor of a semiconductor device and a method of fabricating the same. The transistor of a semiconductor device includes an epitaxial substrate having a buffer layer, a first silicon (Si) planar doped layer, a first conductive layer, a second Si planar doped layer having a different dopant concentration from the first Si planar doped layer, and a second conductive layer, which are sequentially formed on a semi-insulating substrate; a source electrode and a drain electrode formed on both sides of the second conductive layer to penetrate the first Si planar doped layer to a predetermined depth to form an ohmic contact; and a gate electrode formed on the second conductive layer between the source electrode and the drain electrode to form a contact with the second conductive layer, wherein the gate electrode, the source electrode and the drain electrode are electrically insulated by an insulating layer, and a predetermined part of an upper part of the gate electrode is formed to overlap at least one of the source electrode and the drain electrode. Therefore, a maximum voltage that can be applied to the switching device is increased due to increases of a gate turn-on voltage and a breakdown voltage, and decrease of a parallel conduction component. As a result of this improved power handling capability, high-power and low-distortion characteristics and high isolation can be expected from the switching device. | 06-16-2011 |
20130020649 | NITRIDE ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen. | 01-24-2013 |
20130069127 | FIELD EFFECT TRANSISTOR AND FABRICATION METHOD THEREOF - A method for fabricating a field effect transistor according to an exemplary embodiment of the present disclosure includes: forming an active layer, a cap layer, an ohmic metal layer and an insulating layer on a substrate; forming multilayered photoresists on the insulating layer; patterning the multilayered photoresists to form a photoresist pattern including a first opening for gate electrode and a second opening for field electrode; etching the insulating layer by using the photoresist pattern as an etching mask so that the insulating layer in the first opening is etched more deeply and the cap layer is exposed through the first opening; etching the cap layer exposed by etching the insulating layer through the first opening to form a gate recess region; and depositing a metal on the gate recess region and the etched insulating layer to form a gate-field electrode layer. | 03-21-2013 |
20130069173 | POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; | 03-21-2013 |
20130134554 | VERTICAL CAPACITORS AND METHODS OF FORMING THE SAME - Provided are vertical capacitors and methods of forming the same. The formation of the vertical capacitor may include forming input and output electrodes on a top surface of a substrate, etching a bottom surface of the substrate to form via electrodes, and then, forming a dielectric layer between the via electrodes. As a result, a vertical capacitor with high capacitance can be provided in a small region of the substrate. | 05-30-2013 |
20130146944 | SEMICONDUCTOR DEVICE INCLUDING STEPPED GATE ELECTRODE AND FABRICATION METHOD THEREOF - Disclosed are a semiconductor device including a stepped gate electrode and a method of fabricating the semiconductor device. The semiconductor device according to an exemplary embodiment of the present disclosure includes: a semiconductor substrate having a structure including a plurality of epitaxial layers and including an under-cut region formed in a part of a Schottky layer in an upper most part thereof; a cap layer, a first nitride layer and a second nitride layer sequentially formed on the semiconductor substrate to form a stepped gate insulating layer pattern; and a stepped gate electrode formed by depositing a heat-resistant metal through the gate insulating layer pattern, wherein the under-cut region includes an air-cavity formed between the gate electrode and the Schottky layer. | 06-13-2013 |
20130169365 | AUTOMATIC GAIN CONTROL FEEDBACK AMPLIFIER - Disclosed is an automatic gain control feedback amplifier that can arbitrarily control a gain even when a difference in input signal is large. The automatic gain control feedback amplifier includes: an amplification circuit unit configured to amplify voltage input from an input terminal and output the amplified voltage to an output terminal; a feedback circuit unit connected between the input terminal and the output terminal and including a feedback resistor unit of which a total resistance value is determined by one or more control signals and a feedback transistor connected to the feedback resistor unit in parallel; and a bias circuit unit configured to supply predetermined bias voltage to the feedback transistor. | 07-04-2013 |
20130187197 | HIGH ELECTRON MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF - Disclosed is a manufacturing method of a high electron mobility transistor. The method includes: forming a source electrode and a drain electrode on a substrate; forming a first insulating film having a first opening on an entire surface of the substrate, the first opening exposing a part of the substrate; forming a second insulating film having a second opening within the first opening, the second opening exposing a part of the substrate; forming a third insulating film having a third opening within the second opening, the third opening exposing a part of the substrate; etching a part of the first insulating film, the second insulating film and the third insulating film so as to expose the source electrode and the drain electrode; and forming a T-gate electrode on a support structure including the first insulating film, the second insulating film and the third insulating film. | 07-25-2013 |
20130207730 | IMPEDANCE MATCHING CIRCUIT, POWER AMPLIFIER AND MANUFACTURING METHOD FOR VARIABLE CAPACITOR - Disclosed is an impedance matching circuit capable of wideband matching. The impedance matching circuit includes: a first variable inductor unit of which one end is connected to the first node and an inductance value varies; a second inductor unit connected between the first node and a second node and having a variable inductance value; a first variable capacitor unit of which one end is connected to the first node and a capacitance value varies; and a second variable capacitor unit of which one end is connected to the second node and a capacitance value varies, and the other end of the first variable capacitor unit and the other end of the second variable capacitor unit are connected to a ground voltage terminal to perform the impedance matching between a circuit connected to the other end of the first variable inductor unit and a circuit connected to the second node. | 08-15-2013 |
20140017885 | METHOD OF MANUFACTURING FIELD EFFECT TYPE COMPOUND SEMICONDUCTOR DEVICE - Disclosed is a method of manufacturing a field effect type compound semiconductor device in which leakage current of a device is decreased and breakdown voltage is enhanced. The method of manufacturing a field effect type compound semiconductor device includes: stacking an active layer and an ohmic layer on a substrate and forming a first oxide layer on the ohmic layer; forming a mesa region in predetermined regions of the first oxide layer, the ohmic layer, and the active layer; planarizing the mesa region after forming a nitride layer by evaporating a nitride on the mesa region; forming an ohmic electrode on the first oxide layer; forming a minute gate resist pattern after forming a second oxide layer on a semiconductor substrate in which the ohmic electrode is formed and forming a minute gate pattern having a under-cut shaped profile by dry-etching the first oxide layer, the nitride layer, and the second oxide layer; forming a gate recess region by forming a head pattern of a gamma gate electrode on the semiconductor substrate; and forming the gamma gate electrode by evaporating refractory metal on the semiconductor substrate in which the gate recess region is formed. | 01-16-2014 |
20140097685 | A SERIAL LOADING CONSTANT POWER SUPPLY SYSTEM - The inventive concept relates to a system supplying a constant current direct current power to serial loads connected in series with one another. | 04-10-2014 |
20140103539 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device may include a substrate having a lower via-hole, an epitaxial layer having an opening exposing a top surface of the substrate, a semiconductor chip disposed on the top surface of the substrate and including first, second, and third electrodes, an upper metal layer connected to the first electrode, a supporting substrate disposed on the upper metal layer and having an upper via-hole, an upper pad disposed on the substrate and extending into the upper via-hole, a lower pad connected to the second electrode in the opening, and a lower metal layer covering a bottom surface of the substrate and connected to the lower pad through the lower via-hole. | 04-17-2014 |
20140159049 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor device includes forming devices including source, drain and gate electrodes on a front surface of a substrate including a bulk silicon, a buried oxide layer, an active silicon, a gallium nitride layer, and an aluminum-gallium nitride layer sequentially stacked, etching a back surface of the substrate to form a via-hole penetrating the substrate and exposing a bottom surface of the source electrode, conformally forming a ground interconnection on the back surface of the substrate having the via-hole, forming a protecting layer on the front surface of the substrate, and cutting the substrate to separate the devices from each other. | 06-12-2014 |
20140159115 | TRANSISTOR AND METHOD OF FABRICATING THE SAME - A high electron mobility transistor includes a T-type gate electrode disposed on a substrate between source and drain electrodes and insulating layers disposed between the substrate and the T-type gate electrode. The insulating layers include first, second, and third insulating layers. The third insulating layer is disposed between the substrate and a head portion of the T-type gate electrode such that a portion of the third insulating layer is in contact with a foot portion of the T-type gate electrode. The second insulating layer is disposed between the substrate and the head portion of the T-type gate electrode to be in contact with the third insulating layer. The first insulating layer and another portion of the third insulating layer are sequentially stacked between the substrate and the head portion of the T-type gate electrode to be in contact with the second insulating layer. | 06-12-2014 |
20140160689 | PACKAGE - A package includes a ground plate, a chip mounting plate disposed at a side of the ground plate and having a top surface lower than a top surface of the ground plate, a chip on the chip mounting plate, a first input/output terminal opposite to the chip mounting plate and disposed at another side of the ground plate, and a second input/output terminal opposite to the ground plate and disposed at a side of the chip mounting plate. The first and second input/output terminals are electrically connected to the chip. | 06-12-2014 |
20140167070 | ELECTRONIC CHIP AND METHOD OF FABRICATING THE SAME - Provided are an electronic chip and a method of fabricating the same. The semiconductor chip may include a substrate, an active device integrated on the substrate, a lower interlayered insulating layer covering the resulting structure provided with the active device, a passive device provided on the lower interlayered insulating layer, an upper interlayered insulating layer covering the resulting structure provided with the passive device, and a ground electrode provided on the upper interlayered insulating layer. The upper interlayered insulating layer may be formed of a material, whose dielectric constant may be higher than that of the lower interlayered insulating layer. | 06-19-2014 |
20140167111 | TRANSISTOR AND METHOD OF FABRICATING THE SAME - A field effect transistor includes an active layer and a capping layer sequentially stacked on a substrate, and a gate electrode penetrating the capping layer and being adjacent to the active layer. The gate electrode includes a foot portion adjacent to the active layer and a head portion having a width greater than a width of the foot portion. The foot portion of an end part of the gate electrode has a width less than a width of the head portion of another part of the gate electrode and greater than a width of the foot portion of the another part of the gate electrode. The foot portion of the end part of the gate electrode further penetrates the active layer so as to be adjacent to the substrate. | 06-19-2014 |
20140167175 | TRANSISTOR AND METHOD OF FABRICATING THE SAME - A field effect transistor is provided. The transistor may include a source electrode and a drain electrode provided spaced apart from each other on a substrate and a ‘+’-shaped gate electrode provided on a portion of the substrate located between the source and drain electrodes. | 06-19-2014 |
20140167806 | SEMICONDUCTOR DEVICE TESTING APPARATUS - Provided is a semiconductor device testing apparatus including a first socket configured to load a package, on which a semiconductor device to be tested may be mounted, and a second socket coupled to the first socket. The first socket may include an upper part including a hole configured to accommodate the package and a terminal pad provided at both side edges of the hole to hold input and output terminals of the package, and a lower part including a heating room, in which a heater and a temperature sensing part may be provided, the heater being configured to heat the semiconductor device and the temperature sensing part being configured to measure temperature of the semiconductor device. The second socket may include a probe card with a pattern that may be configured to receive test signals from an external power source. | 06-19-2014 |
20140179088 | METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE - The inventive concept provides methods for manufacturing a semiconductor substrate. The method may include forming a stop pattern surrounding an edge of a substrate, forming a transition layer an entire top surface of the substrate except the stop pattern, and forming an epitaxial semiconductor layer on the transition layer and the stop pattern. The epitaxial semiconductor layer may not be grown from the stop pattern. That is, the epitaxial semiconductor layer may be isotropically grown from a top surface and a sidewall of the transition layer by a selective isotropic growth method, so that the epitaxial semiconductor layer may gradually cover the stop pattern. | 06-26-2014 |
20140184333 | FEEDBACK AMPLIFIER - Provided is a feedback amplifier. The feedback amplifier includes: an amplification circuit unit amplifying a bust packet signal inputted from an input terminal and outputting the amplified voltage to an output terminal; a feedback circuit unit disposed between the input terminal and the output terminal and controlling whether to apply a fixed resistance value to a signal outputted to the output terminal; a packet signal detection unit detecting a peak value of a bust packet signal from the output terminal and controlling whether to apply the fixed resistance value; and a bias circuit unit generating a bias voltage, wherein the feedback circuit unit determines a feedback resistance value to change the fixed resistance value in response to at least one control signal and adjusts a gain by receiving the bias voltage. | 07-03-2014 |
20140213045 | NITRIDE ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen. | 07-31-2014 |
20140363937 | POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; and a metal configured to connect the field plate and the source electrode. | 12-11-2014 |
20150087142 | HIGH ELECTRON MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF - Disclosed is a manufacturing method of a high electron mobility transistor. The method includes: forming a source electrode and a drain electrode on a substrate; forming a first insulating film having a first opening on an entire surface of the substrate, the first opening exposing a part of the substrate; forming a second insulating film having a second opening within the first opening, the second opening exposing a part of the substrate; forming a third insulating film having a third opening within the second opening, the third opening exposing a part of the substrate; etching a part of the first insulating film, the second insulating film and the third insulating film so as to expose the source electrode and the drain electrode; and forming a T-gate electrode on a support structure including the first insulating film, the second insulating film and the third insulating film. | 03-26-2015 |
Jeong Hun Mun, Daejeon KR
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20110189406 | METHOD OF FORMING GRAPHENE LAYER - The present invention relates to a method of forming a graphene layer, and, more particularly, to a method of forming a graphene layer which is a two-dimensional thin film composed of carbon atoms arranged in a honeycomb-style lattice and having one atom thick and which is put to practical use in the field of electric devices, transparent electrodes or microwave circuits. The method includes the steps of: (a) forming a metal thin film on a substrate; (b) injecting carbon ions into the metal thin film; and (c) heat-treating the carbon ions injected into the metal thin film to form a graphene layer on the metal thin film. The method is advantageous in that a graphene layer is formed by uniformly injecting an accurate amount of carbon ions into a metal thin film depending on the maximum solubility of carbon in the metal thin film and then heat-treating the injected carbon ions, thus uniformly forming the graphene layer on the metal thin film. | 08-04-2011 |
20140295080 | Board and Method for Growing High-Quality Graphene Layer - This invention relates to a board and method for forming a graphene layer, and more particularly, to a board for use in forming a graphene layer, which has a structure able to improve properties of the graphene layer formed thereon, and to a method of forming a high-quality graphene layer using the same. The board of the invention includes a board layer, a metal catalyst layer formed on the board layer and functioning as a catalyst for forming the graphene layer, and a stress reduction layer disposed between the board layer and the metal catalyst layer so as to reduce stress of the metal catalyst layer, wherein the stress reduction layer able to reduce stress of the metal thin film is provided, thus improving crystallinity and surface roughness of the metal thin film, thereby effectively forming a high-quality graphene layer. | 10-02-2014 |
20140299975 | Method and Board for Growing High-Quality Graphene Layer Using High Pressure Annealing - This invention relates to a method and board for forming a graphene layer, and more particularly, to a method of forming a high-quality graphene layer using high pressure annealing and to a board used therein. The method of forming the graphene layer includes forming a reaction barrier layer on a substrate layer, forming a metal catalyst layer which functions as a catalyst for forming the graphene layer on the reaction barrier layer, subjecting a board including a stack of the layers to high pressure annealing, and growing the graphene layer on the metal catalyst layer. This board is subjected to high pressure annealing before growth of the graphene layer, and the reaction barrier layer is formed using a material having high adhesion energy to the metal catalyst layer so as to suppress migration of metal catalyst atoms. | 10-09-2014 |
Jeong Hun Mun, Daegu KR
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20120261645 | Graphene Device Having Physical Gap - Disclosed herein is a graphene device having a structure in which a physical gap is provided so that the off-state current of the graphene device can be significantly reduced without having to form a band gap in graphene, and thus the on/off current ratio of the graphene device can be significantly increased while the high electron mobility of graphene is maintained. | 10-18-2012 |
Jin-Soo Mun, Geoje-Si KR
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20100186816 | SOLAR CELL - A solar cell, including a substrate, a first electrode disposed on the substrate, a photoelectric conversion layer disposed on the first electrode, and a second electrode disposed on the photoelectric conversion layer, wherein a grating is disposed on at least one of the first electrode and the second electrode. | 07-29-2010 |
20110005578 | TANDEM SOLAR CELL AND METHOD OF MANUFACTURING SAME - A tandem solar cell includes: a substrate; a front electrode disposed on the substrate; a back electrode disposed opposite to the front electrode on the substrate; a first cell disposed below the front electrode and including a first buffer layer and a first light absorption layer; and a second cell disposed above the back electrode and including a second light absorption layer and a second buffer layer. The first light absorption layer includes a CuGaSeS layer and a CuGaSe layer, and the second light absorption layer includes a semiconductor compound selected from the group consisting of CuInSe | 01-13-2011 |
20110048524 | THIN FILM SOLAR CELL AND METHOD OF MANUFACTURING THE SAME - A thin film solar cell, includes: a first electrode; a light absorption layer including a first light absorption layer including a group I element-group III element-group VI element compound, a second light absorption layer including a group I element-group III element-group VI element compound, and a third light absorption layer including a group I element-group III element-group VI element compound; and a second electrode, wherein the first light absorption layer has a band gap, which is less a band gap of the second light absorption layer, the band gap of the second light absorption layer is less than a band gap of the third light absorption layer, and the second light absorption layer has a band gap gradient, which increases in a direction from the first light absorption layer to the third light absorption layer. | 03-03-2011 |
Ju-Eel Mun, Yongin-City KR
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20100188794 | Electrostatic chuck and device of manufacturing organic light emitting diode having the same - The present invention discloses an electrostatic chuck sucking and supporting a substrate with an electrostatic force and an OLED manufacturing apparatus having the same. The electrostatic chuck includes an insulating plate having at least one opening penetrating a center thereof, a pair of electrodes mounted on the insulating plate, a first controller applying a voltage to the pair of electrodes, and an electrostatic charge removing unit disposed near the insulating plate and emitting ions into the at least one opening to remove electrostatic charges distributed around a side of the insulating plate. | 07-29-2010 |
20110083788 | SUBSTRATE BONDING APPARATUS AND SUBSTRATE BONDING METHOD - A substrate bonding apparatus includes a vacuum chamber having a bonding space where a first substrate and a second substrates are bonded together, a first pump for sucking air of the bonding space at a first intensity, a second pump for sucking the air of the bonding space at a second intensity greater than the first intensity, a nitrogen supply for supplying nitrogen to the bonding space, a sensor for sensing the pressure of the bonding space; and a controller for controlling the first pump, the second pump, and the nitrogen supply. | 04-14-2011 |
20130319597 | SUBSTRATE BONDING APPARATUS AND SUBSTRATE BONDING METHOD - A substrate bonding apparatus includes a vacuum chamber having a bonding space where a first substrate and a second substrates are bonded together, a first pump for sucking air of the bonding space at a first intensity, a second pump for sucking the air of the bonding space at a second intensity greater than the first intensity, a nitrogen supply for supplying nitrogen to the bonding space, a sensor for sensing the pressure of the bonding space; and a controller for controlling the first pump, the second pump, and the nitrogen supply. | 12-05-2013 |
Kui-Yon Mun, Hwaseong-Si KR
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20100217921 | Memory system and data processing method thereof - A method of processing data of a nonvolatile memory includes performing a randomization operation on a data unit including page data to be programmed into the nonvolatile memory and page metadata corresponding to the page data and generating a random seed; and programming the randomized data unit, and the random seed into the nonvolatile memory, the randomized data unit including the randomized page data and the randomized page metadata. The random seed is programmed within the page metadata and a position at which the random seed is programmed is based on a characteristic of the page data. | 08-26-2010 |
20120166714 | FLASH MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME - A method of controlling a memory, determining whether data access is random; generating a first random sequence (RS) data based on a first seed if data access is not random (column offset=0); mixing the first RS data with data read from the memory or data to be written to the memory; generating a second seed from a first seed if data access is random (column offset not=0); generating a second RS data based on the second seed; and mixing the second RS data with data read from the memory or data to be written to the memory. | 06-28-2012 |
20120265928 | NON-VOLATILE MEMORY DEVICES, METHODS OF OPERATING NON-VOLATILE MEMORY DEVICES, AND SYSTEMS INCLUDING THE SAME - Random sequence data is sequentially generated based on a seed assigned to a selected memory space, and one of access-requested segments of the selected memory space is logically combined with the sequentially generated random sequence data to transfer the access-requested segment. The sequentially generating and the logically combining are iteratively performed until remaining access-requested segments all transferred. | 10-18-2012 |
20120287719 | FLASH MEMORY DEVICE HAVING SEED SELECTOR CIRCUIT - A flash memory device includes a memory cell array, a seed selector circuit, and a randomizing and de-randomizing circuit. The memory cell array includes memory cells forming multiple pages. The seed selector circuit stores seeds corresponding to the multiple pages, respectively. The randomizing and de-randomizing circuit randomizes data to be stored in a selected page. Each page has a corresponding seed and includes multiple sectors having corresponding sector offset values and seed values generated from the seed corresponding to the page. The seed selector circuit selects a seed value from the seed values of the selected page based on a sector offset value indicating a sector of the selected page to which a column offset value, input with an access request, belongs. The randomizing and de-randomizing circuit randomizes data to be stored in the selected page based on the seed value selected by the seed selector circuit. | 11-15-2012 |
20120294104 | NONVOLATILE MEMORY SYSTEMS USING TIME-DEPENDENT READ VOLTAGES AND METHODS OF OPERATING THE SAME - An elapsed time with respect to a programming operation on a memory cell of a nonvolatile memory is determined, a read voltage is adjusted based on the determined elapsed time and a read operation is performed on the memory cell using the adjusted read voltage. Determining the elapsed time may be preceded by performing the programming operation in response to a first access request and determining the elapsed time may include determining the elapsed time in response to a second access request. Memory systems supporting such operations are also described. | 11-22-2012 |
20120331205 | MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME, AND MEMORY SYSTEM INCLUDING THE SAME - A method for operating a memory controller is disclosed. The method includes receiving data output from a memory block of a non-volatile memory device and changing erase count of the memory block based on the received data. | 12-27-2012 |
20130013854 | MEMORY CONTROLLER, METHOD THEREOF, AND ELECTRONIC DEVICES HAVING THE MEMORY CONTROLLER - A method for operating a memory controller is provided. The method includes generating a pseudo random number by using a seed included in a stored seed group corresponding to a page to be currently programmed, wherein the stored seed group is stored among a plurality of seed groups. Data to be programmed into the current page is randomizing by using the pseudo random number and the memory controller outputs the randomized data. A solid state drive (SSD) or other memory storage device such as a memory card includes the memory controller and includes a read only memory (ROM) storing the plurality of seed groups. The memory controller includes a micro-processor and a read only memory (ROM) storing executable code for causing the micro-processor to access the plurality of stored seed groups and to select a seed therefrom corresponding to a page to be currently programmed. | 01-10-2013 |
20130013855 | MEMORY CONTROLLERS AND MEMORY SYSTEMS INCLUDING THE SAME - A memory controller may include a cell state generator that is configured to generate a cell state for each of a plurality of multi-level cells included in a non-volatile memory device, using data of pages. The memory controller may also include a pseudo-random number generator that is configured to generate a pseudo-random number. The memory controller may further include an operator that is configured to change the cell state of each multi-level cell using the pseudo-random number, and that is configured to output a changed cell state for each multi-level cell. | 01-10-2013 |
20130016562 | METHOD AND SYSTEM FOR ADJUSTING READ VOLTAGE IN FLASH MEMORY DEVICEAANM MUN; Kui-YonAACI Hwaseong-SiAACO KRAAGP MUN; Kui-Yon Hwaseong-Si KR - A method is provided for adjusting a read voltage in a flash memory device. The method includes storing first program count information when first pages of flash memory cells are programmed, the first program count information indicating a number of bits having a first logic value from among bits of data programmed in the first pages of the flash memory cells, and obtaining first read count information by counting a number of bits having the first logic value from among bits of data read from the first pages of the flash memory cells, while reading data from the flash memory cells using read voltages. The read voltages are adjusted based on the difference between the first read count information and the first program count information. | 01-17-2013 |
Kyeongsu Mun, Goyang-Si KR
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20140168282 | DISPLAY DEVICE AND METHOD OF CONTROLLING GATE DRIVING CIRCUIT THEREOF - A display device and a method of controlling a gate driving circuit thereof are discussed. The display device includes a display panel, first and second gate driving circuits which are respectively disposed on both sides of the display panel, and a timing controller. The timing controller controls the first and second gate driving circuits in conformity with a first shift mode, compares carry signals received from the first and second gate driving circuits, and controls the first and second gate driving circuits in conformity with a second shift mode when a time interval between the carry signals is greater than a previously determined reference value. | 06-19-2014 |
Kyung Don Mun, Gyunggi-Do KR
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20120298412 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a printed circuit board and a method of manufacturing the same. The method of manufacturing a printed circuit board includes: preparing a base substrate having first circuit layers formed on one surface or both surfaces thereof; forming a plating resist having openings for a first via layer on the base substrate; forming first via layers in the openings for a first via layer; forming insulating layers having outer metal layers on the base substrate having the first via layers formed thereon; forming openings for a second via layer over the first via layer on the insulating layers and the outer metal layers; and completing multi-layer vias by forming second via layers in the openings. | 11-29-2012 |
20120312591 | Printed Circuit Board and Method of Manufacturing the Same - Disclosed herein is a printed circuit board including: an insulating layer including a stopper layer for trench formation disposed in an inner portion thereof and trenches formed to expose the stopper layer for trench formation; and circuit patterns formed in the trenches. | 12-13-2012 |
Kyung Don Mun, Gyeonggi-Do KR
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20130128472 | PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - The present invention discloses a printed circuit board and a manufacturing method thereof. The manufacturing method of the printed circuit board includes: forming a first circuit pattern on a metal layer formed on one surface of a base substrate; forming a second circuit pattern after laminating a first insulating layer in which the first circuit pattern is embedded; sequentially laminating a second insulating layer and a preliminary third circuit pattern on the second circuit pattern; separating the base substrate and forming a hole in the separated substrate; and forming a third circuit pattern, a landless first fill-plating layer, and a second fill-plating layer by performing fill-plating on the entire surface of the substrate in which the hole is formed, forming an insulating film layer on the other surface of the substrate, and performing an etching process on one surface and the other surface of the substrate. | 05-23-2013 |
20140151897 | PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein are a printed circuit board, including an insulating layer; a circuit wiring formed on one surface or both surfaces of the insulating layer and made of a single metal layer; a via formed in the insulating layer for interconnecting the circuit wirings through the insulating layer; and a pad layer formed on one surface or both surfaces of the insulating layer and adhered to an end portion of the via, the pad layer being formed of a central portion extended from the via and an outside portion made of the same single metal layer as the circuit wiring, and a method for manufacturing the same. | 06-05-2014 |
Kyung Sik Mun, Gyeonggi-Do KR
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20130163345 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A method of operating a semiconductor memory device includes an operation of applying a first voltage to selected bit lines, a second voltage to unselected bit lines and a common source line, and turning on drain and source selection transistors, an operation of applying a program voltage to a selected word line and a switch voltage to a switch word line, and applying a first pass voltage to first unselected word lines disposed between the switch word line and a common source line and between the selected word line and a bit line, and elevating the switch voltage to generate hot electrons and inject the hot electrons to a selected memory cell of the selected word line to program the selected cell. | 06-27-2013 |
20140036599 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - The semiconductor memory device includes a memory cell array including a plurality of cell transistors, and a page buffer configured to perform an verification operation for verifying a program state of a selected cell transistor by sensing a voltage of a sense node connected to a selected bit line of the memory cell array through a bit line selection transistor, wherein a logic level corresponding to a voltage of the selected bit line is constantly maintained regardless of the program state of the selected cell transistor during the verification operation. | 02-06-2014 |
Kyung-Su Mun, Cheonan-Si KR
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20100283932 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a first metal pattern, a first insulating layer, a first electrode, and a second metal pattern. The first metal pattern includes a gate line and a signal line. The first insulating layer is disposed on a substrate having the first metal pattern formed thereon. A first opening passes through the first insulating layer to partially expose the signal line. The first electrode is disposed on the first insulating layer corresponding to a unit pixel. The second metal pattern includes a connection electrode contacting the first electrode and the signal line through the first opening and a data line. | 11-11-2010 |
Kyu-Shik Mun, Gyeonggi-Do KR
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20090090411 | Dye-Sensitized Solar Cell and Method of Manufacturing the Same - Provided are a dye-sensitized solar cell and a method of manufacturing the same, which includes: a lower electrode formed of a titanium metal or a titanium alloy; a titanium oxide electrode having a nanotube structure formed on the lower electrode; a metal oxide layer formed on the titanium oxide electrode along a step difference of the nanotube, having a larger band gap than titanium oxide, and having a dye adsorbed on a surface thereof; a counter electrode spaced a predetermined distance apart from the metal oxide layer; and an electrolyte filled between the metal oxide layer and the counter electrode. The titanium oxide electrode having a nanotube structure, which has a large specific surface area, may increase absorption of solar light and allow easy adsorption of a dye due to the metal oxide layer, thereby improving photo current and voltage characteristics of the solar cell. | 04-09-2009 |
Myung Kuk Mun, Icheon-Si KR
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20090174028 | Fuse in a Semiconductor Device and Method for Forming the Same - A fuse of a semiconductor device, and a method for forming the same, wherein the fuse includes a zigzag-shaped fuse portion on a planar structure, thereby reducing energy when the fuse is cut. The laser irradiation time can be reduced, thereby preventing fuse cutting defects and damages on a neighboring fuse. Also, a laser point where a laser is irradiated is not affected by misalignment, thereby improving characteristics of the fuse. | 07-09-2009 |
Ok Kil Mun, Deajeon KR
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20110105672 | ADHESIVES COMPOSITION COMPRISING MIXTURES OF MULTI-BLOCK COPOLYMERS - The present invention relates to an adhesive composition comprising a mixture of multi-block copolymers, in particular, an adhesive composition comprising a block copolymer represented by Formula 1, a hydrocarbon adhesive resin and a plasticizer. The adhesive composition according to the present invention can be easily processed due to its low melting point and shows improved adhesive properties such as loop tack, 180° peel strength and holding power. | 05-05-2011 |
Sang-Cheal Mun, Gyeonggi-Do KR
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20130246551 | APPARATUS AND METHOD FOR TIME SYNCHRONIZATION BY AUTOMATICALLY CONTROLLING SENDING MESSAGE COUNT OF MASTER - Provided are an apparatus and method for time synchronization in a Precision Time Protocol (PTP) network. According to an aspect, there is provided a time synchronization apparatus including: a synchronization unit configured to perform time synchronization between a master and at least one slave based on the number of synchronization messages that are sent from the master; a state-of-synchronization determiner configured to measure performance of the synchronization to thereby determine the state of the synchronization; and a number-of-messages adjustor configured to adjust the number of synchronization messages based on the state of the synchronization. Therefore, by automatically adjusting the number of synchronization messages that are sent from a master according to network traffic, the states of slave nodes, etc., it is possible to minimize entire network traffic and optimize the synchronization performance of nodes. | 09-19-2013 |
Sang-Hoon Mun, Gyeonggi-Do KR
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20080218953 | LOCKING MECHANISM FOR FLAT DISPLAY DEVICE - Provided is a locking mechanism for a flat display device. The locking unit for a single axis rotation flat display device in which an upper body and a lower body are coupled to each other by a rear main hinge, includes: a latch member movable on a guide disposed in the upper body, a locking hole formed in the latch member and a bent portion slantingly bent at a lower end of the latch member which is made of a ferromagnetic material. In a retracted state, the latch member is substantially disposed within the upper body, while in deployed state the latch member protrudes therefrom. A restoration member provides a restoration force to the latch member so as to urge it into its retracted state. A hook member hingedly coupled to the lower body. The hook member having a hook portion whose upper end engages the locking hole. a magnet is installed to or in proximity to the hook member under the hook portion. A push button protrudes from a side portion of the lower body and pushes the hook member so that the hook portion disengages the locking hole when the pushbutton is pressed. | 09-11-2008 |
Sang-Hyuk Mun, Incheon KR
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20090085816 | Internal antenna having surface-mounted receptacle - Disclosed herein is an internal antenna having a surface-mounted receptacle. The internal antenna includes a printed circuit board, a radiator, and a frame. The printed circuit board is configured such that a receptacle is surface-mounted thereon. The radiator is connected to the printed circuit board. The frame is configured such that the printed circuit board and the radiator are mounted thereto. | 04-02-2009 |
Sangmin Mun, Chungcheongnam-Do KR
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20120305191 | APPARATUS FOR TREATING SUBSTRATE - Provided is an apparatus for treating a substrate. The apparatus for treating a substrate may include a process chamber having a space formed therein, a chuck positioned in the process chamber and supporting a substrate, a gas supply unit supplying reaction gas into the process chamber, an upper electrode positioned above the chuck and applying high frequency power to the reaction gas, and a heater installed in the upper electrode and heating the upper electrode. | 12-06-2012 |
Sang-Rok Mun, Mokpo-Si KR
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20130071123 | DEVICE AND METHOD FOR CONTROLLING LASING WAVELENGTH OF TUNABLE LASER, AND A WAVELENGTH DIVISION MULTIPLEXED-PASSIVE OPTICAL NETWORK HAVING THE SAME - The present invention discloses a device and method for controlling a lasing wavelength of a tunable laser, and a wavelength division multiplexed-passive optical network having the same. | 03-21-2013 |
Sang-Rok Mun, Jeonranamdo KR
Patent application number | Description | Published |
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20120213519 | TRANSMISSION DEVICE OF A LOW-NOISE OPTICAL SIGNAL HAVING A LOW-NOISE MULTI-WAVELENGTH LIGHT SOURCE, A TRANSMISSION DEVICE OF BROADCAST SIGNALS USING A LOW-NOISE MULTI-WAVELENGTH LIGHT SOURCE, AND AN OPTICAL ACCESS NETWORK HAVING THE SAME - The present invention discloses a transmission device of a low-noise optical signal having a low-noise multi-wavelength light source, a transmission device of broadcast signals using a low-noise multi-wavelength light source, and an optical access network having the same. | 08-23-2012 |
Seonghun Mun, Incheon KR
Patent application number | Description | Published |
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20110233747 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKING OPTION AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: fabricating a base package substrate having a component side and a system side; coupling a first integrated circuit die on the component side; coupling stacking interconnects on the component side around the first integrated circuit die; forming a package body on the component side, the first integrated circuit die, and the stacking interconnects; forming vertical insertion cavities through the package body and on the stacking interconnects; and forming a trench, in the package body, adjacent to the vertical insertion cavities for reducing a package warping stress. | 09-29-2011 |
20110233751 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: forming a rounded interconnect on a package carrier having an integrated circuit attached thereto, the rounded interconnect having an actual center; forming an encapsulation over the package carrier covering the rounded interconnect; removing a portion of the encapsulation over the rounded interconnect with an ablation tool; calculating an estimated center of the rounded interconnect; aligning the ablation tool over the estimated center; and exposing a surface area of the rounded interconnect with the ablation tool. | 09-29-2011 |
20120241921 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER SHIELD AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a bottom substrate; attaching a first integrated circuit die to the bottom substrate; forming an interposer including: forming an intermediate substrate; forming a shield on the intermediate substrate; and applying a wire-in-film adhesive to the shield; and attaching the interposer to the first integrated circuit die with the wire-in-film adhesive. | 09-27-2012 |
20130154092 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system including: providing a package carrier; mounting an integrated circuit to the package carrier; mounting a circuit interposer above the integrated circuit; mounting a mounting integrated circuit above the circuit interposer; forming a conductive pillar to the circuit interposer adjacent to the mounting integrated circuit; connecting the circuit interposer to the package carrier; and forming an encapsulation on the package carrier. | 06-20-2013 |
Seong Kuk Mun, Changwon-Si KR
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20090188216 | Ceiling type air conditioner - Enclosed is an air conditioner including a foreign matter collecting unit to secondarily collect foreign matter in a brush assembly when the brush assembly for firstly collecting and accumulating the foreign matter filtered by a filter automatically moves. Therefore, the foreign matter separated from the filter is firstly collected in the brush assembly, and the foreign matter can be secondly collected in the foreign matter collecting unit by moving the brush assembly. Therefore, the foreign matter filtered by the filter is automatically removed so that the inconvenient of exchanging and cleaning the filter can be settled and pollution of the filter can be prevented. Since the foreign matter is discharged to outdoor side by simply detaching the foreign matter collecting unit so that convenience of use can be enhanced. | 07-30-2009 |
20090193769 | Ceiling type air conditioner - There is provided a ceiling type air conditioner including a brush assembly for collecting foreign matters filtered by a filter. The brush assembly includes a brush that contacts the foreign matters filtered by the filter and a main body for collecting the foreign matters separated from the filter to store the foreign matters. Therefore, it is possible to effectively collect and store the foreign matters filtered by the filter in the main body due to the movement of the brush assembly. In addition, since a user does not have to exchange or clean the filter, it is possible to prevent inconvenience from being caused by exchanging or cleaning the filter and to prevent the filter from being contaminated. | 08-06-2009 |
Seon Jae Mun, Busan KR
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20090025581 | Mask for screen printing and screen printing method using the same - This invention relates to a mask for screen printing, which includes a mask body composed of a plurality of pattern areas having holes for screen printing and a peripheral area surrounding the outside of the pattern areas; and a protrusion portion formed in the peripheral area of a back surface of the mask body, and to a screen printing method using the same. | 01-29-2009 |
Seon Jae Mun, Suwon KR
Patent application number | Description | Published |
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20110079926 | Method of manufacturing substrate for flip chip and substrate for flip chip manufactured using the same - There is provided a method of manufacturing a substrate for flip chip, and a substrate for flip chip manufactured using the same. The method includes providing a base substrate including at least one conductive pad, forming a solder resist layer on the base substrate, the solder resist layer including a first opening exposing the conductive pad, forming a dry film on the solder resist layer, the dry film including a second opening connected with the first opening, forming a metal post in the first opening and a part of the second opening, filling the second opening above the metal post with solder paste, forming a solder cap by performing a reflow process on the filled solder paste, planarizing a surface of the solder cap, and removing the dry film. Accordingly, fine pitches and improve reliability can be achieved. | 04-07-2011 |
20110133332 | Package substrate and method of fabricating the same - There is provided a package substrate allowing for enhanced reliability by improving the structure of a solder bump and a method of fabricating the same. The package substrate includes: a substrate having at least one conductive pad; an insulating layer provided on the substrate and having an opening to expose the conductive pad; a post terminal provided on the conductive pad inside the opening; and a solder bump provided on the post terminal and having an angle between a bottom surface and a side surface thereof ranging from 80° to 120°. | 06-09-2011 |
20110186991 | Package substrate and method of fabricating the same - There is provided a package substrate capable of controlling the degree of warpage thereof by improving the composition and formation of a post terminal and a method of fabricating the same. The package substrate includes a substrate having at least one conductive pad; an insulating layer provided on the substrate and having an opening to expose the conductive pad; a separation barrier layer provided on the conductive pad inside the opening and formed to be higher than the upper surface of the insulating layer along the side walls thereof; a post terminal provided on the separation barrier layer; and a solder bump provided on the post terminal. | 08-04-2011 |
20130237049 | METHOD OF FABRICATING A PACKAGE SUBSTRATE - A method of fabricating a package substrate including preparing a substrate having at least one conductive pad, forming an insulating layer having an opening to expose the conductive pad on the substrate, forming a separation barrier layer on the conductive pad inside the opening to be higher than the upper surface of the insulating layer along the side walls thereof, forming a post terminal on the separation barrier layer, and forming a solder bump on the post terminal. | 09-12-2013 |
20140103098 | MASK FOR BUMPING SOLDER BALLS ON CIRCUIT BOARD AND SOLDER BALL BUMPING METHOD USING THE SAME - Disclosed herein are a mask for bumping solder balls on a circuit board and a solder ball bumping method using the same. The mask includes: a plurality of openings providing spaces into which the solder balls are inserted to thereby be seated on solder pads; and trenches providing introduction spaces for spreading a flux to portions at which the solder balls are seated on the solder pads and extended from at least one side of circumferences of the openings. | 04-17-2014 |
Seon Jae Mun, Gyunggi-Do KR
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20100132998 | Substrate having metal post and method of manufacturing the same - The invention relates to a substrate having a metal post and a method of manufacturing the same, in which a round solder bump part formed on a metal post melts and flows down along a lateral surface of the metal post by being subjected twice to a reflow process, thus forming a solder bump film for preventing oxidation and corrosion of the metal post. | 06-03-2010 |
20100314161 | SUBSTRATE FOR FLIP CHIP BONDING AND METHOD OF FABRICATING THE SAME - Disclosed is a substrate for flip chip bonding, in which a base solder layer is formed between a pad and a metal post, thereby increasing impact resistance and mounting reliability. A method of fabricating the substrate for flip chip bonding is also provided. | 12-16-2010 |
20140138821 | SUBSTRATE FOR FLIP CHIP BONDING AND METHOD OF FABRICATING THE SAME - Disclosed herein is substrate for flip chip bonding, in which a base solder layer is formed between a pad and a metal post, thereby increasing impact resistance and mounting reliability. A method of fabricating the substrate for flip chip bonding is also provided. | 05-22-2014 |
Seung Cheol Mun, Gyeonggi-Do KR
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20120026918 | METHOD AND SYSTEM OF MANAGING NEIGHBOR RELATION TABLE IN WIRELESS COMMUNICATION SYSTEM HAVING SELF-ORGANIZING NETWORK FUNCTION - Provided is a method of managing a neighbor relation table by a base station in a wireless communication system having a self-organizing network function, which includes receiving a neighbor base station report from a terminal; comparing the neighbor base station report with a stored neighbor relation table; calculating a statistic value of a new base station when the new base station is present in the comparison step; and adding the new base station to the stored neighbor relation table when the statistic value is equal to or greater than a first reference value. | 02-02-2012 |
Seung-Cheol Mun, Seongnam-Si KR
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20080212554 | Apparatus and method for automatically setting a configuration of a home base station - An apparatus and method for automatically setting a configuration in a home base station. In the method for automatically setting a configuration in a home base station, wireless setting information of a neighbor base station and a neighbor home base station is retrieved through a communication interface for a terminal operation when updated wireless setting information is not received from a network apparatus. The retrieved wireless setting information is transmitted to the network apparatus. An operation is performed by reflecting last wireless setting information when the last wireless setting information is received from the network apparatus. The configuration can be automatically set by monitoring an environment of a neighbor base station without a direct operation of an engineer, transmitting a monitoring result to a server, and receiving FA information and PN code information from the server. | 09-04-2008 |
Sil-Gu Mun, Daegu KR
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20080232807 | Wavelength Division Multiplexed-Passive Optical Network Capable of High-Speed Transmission of an Optical Signal By Using Modulation Format Having High Spectral Efficiency - The present invention discloses a wavelength-division multiplexing passive optical network (WDM-PON) capable of high-bandwidth transmission for optical signals by using modulation format having high spectral efficiency. The WDM-PON according to the present invention provides a larger capacity and higher bandwidth transmission economically (at lower costs) by using a modulation format where spectral efficiency (a transmission bit number per a unit band width) is high, while using a low noise part of a light source. | 09-25-2008 |
20080310841 | Long-Reach Wavelength Division Multiplexing Passive Optical Network (Wdm-Pon) - The present invention relates to a long-reach wavelength division multiplexing passive optical network(WDM-PON), and especially to the long-reach WDM-PON capable of ensuring economic and stable QoS (Quality of Service). The Long-reach WDM-PON in accordance with the present invention includes an optical transmitter/receiver located at central office and each optical network termination; wavelength division multiplexer/demultiplexer located at said central office and remote node; and broadband incoherent light source which is connected with a long-reach single-mode fiber to said wavelength division multiplexer/demultiplexer and spectrum-sliced and injected into the transmitters located at said central office and each optical network termination. | 12-18-2008 |
20100054740 | METHOD AND NETWORK ARCHITECTURE FOR UPGRADING LEGACY PASSIVE OPTICAL NETWORK TO WAVELENGTH DIVISION MULTIPLEXING PASSIVE OPTICAL NETWORK BASED NEXT-GENERATION PASSIVE OPTICAL NETWORK - The present invention discloses a network architecture for upgrading a legacy time division multiplexing-passive optical network (TDM-PON) to a wavelength division multiplexing-passive optical network (WDM-PON) based next-generation passive optical network (next-generation PON), wherein the legacy TDM-PON comprises: a central office (CO) having a first optical line termination (OLT); a remote node (RN) having a splitter; a single mode fiber (SMF) connecting the first OLT and the splitter; and a first group of one or more optical network terminations (ONTs) being connected to the splitter by a first group of one or more distribution fibers, and wherein the network architecture further comprises: in case that the next-generation PON is a WDM-PON, a first apparatus for combining and splitting wavelength bands being positioned between the SMF and the first OLT, in order to add a second OLT to be used for the WDM-PON within the CO or within another CO which is located in a position different from the CO, while sharing the SMF; a second apparatus for combining and splitting wavelength bands being positioned at a front terminal of the splitter; and an arrayed waveguide grating (AWG) being connected to the second apparatus for combining and splitting wavelength bands within the RN, and being connected to a second group of one or more ONTs by a second group of one or more distribution fibers within the RN or within another RN which is located in a position different from the RN. | 03-04-2010 |
20100221008 | Wavelength-Division Multiplexed Passive Optical Network for Reducing Degradation in Noise Characteristic of Wavelength-Locked Fabry-Perot Laser Diodes - The present invention relates to a wavelength-division multiplexed passive optical network (WDM-PON) for reducing degradation in noise characteristic of a wavelength-locked Fabry-Perot Laser Diode (F-P LD). A WDM-PON for reducing degradation in a noise characteristic of a wavelength-locked F-P LD in accordance with the present invention comprises a central office (CO); a remote node (RN) being connected to the CO by a single mode fiber; and one or more optical network terminations (ONTs) being connected to the RN by one or more single mode fibers, respectively, wherein the CO comprises: a broadband light source (BLS) for generating light to be injected; a first wavelength-division multiplexing (WDM) filter for filtering for the injected light generated from the BLS and having a bandwidth wider than a bandwidth of the injected light in order to minimize a filtering effect; and one or more optical transceiver having one or more F-P LDs into which light being filtered by the first WDM filter is injected; and wherein the RN filters the injected light generated from the BLS and injects the filtered light into the one or more ONTs; and wherein the RN comprises a second WDM filter having a bandwidth wider than a bandwidth of the injected light in order to minimize a filtering effect. | 09-02-2010 |
20100290782 | REMOTE NODE CONFIGURATION FOR PROVIDING UPGRADED SERVICES IN A PASSIVE OPTICAL NETWORK AND A PASSIVE OPTICAL NETWORK HAVING THE SAME - The present invention discloses a remote node (RN) configuration for providing an enhanced service in a passive optical network and a passive optical network (PON) having the same. In an RN configuration for providing a new service in a PON according to the present invention, it is possible to configure the RN remotely by instantaneous powering from a remote site only when necessary, while the RN being operated as a PON at ordinary times. More specifically, an RN configuration for providing a new service in a PON according to the present invention includes a power generation block capable of providing energy necessary for activating the RN by instantaneously supplied power from the remote site. Further, an RN according to the present invention further includes either one or both of a control agent block capable of controlling and managing optical paths of the RN by using power generated from the power generation block; and a reconfigurable switching block capable of configuring and switching the optical path of the RN through the power being provided from the power generation block and a control by the control agent block. | 11-18-2010 |
20110255860 | FAULT LOCALIZATION METHOD AND A FAULT LOCALIZATION APPARATUS IN A PASSIVE OPTICAL NETWORK AND A PASSIVE OPTICAL NETWORK HAVING THE SAME - The present invention discloses a fault localization method and a fault localization apparatus in a Passive Optical Network (PON) and a passive optical network having the same. | 10-20-2011 |
20120106965 | OPTICAL SOURCE FOR WAVELENGTH DIVISION MULTIPLEXED OPTICAL NETWORK CAPABLE OF HIGH-SPEED TRANSMISSION OF AN OPTICAL SIGNAL BY USING UN-POLARIZED LIGHT SOURCE AND A WAVELENGTH DIVISION MULTIPLEXED-PASSIVE OPTICAL NETWORK HAVING THE SAME - An optical source for wavelength division multiplexed optical network according to the present invention comprises a broadband light source (BLS); an arrayed waveguide grating (AWG) for spectrum-dividing incoherent light outputted from the BLS; a circulator being connected between the BLS and the AWG; and a plurality of un-polarized light sources (UPLS) being respectively connected to the AWG, wherein the incoherent light which is spectrum-divided by the AWG is injected into the plurality of UPLS and thus the plurality of UPLS is wavelength-locked thereto. In case of using an optical source for wavelength division multiplexed optical network and a wavelength division multiplexed-passive optical network having the same according to the present invention. It is especially possible to lower dramatically the power of incoherent light being injected into a wavelength-locked Fabry-Perot laser diode, while to enable a high transmission speed of 1.25 Gb/s or more, and possible to further lower noise intensity of a light source at given power of the incoherent light. | 05-03-2012 |
20120177371 | MULTIPLE STAR WAVELENGTH DIVISION MULTIPLEXING PASSIVE OPTICAL NETWORKS USING A WAVELENGTH ASSIGNMENT METHOD - The present invention discloses a multiple star wavelength division multiplexing passive optical network system using a wavelength assignment method. | 07-12-2012 |
20120213519 | TRANSMISSION DEVICE OF A LOW-NOISE OPTICAL SIGNAL HAVING A LOW-NOISE MULTI-WAVELENGTH LIGHT SOURCE, A TRANSMISSION DEVICE OF BROADCAST SIGNALS USING A LOW-NOISE MULTI-WAVELENGTH LIGHT SOURCE, AND AN OPTICAL ACCESS NETWORK HAVING THE SAME - The present invention discloses a transmission device of a low-noise optical signal having a low-noise multi-wavelength light source, a transmission device of broadcast signals using a low-noise multi-wavelength light source, and an optical access network having the same. | 08-23-2012 |
Sil-Gu Mun, Daejeon KR
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20100046945 | Multiple Star Wavelength Division Multiplexing Passive Optical Networks Using a Wavelength Assignment Method - The present invention discloses a multiple star wavelength division multiplexing passive optical network system using a wavelength assignment method. In a multiple star wavelength division multiplexing passive optical network system using a wavelength assignment method according to the present invention, only one WDM-PON system can provide services for a plurality of subscribers who is distributed in a wide range of area through multiple starring, by setting one or more band for transmitting up-stream signals as an up-stream basic band and one or more band for transmitting down-stream signals as a down stream basic band, respectively, and by dividing each of the up-stream basic band and the down stream basic band into a plurality of wavelength sub-bands and assigning the divided sub-bands to different areas using a wavelength division multiplexer/de-multiplexer which splits a band into two or more sub-bands. | 02-25-2010 |
Sil-Gu Mun, Daejeon-Si KR
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20120163819 | DATA TRANSMISSION APPARATUS AND METHOD FOR USE IN SEPARATE-TYPE BASE STATION - A data transmission apparatus for use in a separate-type base station is provided. The data transmission apparatus includes: a digital unit configured to generate first data that includes transmission method information indicating a selected transmission method and data to be transmitted; a time-division synchronization control unit configured to, in response to the selected transmission method being time-division multiplexing (TDM), generate second data by including synchronization information for transmitting the first data using TDM in the first data; and a wavelength conversion unit configured to convert at least one of the first data and the second data into one or more wavelength optical signals using a predefined wavelength or a predefined group of wavelengths and transmit the wavelength optical signals to one or more radio stations. | 06-28-2012 |
20130004165 | AUTOMATIC WAVELENGTH RECOGNITION APPARATUS AND METHOD - Provided are an automatic wavelength recognition apparatus and method. The automatic wavelength recognition apparatus includes: a division unit receiving a single optical signal and dividing the received optical signal into a plurality of optical signals; a plurality of filter units filtering the optical signals and having different and wavelength-dependent pass characteristics; a plurality of detection units detecting the filtered optical signals and measuring intensities of the detected optical signals; at least one comparison unit comparing outputs of any two of the detection units; and a wavelength determination unit receiving an output of the at least one comparison unit and determining a wavelength of the above single optical signal using a pre-stored look-up table. | 01-03-2013 |
20130004174 | LINK SETUP METHOD FOR WAVELENGTH DIVISION MULTIPLEXING WAVELENGTH PASSIVE OPTICAL NETWORK(WDM PON) SYSTEM - A link setup method for a wavelength-division-multiplexing passive optical network (WDM PON) system. The system includes a service providing device, a local node, and a plurality of subscriber devices. The link setup method includes assigning an initial wavelength for communication between the service providing device and a new subscriber device to be installed in the local node. The assigning of the initial wavelength may be performed as a part of process for activating the subscriber device, and this procedure may be performed between a physical layer of the service providing device and a physical layer of the new subscriber device. | 01-03-2013 |
20130223796 | ARRAYED WAVELENGTH GRATING ROUTER (AWGR) FOR WAVELENGTH MULTIPLEXING AND DEMULTIPLEXING - An Arrayed Waveguide Grating Router (AWGR) for wavelength multiplexing and demultiplexing is provided. According to an aspect, by generating phase differences of a plurality of received optical signals through an arrayed wavelength in which a plurality of waveguides having a predetermined length difference with respect to each other are arranged, and then coupling the optical signals with the different phase differences, wavelength multiplexing and wavelength demultiplexing are simultaneously performed using the maximum constructive interference and/or destructive interference effect of optical signals. | 08-29-2013 |
20140133502 | WAVELENGTH-TUNABLE OPTICAL TRANSMISSION APPARATUS - A wavelength-tunable optical transmission apparatus including an optical array unit comprising a plurality of light sources whose wavelengths are changed, an optical driving unit configured to receive an electrical signal transmitted from an external circuit, generate the current and input the generated current to the optical array unit, and a control unit configured to control the magnitude of current input to the optical array unit by controlling the optical driving unit. | 05-15-2014 |
20140147118 | APPARATUS FOR TRANSMITTING/RECEIVING VARIABLE-WAVELENGTH OPTICAL SIGNAL - There is provided an optical transceiver apparatus including an optical transmitter configured to transmit light of variable wavelength, an optical receiver configured to receive light generated from an opposite light source, and a controller configured to perform initialization to a wavelength corresponding to when an intensity of light received by the optical receiver is greater than or equal to a reference power, while varying the wavelength of light output by the optical transmitter. | 05-29-2014 |
20140153933 | TRANSMITTER OPTICAL SUB-ASSEMBLY - A multi-channel transmitter optical sub-assembly (TOSA) is provided. The multi-channel TOSA includes a stem including a sub-mount, a plurality of light sources mounted on the sub-mount, a common ground pad disposed at the sub-mount and connected to ground electrodes of the light sources in common, a common lead pin installed at the stem, and connected to the common ground pad, and a thermistor mounted on the sub-mount along with the light sources. | 06-05-2014 |
20140186042 | OPTICAL RECEIVER HAVING WAVELENGTH RECOGNITION FUNCTION, AND DEVICE AND METHOD FOR RECOGNIZING WAVELENGTHS USING THE SAME - Provided are an optical receiver having a wavelength recognition function, and a device and method for recognizing wavelengths using the same. The optical receiver according to an embodiment of the invention includes a splitter configured to split light intensity of input optical signals, a first receiver configured to photoelectrically convert the optical signals split using the splitter, a filter having different pass band characteristics based on wavelengths of the optical signals split using the splitter, a second receiver configured to photoelectrically convert the optical signals passing through the filter, and a comparator configured to compare the optical signals respectively, photoelectrically converted by the first and second receivers and recognize wavelengths of the input optical signals. | 07-03-2014 |
Soungyun Mun, Gyeonggi-Do KR
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20140326987 | COMPOUND FOR ORGANIC ELECTRONIC ELEMENT, ORGANIC ELECTRONIC ELEMENT USING THE SAME AND ELECTRONIC DEVICE THEREOF - A compound represented by Formula 1. An organic electric element includes a first electrode, a second electrode, and an organic material layer between the first electrode and the second electrode. The organic material layer includes the compound represented by Formula 1. When the organic electric element includes the compound in the organic material layer, luminous efficiency, stability, and life span can be improved. | 11-06-2014 |
20140332793 | COMPOUND FOR ORGANIC ELECTRIC ELEMENT, ORGANIC ELECTRIC ELEMENT COMPRISING THE SAME AND ELECTRONIC DEVICE THEREOF - A compound represented by Formula 1. An organic electric element includes a first electrode, a second electrode, and an organic material layer between the first electrode and the second electrode. The organic material layer includes the compound. When the organic electric element includes the compound in an organic material layer, luminous efficiency, stability, and life span can be improved. | 11-13-2014 |
20140374722 | COMPOUND, ORGANIC ELECTRIC ELEMENT USING THE SAME, AND AN ELECTRONIC DEVICE THEREOF - A compound represented by Formula 1. An organic electric element includes a first electrode, a second electrode, and an organic material layer including the compound of Formula 1. The organic material layer include a light emitting layer, a hole transport layer including a compound represented by Formula 2, and an emission-auxiliary layer including the compound represented by Formula 1. When the organic electric element includes the compound in the organic material layer, luminous efficiency, color purity, and life span can be improved. | 12-25-2014 |
20150053960 | COMPOUND CONTAINING A 5-MEMBERED HETEROCYCLE AND ORGANIC LIGHT-EMITTING DIODE USING SAME, AND TERMINAL FOR SAME - Disclosed are a novel-structural compound including a 5-membered heterocycle, an organic electronic device using the same, and a terminal thereof. | 02-26-2015 |
20150069350 | ORGANIC ELECTRONIC ELEMENT INCLUDING LIGHT EFFICIENCY IMPROVING LAYER, ELECTRONIC DEVICE INCLUDING THE SAME, AND COMPOUND FOR THE SAME - An organic electronic element includes a first electrode, a second electrode, one or more organic layers formed between the first electrode and the second electrode, and a light efficiency improving layer formed on at least one of an upper side and a lower side of the first electrode and the second electrode, opposite to the side on which the organic layers are formed, wherein the light efficiency improving layer includes a compound represented by Chemical Formula 1. An electronic device includes a display device including the organic electronic element and a controller for driving the display device. | 03-12-2015 |
Sung Ho Mun, Hwaseong KR
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20120139219 | AIRBAG CONTROL UNIT WITH IMU INTEGRATION - Provided is an airbag control unit with inertial measurement unit (IMU) integration, which includes an airbag collision sensor configured to detect airbag collision information; a digital sensor configured to detect a yaw rate and an acceleration, and to convert a detected data to a digital signal; and a micom configured to identify whether an output from the digital sensor and an output from the airbag collision sensor are within a measurement range of a corresponding sensor. | 06-07-2012 |
Sung Hyun Mun, Uiwang-Si KR
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20130345333 | ADHESIVE FILM, ADHESIVE COMPOSITION FOR THE SAME, AND OPTICAL MEMBER INCLUDING THE SAME - An adhesive film, an adhesive composition for the same, and an optical member including the same, the adhesive film having an index of refraction of about 1.48 or more and a dielectric constant variation of about 30% or less, as expressed by Equation 1: | 12-26-2013 |
20140186603 | ADHESIVE FILM, ADHESIVE COMPOSITION FOR THE SAME, AND DISPLAY MEMBER INCLUDING THE SAME - An adhesive film, an adhesive composition for the same, and a display member including the same are disclosed. The adhesive film includes a cured product of an adhesive composition, which includes a (meth)acrylic copolymer formed from a monomer mixture including (a1) an alkyl (meth)acrylate having a C | 07-03-2014 |
20140186604 | ADHESIVE FILM, ADHESIVE COMPOSITION FOR THE SAME, AND DISPLAY APPARATUS INCLUDING THE SAME - An adhesive film, an adhesive composition for the same, and a display apparatus including the same. The adhesive film includes a urethane functional group, has a glass transition temperature (Tg) of about 30° C. or less, a loss modulus of about 4×10 | 07-03-2014 |
20140205827 | ADHESIVE FILM, ADHESIVE COMPOSITION FOR THE SAME, AND DISPLAY APPARATUS INCLUDING THE SAME - An adhesive film including a compound including a urethane functional group, the adhesive film having a ratio (B/A) of 180° peel strength (B) after leaving the adhesive film at 70° C. for 2 minutes to 180° peel strength (A) at 25° C. of about 5 or more, is disclosed. A display apparatus including the adhesive film is also disclosed. | 07-24-2014 |
Sung-Jin Mun, Busan Metropolitan City KR
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20120228505 | OPTICAL SENSOR - An optical sensor includes a visible light sensor includes a visible light sensing transistor and an infrared light sensor includes an infrared light sensing transistor, wherein the visible light sensing transistor receives a first driving voltage through a first driving voltage line, the infrared light sensing transistor receives a second driving voltage through a second driving voltage line, and the visible light sensing transistor and the infrared light sensing transistor receive a reference voltage through a reference voltage line. | 09-13-2012 |
Tae-Youp Mun, Yongin Gyeonggi-Do KR
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20100132291 | STEEL PLATE STRUCTURE AND STEEL PLATE CONCRETE WALL - A steel plate structure and a steel plate concrete wall are disclosed. A steel plate structure, which includes: a pair of steel plates, which are separated to provide a predetermined space; a structural member, which is positioned in the predetermined space, and which is structurally rigidly joined to one side of the steel plate in the direction of gravity; and a strut, which maintains a separation distance between the pair of steel plates, can be utilized to reduce the overall thickness of a steel plate concrete wall for efficient use of space, and to reduce the thickness of the steel plates for better welding properties and larger unit module sizes. Also, the axial forces or lateral forces applied on the steel plate concrete wall may be effectively resisted. | 06-03-2010 |
Young Hee Mun, Daegu KR
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20130115859 | SURFACE TREATMENT METHOD OF POLISHING PAD AND POLISHING METHOD OF WAFER USING THE SAME - Provided is a surface treatment method of a polishing pad. The surface treatment method of the polishing pad includes locating a wafer on the polishing pad including a polishing material, supplying a polishing pad polishing material between the polishing pad and the wafer to expose the polishing material included in the polishing pad, and polishing the wafer using the exposed polishing material. | 05-09-2013 |
Young Hee Mun, Seo-Gu KR
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20120282426 | RESISTANCE HEATED SAPPHIRE SINGLE CRYSTAL INGOT GROWER, METHOD OF MANUFACTURING RESISTANCE HEATED SAPPHIRE SNGLE CRYSTAL INGOT, SAPPHIRE SNGLE CRYSTAL INGOT, AND SAPPHIRE WAFER - Provided are a resistance heated sapphire single crystal ingot grower, a method of manufacturing a resistance heated sapphire single crystal ingot, a sapphire single crystal ingot, and a sapphire wafer. The resistance heated sapphire single crystal ingot grower comprises according to an embodiment includes a chamber, a crucible included in the chamber and containing an alumina melt, and a resistance heating heater included inside the chamber and heating the crucible. | 11-08-2012 |
Younjo Mun, Cheonan-Si KR
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20100084758 | Semiconductor package - Provided is a semiconductor package including a mark pattern and a method of manufacturing the same. The semiconductor package may include at least one semiconductor chip including a circuit region, a protection layer covering the circuit region, a molding portion sealing the protection layer and the at least one semiconductor chip, the molding portion having an exposed top surface on the circuit region, and a mark pattern at the top surface of the molding portion. A method of fabricating the semiconductor package may include providing at least one semiconductor chip including a circuit region, forming a protection layer covering the circuit region, forming a molding portion sealing the protection layer and the at least one semiconductor chip, the molding portion having an exposed top surface on the circuit region, and forming a mark pattern at the top surface of the molding portion using a laser. | 04-08-2010 |