Patent application number | Description | Published |
20080244256 | Parallel link reset in link based system - A link based system including a plurality of processors is reset when transitioning from a slower speed to a higher speed mode during a booting process. One processor may coordinate the simultaneous establishment of link resetting of a plurality of other processors. In one embodiment, the processors may operate beginning with the farthest processor to reset their local links. Each processor sets its local links and if it determines, based on the speed of the link that the link has already been reset, it moves on to the next link. | 10-02-2008 |
20080244267 | Local and remote access control of a resource - Embodiments of the invention are generally directed to systems, methods, and apparatuses for local and remote access to a resource. In some embodiments, an integrated circuit includes a configurable hardware resource. In addition, the integrated circuit may also include access control logic to authenticate agents that attempt to configure the resource. In some embodiments, the agents may be in-band or out-of-band agents. Other embodiments are described and claimed. | 10-02-2008 |
20080282052 | Operating Media Devices in Pre-Os Environment - According to one embodiment, a method for initializing a plurality of media devices in communication with a computing device; mapping information corresponding to each initialized media device to a plurality of memory locations of the computing device; and operating the initialized media devices based on the mapped information corresponding to each operated media device while the computing device is in a pre-OS environment. According to another embodiment a system comprising a plurality of media devices in communication with a computing device and adapted for initialization by the computing device; and a memory mapping logic adapted to map information corresponding to the initialized media devices to a plurality of memory locations in a system memory of the computing device, wherein the computing device is adapted to operate the initialized media devices based on the mapped information corresponding to each operated media device while the computing device is in a pre-OS environment. | 11-13-2008 |
20080307082 | Dynamically discovering a system topology - In one embodiment, the present invention includes a method for dynamically discovering a topology of a system having a plurality of point-to-point (PTP) links via a routine that communicates a link exchanged parameter with at least one component coupled to a system bootstrap processor (SBSP), sets a minimal set of routing infrastructure information based on the communication, and determines presence of a neighboring component to a target component based on a communication from the SBSP to the target component using the minimal set of routing infrastructure information. Other embodiments are described and claimed. | 12-11-2008 |
20090077553 | PARALLEL PROCESSING OF PLATFORM LEVEL CHANGES DURING SYSTEM QUIESCE - Various embodiments described herein provide one or more of systems, methods, and software/firmware that provide increased efficiency in implementing configuration changes during system quiesce time. Some embodiments may separate a quiesce data buffer into small slices wherein each slice includes configuration change data or instructions. These slices may be individually distributed by a system bootstrap processor, or other processor, to other processors or logical processors of a multi-core processor in the system. In some such embodiments, the system bootstrap processor and application processors may change system configuration in parallel while a system is in a quiesce state so as to minimize time spent in the quiesce state. Furthermore, typical system configuration change become local operations, such as local hardware register modifications, which suffer much less transaction delay than remote hardware register accesses as has been previously performed. These embodiments, and others, are described in greater detail herein. | 03-19-2009 |
20090083528 | SYSTEM INFORMATION SYNCHRONIZATION IN A LINKS-BASED MULTI-PROCESSOR SYSTEM - Various embodiments described herein include one or more of systems, methods, firmware, and software to synchronize system information between processors during system boot in a links-based multi-processor system. Some embodiments synchronize data block by block through memory rather than piece by piece through registers by allowing a System Bootstrap Processor (“SBSP”) to directly access synchronization data in local memory of each of one or more Application Processors. These and other embodiments are described in greater detail below. | 03-26-2009 |
20090144476 | HOT PLUG IN A LINK BASED SYSTEM - Machine-readable medium, processes and systems for adding and/or removing components from a running computing device based upon a static topology table and a dynamic topology table are disclosed. | 06-04-2009 |
20090172340 | Methods and arrangements to remap non-volatile storage - Methods and arrangements for remapping the map between logical space and physical space in non-volatile storage are described. Embodiments include transformations, code, state machines or other logic to divide the non-volatile storage of the computing device into two portions, a fixed portion and a floating portion. The embodiments may also include remapping in system firmware of the computing device the current map from logical space to physical space of the floating portion of the non-volatile storage. The embodiments may also include storing the revised map. The embodiments may also include using the revised map to access the floating portion of the non-volatile storage. | 07-02-2009 |
20100110934 | OPTIMIZED CACHE CONSISTENCY ALGORITHM IN A POINT-TO-POINT INTERCONNECTED MULTIPLE PROCESSOR SYSTEM - A spanning tree is assigned to a processing node for each processing node in a point-to-point network that connects a plurality of processing nodes. The spanning tree uses the processing nodes as vertices and links of the network as edges. Each processing node includes input snoop ports that can be configured as either terminating or forwarding. According to the assigned spanning trees and the configuration of the input snoop ports, the network routes snoop messages efficiently and without conflicts. | 05-06-2010 |
20120151107 | MODIFYING SYSTEM ROUTING INFORMATION IN LINK BASED SYSTEMS - Methods and apparatus to improve modification of system routing information in link based systems are described. In one embodiment, entries in a first table (storing data corresponding to routing paths between a plurality of components prior to a hot-plug event) and a second table (storing data corresponding to routing paths between the plurality of components after a hot-plug event) may be compared to determine which corresponding routing registers are to be modified in response to the hot-plug event. Other embodiments are also disclosed. | 06-14-2012 |
20120159204 | SYSTEM AND METHOD FOR POWER MANAGEMENT - A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power. | 06-21-2012 |