Patent application number | Description | Published |
20100177690 | WIRELESS COMMUNICATION UNIT - A wireless communication unit includes a baseband module and a radiofrequency module. A communication interface connects the baseband module to the radiofrequency module. Data can be communicated from the baseband module to the radiofrequency module and/or vice versa via the interface. The communication interface includes one or more data compression arrangement, for compressing original data to be transmitted over the communication interface, from a transmitting side of the communication interface to a receiving side of the communication interface, into compressed data and decompressing the compressed data after transmission and restoring the original data. The data compression arrangement may include a data compression unit at the transmitting side of the communication interface, and a data decompression unit at the receiving side of the communication interface. | 07-15-2010 |
20100203919 | ARRANGEMENT OF RADIOFREQUENCY INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THEREOF - A master radiofrequency integrated circuit (RF IC) and a slave radiofrequency integrated circuit include a master radiofrequency module and a slave radiofrequency module, respectively. Both RF ICs include a radiofrequency side contact connectable to an antenna, for receiving radiofrequency signals, via the antenna, from a wireless communications network and a baseband side contact connected to the radiofrequency module and connectable to a contact of a baseband integrated circuit, for transmitting the baseband signals from the master radiofrequency module to the baseband integrated circuit. The RF module is connected to the radiofrequency side contact, for converting the radiofrequency signals into baseband signals. The master radiofrequency module includes a slave control unit for controlling the slave radiofrequency module. The master RF IC has a slave side contact connected to the slave control unit and to the slave RF IC, for transferring a control signal or data from and/or to slave radiofrequency module when the slave radiofrequency module is connected to the contact of the baseband integrated circuit. The slave RF IC includes a master side contact connected to a control interface of the slave RF module and connectable to a master radiofrequency module on another RF IC, for receiving the control signals from the master radiofrequency module. | 08-12-2010 |
20100311464 | WIRELESS COMMUNICATION UNIT, BASEBAND MODULE, RADIO FREQUENCY MODULE, WIRELESS TERMINAL AND COMPUTER PROGRAM PRODUCT - A wireless communication unit has two or more communication modes including one or more mobile phone mode, in which mobile phone mode the wireless communication unit is able to transmit or receive wireless signals via an antenna from and/or to a mobile phone network in accordance with a communication protocol. The unit includes a baseband module and a radiofrequency module. A radiofrequency interface of the baseband module is connected to the radiofrequency module, for receiving and/or transmitting baseband signals from and/or to the radiofrequency module. The radiofrequency module includes a baseband interface, for receiving and/or transmitting the baseband signals to the baseband module and an antenna interface (AI) connectable to an antenna for receiving and/or transmitting radiofrequency signals from and/or to the antenna. A clock system is connected to the radiofrequency interface and the baseband interface. The clock system can provide a clock signal with a clock rate of to the radiofrequency interface and the baseband interface in one or more of the one or more mobile phone modes. | 12-09-2010 |
20110043253 | METHOD FOR SAMPLING DATA AND APPARATUS THEREFOR - A semiconductor device comprises sampling logic, comprising: input sample path selection logic arranged to enable at least one input sample path; sampler logic arranged to receive and sample an input data signal in a serial data stream in accordance with a phase of the at least one enabled input sample path; and transition detection logic arranged to detect transitions within the received input data signal. The input sample path selection logic is further arranged, upon detection of a transition within the received input data signal, to determine if the phase of the at least one input sample path is a phase having a largest window between logic values; and if it is determined that the phase of the at least one input sample path is not the phase having a largest window between logic values, to enable at least one input sample path comprising a more appropriate phase. | 02-24-2011 |
20110164624 | METHOD AND APPARATUS FOR TRANSMITTING DATA - A semiconductor device comprising interface logic for transmitting data bursts across an interface. The interface logic is arranged to transmit bursts of data across the interface such that the start of a burst of data is substantially aligned with a symbol interval (SI) boundary. The interface logic is further arranged to apply an offset to the SI boundary at the start of the burst of data. | 07-07-2011 |
20110167185 | METHOD AND APPARATUS FOR TRANSMITTING DATA - A semiconductor device comprising an interface logic module for transmitting data frames across an interface, and controller logic module arranged to control a rate at which the interface logic transmits data across the interface. Upon receipt of data frames to transmit across the interface, the controller logic module is arranged to determine a sequence of data rates with which to transmit sequential data frames across the interface, and to configure the transmission of the data frames across the interface according to the determined data rate sequence. The selection of these data rates will be dependent on specific critical RF frequencies where EMI impacts have to be minimized. | 07-07-2011 |
20110280299 | Pulse Width Modulation Synchronization of Switched Mode Power Converters - The present disclosure is directed generally to switch mode power supplies operating in a master-slave configuration and provides a method of synchronizing the PWM outputs from the master and slave devices to avoid problems such, for example, as the generation of beat frequencies. | 11-17-2011 |
20120256638 | NOISE DETECTION FOR A CAPACITANCE SENSING PANEL - An embodiment of a method for detecting noise for a capacitance sensing panel may comprise generating an input signal based on a noise signal, performing a series of measurements for measuring capacitances from a capacitive sensor sensitive to the noise signal, and controlling timing for at least one of the subconversions based on the input signal. | 10-11-2012 |
20120256852 | SYSTEM AND METHOD FOR SYNCHRONIZATION OF TOUCH PANEL DEVICES - A system and method for synchronization of touch-panel devices is described. In one embodiment, the system includes a first controller device configured to control operations of a first portion of a touch-panel device such that the first controller device is further configured to generate a single master timing signal. The single master timing signal is configured to synchronize operation of the first controller device and a second controller device that is configured to control operations of a second portion of a touch-panel device. | 10-11-2012 |
20140153590 | METHOD AND APPARATUS FOR TRANSMITTING DATA - A semiconductor device comprising interface logic for transmitting data bursts across an interface. The interface logic is arranged to transmit bursts of data across the interface such that the start of a burst of data is substantially aligned with a symbol interval (SI) boundary. The interface logic is further arranged to apply an offset to the SI boundary at the start of the burst of data. | 06-05-2014 |
Patent application number | Description | Published |
20080207141 | Method and Device For Transmitting a Sequence of Transmission Bursts - Methods and device for transmitting a sequence of transmission bursts in a wireless device. The method includes transmitting a sequence of transmission bursts according to a transmission schedule. The method is characterized by: receiving, at a radio frequency integrated circuit, prior to a transmission of at least one transmission burst of the sequence, information representative of the timing of the transmission of the at least one transmission burst; and generating timing signals, by the radio frequency integrated circuit that implement the transmission schedule. A wireless device includes a base band integrated circuit adapted to determine a transmission schedule of a sequence of transmission bursts. The wireless device is characterized by including a radio frequency integrated circuit that is adapted receive information representative of the timing schedule and to autonomously control a transmission of the sequence of transmission bursts. | 08-28-2008 |
20090117856 | FREQUENCY GENERATION IN A WIRELESS COMMUNICATION UNIT - A wireless communication device comprises a frequency generation circuit employing a crystal oscillator operably coupled to a fractional-based synthesiser and a voltage-controlled oscillator. The fractional-based synthesiser utilises a ratio between an integer value and a fractional value to set a radio frequency signal of the voltage-controlled oscillator. An automatic frequency control scaling sub-system is operably coupled to a fractional-based synthesiser and configured to receive and use an AFC word to frequency scale the fractional value in a multiplicative manner to set a radio frequency supported by the fractional-based synthesiser. Preferably, an automatic frequency generation sub-system utilises Absolute Radio Frequency Channel Number and the cyclical nature of the fractional value. | 05-07-2009 |
20100034192 | WIRELESS COMMUNICATION DEVICE, INTEGRATED CIRCUIT AND METHOD OF TIMING SYNCHRONISATION - A wireless communication device comprises a first sub-system arranged to pass data to a second sub-system comprising timing synchronisation logic operably coupled to a counter, such that data is sampled by the timing synchronisation logic when passed to the second sub-system from the first sub-system wherein the wireless communication device is characterised in that the timing synchronisation logic is arranged to determine a position of a first data frame and in response thereto initiate a counting process of the counter and determine a position of a second data frame and in response thereto determine a count value from the counting process of the counter and in response to the count value determine whether to initiate a timing advance or timing retard operation on the data being passed to the second sub-system. In this manner, the inventive concept provides the wireless communication device with a mechanism to achieve timing synchronisation. In particular, the inventive concept may allow a radio frequency integrated circuit to implement timing synchronisation by advancing or retarding an ‘actual’ signal sent from digital baseband circuits in a 3G DigRF wireless communication device. | 02-11-2010 |
20100048239 | COMMUNICATION DEVICE, INTEGRATED CIRCUIT AND METHOD THEREFOR - A communication device is capable of supporting communication compliant with a Dual-Mode 2.5G and 3G interface baseband-radio frequency interface standard and comprises a data interface operably coupled to a number sub-systems and a clock circuit generating a plurality of clock phases for supporting communication there between. At least one of the number of sub-systems comprises a line driver and a line receiver; wherein the communication device is characterised in that the line receiver determines an end of a received data frame sent across the data interface and in response thereto switches itself off. | 02-25-2010 |
20100111154 | ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD THEREFOR - A wireless communication device comprises a number of sub-systems and clock generation logic arranged to generate at least one clock signal to be applied to the number of sub-systems. One of the number of sub-systems comprises sampling logic for receiving input data and performing initial sampling on an input data bit using multiple separated phases of a clock period of the at least one clock signal applied to the sampling logic thereby producing multiple phase separated sampled outputs of the input data bit. The sampling logic is configured to perform a number of re-sampling operations on the multiple phase separated sampled outputs at a number of intermediate phases thereby producing multiple phase separated intermediate sampled outputs prior to performing a final sample of the multiple phase separated intermediate sampled outputs at a single phase of the at least one clock signal to produce a sampled input data signal. | 05-06-2010 |
20110142169 | ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD FOR SELECTING OF AN OPTIMAL SAMPLING CLOCK PHASE - An electronic device comprises a number of sub-systems coupled via an interface. One of the number of sub-systems comprises logic for receiving a frame of input data having a plurality of phases on respective data paths. The electronic device further comprises logic for performing cross correlation on the received input data with a pre-determined bit pattern, operably coupled to selection logic, for selecting a single phase from the plurality of phases sent to the interface to sample the received input data in a middle region of a data bit period in response to the cross correlation. | 06-16-2011 |