Patent application number | Description | Published |
20090141666 | WIRELESS SENSOR NETWORK USING DYNAMIC MESSAGE ROUTING ALGORITHM AND METHOD OF CONTROLLING THE WIRELESS SENSOR NETWORK - Provided is a wireless sensor network using a dynamic message routing algorithm and a method of controlling the wireless sensor network. Therefore, a network system can be provided, in which each sensor node calculates a relay probability, periodically updates the relay probability, and dynamically determines a node for relaying a message on the basis of the relay probability, so that throughput per node is improved and a media access control (MAC) layer is not needed. | 06-04-2009 |
20090141667 | METHOD FOR ROUTING MESSAGE IN WIRELESS NETWORK BASED ON RELAY PROBABILITY - Provided is a method for routing a message in a wireless network based on relay probability. The method allows dynamic delivery of a message by calculating the relay probability of each node for message transmission, measuring the strength of a beacon signal received from a destination node, and determining a node that will relay a message based on the relay probability and the strength of beacon signal. | 06-04-2009 |
20100118633 | SEMICONDUCTOR MEMORY DEVICE HAVING DUMMY SENSE AMPLIFIERS AND METHODS OF UTILIZING THE SAME - A semiconductor memory device having dummy sense amplifiers and a method of utilizing the same are provided. Embodiments of the semiconductor memory device may include at least one dummy cell block including dummy cells and memory cells. Normal bit lines connecting the memory cells in the dummy cell block in a first direction and dummy bit lines connecting the dummy cells in the first direction. A dummy sense amplifier is also included for connecting any two of the normal bit lines and the dummy bit lines. Some of the embodiments may improve the sensing margin and refresh margin in sensing memory cells in the dummy cell, as well as increasing the redundancy efficiency and utilization of the dummy cells. | 05-13-2010 |
20100272052 | APPARATUS AND METHOD FOR RANDOM ACCESS BASED ON CALL PRIORITY IN A MOBILE COMMUNICATION SYSTEM - An apparatus and method for random access based on call priority in a mobile communication system are provided, in which upon generation of a high-priority call, a mobile station selects a predetermined Random Access (RA) code indicating generation of a high-priority call, generates a preamble using the selected RA code, and transmits the preamble to a base station. | 10-28-2010 |
20110223913 | APPARATUS AND METHOD FOR CONTROLLING STATUS OF FEMTOCELL IN BROADBAND WIRELESS COMMUNICATION SYSTEM - An apparatus and a method for operating a terminal in a broadband wireless communication system including a macrocell and a femtocell are provided. The method includes receiving femtocell information relating to a femtocell to which the terminal is registered, determining whether the terminal enters a region where the femtocell belongs, using the femtocell information, when entering the region where the femtocell belongs, transmitting a message to wake up the femtocell, and searching for the femtocell. | 09-15-2011 |
20110242916 | ON-DIE TERMINATION CIRCUIT, DATA OUTPUT BUFFER AND SEMICONDUCTOR MEMORY DEVICE - An on-die termination circuit includes a termination resistor unit connected to an external pin, and a termination control unit connected to the termination resistor unit. The termination resistor unit provides termination impedance to a transmission line connected to the external pin. The termination control unit varies the termination impedance in response to a plurality of bits of strength code associated with a data rate. | 10-06-2011 |
20110242924 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME - A semiconductor memory device includes a memory cell array, an address control unit and a logic circuit. The memory cell array includes a plurality of banks which are divided into a first bank block and a second bank block. The address control unit accesses the memory cell array. The logic circuit controls the address control unit based on a command and an address signal such that the first and second bank blocks commonly operate in a first operation mode, and the first and second bank blocks individually operate in a second operation mode. | 10-06-2011 |
20120117443 | DATA PROCESSING DEVICE AND METHOD USING ERROR DETECTION CODE, METHOD OF COMPENSATING FOR DATA SKEW, AND SEMICONDUCTOR DEVICE HAVING THE DATA PROCESSING DEVICE - A data processing device for transmitting a first data includes a data generator configured to provide the first data, a cyclic redundancy check (CRC) generator configured to generate a CRC information having at least one bit whose binary value is modified in response to a toggle information, and a data transmitter configured to combine the CRC information and the first data as a combined data and output the combined data in serial. | 05-10-2012 |
20130140061 | Touch Window - Disclosed are a technology capable of improving printing properties and a structure of a touch window manufactured by the same. The touch window according to the present invention comprises: a sensing electrode pattern layer formed on a transparent window and including sensing electrodes which are patterned; and wiring parts connected to the sensing electrodes, wherein the touch window further comprises dummy circuit patterns spaced apart from the wiring parts. | 06-06-2013 |
20130329489 | MAGNETO-RESISTIVE MEMORY DEVICE INCLUDING SOURCE LINE VOLTAGE GENERATOR - A MRAM includes a memory cell array of spin-transfer torque magnetic random access memory (STT-MRAM) cells and a source line commonly connected to the plurality of STT-MRAM cells. A source line voltage generator generates a source line driving voltage in response to an external power supply voltage and provides the source line driving voltage to the source line. | 12-12-2013 |
Patent application number | Description | Published |
20100167476 | PHOTORESIST COMPOSITION AND METHOD OF FABRICATING THIN FILM TRANSISTOR SUBSTRATE - The present invention relates to a photoresist composition for digital exposure and a method of fabricating a thin film transistor substrate. The photoresist composition for digital exposure includes a binder resin including a novolak resin and a compound represented by the chemical formula (1), a photosensitizer including a diazide-based compound, and a solvent: | 07-01-2010 |
20110243289 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME - A method of tuning a phase of a clock signal includes performing data training on a plurality of data pins through which data are input and output, in synchronization with a data clock signal; determining one of the data pins to be a representative pin; performing clock and data recovery (CDR) on read data of the representative pin; and adjusting a phase of the data clock signal based on the CDR. | 10-06-2011 |
20130088912 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a first bit line to which a first memory cell is connected, and a second bit line to which a second memory cell is connected, the second bit line being complementary to the first bit line, a sense amplifier that includes a first transistor and a second transistor connected in series between the first bit line and the second bit line, the sense amplifier including a first node between the first transistor and the second transistor, a gate of the first transistor being connected to the second bit line, and a gate of the second transistor being connected to the first bit line, and a voltage providing unit that provides a first voltage to the first node during presensing, and provides a second voltage, different from the first voltage, to the first node during main sensing. | 04-11-2013 |
20140076847 | PHOTORESIST COMPOSITION AND METHOD OF FORMING A METAL PATTERN USING THE SAME - A method of forming a metal pattern is disclosed. In the method, a metal layer is formed on a base substrate. A photoresist composition is coated on the metal layer to form a coating layer. The photoresist composition includes a binder resin, a photo-sensitizer, a mercaptopropionic acid compound and a solvent. The coating layer is exposed to a light. The coating layer is partially removed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as a mask. | 03-20-2014 |
20140169086 | COMMON SOURCE SEMICONDUCTOR MEMORY DEVICE - A memory device includes a cell array and a common source line compensation circuit. The cell array includes a plurality of normal cell units connected between a plurality of bit lines and one common source line, respectively. The common source line compensation circuit supplies a plurality of compensation write currents to the common source line to compensate for a plurality of write currents concurrently input into or output from the common source line through the normal cell units. | 06-19-2014 |
20140183162 | PHOTORESIST COMPOSITION AND METHOD FOR FORMING A METAL PATTERN - A method of forming a metal pattern is disclosed. In the method, a metal layer is formed on a base substrate. A photoresist composition is coated on the metal layer to form a coating layer. The photoresist composition includes a binder resin, a photo-sensitizer and a mixed solvent including a first solvent, a second solvent having a higher volatility than the first solvent, and a third solvent having a higher volatility than the second solvent. The coating layer is exposed to light. The coating layer is partially removed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as a mask. | 07-03-2014 |
20140242515 | PHOTORESIST COMPOSITION AND METHOD OF MANUFACTURING DISPLAY DEVICE USING SAME - A photoresist composition including a binder resin including a novolac resin represented by Chemical Formula 1, a diazide photosensitive initiator, and a solvent including a base solvent and an auxiliary solvent, wherein the base solvent includes propylene glycol monomethyl ether acetate, and the auxiliary solvent includes dimethyl-2-methylglutarate and ethyl beta-ethoxypropionate, | 08-28-2014 |
20150032913 | STORAGE SYSTEM FOR CHANGING A DATA TRANSFER SPEED AND A METHOD OF CHANGING THE DATA TRANSFER SPEED THEREOF - A storage device of a storage system includes a device Direct Memory Access (DMA) configured to calculate a data transfer amount based on size information of data provided to a DMA queue; a command manager configured to receive the data transfer amount from the device DMA and to calculate a transfer speed using a speed mode table; and a device interface configured to transfer the transfer speed to a host. | 01-29-2015 |
20150205200 | PHOTORESIST COMPOSITION, METHOD OF FORMING A PATTERN AND METHOD OF MANUFACTURING A THIN FILM TRANSISTOR SUBSTRATE - A photoresist composition, a method of forming a pattern, and a method of manufacturing a thin film transistor substrate, the composition including a solvent, a novolak resin, a diazide-based photo-sensitizer, an acryl compound represented by the following Chemical Formula 1: | 07-23-2015 |
20150241774 | PHOTORESIST COMPOSITION AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE USING THE SAME - A photoresist composition may include a novolak resin, a diazide-based photo-sensitizer, and a solvent. The novolak resin may be prepared by a condensation reaction of a monomer mixture including a cresol mixture, xylenol, and salicylaldehyde. Methods of manufacturing a display substrate using the photoresist composition are also provided. | 08-27-2015 |
20160004634 | INTERNAL STORAGE, EXTERNAL STORAGE CAPABLE OF COMMUNICATING WITH THE SAME, AND DATA PROCESSING SYSTEM INCLUDING THE STORAGES - A memory controller, a data processing system, and an electronic device are provided. The memory controller is configured to share a function of one of an internal storage and an external storage in a union mode in which the external storage and the internal storage are logically unified with each other. | 01-07-2016 |
20160048178 | MEMORY CARD SOCKET AND DATA PROCESSING DEVICE INCLUDING THE SAME - A data processing apparatus includes an electronic device configured to store data and instructions; a memory card; and a memory card socket in which the memory card is inserted. In certain disclosed systems and methods, the memory card socket includes: an insertion portion through which the memory card is inserted; a lock portion formed around an edge of the insertion portion, and that is configured to control attaching and detaching of the memory card based on instructions received from the electronic device; and a main body including the insertion portion and the lock portion and configured to accommodate the memory card via the insertion portion. | 02-18-2016 |
20160049977 | CARD SOCKET DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME - Disclosed are a card socket device and an electronic apparatus including the same. The card socket device includes a seat portion configured to receive an attachable card; and one or more connection terminal portions formed in the seat portion and configured to form an electrical connection with one or more connection pads formed in a bottom surface of the attachable card, wherein the seat portion is configured such that a space accommodating the attachable card is upwardly opened. | 02-18-2016 |
Patent application number | Description | Published |
20090100310 | Apparatus and method for hybrid automatic repeat request (HARQ) in wireless communication system - An apparatus and a method for Hybrid Automatic Repeat reQuest (HARQ) in a wireless communication system are provided. A receiver includes a Media Access Control (MAC) layer part for error-checking each MAC Packet Data Units (PDUs) extracted from a physical layer burst, and generating HARQ combination control information according to a result of the error check; a receiving part for receiving a retransmit burst; and a combiner for selecting one or more Forward Error Correction (FEC) blocks from the retransmit burst according to the HARQ combination control information, and HARQ-combining the selected one or more FEC blocks. | 04-16-2009 |
20110150134 | APPARATUS AND METHOD FOR SCRAMBLING IN A WIRELESS COMMUNICATION SYSTEM - An apparatus and method for scrambling in a wireless communication system are provided. The apparatus includes a selector, a plurality of scramblers, and a plurality of modulators. The selector selects a scrambling scheme to be applied to a transmission bit stream according to a modulation scheme to be applied to the transmission bit stream. The plurality of scramblers scramble the transmission bit stream according to a scrambling scheme corresponding to each of a plurality of modulation schemes. The plurality of modulators modulate the scrambled transmission bit stream according to the plurality of modulation schemes. | 06-23-2011 |
20110182339 | METHOD AND APPARATUS FOR REDUCING PEAK TO AVERAGE POWER RATIO USING PEAK WINDOWING - A method and apparatus for reducing a Peak to Average Power Ratio (PAPR) using peak windowing is provided. In the apparatus, an absolute value calculator calculates an absolute value of an input signal, a subtractor subtracts a predetermined clipping threshold level from the absolute value, a smoothing unit performs smoothing on the subtracted signal according to a predetermined smoothing scheme and outputs a first smoothed signal, an adder adds the first smoothed signal to the clipping threshold level, an inverse calculator outputs a second smoothed signal by multiplying the clipping threshold level by an inverse of the added signal, and a multiplier outputs a final PAPR-reduced signal by multiplying the input signal by the second smoothed signal. The method and apparatus address an overcompensation problem while processing signals having a large bandwidth and a high data rate without delay, thereby minimizing the clipping influences on Bit Error Rate (BER) and Adjacent Channel Leakage Ratio (ACLR) performances. | 07-28-2011 |
20120089658 | MODULO OPERATION METHOD AND APPARATUS FOR SAME - The present invention provides a modulo operation method. The modulo operation method, in a case where the square of a divisor N is greater than or equal to a dividend C, includes: determining the number of computation stages n satisfying 2 | 04-12-2012 |
20140044217 | APPARATUS AND METHOD FOR SCRAMBLING IN A WIRELESS COMMUNICATION SYSTEM - An apparatus for a transmit end in a wireless communication system is provided. The apparatus includes at least one scrambler configured to scramble a transmission bit stream, wherein the at least one scrambler comprises, a first circulation unit configured to output, during one cycle, at least one bit for scrambling odd-numbered bits of the transmission bit stream and at least one bit for scrambling even-numbered bits of the transmission bit stream, a second circulation unit configured to output, during one cycle, at least one bit for scrambling odd-numbered bits of the transmission bit stream and at least one bit for scrambling even-numbered bits of the transmission bit stream, and operators configured to generate a scrambled bit stream, wherein each of the operators generates a scrambled bit using an input bit, an output bit from the first circulation unit and an output bit from the second circulation unit. | 02-13-2014 |