Patent application number | Description | Published |
20090309101 | THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF - A thin film transistor array substrate and its manufacturing method are disclosed. A thin film transistor (TFT) includes a gate electrode formed on a substrate, and source and drain electrodes formed on the gate electrode and separated from each other. A common line made of the same material as the gate electrode is formed on the substrate. A storage capacitor includes a storage electrode connected with a storage electrode line and a pixel electrode formed on the storage electrode. The storage electrode and the pixel electrode are formed by patterning a transparent conductive film, and accordingly, light can be transmitted through the region where the storage capacitor is formed to thus increase an aperture ratio. | 12-17-2009 |
20100006844 | THIN-FILM TRANSISTOR ARRAY PANEL AND METHOD OF FABRICATING THE SAME - A thin-film transistor (“TFT”) array and a method of fabricating the TFT array panel include: an insulating substrate; a gate line and a data line which are insulated from each other on the insulating substrate and are arranged in a lattice; common wiring extended parallel to the gate line on the insulating substrate; a gate insulating film disposed on the gate line and the common wiring; a semiconductor layer disposed on the gate insulating film; contact holes which penetrate through the gate insulating film and the semiconductor layer disposed on the common wiring; a plurality of common electrodes connected to the common wiring by the contact holes and arranged parallel to each other; and a plurality of pixel electrodes arranged parallel to the plurality of common electrodes. | 01-14-2010 |
20100148182 | THIN FLIM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF - A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer. | 06-17-2010 |
20100159652 | METHOD OF MANUFACTURING A THIN FILM TRANSISTOR ARRAY SUBSTRATE - In manufacturing a thin film transistor array substrate, a passivation film is formed over the transistors. A first photoresist pattern is formed over the passivation film, with a first portion partially overlying at least one source/drain electrode of each transistor and overlying each pixel electrode region, and with a second portion thicker than the first portion. The passivation film is patterned using the first photoresist pattern as a mask. The first photoresist pattern's first portion is removed to form a second photoresist pattern which protrudes upward around the pixel electrode regions. A transparent conductive film is formed with recesses in the pixel electrode regions. A masking pattern is formed over the transparent film in each pixel electrode region, the masking pattern's top surface being below a top of the transparent film. The transparent film is patterned using the masking pattern as a mask to form the pixel electrodes. | 06-24-2010 |
20100308333 | THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL AND A METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL - A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate comprising a three mask process. The 3 mask process comprising, forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming a first, second, and third passivation film successively on the substrate. Over the above multi-layers of the passivation film forming a first photoresist pattern comprising a first portion formed on part of the drain electrode and on the pixel region, and a second portion wherein, the second portion thicker than the first portion, and then patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern; and forming a transparent electrode pattern on the second passivation layer. | 12-09-2010 |
20110018815 | TOUCH SCREEN PANEL AND METHOD OF MANUFACTURING THE SAME - Provided are a touch screen panel and a method of manufacturing the same. The touch screen panel comprises: a substrate; a first reflection-preventing film formed on the substrate; a first gate wiring formed on the first reflection-preventing film; and a sensing wiring formed above the first gate wiring to be insulated from the first gate wiring and to cross the first gate wiring. | 01-27-2011 |
20110086474 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE - A method of manufacturing a thin film transistor substrate includes a first process in which a gate line pattern including a gate line and a gate electrode is formed with a first conductive material on a substrate using a first mask, a second process in which a first insulating layer is formed on the substrate and a data line pattern including a data line, a source electrode, and a drain electrode is formed with a second conductive material using a second mask, and a third process in which a second insulating layer is formed on the substrate and a pixel electrode connected to the drain electrode is formed on the second insulating layer with a third conductive material. | 04-14-2011 |
20110089422 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor (TFT) array panel includes: first and second pixel electrodes neighboring each other; a data line extending between the first and the second pixel electrodes; first and second gate lines extending perpendicularly to the data line; a first TFT including a first gate electrode connected to the first gate line, a first source electrode connected to the data line, and a first drain electrode facing the first source electrode and connected to the first pixel electrode; and a second TFT including a second gate electrode connected to the second gate line, a second source electrode connected to the data line, and a second drain electrode facing the second source electrode and connected to the second pixel electrode. The first source electrode has the same relative position with respect to the first drain electrode as the second source electrode with respect to the second drain electrode. | 04-21-2011 |
20110095294 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array panel includes: an insulation substrate; a gate line disposed on the insulation substrate and including a compensation pattern protruding from the gate line; a first data line and a second data line both intersecting the gate line; a first thin film transistor connected to the gate line and the first data line; a second thin film transistor connected to the gate line and the second data line; and a first pixel electrode and a second pixel electrode connected to the first thin film transistor and the second thin film transistor, respectively. The first pixel electrode and the second pixel electrode share the compensation pattern. | 04-28-2011 |
20120003768 | THIN FLIM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF - A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer. | 01-05-2012 |
20120007082 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel includes an insulating substrate, a plurality of pixel electrodes arranged on the insulating substrate in rows and columns, a plurality of thin film transistors connected with the plurality of pixel electrodes, respectively, and a plurality of gate lines and a plurality of data lines connected with the plurality of thin film transistors. When one data line and one pixel electrode which are connected with a single thin film transistor are referred to as a connected data line and a connected pixel electrode, respectively, the plurality of thin film transistors are positioned on a same side of the connected data line in two adjacent rows, and on alternating sides of the connected data line in every other two adjacent rows. Two boundary lines of the connected pixel electrode are overlapped with the connected data line. | 01-12-2012 |
20120194494 | DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME - In a display panel and a method of manufacturing the same, the display panel includes a first display substrate, a second display substrate and a sealing member. The first display substrate includes a first alignment layer in a first display region and a first peripheral region of a first base substrate, and a first backflow-blocking pattern in the first peripheral region and having a curvature to surround a vertex portion of the first display region. The second display substrate includes a second alignment layer in a second display region which faces the first display region and a second peripheral region of a second base substrate. The sealing member includes a corner portion having substantially the same curvature as the first backflow-blocking pattern to surround an outline of the first and second peripheral regions. | 08-02-2012 |
20120212698 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a first substrate and a second substrate which face each other and each include a display area and a peripheral area, a liquid crystal layer in the display areas and between the first substrate and the second substrate, and a conductive sealant combining the first substrate and the second substrate. The first substrate includes a common electrode in the display and peripheral areas of the first substrate. The second substrate includes a first and signal lines in the peripheral area of the second substrate, a first insulating layer on the first signal line and the second signal line, and a conductor on the first insulating layer in the peripheral area and connected to the first signal line through a contact hole. The common electrode includes a cutout corresponding to the conductor, and the cutout is at a corner of the display areas. | 08-23-2012 |
20130201431 | Liquid Crystal Display - A liquid crystal display includes a display panel having a plurality of pixels. The display panel includes a first substrate and a second substrate opposing each other. A liquid crystal layer is positioned between the first substrate and the second substrate. A pixel electrode is positioned on the first substrate and positioned in one pixel of the plurality of pixels. An opposing electrode faces the pixel electrode with the liquid crystal layer interposed therebetween. At least one of the pixel electrode and the opposing electrode includes a liquid crystal inclination direction determining member. A transmission region of the pixel includes a first region and a second region that have different cell gaps of the liquid crystal layer from each other and extension directions of the liquid crystal inclination direction determining member in the first region and the second region are different from each other. | 08-08-2013 |
20130309821 | THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL AND A METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL - A method of manufacturing a thin film transistor array substrate includes forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming first, second, and third passivation films successively on the substrate. Over the above multi-layered passivation film forming a first photoresist pattern including a first portion formed on part of the drain electrode and on the pixel region, and a second portion. The second portion is thicker than the first portion. Then, patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern, and forming a transparent electrode pattern on the second passivation layer. | 11-21-2013 |
20130313559 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor (TFT) array panel includes: first and second pixel electrodes neighboring each other; a data line extending between the first and the second pixel electrodes; first and second gate lines extending perpendicularly to the data line; a first TFT including a first gate electrode connected to the first gate line, a first source electrode connected to the data line, and a first drain electrode facing the first source electrode and connected to the first pixel electrode; and a second TFT including a second gate electrode connected to the second gate line, a second source electrode connected to the data line, and a second drain electrode facing the second source electrode and connected to the second pixel electrode. The first source electrode has the same relative position with respect to the first drain electrode as the second source electrode with respect to the second drain electrode. | 11-28-2013 |
20140252364 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor (TFT) array panel includes: first and second pixel electrodes neighboring each other; a data line extending between the first and the second pixel electrodes; first and second gate lines extending perpendicularly to the data line; a first TFT including a first gate electrode connected to the first gate line, a first source electrode connected to the data line, and a first drain electrode facing the first source electrode and connected to the first pixel electrode; and a second TFT including a second gate electrode connected to the second gate line, a second source electrode connected to the data line, and a second drain electrode facing the second source electrode and connected to the second pixel electrode. The first source electrode has the same relative position with respect to the first drain electrode as the second source electrode with respect to the second drain electrode. | 09-11-2014 |