Oh, Seongnam-Si
Bo Hyun Oh, Seongnam-Si KR
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20120276929 | SOCIAL NETWORK SERVICE PROVIDING SYSTEM AND METHOD FOR SETTING RELATIONSHIP BETWEEN USERS BASED ON MOTION OF MOBILE TERMINAL AND DISTANCE DETERMINED BY USER - Provided are a social network service providing system and method for setting a relationship between users based on a motion of a mobile terminal, and a distance determined by a user. The social network service providing system may include a request receiver to receive, from a mobile terminal, a request generated in accordance with a motion of the mobile terminal, an information providing unit to provide location information of the mobile terminal, and distance information determined by a user of the mobile terminal, a mobile terminal identifying unit to identify at least one other mobile terminal based on the location information and the distance information, and a user information providing unit to provide information about a user of the at least one other mobile terminal. | 11-01-2012 |
Changbong Oh, Seongnam-Si KR
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20110151642 | SEMICONDUCTOR DEVICE INCLUDING HIGH VOLTAGE AND LOW VOLTAGE MOS DEVICES - Methods and devices for forming both high-voltage and low-voltage transistors on a common substrate using a reduced number of processing steps are disclosed. An exemplary method includes forming at least a first high-voltage transistor well and a first low-voltage transistor well on a common substrate separated by an isolation structure extending a first depth into the substrate, using a first mask and first implantation process to simultaneously implant a doping material of a first conductivity type into a channel region of the low-voltage transistor well and a drain region for the high-voltage transistor well. | 06-23-2011 |
Chang-Bong Oh, Seongnam-Si KR
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20110272736 | SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME - A semiconductor device includes a substrate including a first region and a second region each having an n-type region and a p-type region, wherein the n-type region in the first region includes a silicon channel, the p-type region in the first region includes a silicon germanium channel, and the n-type region and the p-type region in the second region respectively include a silicon channel. A first gate insulating pattern formed of a thermal oxide layer is disposed on the substrate of the n-type and p-type regions in the second region. | 11-10-2011 |
Chang Il Oh, Seongnam-Si KR
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20080305441 | Hardmask composition having antirelective properties and method of patterning material on susbstrate using the same - A hardmask composition includes an organic solvent and one or more aromatic ring-containing polymers represented by Formulae 1, 2 and 3: | 12-11-2008 |
20110097672 | Polymer having antireflective properties and high carbon content, hardmask composition including the same, and process for forming a patterned material layer - An antireflective hardmask composition includes an organic solvent, an initiator, and at least one polymer represented by Formulae A, B, or C as set forth in the specification. | 04-28-2011 |
20110275019 | HARDMASK COMPOSITION HAVING ANTIREFLECTIVE PROPERTIES AND METHOD OF PATTERNING MATERIAL ON SUBSTRATE USING THE SAME - A hardmask composition includes an organic solvent and one or more aromatic ring-containing polymers represented by Formulae 1, 2 and 3: | 11-10-2011 |
Changseok Oh, Seongnam-Si KR
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20100024748 | Cooling device and insert for water jacket of internal combustion engine - The present invention is provided with one or more inserts that are inserted at the lower portion of a water jacket formed at siamese portions between cylinder bores of a cylinder block and increase the flow of cooling water at the upper portion of the water jacket, in order to provide a cooling device and an insert for a water jacket of an internal combustion engine, which is inserted at the lower portion of the water jacket formed at the siamese portions of the cylinder block to increase the flow of cooling water, improves cooling efficiency of the siamese portions of the cylinder block by inducting recirculation of the cooling water at the lower portion, and improves fuel efficiency by making the temperature uniform in the stroke direction of the piston of the cylinder block and reducing friction of the piston. | 02-04-2010 |
Choon-Yul Oh, Seongnam-Si KR
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20140333681 | METHOD OF GENERATING IMAGE COMPENSATION DATA FOR DISPLAY DEVICE, IMAGE COMPENSATION DEVICE USING THE SAME, AND METHOD OF OPERATING DISPLAY DEVICE - A method of generating image compensation data for a display device includes concurrently measuring, by a first image compensation device, first luminance values and first color coordinate values from an image displayed at a display panel in the display device, a number of the first color coordinate values being less than a number of the first luminance values; concurrently generating first luminance data and first color coordinate data associated with the image based on the first luminance values and the first color coordinate values, respectively; and generating first image compensation data for compensating the image based on the first luminance data, the first color coordinate data, a reference luminance value and a reference color coordinate value. | 11-13-2014 |
Chunghan Oh, Seongnam-Si KR
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20150017045 | VACUUM PUMP OF VEHICLE FOR REDUCING OPERATION NOISE - A vacuum pump of a vehicle for reducing operation noise may include a rotor rotating in a space defined by a housing formed in a pump body at an eccentric position relative to a center of the space, a vane installed to the rotor to rotate eccentrically in the space, and an oil outlet passing through the pump body and formed at a predetermined height above a lower limit of the space such that, when lubricant in the space is discharged in a pressurized state by the vane, the lubricant is not reintroduced back into the space by gravity. | 01-15-2015 |
Eunmi Oh, Seongnam-Si KR
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20110293099 | System, medium and method of encoding/decoding multi-channel audio signals - An system, method, and method of encoding/decoding a multi-channel audio signal, including a decoding level generation unit producing decoding-level information that helps a bitstream including a number of audio channel signals and space information to be decoded into a number of audio channel signals, wherein the space information includes information about magnitude differences and/or similarities between channels, and an audio decoder decoding the bitstream according to the decoding-level information. Accordingly, even a single input bitstream can be decoded into a suitable number of channels depending on the type of a speaker configuration used. Scalable channel decoding can be achieved by partially decoding an input bitstream. In the scalable channel decoding, a decoder may set decoding levels and outputs audio channel signals according to the decoding levels, thereby reducing decoding complexity. | 12-01-2011 |
20120321090 | SYSTEM, MEDIUM, AND METHOD OF ENCODING/DECODING MULTI-CHANNEL AUDIO SIGNALS - An system, method, and method of encoding/decoding a multi-channel audio signal, including a decoding level generation unit producing decoding-level information that helps a bitstream including a number of audio channel signals and space information to be decoded into a number of audio channel signals, wherein the space information includes information about magnitude differences and/or similarities between channels, and an audio decoder decoding the bitstream according to the decoding-level information. Accordingly, even a single input bitstream can be decoded into a suitable number of channels depending on the type of a speaker configuration used. Scalable channel decoding can be achieved by partially decoding an input bitstream. In the scalable channel decoding, a decoder may set decoding levels and outputs audio channel signals according to the decoding levels, thereby reducing decoding complexity. | 12-20-2012 |
20140032213 | ADAPTIVE TIME/FREQUENCY-BASED AUDIO ENCODING AND DECODING APPARATUSES AND METHODS - Adaptive time/frequency-based audio encoding and decoding apparatuses and methods. The encoding apparatus includes a transformation & mode determination unit to divide an input audio signal into a plurality of frequency-domain signals and to select a time-based encoding mode or a frequency-based encoding mode for each respective frequency-domain signal, an encoding unit to encode each frequency-domain signal in the respective encoding mode, and a bitstream output unit to output encoded data, division information, and encoding mode information for each respective frequency-domain signal. In the apparatuses and methods, acoustic characteristics and a voicing model are simultaneously applied to a frame, which is an audio compression processing unit. As a result, a compression method effective for both music and voice can be produced, and the compression method can be used for mobile terminals that require audio compression at a low bit rate. | 01-30-2014 |
20140105404 | METHOD, MEDIUM, AND SYSTEM SYNTHESIZING A STEREO SIGNAL - A method, medium, and system generating a 3-dimensional (3D) stereo signal in a decoder by using a surround data stream. According to such a method, medium, and system, a head related transfer function (HRTF) is applied in a quadrature mirror filter (QMF) domain, thereby generating a 3D stereo signal by using a surround data stream. | 04-17-2014 |
Guiun Oh, Seongnam-Si KR
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20150066956 | USER MATCHING METHOD, APPARATUS, AND SYSTEM - A method includes: storing, via at least one processor, intrinsic service elements and environmental elements in at least one storage medium on a user-by-user basis; receiving, from a first plurality of users, requests for a service over at least one network; selecting, in response to receiving the requests, a second plurality of users from the first plurality of users based on the intrinsic service elements; and matching at least two users among the second plurality of users based on the environmental elements. | 03-05-2015 |
Hoonsang Oh, Seongnam-Si KR
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20110108897 | IMAGE SENSOR - An image sensor includes an active region including a photoelectric conversion region and a floating diffusion region, which are separated from each other, defined by a device isolation region on a semiconductor substrate, and a transfer transistor including a first sub-gate provided on an upper surface of the semiconductor substrate and a second sub-gate extending within a recessed portion of the semiconductor substrate on the active region between the photoelectric conversion region and the floating diffusion region, wherein the photoelectric conversion region includes a plurality of photoelectric conversion elements, which vertically overlap each other within the semiconductor substrate and are spaced apart from the recessed portion. | 05-12-2011 |
Hoo-Sang Oh, Seongnam-Si KR
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20100177548 | MULTILEVEL ONE-TIME PROGRAMMABLE MEMORY DEVICE - A multilevel one-time programmable memory device includes a plurality of memory cells, wherein each of the plurality of memory cells includes: a first electrode to which a first voltage is applied, a second electrode to which a second voltage is applied and a plurality of fuse lines performing a fusing operation according to a voltage difference between the first electrode and the second electrode. The plurality of fuse lines are connected to each other between the first electrode and the second electrode. In addition, at least one of the first electrode and the second electrode is formed such that the first electrode and the second electrode have different valid line lengths from each other therebetween so that the plurality of fuse lines have different resistances from each other. | 07-15-2010 |
Hye Jin Oh, Seongnam-Si KR
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20120047016 | USER CONTROL BASED ADVERTISING SYSTEM AND METHOD THEREOF - Disclosed are a user control-based advertising system and a method thereof. The user control-based advertising system provides an advertisement display region and an advertisement control region by discriminating the two regions from each other, and comprises: an advertisement region setup unit that sets up the advertisement display region for selectively displaying plural advertisements and the advertisement control region for controlling advertisements displayed therein by discriminating advertisement display and control regions from each other; a communication unit that receives a user command through the advertisement control region and communicates with the advertisement display region according to the received command; and an advertisement control unit that controls the animation function of the advertisement displayed in the advertisement display region according to the user command or controls the movement and selection of other advertisements displayed in the advertisement display region. | 02-23-2012 |
Hyung-Rok Oh, Seongnam-Si KR
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20090291522 | LAYOUT STRUCTURE IN SEMICONDUCTOR MEMORY DEVICE COMPRISING GLOBAL WORD LINES, LOCAL WORD LINES, GLOBAL BIT LINES AND LOCAL BIT LINES - A line layout structure and method in a semiconductor memory device having a hierarchical structure are provided. In a semiconductor memory device having a global word line and a local word line, and a global bit line and a local bit line, and individually disposing all of the global word line, the local word line, the global bit line and the local bit line at conductive layers among at least three layers; at least two of the global word line, the local word line, the global bit line and the local bit line are together disposed in parallel on one conductive layer. Signal lines constituting a semiconductor memory device are disposed in a hierarchical structure, whereby a semiconductor memory device advantageously having high integration, high speed and high performance may be obtained. | 11-26-2009 |
Hyun Joon Oh, Seongnam-Si KR
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20130292649 | ORGANIC LIGHT EMITTING DISPLAY DEVICE WITH IMPROVED SEALING PROPERTY - Disclosed is an organic light emitting display device which prevents or inhibits external gas, such as, oxygen or moisture, from penetrating into a display unit and reinforces a mechanical strength by providing a first sealant and a second sealant. The organic light emitting display device may include: a first substrate; a display unit on the first substrate; a second substrate covering the display unit; a first sealant adhering the first substrate to the second substrate; and a second sealant around the first sealant, the second sealant sealing the first substrate and the second substrate. A filler may be included in the second sealant, and a particle size of the filler may be larger than a gap between the first substrate and the second substrate. | 11-07-2013 |
Hyun-Uk Oh, Seongnam-Si KR
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20100123846 | DISPLAY SUBSTRATE AND DISPLAY DEVICE HAVING THE SAME - A display substrate includes a pixel, a first pad part and a second pad part. The pixel is disposed in a display area and includes a switching element connected to a gate line and a data line and a pixel electrode electrically connected to the switching element. The first pad part is disposed in a peripheral area outside the display area. The first pad part includes a first pad having a first conductive pattern formed from a first conductive layer, a second conductive pattern overlapped with the first conductive pattern and formed from a second conductive layer and an insulation layer disposed between the first and second conductive patterns. The second pad part is disposed in the peripheral area. The second pad part includes a second pad having a third conductive pattern connected to the first conductive pattern of the first pad. | 05-20-2010 |
Ik-Sung Oh, Seongnam-Si KR
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20110107210 | USER INTERFACE APPARATUS USING THREE-DIMENSIONAL AXES AND USER INTERFACE APPARATUS USING TWO-DIMENSIONAL PLANES FORMED BY THREE-DIMENSIONAL AXES - A user interface apparatus using three-dimensional axes and a user interface apparatus using two-dimensional planes, each of the two-dimensional planes being formed by two of three-dimensional axes, are provided. The user interface apparatus uses the three-dimensional axes or the two-dimensional planes to select a menu or to search for desired information in a device, such as a mobile terminal. | 05-05-2011 |
20120092370 | APPARATUS AND METHOD FOR AMALGAMATING MARKERS AND MARKERLESS OBJECTS - An apparatus to provide AR includes a marker recognition unit to recognize objects in reality information, an amalgamation determining unit to determine whether the objects are amalgamated, an amalgamation processing unit to determine an attribute of each of the recognized objects and to generate an amalgamated object based on the determined attributes, and an object processing unit to map the amalgamated object to the reality information and to display the mapped amalgamated object. A method for amalgamating objects in AR includes recognizing objects in reality information, determining whether the objects are amalgamated, determining an attribute of each of the recognized objects, generating an amalgamated object based on the determined attribute, mapping the amalgamated object to the reality information, and displaying the mapped amalgamated object. | 04-19-2012 |
Jaehee Oh, Seongnam-Si KR
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20100144141 | Semiconductor Device and Method of Forming the Same - Provided are a semiconductor device and a method of forming the semiconductor device. The method may include forming a semiconductor pattern on a substrate, forming an interlayer insulating layer including an opening exposing the semiconductor pattern, forming a semiconductor ohmic pattern on the semiconductor pattern, forming an electrode ohmic layer on the semiconductor ohmic pattern, performing a wet etching on the electrode ohmic layer, and forming an electrode pattern on the etched electrode ohmic layer. | 06-10-2010 |
20100203672 | METHODS OF MANUFACTURING PHASE CHANGE MEMORY DEVICES - A phase change memory is manufactured by providing a substrate including a layer of phase-change material, forming a damascene pattern on the layer of phase-change material, and forming both a top electrode and a bit line in the damascene pattern. | 08-12-2010 |
20110207285 | Method Of Forming Pattern Structure And Method Of Fabricating Semiconductor Device Using The Same - A method of forming a pattern structure and a method of fabricating a semiconductor device using the pattern structure, are provided the method of forming the pattern structure includes forming a mask on an underlying layer formed on a lower layer. The underlying layer is etched using the mask as an etching mask, thereby forming patterns on the lower layer. The patterns define at least one opening. A sacrificial layer is formed in the opening and the mask is removed. The sacrificial layer in the opening is partially etched when the mask is removed. | 08-25-2011 |
20110248235 | VARIABLE RESISTANCE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME - A nonvolatile memory device includes a substrate and a first insulating layer on the substrate. The first insulating layer includes a first opening therein. A lower electrode is provided in the first opening and protrudes from a surface of the first insulating layer outside the first opening. An electrode passivation pattern is provided on a sidewall of the lower electrode that protrudes from the surface of the first insulating layer. A second insulating layer is provided on the first insulating layer and includes a second opening therein at least partially exposing the lower electrode. A variable resistance material layer extends into the second opening to contact the lower electrode. The electrode passivation layer electrically separates the sidewall of the lower electrode from the variable resistance material layer. The electrode passivation pattern is formed of a material having an etching selectivity to that of the second insulating layer. Related fabrication methods are also discussed. | 10-13-2011 |
20110263093 | Methods of Forming Variable-Resistance Memory Devices and Devices Formed Thereby - Methods of forming a variable-resistance memory device include patterning an interlayer dielectric layer to define an opening therein that exposes a bottom electrode of a variable-resistance memory cell, on a memory cell region of a substrate (e.g., semiconductor substrate). These methods further include depositing a layer of variable-resistance material (e.g., phase-changeable material) onto the exposed bottom electrode in the opening and onto a first portion of the interlayer dielectric layer extending opposite a peripheral circuit region of the substrate. The layer of variable-resistance material and the first portion of the interlayer dielectric layer are then selectively etched in sequence to define a recess in the interlayer dielectric layer. The layer of variable-resistance material and the interlayer dielectric layer are then planarized to define a variable-resistance pattern within the opening. | 10-27-2011 |
20120228574 | VARIABLE RESISTIVE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A variable resistive memory device includes a substrate comprising a cell region and a peripheral region, a word line extending in a first direction formed on the substrate of the cell region, a switching element formed on the word line, a variable resistance layer formed on the word line, and at least one transistor comprising a gate stack, the gate stack formed on the substrate of the peripheral region, wherein the word line comprises a metal layer formed at a same level as the gate stack. | 09-13-2012 |
20120228577 | PHASE CHANGE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A phase change memory device includes a mold oxide layer on a substrate, a lower electrode on the mold oxide layer and connected to the substrate, a blocking structure covering a part of the lower electrode and including an etch-stop layer and a blocking structure insulating layer, and a phase change layer covering a remaining part of the lower electrode not covered by the blocking structure, The etch-stop layer includes a material having a higher etching selectivity than that of the lower electrode. | 09-13-2012 |
20150039547 | NEUROMOPHIC SYSTEM AND CONFIGURATION METHOD THEREOF - A method of generating neuron spiking pulses in a neuromorphic system is provided which includes floating one or more selected bit lines connected to target cells, having a first state, from among a plurality of memory cells arranged at intersections of a plurality of word lines and a plurality of bit lines; and stepwisely increasing voltages applied to unselected word lines connected to unselected cells, having a second state, from among memory cells connected to the one or more selected bit lines other than the target cells having the first state. | 02-05-2015 |
20150043267 | VARIABLE RESISTANCE MEMORY DEVICE AND A VARIABLE RESISTANCE MEMORY SYSTEM INCLUDING THE SAME - A variable resistance memory system includes a variable resistance memory device including a memory cell array including first and second areas; and a memory controller configured to control the variable resistance memory device. The first area includes first variable resistance memory cells including a first variable resistance material layer and the second area includes second variable resistance memory cells including a second variable resistance material layer having a metallic doping concentration higher than a metallic doping concentration of the first variable resistance material layer. The first variable resistance memory cells are used as storage and the second variable resistance memory cells are used as a buffer memory. | 02-12-2015 |
Jae Ho Oh, Seongnam-Si KR
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20100113645 | ARTIFICIAL MARBLE AND PREPARATION METHOD THEREOF - The present invention relates to an artificial marble comprising a base resin; and layer-separated chips containing a matrix resin and additives, all or part of said additives is present in a state forming layered-phase in said matrix resin through phase-separation by a difference of specific gravity between said additives and said matrix resin, and a method for preparing the same. In the present invention, phase-separation (layer separation) of the additives in the chip is induced by adding the additives having specific gravity different from the matrix resin constituting base of the chip to the matrix resin, and if necessary, a position of the chip in the artificial marble is controlled through high specific gravity treatment. Therefore, the present invention may provide an artificial marble having a texture close to a natural rock by embodying various effects such as pearl effect, metallic effect and 3-dimensional effect. | 05-06-2010 |
Jae Hwan Oh, Seongnam-Si KR
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20090159855 | Composition for use in making a light-blocking layer - Disclosed is a non-photosensitive black electrode composition and a plasma display panel having a black electrode formed using the composition. The black electrode for the plasma display panel includes the non-photosensitive composition, thus yellowing does not occur on electrodes but conductivity to a transparent electrode layer is desirably assured even though typical conductive powder and various types of black pigments are used. It is possible to conduct patterning using a photolithography process due to the simultaneous development of black and bus electrodes, which can act as electrodes due to simultaneous sintering. Since it is non-photosensitive, it is possible to use various types of black pigments, thus the material cost is reduced. | 06-25-2009 |
Jae Hyuk Oh, Seongnam-Si KR
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20100062291 | Fuel cell system and fuel supply method thereof - A stable fuel supply system in a fuel cell system produces heat and electricity by combining hydrogen modified from a major raw material selected from various hydrogen compounds, with oxygen existing in air. A fuel supply device and a fuel supply method in a fuel cell system, which automate a steam to carbon ratio (S/C) control and a lamda control, and achieve a fuel cell system operation efficiently and stably coping with pressure loss and pulsation occurring within the system, while using a minimum number of balance-of-plant (BOP) units. A method more efficiently and precisely supplies fuel during the start-up and operation of the fuel cell system, while preventing flame failure of a burner and maintaining an appropriate carbon monoxide concentration even when an abrupt flow rate variation occurs. Also, an operating method improves functions associated with a decomposition ability based on selection of the specification of a fuel pump, and thus, is more economical and stable in terms of the costs and configuration of the fuel cell system. | 03-11-2010 |
20100062295 | Fuel cell system and air supply method thereof - A stable air supply system in a fuel cell system produces heat and electricity by combining hydrogen modified from a major raw material selected from various hydrogen compounds, with oxygen existing in air. An air supply device and an air supply method in a fuel cell system, automate a lamda control, and achieve a fuel cell system operation efficiently and stably coping with pressure loss and pulsation occurring within the system, while using a minimum number of balance-of-plant (BOP) units. A method efficiently and precisely supplies air during the start-up and operation of the fuel cell system, while preventing flame failure of a burner and maintaining an appropriate carbon monoxide concentration even when an abrupt flow rate variation occurs. In this regard, an operating method is economical and stable in terms of the costs and configuration of the fuel cell system. | 03-11-2010 |
20100139737 | Photovoltaic power generation system - A photovoltaic power generation system including a solar cell module having a plurality of layers and a sun tracking device to change an incident angle of solar energy upon the solar cell module. The sun tracking device is mounted at one of the layers such that the sun tracking device is combined with the solar cell module into a module. | 06-10-2010 |
20100154446 | Refrigerator and controlling method thereof - Disclosed herein are a refrigerator capable of preventing frost from forming on an evaporator by mounting a dehumidifying unit and a recycling unit on both sides of the evaporator, respectively, and a controlling method thereof. Cold air in a storage chamber is dehumidified as the air passes through the dehumidifying unit and is sent to the evaporator. The cold air thermally exchanged in the evaporator is humidified as the air passes through the recycling unit and is sent to the storage chamber. | 06-24-2010 |
20100154864 | Photovoltaic-thermal hybrid apparatus and assembly method thereof - Disclosed herein is a photovoltaic-thermal hybrid apparatus. The photovoltaic-thermal hybrid apparatus includes a plurality of photovoltaic-thermal modules. Each photovoltaic-thermal module includes at least one condenser, a solar cell disposed at at least one side of the condenser, a frame to surround the condenser and the solar cell, and a channel disposed in the frame to cool the solar cell. The photovoltaic-thermal modules are arranged adjacent to one another, and the channel of each photovoltaic-thermal module is connected to the channel of at least one neighboring photovoltaic-thermal module. | 06-24-2010 |
20100154865 | Photovoltaic-thermal hybrid apparatus - Disclosed herein is a photovoltaic-thermal hybrid apparatus. The photovoltaic-thermal hybrid apparatus includes at least one condenser to change a direction of some incident solar energy therein in a radial direction and emit some incident solar energy outside, a solar cell disposed at least one side of the condenser, and a frame to surround the condenser, the frame having a cooling channel to cool the solar cell disposed at at least one side therein. | 06-24-2010 |
20100154999 | Blind with solar batteries and control method thereof - A solar battery is partially attached to each blade of a blind. The position of each blade is adjusted based on position information such that each blade tracks sunlight. Electric energy obtained by the generation of electricity using an indoor illumination source is used to charge a battery. In addition to the generation of electricity, some of the blades are folded to let in light. | 06-24-2010 |
20110203298 | Heat pump system and control method thereof - A heat pump system, the operation of which is controlled using a temperature difference between a water inlet and a water outlet of a heat exchanger, exchanging heat between a refrigerant and water, and a control method thereof. The heat pump system includes temperature sensors installed on a water circulation pipe unit at water inlet and outlet sides of a heat exchanger, and heats a load to a set temperature by controlling a compressor or an expander according to a difference between temperatures sensed by the temperature sensors. Here, a temperature of water transmitted to the load is set to be greater than a target load temperature by a reference value, and if the temperature difference is smaller than a designated value, the operation of the heat pump system is stopped. | 08-25-2011 |
20110214437 | Heat pump system and control method thereof - A heat pump system which executes cooling and heating operations of an A2A indoor unit and cooling and heating operations and a hot water operation of an A2W indoor unit in a time division multiplexing (TDM) method, and a control method thereof. Further, the heat pump system solves shortage of a refrigerant during a heating operation of the A2A indoor unit or the A2W indoor unit when the TDM method is used. Therefore, the heat pump system includes a control unit to alternately operate the A2A indoor unit or the A2W indoor unit, upon judging that a simultaneous operating condition of the A2A indoor unit or the A2W indoor unit is satisfied. The heat pump system further includes a refrigerant distribution unit to circulate a refrigerant selectively to the A2A indoor unit or the A2W indoor unit. | 09-08-2011 |
20120055177 | Air conditioner and control method thereof - An air conditioner controls supply of refrigerant so that the refrigerant is first supplied to one or more indoor units in operation from an outdoor unit, and is then supplied to a hot water generator, thereby sufficiently supplying refrigerant to the indoor units in heating operation even when the hot water generator is operated. | 03-08-2012 |
Jae-Joo Oh, Seongnam-Si KR
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20140048850 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICE - According to example embodiments, a semiconductor device may include a high electron mobility transistor (HEMT) on a first region of a substrate, and a diode on a second region of the substrate. The HEMT may be electrically connected to the diode. The HEMT and the diode may be formed on an upper surface of the substrate such as to be spaced apart from each other in a horizontal direction. The HEMT may include a semiconductor layer. The diode may be formed on another portion of the substrate on which the semiconductor layer is not formed. The HEMT and the diode may be cascode-connected to each other. | 02-20-2014 |
Jae-Joon Oh, Seongnam-Si KR
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20110062448 | Field effect semiconductor devices and methods of manufacturing field effect semiconductor devices - Field effect semiconductor devices and methods of manufacturing the same are provided, the field effect semiconductor devices include a second semiconductor layer on a first surface of a first semiconductor layer, a first and a second third semiconductor layer respectively on two sides of the second semiconductor layer, a source and a drain respectively on the first and second third semiconductor layer, and a gate electrode on a second surface of the first semiconductor layer. | 03-17-2011 |
20110068317 | Phase change memory devices, methods of manufacturing and methods of operating the same - A phase change memory device includes a switching device and a storage node connected to the switching device. The storage node includes a bottom stack, a phase change layer disposed on the bottom stack and a top stack disposed on the phase change layer. The phase change layer includes a unit for increasing a path of current flowing through the phase change layer and reducing a volume of a phase change memory region. The area of a surface of the unit disposed opposite to the bottom stack is greater than or equal to the area of a surface of the bottom stack in contact with the phase change layer. | 03-24-2011 |
20110068370 | Power electronic devices, methods of manufacturing the same, and integrated circuit modules including the same - Power electronic devices including 2-dimensional electron gas (2DEG) channels and methods of manufacturing the same. A power electronic device includes lower and upper material layers for forming a 2DEG channel, and a gate contacting an upper surface of the upper material layer. A region below the gate of the 2DEG channel is an off region where the density of a 2DEG is reduced or zero. The entire upper material layer may be continuous and may have a uniform thickness. A region of the upper material layer under the gate contains an impurity for reducing or eliminating a lattice constant difference between the lower and upper material layers. | 03-24-2011 |
20110212582 | Method Of Manufacturing High Electron Mobility Transistor - A method of manufacturing a High Electron Mobility Transistor (HEMT) may include forming first and second material layers having different lattice constants on a substrate, forming a source, a drain, and a gate on the second material layer, and changing the second material layer between the gate and the drain into a different material layer, or changing a thickness of the second material layer, or forming a p-type semiconductor layer on the second material layer. The change in the second material layer may occur in an entire region of the second material layer between the gate and the drain, or only in a partial region of the second material layer adjacent to the gate. The p-type semiconductor layer may be formed on an entire top surface of the second material layer between the gate and the drain, or only on a partial region of the top surface adjacent to the gate. | 09-01-2011 |
20110215378 | High electron mobility transistors exhibiting dual depletion and methods of manufacturing the same - High electron mobility transistors (HEMT) exhibiting dual depletion and methods of manufacturing the same. The HEMT includes a source electrode, a gate electrode and a drain electrode disposed on a plurality of semiconductor layers having different polarities. A dual depletion region exists between the source electrode and the drain electrode. The plurality of semiconductor layers includes an upper material layer, an intermediate material layer and a lower material layer, and a polarity of the intermediate material layer is different from polarities of the upper material layer and the lower material layer. | 09-08-2011 |
20110221482 | Semiconductor device - Provided is a semiconductor device that may include a switching device having a negative threshold voltage, and a driving unit between a power terminal and a ground terminal and providing a driving voltage for driving the switching device. The switching device may be connected to a virtual ground node having a virtual ground voltage that is greater than a ground voltage supplied from the ground terminal and may be turned on when a difference between the driving voltage and the virtual ground voltage is greater than the negative threshold voltage. | 09-15-2011 |
20110272743 | High Electron Mobility Transistors Including Lightly Doped Drain Regions And Methods Of Manufacturing The Same - High electron mobility transistors (HEMTs) including lightly doped drain (LDD) regions and methods of manufacturing the same. A HEMT includes a source, a drain, a gate, a channel supplying layer for forming at least a 2-dimensional electron gas (2DEG) channel, and a channel formation layer in which at least the 2DEG channel is formed. The channel supplying layer includes a plurality of semiconductor layers having different polarizabilities. A portion of the channel supplying layer is recessed. One of the plurality of semiconductor layers, which is positioned below an uppermost layer is an etching buffer layer, as well as a channel supplying layer. | 11-10-2011 |
20110273221 | Driving circuits, power devices and electronic devices including the same - A power device includes a switching device having a control terminal and an output terminal; and a driving circuit configured to provide a driving voltage to the control terminal such that a voltage between the control terminal and the output terminal remains less than or equal to a critical voltage. A rise time required for the driving voltage to reach a target level is determined according to current-voltage characteristics of the switching device. And, when the voltage between the control terminal and the output terminal exceeds the critical voltage, leakage current is generated between the control terminal and the output terminal. | 11-10-2011 |
20110303952 | High Electron Mobility Transistors And Methods Of Fabricating The Same - A High electron mobility transistor (HEMT) includes a source electrode, a gate electrode, a drain electrode, a channel forming layer in which a two-dimensional electron gas (2DEG) channel is induced, and a channel supplying layer for inducing the 2DEG channel in the channel forming layer. The source electrode and the drain electrode are located on the channel supplying layer. A channel increase layer is between the channel supplying layer and the source and drain electrodes. A thickness of the channel supplying layer is less than about 15 nm. | 12-15-2011 |
20120037958 | POWER ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME - According to an example embodiment, a power electronic device includes a first semiconductor layer, a second semiconductor layer on a first surface of the first semiconductor layer, and a source, a drain, and a gate on the second semiconductor layer. The source, drain and gate are separate from one another. The power electronic device further includes a 2-dimensional electron gas (2DEG) region at an interface between the first semiconductor layer and the second semiconductor layer, a first insulating layer on the gate and a second insulating layer adjacent to the first insulating layer. The first insulating layer has a first dielectric constant and the second insulating layer has a second dielectric constant less than the first dielectric constant. | 02-16-2012 |
20120086049 | E-Mode High Electron Mobility Transistor And Method Of Manufacturing The Same - According to an example embodiment, a high electron mobility transistor (HEMT) includes a substrate, a buffer layer on the substrate, a channel layer on the buffer layer, and a barrier structure on the channel layer. The buffer layer includes a 2-dimensional electron gas (2DEG). A polarization of the barrier structure varies in a region corresponding to a gate electrode. The HEMT further includes and the gate electrode, a source electrode, and a drain electrode on the barrier structure. | 04-12-2012 |
20120088341 | Methods Of Manufacturing High Electron Mobility Transistors - The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer. | 04-12-2012 |
20120112202 | E-Mode High Electron Mobility Transistors And Methods Of Manufacturing The Same - An Enhancement-mode (E-mode) high electron mobility transistor (HEMT) includes a channel layer with a 2-Dimensional Electron Gas (2DEG), a barrier layer inducing the 2DEG in the channel layer, source and drain electrodes on the barrier layer, a depletion layer on the barrier layer between the source and drain electrodes, and a gate electrode on the depletion layer. The barrier layer is recessed below the gate electrode and the depletion layer covers a surface of the recess and extends onto the barrier layer around the recess. | 05-10-2012 |
20120280244 | High Electron Mobility Transistors And Methods Of Manufacturing The Same - High electron mobility transistors (HEMTs) and methods of manufacturing the same. A HEMT may include a channel layer and a channel supply layer, and the channel supply layer may be a multilayer structure. The channel supply layer may include an etch stop layer and an upper layer on the etch stop layer. A recess region may be in the upper layer. The recess region may be a region recessed to an interface between the upper layer and the etch stop layer. A gate electrode may be on the recess region. | 11-08-2012 |
20130001587 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - High electron mobility transistors (HEMTs) including a cavity below a drain and methods of manufacturing HEMTS including removing a portion of a substrate below a drain. | 01-03-2013 |
20130032816 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - High electron mobility transistors (HEMTs) including a substrate and a HEMT stack on the substrate, the HEMT stack including a compound semiconductor layer that includes a 2-dimensional electron gas (2DEG), an upper compound semiconductor layer that has a polarization index higher than a polarization index of the compound semiconductor layer, and a source electrode, a drain electrode, and a gate that are disposed on the upper compound semiconductor layer. The substrate may be a nitride substrate that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of a silicon substrate. The substrate may include an insulating layer that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of the silicon substrate, a metal layer that is deposited on the insulating layer, and a plate that is attached to the metal layer. | 02-07-2013 |
20130099285 | HIGH ELECTRON MOBILITY TRANSISTOR HAVING REDUCED THRESHOLD VOLTAGE VARIATION AND METHOD OF MANUFACTURING THE SAME - According to example embodiments a transistor includes a channel layer on a substrate, a first channel supply layer on the channel, a depletion layer, a second channel supply layer, source and drain electrodes on the first channel supply layer, and a gate electrode on the depletion layer. The channel includes a 2DEG channel configured to generate a two-dimensional electron gas and a depletion area. The first channel supply layer corresponds to the 2DEG channel and defines an opening that exposes the depletion area. The depletion layer is on the depletion area of the channel layer. The second channel supply layer is between the depletion layer and the depletion area. | 04-25-2013 |
20130146890 | HIGH ELECTRON MOBILITY TRANSISTOR - A high electron mobility transistor (HEMT) according to example embodiments includes a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and a reverse diode gate structure on the second semiconductor layer. A source and a drain may be on at least one of the first semiconductor layer and the second semiconductor layer. A gate electrode may be on the reverse diode gate structure. | 06-13-2013 |
20130175538 | SUBSTRATE STRUCTURE, SEMICONDUCTOR DEVICE FABRICATED FROM THE SAME, AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE - According to example embodiments, a substrate structure may include a GaN-based third material layer, a GaN-based second material layer, a GaN-based first material layer, and a buffer layer on a non-GaN-based substrate. The GaN-based first material layer may be doped with a first conductive type impurity. The GaN-based second material layer may be doped with a second conductive type impurity at a density that is less than a density of the first conductive type impurity in the first GaN-based material layer. The GaN-based third material layer may be doped with a first conductive type impurity at a density that is less than the density of the first conductive type impurity of the GaN-based first material layer. After a second substrate is attached onto the substrate structure, the non-GaN-based substrate may be removed and a GaN-based vertical type semiconductor device may be fabricated on the second substrate. | 07-11-2013 |
20130175539 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - According to example embodiments, a high electron mobility transistor (HEMT) includes a channel supply layer and a channel layer. The channel layer may include an effective channel region and a high resistivity region. The effective channel region may be between the high resistivity region and the channel supply layer. The high resistivity region may be a region into which impurities are ion-implanted. According to example embodiments, a method of forming a HEMT includes forming a device unit, including a channel layer and a channel supply layer, on a first substrate; adhering a second substrate to the device unit; removing the first substrate; and forming a high resistivity region by ion-implanting impurities into at least a portion of the channel layer. | 07-11-2013 |
20130234207 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - According to example embodiments, a high electron mobility transistor (HEMT) includes: stack including a buffer layer, a channel layer containing a two dimensional electron gas (2DEG) channel, and a channel supply layer sequentially stacked on each other, the stack defining a first hole and a second hole that are spaced apart from each other. A first electrode, a second electrode, and third electrode are spaced apart from each other along a first surface of the channel supply layer. A first pad is on the buffer layer and extends through the first hole of the stack to the first electrode. A second pad is on the buffer layer and extends through the second hole of the stack to the second electrode. A third pad is under the stack and electrically connected to the third electrode. | 09-12-2013 |
20130252410 | SELECTIVE LOW-TEMPERATURE OHMIC CONTACT FORMATION METHOD FOR GROUP III-NITRIDE HETEROJUNCTION STRUCTURED DEVICE - A method for forming a selective ohmic contact for a Group III-nitride heterojunction structured device may include forming a conductive layer and a capping layer on an epitaxial substrate including at least one Group III-nitride heterojunction layer and having a defined ohmic contact region, the capping layer being formed on the conductive layer or between the conductive layer and the Group III-nitride heterojunction layer in one of the ohmic contact region and non-ohmic contact region, and applying at least one of a laser annealing process and an induction annealing process on the substrate at a temperature of less than or equal to about 750° C. to complete the selective ohmic contact in the ohmic contact region. | 09-26-2013 |
20130307026 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - According to example embodiments, High electron mobility transistors (HEMTs) may include a discontinuation region in a channel region. The discontinuation region may include a plurality of 2DEG unit regions that are spaced apart from one another. The discontinuation region may be formed at an interface between two semiconductor layers or adjacent to the interface. The discontinuation region may be formed by an uneven structure or a plurality of recess regions or a plurality of ion implantation regions. The plurality of 2DEG unit regions may have a nanoscale structure. The plurality of 2DEG unit regions may be formed in a dot pattern, a stripe pattern, or a staggered pattern. | 11-21-2013 |
20140021510 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A higher electron mobility transistor (HEMT) and a method of manufacturing the same are disclosed. According to example embodiments, the HEMT may include a channel supply layer on a channel layer, a source electrode and a drain electrode that are on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a source pad and a drain pad. The source pad and a drain pad electrically contact the source electrode and the drain electrode, respectively. At least a portion of at least one of the source pad and the drain pad extends into a corresponding one of the source electrode and drain electrode that the at least one of the source pad and the drain pad is in electrical contact therewith. | 01-23-2014 |
20140021511 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A high electron mobility transistor (HEMT) according to example embodiments includes a channel layer, a channel supply layer on the channel layer, a source electrode and a drain electrode on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a Schottky electrode forming a Schottky contact with the channel supply layer. An upper surface of the channel supply layer may define a Schottky electrode accommodation unit. At least part of the Schottky electrode may be in the Schottky electrode accommodation unit. The Schottky electrode is electrically connected to the source electrode. | 01-23-2014 |
20140021514 | NITRIDE-BASED SEMICONDUCTOR DEVICE - A nitride-based semiconductor diode includes a substrate, a first semiconductor layer disposed on the substrate, and a second semiconductor layer disposed on the first semiconductor layer. The first and second semiconductor layers include a nitride-based semiconductor. A first portion of the second semiconductor layer may have a thickness thinner than a second portion of the second semiconductor layer. The diode may further include an insulating layer disposed on the second semiconductor layer, a first electrode covering the first portion of the second semiconductor layer and forming an ohmic contact with the first semiconductor layer and the second semiconductor layer, and a second electrode separated from the first electrode, the second electrode forming an ohmic contact with the first semiconductor layer and the second semiconductor layer. | 01-23-2014 |
20140027779 | HIGH ELECTRON MOBILITY TRANSISTOR - According to example embodiments, a high electron mobility transistor includes: a channel layer including a 2-dimensional electron gas (2DEG); a contact layer on the channel layer; a channel supply layer on the contact layer; a gate electrode on a portion of the channel layer; and source and drain electrodes on at least one of the channel layer, the contact layer, and the channel supply layer. The contact layer is configured to form an ohmic contact on the channel layer. The contact layer is n-type doped and contains a Group III-V compound semiconductor. The source electrode and the drain electrode are spaced apart from opposite sides of the gate electrode. | 01-30-2014 |
20140042449 | HIGH ELECTRON MOBILITY TRANSISTOR - According to example embodiments, a high electron mobility transistor (HEMT) includes a channel supply layer that induces a two-dimensional electron gas (2DEG) in a channel layer, a source electrode and a drain electrode that are at sides of the channel supply layer, a depletion-forming layer that is on the channel supply layer and contacts the source electrode, a gate insulating layer on the depletion-forming layer, and a gate electrode on the gate insulating layer. The depletion-forming layer forms a depletion region in the 2DEG. | 02-13-2014 |
20140049296 | ELECTRONIC DEVICE INCLUDING TRANSISTOR AND METHOD OF OPERATING THE SAME - An electronic device may include a first transistor having a normally-on characteristic; a second transistor connected to the first transistor and having a normally-off characteristic; a constant voltage application unit configured to apply a constant voltage to a gate of the first transistor; and a switching unit configured to apply a switching signal to the second transistor. The first transistor may be a high electron mobility transistor (HEMT). The second transistor may be a field-effect transistor (FET). The constant voltage application unit may include a diode connected to the gate of the first transistor; and a constant current source connected to the diode. | 02-20-2014 |
20140091310 | SEMICONDUCTOR DEVICE USING 2-DIMENSIONAL ELECTRON GAS AND 2-DIMENSIONAL HOLE GAS AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE - A semiconductor device includes a first compound semiconductor layer on a substrate, first through third electrodes spaced apart from each other on the first compound semiconductor layer, a second compound semiconductor layer on the first compound semiconductor layer between the first through third electrodes, a third compound semiconductor layer on the second compound semiconductor layer between the first and second electrodes, a first gate electrode on the third compound semiconductor layer, a fourth compound semiconductor layer having a smaller thickness than the third compound semiconductor layer on a portion of the second compound semiconductor layer between the second and third electrodes, and a second gate electrode on the fourth compound semiconductor layer. The first compound semiconductor layer between the second and third electrodes includes a 2-dimensional electron gas (2DEG) and the third compound semiconductor layer includes a 2-dimensional hole gas (2DHG). | 04-03-2014 |
20140091311 | NITRIDE SEMICONDUCTOR BASED POWER CONVERTING DEVICE - A nitride semiconductor based power converting device includes a nitride semiconductor based power transistor, and at least one nitride semiconductor based passive device. The passive device and the power transistor respectively include a channel layer including a first nitride semiconductor material, and a channel supply layer on the channel layer including a second nitride semiconductor material to induce a 2-dimensional electron gas (2DEG) at the channel layer. The passive device may be a resistor, an inductor, or a capacitor. | 04-03-2014 |
20140091312 | POWER SWITCHING DEVICE AND METHOD OF MANUFACTURING THE SAME - A power switching device includes a channel forming layer on a substrate which includes a 2-dimensional electron gas (2DEG), and a channel supply layer which corresponds to the 2DEG at the channel forming layer. A cathode is coupled to a first end of the channel supply layer and an anode is coupled to a second end of the channel supply layer. The channel forming layer further includes a plurality of depletion areas arranged in a pattern, and portions of the channel forming layer between the plurality of depletion areas are non-depletion areas. | 04-03-2014 |
20140091363 | NORMALLY-OFF HIGH ELECTRON MOBILITY TRANSISTOR - According to example embodiments, a normally-off high electron mobility transistor (HEMT) includes: a channel layer having a first nitride semiconductor, a channel supply layer on the channel layer, a source electrode and a drain electrode at sides of the channel supply layer, a depletion-forming layer on the channel supply layer, a gate insulating layer on the depletion-forming layer, and a gate electrode on the gate insulation layer. The channel supply layer includes a second nitride semiconductor and is configured to induce a two-dimensional electron gas (2DEG) in the channel layer. The depletion-forming layer is configured has at least two thicknesses and is configured to form a depletion region in at least a partial region of the 2DEG. The gate electrode contacts the depletion-forming layer. | 04-03-2014 |
20140091366 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - Example embodiments relate to semiconductor devices and/or methods of manufacturing the same. According to example embodiments, a semiconductor device may include a first heterojunction field effect transistor (HFET) on a first surface of a substrate, and a second HFET. A second surface of the substrate may be on the second HFET. The second HFET may have different properties (characteristics) than the first HFET. One of the first and second HFETs may be of an n type, while the other thereof may be of a p type. The first and second HFETs may be high-electron-mobility transistors (HEMTs). One of the first and second HFETs may have normally-on properties, while the other thereof may have normally-off properties. | 04-03-2014 |
20140097470 | HIGH-ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - According to example embodiments, a HEMT includes a channel supply layer on a channel layer, a p-type semiconductor structure on the channel supply layer, a gate electrode on the p-type semiconductor structure, and source and drain electrodes spaced apart from two sides of the gate electrode respectively. The channel supply layer may have a higher energy bandgap than the channel layer. The p-type semiconductor structure may have an energy bandgap that is different than the channel supply layer. The p-type semiconductor structure may include a hole injection layer (HIL) on the channel supply layer and be configured to inject holes into at least one of the channel layer and the channel supply in an on state. The p-type semiconductor structure may include a depletion forming layer on part of the HIL. The depletion forming layer may have a dopant concentration that is different than the dopant concentration of the HIL. | 04-10-2014 |
20140103969 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF DRIVING THE SAME - According to example embodiments, a HEMT includes a channel layer, a channel supply layer on the channel layer, a source electrode and a drain electrode spaced apart on the channel layer, a depletion-forming layer on the channel supply layer, and a plurality of gate electrodes on the depletion-forming layer between the source electrode and the drain electrode. The channel supply layer is configured to induce a two-dimensional electron gas (2DEG) in the channel layer. The depletion-forming layer is configured to form a depletion region in the 2DEG. The plurality of gate electrodes include a first gate electrode and a second gate electrode spaced apart from each other. | 04-17-2014 |
20140147973 | METHOD OF PACKAGING POWER DEVICES AT WAFER LEVEL - A method of packaging power devices at a wafer level is disclosed. The method includes preparing a wafer having a plurality of nitride power devices thereon, each of the plurality of nitride power devices having a plurality of electrodes thereon; forming a polymer layer on the plurality of nitride power devices; exposing each of the electrodes from the polymer layer; forming a solder bump on the exposed electrodes; forming a molding layer covering the solder bump on the polymer layer; and removing the wafer and exposing the solder bump. | 05-29-2014 |
20140151747 | HIGH ELECTRON MOBILITY TRANSISTOR INCLUDING PLURALITY OF GATE ELECTRODES - According to example embodiments, a high electron mobility transistor includes: a channel layer including a first semiconductor material; a channel supply layer on the channel layer and configured to generate a 2-dimensional electron gas (2DEG) in the channel layer, the channel supply layer including a second semiconductor material; source and drain electrodes spaced apart from each other on the channel layer, and an upper surface of the channel supply layer defining a gate electrode receiving part; a first gate electrode; and at least one second gate electrode spaced apart from the first gate electrode and in the gate electrode receiving part. The first gate electrode may be in the gate electrode receiving part and between the source electrode and the drain electrode. The at least one second gate electrode may be between the source electrode and the first gate electrode. | 06-05-2014 |
20140151749 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer; a channel supply layer on the channel layer; a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer; a gate electrode on a part of the channel supply layer between the source electrode and the drain electrode; a first depletion-forming layer between the gate electrode and the channel supply layer; and a at least one second depletion-forming layer on the channel supply layer between the gate electrode and the drain electrode. The at least one second depletion-forming layer is electrically connected to the source electrode. | 06-05-2014 |
20140240026 | METHOD AND APPARATUS FOR CONTROLLING A GATE VOLTAGE IN HIGH ELECTRON MOBILITY TRANSISTOR - According to example embodiments, a method for controlling a gate voltage applied to a gate electrode of a high electron mobility transistor (HEMT) may include measuring a voltage between a drain electrode and a source electrode of the HEMT, and adjusting a level of the gate voltage applied to the gate electrode of the HEMT according to the measured voltage. The level of the gate electrode may be adjusted if the voltage between the drain electrode and the source electrode is different than a set value. | 08-28-2014 |
20140291728 | POWER DEVICE CHIP AND METHOD OF MANUFACTURING THE POWER DEVICE CHIP - According to example embodiments, a power device chip includes a plurality of unit power devices classified into a plurality of sectors, a first pad and a second pad. At least one of the first and second pads is divided into a number of pad parts equal to a number of the plurality of sectors. The first pad is connected to first electrodes of the plurality of unit power devices, and the second pad is connected to second electrodes of the plurality of unit power devices. The unit power devices may be diodes. The power device chip may further include third electrodes in the plurality of unit power devices, and a third pad may be connected to the third electrodes. In this case, the unit power devices may be high electron mobility transistors (HEMTs). Pad parts connected to defective sectors may be excluded from bonding. | 10-02-2014 |
20140327043 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - Provided are a high electron mobility transistor (HEMT) and a method of manufacturing the HEMT. The HEMT includes: a channel layer comprising a first semiconductor material; a channel supply layer comprising a second semiconductor material and generating two-dimensional electron gas (2DEG) in the channel layer; a source electrode and a drain electrode separated from each other in the channel supply layer; at least one depletion forming unit that is formed on the channel supply layer and forms a depletion region in the 2DEG; at least one gate electrode that is formed on the at least one depletion forming unit; at least one bridge that connects the at least one depletion forming unit and the source electrode; and a contact portion that extends from the at least one bridge under the source electrode. | 11-06-2014 |
20150048421 | HIGH ELECTRON MOBILITY TRANSISTORS, METHODS OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICES INCLUDING THE SAME - Provided are high electron mobility transistors (HEMTs), methods of manufacturing the HEMTs, and electronic devices including the HEMTs. An HEMT may include an impurity containing layer, a partial region of which is selectively activated. The activated region of the impurity containing layer may be used as a depletion forming element. Non-activated regions may be disposed at opposite side of the activated region in the impurity containing layer. A hydrogen content of the activated region may be lower than the hydrogen content of the non-activated region. In another example embodiment, an HEMT may include a depletion forming element that includes a plurality of regions, and properties (e.g., doping concentrations) of the plurality of regions may be changed in a horizontal direction. | 02-19-2015 |
20150123139 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - Provided are a high electron mobility transistor and/or a method of manufacturing the same. The high electron mobility transistor includes a channel layer, a channel supply layer formed on the channel layer to generate a two-dimensional electron gas (2DEG), a depletion forming layer formed on the channel supply layer, a gate electrode formed on the depletion forming layer, and a barrier layer formed between the depletion forming layer and the gate electrode. Holes may be prevented from being injected into the depletion forming layer from the gate electrode, thereby reducing a gate forward current. | 05-07-2015 |
20150221745 | HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME - High electron mobility transistors (HEMTs) including a substrate and a HEMT stack on the substrate, the HEMT stack including a compound semiconductor layer that includes a 2-dimensional electron gas (2DEG), an upper compound semiconductor layer that has a polarization index higher than a polarization index of the compound semiconductor layer, and a source electrode, a drain electrode, and a gate that are disposed on the upper compound semiconductor layer. The substrate may be a nitride substrate that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of a silicon substrate. The substrate may include an insulating layer that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of the silicon substrate, a metal layer that is deposited on the insulating layer, and a plate that is attached to the metal layer. | 08-06-2015 |
20150221746 | METHODS OF MANUFACTURING HIGH ELECTRON MOBILITY TRANSISTORS - The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer. | 08-06-2015 |
Jaeryul Oh, Seongnam-Si KR
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20140122820 | SYSTEM-ON-CHIP PROCESSING SECURE CONTENTS AND MOBILE DEVICE COMPRISING THE SAME - A mobile device is provided which includes a working memory having a memory area divided into a secure domain and a non-secure domain; and a system-on-chip configured to access and process contents stored in the secure domain. The system-on-chip includes a processing unit driven by at least one of a secure operating system and a non-secure operating system; at least one hardware block configured to access the contents according to control of the processing unit comprising a master port and a slave port which are set to have different security attributes; at least one memory management unit configured to control access of the at least one hardware block to the working memory; and an access control unit configured to set security attributes of the slave port and the master port or an access authority on each of the secure domain and the non-secure domain of the working memory. | 05-01-2014 |
Jae Won Oh, Seongnam-Si KR
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20120137017 | SYSTEM AND METHOD FOR CONTROLLING SERVER USAGE IN PEER-TO-PEER (P2P) BASED STREAMING SERVICE - Provided is a system and method for controlling server usage in a peer-to-peer (P2P) based streaming service. The system to control server usage in a peer-to-peer based streaming service includes a concurrent connections number providing unit to calculate a number of peer clients concurrently connected to the peer-to-peer based streaming service; a non-transitory memory to store the number of peer clients concurrently connected to the peer-to-peer based streaming service; and a server usage controlling unit to control server usage for the peer-to-peer based streaming service based on a ratio of a variable associated with an influx rate of peer clients to the number of peer clients concurrently connected to the peer-to-peer based streaming service. | 05-31-2012 |
20130018991 | SYSTEM AND METHOD FOR PACKETIZING DATA STREAM IN PEER-TO-PEER (P2P) BASED STREAMING SERVICEAANM KIM; Young WookAACI Seongnam-siAACO KRAAGP KIM; Young Wook Seongnam-si KRAANM KIM; Jong SooAACI Seongnam-siAACO KRAAGP KIM; Jong Soo Seongnam-si KRAANM PARK; Jung JunAACI Seongnam-siAACO KRAAGP PARK; Jung Jun Seongnam-si KRAANM YANG; Seung KwanAACI Seongnam-siAACO KRAAGP YANG; Seung Kwan Seongnam-si KRAANM OH; Jae WonAACI Seongnam-siAACO KRAAGP OH; Jae Won Seongnam-si KRAANM WOO; Chang HeeAACI Seongnam-siAACO KRAAGP WOO; Chang Hee Seongnam-si KRAANM LEE; Sang HyunAACI Seongnam-siAACO KRAAGP LEE; Sang Hyun Seongnam-si KR - A system to packetize a data stream includes a piece generating unit including a processor configured to generate data pieces of the data stream, each data piece being generated during an equal time interval, and a communication unit to transmit the pieces of the data stream. A method that uses a processor to packetize a data stream includes generating, using the processor, data pieces of the data stream, each data piece being generated during an equal time interval, and transmitting the pieces of the data stream. A non-transitory computer-readable medium includes a program for instructing a computer, when executed by a processor, to perform the steps of: generating data pieces of the data stream, each data piece being generated during an equal time interval; and transmitting the pieces of the data stream. | 01-17-2013 |
20130024583 | SYSTEM AND METHOD FOR MANAGING BUFFERING IN PEER-TO-PEER (P2P) BASED STREAMING SERVICE AND SYSTEM FOR DISTRIBUTING APPLICATION FOR PROCESSING BUFFERING IN CLIENT - A system to manage a buffering of a data stream for a peer client in a peer-to-peer based streaming service includes a buffering control unit including a processor configured to control pieces of the data stream to be buffered in a first buffer of the peer client, and to control one or more outputted pieces to be buffered in a second buffer of the peer client, the outputted pieces being outputted from the first buffer for play back of the data stream. A method for managing a buffering includes storing pieces of the data stream in a first buffer; storing one or more outputted pieces of the data stream in a second buffer; and transmitting one or more pieces stored in the first buffer or the second buffer. | 01-24-2013 |
Jeong Keun Oh, Seongnam-Si KR
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20130036693 | DOUGHTNUT-SHAPED HOLLOW CORE BODY, BIDIRECTIONAL HOLLOW CORE SLAB USING THE SAME, AND CONSTRUCTION METHOD THEREOF - The present invention relates to a lightweight bidirectional hollow core slab, and a doughnut-shaped hollow core body which may be advantageously used in the construction of a bidirectional hollow core slab. The doughnut-shaped hollow core body according to the present invention includes an outer case formed in a generally doughnut shape, wherein a hollow portion with a circular section is formed in the center thereof and corners are rounded with curved surfaces. The bidirectional hollow core slab according to the present invention is made by stably locating the doughnut-shaped hollow core bodies in concrete in such a manner that the doughnut-shaped hollow core body is restrained and mounted in steel bar cages or on the upper and lower steel bars. | 02-14-2013 |
Jinho Oh, Seongnam-Si KR
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20110186798 | Phase Changeable Memory Devices and Methods of Forming the Same - Phase changeable memory devices are provided including a mold insulating layer on a substrate, the mold insulating layer defining an opening therein. A phase-change material layer is provided in the opening. The phase-change material includes an upper surface that is below a surface of the mold insulating layer. A first electrode is provided in the opening and on the phase-change material layer. A spacer is provided between a sidewall of the mold insulating layer and the phase-change material layer and the first electrode. The upper surface of the first electrode is coplanar with the surface of the mold insulating layer. Related methods are also provided. | 08-04-2011 |
Jin-Ho Oh, Seongnam-Si KR
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20100176365 | RESISTANCE VARIABLE MEMORY DEVICES AND METHODS OF FABRICATING THE SAME - A resistance variable memory device includes at least one bottom electrode, a first insulating layer containing a trench which exposes the at least one bottom electrode, and a resistance variable material layer including respective first and second portions located on opposite sidewalls of the trench, respectively, where the first and second portions of the resistance variable material layer are electrically connected to the at least one bottom electrode. The device further includes a protective layer covering the resistance variable material layer within the trench, and a second insulating layer located within the trench and covering the protective layer within the trench | 07-15-2010 |
20110049458 | Non-volatile memory device including phase-change material - A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by Sn | 03-03-2011 |
20110049459 | NON-VOLATILE MEMORY DEVICE INCLUDING PHASE-CHANGE MATERIAL - A non-volatile memory device includes a lower electrode, a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer. The phase-change material layer includes a phase-change material including a composition represented by the formula (I) | 03-03-2011 |
20110147692 | VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF FORMING THE SAME - Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode. | 06-23-2011 |
20110155985 | PHASE CHANGE STRUCTURE, AND PHASE CHANGE MEMORY DEVICE - A phase change structure includes a first phase change material layer pattern and a second phase change material layer pattern. The first phase change material layer pattern may partially fill a high aspect ratio structure, and the second phase change material layer pattern may fully fill the high aspect ratio structure. The first phase change material layer pattern may include a first phase change material, and the second phase change material layer pattern may include a second phase change material having a composition substantially different from a composition of the first phase change material. | 06-30-2011 |
20110312126 | METHOD FABRICATING A PHASE-CHANGE SEMICONDUCTOR MEMORY DEVICE - A method of fabricating a phase-change semiconductor memory device includes a plasma treatment of an electrode connected to a phase-change material pattern after a conductive layer used to form the electrode has been planarized in the presence of an oxidizing agent. The plasma is formed from a plasma gas having a molecular weight of 17 or less. | 12-22-2011 |
20120088347 | Methods Of Manufacturing Non-Volatile Phase-Change Memory Devices - Methods of manufacturing non-volatile memory devices may include separating first phase-change material groups and second phase-change material groups, which have different sizes, from a target including phase-change materials and faulting a phase-change material layer on an object by using the first phase-change material groups and the second phase-change material groups. | 04-12-2012 |
20130143380 | METHODS OF FORMING A PHASE CHANGE LAYER AND METHODS OF FABRICATING A PHASE CHANGE MEMORY DEVICE INCLUDING THE SAME - A phase change structure includes a first phase change material layer pattern and a second phase change material layer pattern. The first phase change material layer pattern may partially fill a minute structure, and the second phase change material layer pattern may fully fill the minute structure. The first phase change material layer pattern may include a first phase change material, and the second phase change material layer pattern may include a second phase change material having a composition substantially different from a composition of the first phase change material. | 06-06-2013 |
20140024195 | VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF FORMING THE SAME - Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode. | 01-23-2014 |
20150031195 | Method of Fabricating a Semiconductor Device - A method of fabricating a semiconductor device may include conformally forming a gate insulating layer on a substrate having a recess, conformally forming a barrier layer containing fluorine-free tungsten nitride on the substrate with the gate insulating layer using an atomic layer deposition process, and forming a gate electrode on the barrier layer to fill at least a portion of the recess. | 01-29-2015 |
Ji-Seong Oh, Seongnam-Si KR
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20100135259 | METHOD AND APPARATUS FOR CHANGING COMMUNICATION LINK BETWEEN SOURCE DEVICES AND SINK DEVICES - Provided is a method of changing a communication link between source devices and sink devices. The method includes in a first downlink period, broadcasting an uplink period allocation message to the sink devices and passive source devices by an active source device, which establishes a communication link with a primary sink device from among the sink devices; during a first uplink period, broadcasting by a primary passive source device a link set message for establishing a communication link with the primary sink device to all the source devices in the network; during a second downlink period, relaying the link set message to all the sink devices in the network, wherein the link set message is relayed by the active source device; and during a second uplink period, establishing a communication link between the primary sink device and the primary passive source device by the primary sink device. | 06-03-2010 |
Jong Hyok Oh, Seongnam-Si KR
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20100289747 | METHOD AND APPARATUS FOR ALPHABET INPUT - A method and apparatus for inputting letters by combining basic elements obtained by separating and symbolizing strokes of letters, so as to provide excellent letter intuitiveness and recognition. According to the present invention, a letter may be input by pressing one of or sequentially pressing two of keys to which basic elements u, I, n, ⊂, l, ⊃, | 11-18-2010 |
20140055362 | METHOD AND APPARATUS FOR ALPHABET INPUT - A method and apparatus for inputting letters by combining basic elements obtained by separating and symbolizing strokes of letters, so as to provide excellent letter intuitiveness and recognition. According to the present invention, a letter may be input by pressing one of or sequentially pressing two of keys to which basic elements | 02-27-2014 |
Jong Min Oh, Seongnam-Si KR
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20100289747 | METHOD AND APPARATUS FOR ALPHABET INPUT - A method and apparatus for inputting letters by combining basic elements obtained by separating and symbolizing strokes of letters, so as to provide excellent letter intuitiveness and recognition. According to the present invention, a letter may be input by pressing one of or sequentially pressing two of keys to which basic elements u, I, n, ⊂, l, ⊃, | 11-18-2010 |
20140055362 | METHOD AND APPARATUS FOR ALPHABET INPUT - A method and apparatus for inputting letters by combining basic elements obtained by separating and symbolizing strokes of letters, so as to provide excellent letter intuitiveness and recognition. According to the present invention, a letter may be input by pressing one of or sequentially pressing two of keys to which basic elements | 02-27-2014 |
Joon-Young Oh, Seongnam-Si KR
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20100258930 | Stacked semiconductor package and method of manufacturing thereof - Provided is a stacked semiconductor package and a method of manufacturing the same. The stacked semiconductor package may include a first semiconductor package, a second semiconductor package, and at least one electrical connection device electrically connecting the first and second semiconductor packages. The first semiconductor package may include a first re-distribution pattern on a first semiconductor chip and a first sealing member on the first substrate, the first sealing member may include at least one first via to expose the first re-distribution pattern. The second semiconductor package may include a second re-distribution pattern on a second semiconductor chip and a second sealing member on a lower side of the second substrate, the second sealing member may include at least one second via to expose the second re-distribution pattern. An electrical connection device may be between the first and second vias to connect the first and the second re-distribution patterns. | 10-14-2010 |
20120061816 | SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - Provided are a semiconductor package and method of fabricating the same. The package includes an interconnection substrate, a semiconductor chip mounted on the interconnection substrate, a lateral wire bonded on the interconnection substrate and configured to enclose a side surface of the semiconductor chip, and a metal layer disposed on the semiconductor chip and electrically connected to the lateral wire. | 03-15-2012 |
20120068306 | SEMICONDUCTOR PACKAGE INCLUDING DECOUPLING SEMICONDUCTOR CAPACITOR - A semiconductor package includes a packaging substrate including a first bond finger and a second bond finger, a first semiconductor chip mounted on the packaging substrate, and including a first chip pad and a second chip pad, the first bond finger being electrically connected to the first chip pad by a first bonding wire, and the second bond finger being electrically connected to the second chip pad by a second bonding wire, and a first decoupling semiconductor capacitor mounted on the first semiconductor chip, and including a first capacitor pad, the first capacitor pad being electrically connected to the second chip pad. | 03-22-2012 |
20120317332 | SOLID STATE DRIVE PACKAGES AND RELATED METHODS AND SYSTEMS - Solid state drive (SSD) packages are provided including a controller package and at least one non-volatile memory package. The controller package and the at least one non-volatile memory package are connected to each other using a package-on-package (PoP) technique. A data input/output of the at least one non-volatile memory package is controlled by using the controller package. | 12-13-2012 |
20130020685 | SUBSTRATES FOR SEMICONDUCTOR DEVICES INCLUDING INTERNAL SHIELDING STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SUBSTRATES - A semiconductor device includes a substrate comprising a stack of alternating wiring layers and insulating layers. The wiring layers include conductive wiring patterns. Primary conductive vias extend through respective ones of the insulating layers and electrically connect first ones of the wiring patterns on different ones of the wiring layers to provide electrical connections between opposing first and second surfaces of the substrate. Dummy conductive vias extend through respective ones of the insulating layers and electrically connect second ones of the wiring patterns on different ones of the wiring layers. The dummy conductive vias are arranged in the substrate around a perimeter of a region including the first ones of the wiring patterns, and the dummy conductive vias and the second ones of the wiring patterns electrically connected thereto have a same electric potential to define an electromagnetic shielding structure within the substrate. | 01-24-2013 |
20140146461 | Secondary Memory Device - A secondary memory device includes: a substrate and a housing configured to accommodate at least a part of the substrate. The substrate has upper and lower opposed surfaces and includes a first region in which a first semiconductor device is mounted on the upper surface and a second region in which a second semiconductor device is mounted on the upper surface. The housing includes a first sub-housing covering the upper surface of the substrate at the first region and the first semiconductor device. The first sub-housing does not extend to cover the upper surface of the substrate at the second region. | 05-29-2014 |
Jung-Hyun Oh, Seongnam-Si KR
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20120284342 | METHOD AND APPARATUS FOR CONNECTING DEVICES - A system and method is capable e of connecting devices including receiving from a first device a request to select a plurality of second devices according to predetermined conditions required by the first device. The system also can generate a virtual device channel for connecting the plurality of second devices to the first device. | 11-08-2012 |
20150025998 | APPARATUS AND METHOD FOR RECOMMENDING PLACE - A method of receiving a recommendation of Point of Interest (POI) information from a place recommending apparatus is provided. The method includes sending a POI information recommendation request to the place recommending apparatus using sensor data and receiving a recommendation response to the POI information recommendation request from the place recommending apparatus based on user-desired environment information. | 01-22-2015 |
Jung-Ik Oh, Seongnam-Si KR
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20140057429 | Method of Forming a Step Pattern Structure - A method of forming a multi-floor step pattern structure includes forming a stacked structure having alternating insulating interlayers and sacrificial layers on a substrate. A first photoresist pattern is formed on the stacked structure. A first preliminary step pattern structure is formed by etching portions of the stacked structure using the first photoresist pattern as an etching mask. A passivation layer pattern is formed on upper surfaces of the first photoresist pattern and the first preliminary step pattern structure. A second photoresist pattern is formed by removing a side wall portion of the first photoresist pattern exposed by the passivation layer pattern. A second preliminary step pattern structure is formed by etching exposed insulating interlayers and underlying sacrificial layers using the second photoresist pattern as an etching mask. The above steps may be repeated on the second preliminary step pattern structure to form the multi-floor step pattern structure. | 02-27-2014 |
20140106569 | METHOD OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND THREE-DIMENSIONAL SEMICONDUCTOR DEVICE FABRICATED USING THE SAME - According to example embodiments of inventive concepts, a method of fabricating a 3D semiconductor device may include: forming a stack structure including a plurality of horizontal layers sequentially stacked on a substrate including a cell array region and a contact region; forming a first mask pattern covering the cell array region and defining openings extending in one direction over the contact region; performing a first etching process with a first etch-depth using the first mask pattern as an etch mask on the stack structure; forming a second mask pattern covering the cell array region and exposing a part of the contact region; and performing a second etching process with a second etch-depth using the second mask pattern as an etch mask structure on the stack structure. The second etch-depth may be greater than the first etch-depth. | 04-17-2014 |
20140162420 | METHOD OF FABRICATING SEMICONDUCTOR DEVICES HAVING VERTICAL CELLS - According to example embodiments, a method of fabricating a semiconductor device includes: forming a preliminary stack structure including upper and lower preliminary stack structures by alternately stacking a plurality of interlayer insulating and sacrificial layers on a cell, first pad area, sacrificial area and second pad area of a substrate; removing an entire portion of the upper preliminary stack structure on the second pad area; forming a first mask defining openings over parts of the first and second pad areas; etching an etch depth corresponding to ones of the plurality of interlayer insulating and sacrificial layers through a remaining part of the preliminary stack structure exposed by the first mask; and repetitively performing a first staircase forming process that includes shrinking sides of the first mask and etching the etch depth through remaining parts of the plurality of interlayer insulating and sacrificial layers exposed by the shrunken first mask. | 06-12-2014 |
20150137205 | MEMORY DEVICE - According to example embodiments, a memory device includes a substrate, a channel region on the substrate, a plurality of gate electrode layers stacked on each other on the substrate, and a plurality of contact plugs. The gate electrode layers are adjacent to the channel region and extend in one direction to define a pad region. The gate electrode layers include first and second gate electrode layers. The contact plugs are connected to the gate electrode layers in the pad region. At least one of the contact plugs is electrically insulated from the from the first gate electrode layer and electrically connected to the second gate electrode layer by penetrating through the first gate electrode layer. | 05-21-2015 |
20150228623 | STAIRCASE-SHAPED CONNECTION STRUCTURES OF THREE-DIMENSIONAL SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME - Provided is a staircase-shaped connection structure of a three-dimensional semiconductor device. The device includes an electrode structure on a substrate, the electrode structure including an upper staircase region, a lower staircase region, and a buffer region therebetween. The electrode structure includes horizontal electrodes sequentially stacked on the substrate, the horizontal electrodes include a plurality of pad regions constituting a staircase structure of each of the upper and lower staircase regions, and the buffer region has a width that is larger than that of each of the pad regions. | 08-13-2015 |
20150263029 | NON-VOLATILE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor memory device includes a substrate including a cell region and peripheral region. The cell region is equipped with a photolithographic reference mark pattern and includes a memory cell array region and a staircase-shaped connection region connected to memory cells of the memory cell array region. | 09-17-2015 |
Jun-Hwan Oh, Seongnam-Si KR
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20100182900 | APPARATUS AND METHOD FOR REUSING BASE STATION IDENTIFIER IN A BROADBAND WIRELESS COMMUNICATION SYSTEM - Use of Base Station IDentifier (BSID) in a wireless communication system is provided. Operations of a control station which controls a Base Station (BS) includes, when receiving a handover request message that includes a special BSID allocated for reuse as a target BSID, from other control station, sending a handover response message to the other control station; when receiving a handover complete message from a lower BS, determining whether the lower BS uses the special BSID; and sending a handover complete message comprising the special BSID to the other control station. | 07-22-2010 |
20110111749 | Method for managing neighbor base station information in mobile communication system and system thereof - There are provided a method for managing neighbor Base Station (BS) information in a mobile communication system, and a system thereof. A femto Access Service Network-Gateway (ASN-GW) controls at least one femto BS, manages scan information that an MS served by a macro BS requires in measuring at least one signal strength by scanning the at least one femto BS, creates the scan information in a format of Downlink Channel Descriptor (DCD) and Uplink Channel Descriptor (UCD) information, and transmits the scan information to the macro BS. The macro BS periodically broadcasts neighbor BS information of the femto BS, which includes the scan information, to MSs in its coverage using a Neighbor Advertisement (NBR-ADV) message. | 05-12-2011 |
20110136491 | PAGING METHOD IN AREA WHERE MACRO ASN AND FEMTO ASN ARE LINKED IN MOBILE NETWORK, AND SYSTEM THEREFOR - A system and method for performing paging in an area where a macro Base Station (BS) and a femto Access Services Network (ASN) are linked in a mobile network are provided. The method includes, during handover of a Mobile Station (MS) between a macro ASN and a femto ASN, a first gateway of a current ASN acquires paging group information of a previous ASN. Upon request for paging from the MS in the current ASN, the first gateway requests a BS of the previous ASN to transmit paging information to the MS based on the paging group information of the previous ASN. By doing so, paging success rate may be improved for an MS in coverage of a macro ASN linked to a femto BS, and the high paging success rate may be guaranteed regardless of whether the handover scheme is a controlled handover scheme or an uncontrolled handover scheme. | 06-09-2011 |
20120115530 | APPARATUS AND METHOD FOR SIGNALING FOR GROUP COMMUNICATION IN BROADBAND WIRELESS ACCESS SYSTEM - An apparatus and a method for setting a group communication session using a wireless access system are provided. The method includes transmitting, at a transmission side client, a message requesting start/end of group communication to a control Push To Talk (PTT) server, transmitting, at the control PTT server, a session set/end message including a sequence number to a participating PTT server, multicasting, at the participating PTT server, a connect/disconnect request message N times for at least one reception side client, and setting/releasing, at the at least one reception side client, a session for the group communication. | 05-10-2012 |
20120134312 | APPARATUS AND METHOD FOR SYNCHRONIZATION BETWEEN SCANNING INTERVAL AND MULTICAST INTERVAL IN BROADBAND WIRELESS ACCESS SYSTEM - Scanning cycle synchronization of a multicast service in a broadband wireless access system is provided. Multicast group information of a multicast group to which a Mobile Station (MS) belongs is received at the MS from an application server. A scanning cycle pattern and a scan offset of a multicast service corresponding to the multicast group are determined. A scanning cycle of the multicast is set according to the scanning cycle pattern and the scan offset. Scanning and reception of multicast data are performed according to the scanning cycle. | 05-31-2012 |
20130170477 | METHOD FOR SECURING HANDOVER DATA INTEGRITY IN MOBILE COMMUNICATION SYSTEM AND SYSTEM THEREOF - A method of performing an uncontrolled handover data integrity of a target Base Station (BS) is provided. The method includes receiving an initial access request message from a Mobile Station (MS) by the target BS, performing a negotiation for establishing a handover data integrity path with a serving BS through a serving Access Service Network-Gateway (ASN-GW) by the target BS, and generating a main data path and a first handover data integrity path with the serving ASN-GW according to a result of the negotiation by the target BS. | 07-04-2013 |
Jun-Young Oh, Seongnam-Si KR
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20100191830 | METHOD AND APPARATUS FOR PROVIDING COMMUNITY WIDGET - Provided are a method and apparatus for providing a community widget at a first client device, the method including: receiving a client widget including authentication information from a server; searching a second client device in which the client widget is installed; performing mutual authentication with the second client device by using the authentication information; and transmitting, if the mutual authentication is successful, a community widget to the second client device. | 07-29-2010 |
Kwon-Oh Oh, Seongnam-Si KR
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20130340879 | MANUFACTURING METHOD FOR POROUS METAL-FOAM CONE ASSEMBLY WITH HIGH SURFACE AREA - Disclosed is a method of manufacturing a porous metal foam cone assembly. The metal foam cone assembly according to the present invention includes providing a porous metal foam sheet; cutting the porous metal foam sheet to be in a predetermined shape using a cutting press that is provided with a knife tool; disposing the cut metal foam sheet on a base plate of a forming die and then primarily forming the metal foam sheet using a mandrel of a cone shape; secondarily forming the metal foam sheet using a left slider and a right slider of the forming die; and pressing an overlapping portion of the metal foam sheet using a stamping jig of the forming die after the forming using the left and right sliders. | 12-26-2013 |
Kyu-Bong Oh, Seongnam-Si KR
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20100295993 | APPARATUS AND METHOD FOR SYNCHRONIZATION BETWEEN VIDEO AND AUDIO IN MOBILE COMMUNICATION TERMINAL - An apparatus and a method for synchronization between video and audio in a mobile communication terminal are provided. The method for the synchronization between the video data and the audio data in the mobile communication terminal includes acquiring Presentation Time Stamp (PTS) information for each of audio data and video data which need to be played simultaneously; determining a delay time between the terminal and a wireless device which plays one data of the audio data and the video data; generating new PTS information for the one data by reflecting the determined delay time in the PTS information; and synchronizing the one data and the other data using the new PTS information for the one data and the acquired PTS information for the other data. | 11-25-2010 |
Kyunghwan Oh, Seongnam-Si KR
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20090202202 | FIBER LENS WITH FRESNEL ZONE PLATE LENS AND METHOD FOR PRODUCING THE SAME - A Fresnel lens-integrated optical fiber that can be easily aligned and manufactured in miniature, and a method of fabricating the same are provided. The Fresnel lens-integrated optical fiber includes a light transmission section transmitting incident light, a light expansion section coupled to the light transmission section and expanding light provided from the light transmission section, and a Fresnel lens surface formed on a section of the light expansion section and focusing by passing through the light expanded in the light expansion section at a predetermined focal length. Accordingly, since the Fresnel lens surface has no curvature, arrangement of an optical coupling system is easy, manufacture is easy, and the optical coupling system can be miniaturized. | 08-13-2009 |
Kyung-Seok Oh, Seongnam-Si KR
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20090014829 | Semiconductor fuse box and method for fabricating the same - A semiconductor fuse box includes a fuse structure and a protective structure disposed between the fuse structure and an integrated circuit structure. The protective structure has at least one irregular side surface. The protective structure (which may also include a pad formed there-under) extends beyond a bottom of the fuse structure. Such an irregular side surface and such an extension of the protective structure minimize propagation of damaging energy to the adjacent integrated circuit structure when a laser beam is directed to the fuse structure. | 01-15-2009 |
20110170331 | SEMICONDUCTOR DEVICES AND METHODS OF DRIVING THE SAME - Example embodiments disclose a semiconductor device using resistive memory material layers and a method of driving the semiconductor device. The semiconductor device includes a plurality of memory cells. At least one memory cell includes a uni-polar variable resistor and a bi-polar variable resistor connected in series and configured to switch between low resistance states and high resistance states, respectively, according to an applied voltage. | 07-14-2011 |
20150109803 | SEMICONDUCTOR LIGHT EMITTING DIODE PACKAGE AND LIGHTING DEVICE USING THE SAME - A semiconductor LED package includes a package body having first and second electrode structures and an LED chip connected to at least one of the first and second electrode structures using a wire. The LED chip includes a light emitting structure and first and second electrode parts. At least one of the first and second electrode parts includes a bonding electrode layer made of a material having the same composition as a material of the wire and bonded to the wire, and an uneven electrode layer disposed on the bonding electrode layer and having at least one through hole filled with the wire. The at least one through hole allows a top surface of the bonding electrode layer to be exposed therebelow. | 04-23-2015 |
Mi A Oh, Seongnam-Si KR
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20150227282 | METHOD AND APPARATUS FOR UNLOCKING ELECTRONIC APPLIANCE - An unlocking method and apparatus for an electronic appliance are disclosed. The method and apparatus may enable a user to unlock the electronic appliance by identifying a gesture and to invoke a function mapped to the gesture. The unlocking method includes detecting a preset gesture input when an input means is locked. The method includes unlocking the input means in response to the input gesture. The method also includes invoking an application mapped to the input gesture in response to unlocking. | 08-13-2015 |
Myong Rock Oh, Seongnam-Si KR
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20120242928 | BACKLIGHT UNIT AND LCD HAVING THE SAME - A backlight unit and a liquid crystal display device having the backlight unit are discussed. According to an embodiment, the backlight unit includes a frame including an opening, a light guide plate attached to the frame and formed larger than the opening, an adhesive member formed between the light guide plate and the frame, a colored light source providing colored light to the light guide plate, and a fluorescent excitation sheet formed on the light guide plate to emit colored light incident through the light guide plate as white light, wherein the adhesive member is disposed around lateral sides of the light guide plate. | 09-27-2012 |
Myunghee Oh, Seongnam-Si KR
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20120013801 | METHOD AND APPARATUS FOR MONITORING ANOTHER VIDEO SOURCE - The present invention provides a method for monitoring another video source in addition to a current video source. One method according to the present invention comprises outputting a first video signal provided from a first contents source (for example, a broadcasting channel) and displaying a video from a second video signal provided from a second contents source intermittently with a video from the first video signal on a single screen. During the displaying, a multi-view displaying operation, in which the video from the second video signal is displayed together with the video from the first video signal on the single screen for a first time period, and a single-view displaying operation, in which the video from the first video signal is displayed alone on the single screen for a second time period longer than the first time period, are repeated in an alternate manner. | 01-19-2012 |
Sang Keun Oh, Seongnam-Si KR
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20100221531 | CARBON NANOTUBE CONDUCTIVE LAYER USING SPRAY COATING AND PREPARING METHOD THEREOF - Provided is a carbon nanotube (CNT) transparent conductive layer having a loop pattern in which a plurality of loops are at least partially connected to one another, and a fabrication method thereof. The loops in the pattern are generated by a spray-coating method and partially connected with one anther, and thus improving transparency and conductivity of the CNT transparent conductive layer. In Addition, the CNT transparent conductive layer has conductivity and sheet resistance highly suitable for a transparent electrode. | 09-02-2010 |
20100263246 | TRANSPARENT SIGNBOARD AND FABRICATING METHOD THEREOF - A transparent signboard and a method for fabricating the same are provided. The transparent signboard includes: a transparent substrate; an electrode layer made of polymer or carbon nanotube and comprising a plurality of conducting parts separated from each other with respect to a predetermined pattern region interposed therebetween, and a non-conducting part formed on the predetermined pattern region and integrally formed with the conducting parts; and a light-emitting device configured to connect the separated conducting parts to each other. | 10-21-2010 |
20110032704 | LIGHTING DISPLAY APPARATUS AND THE METHOD FOR MANUFACTURING THE SAME - Provided is a light-emitting display and a method of fabricating the same. The light-emitting display includes a base substrate, and at least one unit light-emitting layer disposed on an upper surface of the base substrate. Here, the unit light-emitting layer includes an electrode pattern layer having a plurality of electrode patterns formed in a specific pattern, at least one light-emitting device connected with the electrode patterns of the electrode pattern layer and selectively emitting light, and an electrode protection layer disposed to cover the electrode pattern layer. | 02-10-2011 |
Se-Chun Oh, Seongnam-Si KR
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20080252632 | GAMMA VOLTAGE GENERATING CIRCUIT AND DISPLAY DEVICE HAVING THE SAME - A gamma voltage generating circuit includes a resistor string part including a plurality of resistors electrically connected in series between a first power terminal and a second power terminal, the first power terminal receives a first power voltage and the second power terminal receives a second power voltage. The resistor string part outputs a plurality of gamma voltages. A first resistor part includes a first electronic device electrically connected in parallel with a first resistor. The first resistor part is electrically connected in series between the first power terminal and a first terminal of the resistor string part and a second resistor part includes a second electronic device electrically connected in parallel with a second resistor. The second resistor part is electrically connected in series between the second power terminal and a second terminal of the resistor string part. | 10-16-2008 |
Se-Kyung Oh, Seongnam-Si KR
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20100262397 | MULTIPLY APPARATUS FOR SEMICONDUCTOR TEST PATTERN SIGNAL - An apparatus for multiplying a semiconductor test pattern signal is disclosed. The multiplying apparatus firstly encodes a plurality of pattern signals to have different pattern types, and multiplies the encoded pattern signals according to an exclusive-OR (XOR) scheme in order to generate a single pattern signal, thereby recognizing a relationship between a pattern signal before the multiplication and the other pattern signal after the multiplication. A pattern-signal segmenting/outputting unit segments a semiconductor test pattern signal into a plurality of pattern signals, and simultaneously outputs the segmented pattern signals. A pattern-signal restoring/multiplying unit restores the segmented pattern signals received from the pattern-signal segmenting/outputting unit to the semiconductor test pattern signal, outputs the restored result to a driver which records a test pattern in an objective semiconductor to be tested, and multiplies the signal outputted to the driver by a predetermined frequency band rather than a frequency band of the segmented signals. | 10-14-2010 |
20110018572 | SEMICONDUCTOR DEVICE TEST SYSTEM - A semiconductor device test system is disclosed. The semiconductor device test system extends driver- and comparator-functions acting as important functions of a test header to an external part (e.g., a HIFIX board) of the test header, such that it can double the productivity of a test without upgrading the test header. The semiconductor device test system includes a test header for testing a semiconductor device by a test controller, and a HIFIX board for establishing an electrical connection between the semiconductor device and the test header, and including a Device Under Test (DUT) test unit which processes a read signal generated from the semiconductor device by making one pair with a driver of the test header and transmits the processed read signal to the test header. | 01-27-2011 |
Seokmin Oh, Seongnam-Si KR
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20130082526 | APPARATUS AND METHOD FOR MANAGING ELECTRIC DEVICES, AND MOBILE DEVICE AND SYSTEM ADAPTED TO THE METHOD - An apparatus and method for managing electric devices, and a mobile device and a system adapted to the method are provided. The electric device management system includes an electric power supply, a plurality of electric devices that are arranged in an area and receive electric power from the electric power supply, and a device management apparatus for providing information regarding the electric devices and at least one operation schedule of electric devices based on the entire amount of electric power planned to be consumed by the electric devices. | 04-04-2013 |
Seong-Jun Oh, Seongnam-Si KR
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20100215764 | Pharmaceutical Composition For Treating Nephropathy and Healthy Food Comprising Herb Extracts - This invention relates to a pharmaceutical composition and health food comprising herb extracts of one or more herbs selected from the group consisting of Puerariae Radix, Bombycis corpus and Araliae Continentalis Radix. The herb medicine of this invention comprising a single or mixed composition may be useful for the prevention and treatment of renal diseases as well as improvement of renal functions. | 08-26-2010 |
20120093942 | PHARMACEUTICAL COMPOSITION FOR TREATING NEPHROPATHY AND HEALTHY FOOD COMPRISING HERB EXTRACTS - Disclosed is a pharmaceutical composition and health food comprising herb extracts of one or more herbs selected from the group consisting of Puerariae Radix, Bombycis corpus and Araliae Continentalis Radix. The herb medicine of this invention comprising a single or mixed composition may be useful for the prevention and treatment of renal diseases as well as improvement of renal functions. | 04-19-2012 |
Seoung Jun Oh, Seongnam-Si KR
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20130223528 | METHOD AND APPARATUS FOR PARALLEL ENTROPY ENCODING/DECODING - The present invention relates to an entropy encoding method comprising the following steps: updating probability information using the update information derived based on a bit stream received from an encoder; deriving a bin corresponding to the current codeword based on the updated probability information; and performing the inverse binarization of the derived bin to acquire a syntax element. According to the present invention, video-encoding/decoding efficiency may be improved. | 08-29-2013 |
20130243089 | DEVICE FOR ENCODING ULTRA-HIGH DEFINITION IMAGE AND METHOD THEREOF, AND DECODING DEVICE AND METHOD THEREOF - Provided are an encoding device using predictive coding in a screen and a method thereof, and a decoding device and a method thereof. The encoding device is capable of generating a prediction block of a current block according to one of methods for generating a plurality of predetermined prediction blocks, and outputting at least one of encoding information and differential blocks as bitstream by entropy encoding according to whether differential blocks are encoded or not. | 09-19-2013 |
20130266068 | APPARATUS AND METHOD FOR ENCODING AND DECODING MOVING PICTURE USING ADAPTIVE SCANNING - Provided is an apparatus and method for encoding/decoding a moving picture based on adaptive scanning. The moving picture apparatus and method can increase a compression rate based on adaptive scanning by performing intra prediction onto blocks of a predetermined size, and scanning coefficients acquired from Discrete Cosine Transform (DCT) of a residue signal and quantization differently according to the intra prediction mode. The moving picture encoding apparatus includes: a mode selector for selecting and outputting a prediction mode; a predictor for predicting pixel values of pixels to be encoded of an input video based on the prediction mode to thereby output a residue signal block; a transform/quantization unit for performing DCT onto the residue signal block and quantizing the transformed residue signal block; and an encoder for adaptively scanning and encoding the quantized residue signal block based on the prediction mode. | 10-10-2013 |
20130343452 | APPARATUS FOR ENCODING AND DECODING IMAGE USING ADAPTIVE DCT COEFFICIENT SCANNING BASED ON PIXEL SIMILARITY AND METHOD THEREFOR - The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients. | 12-26-2013 |
20140029668 | APPARATUS FOR ENCODING AND DECODING IMAGE BY SKIP ENCODING AND METHOD FOR SAME - The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal. | 01-30-2014 |
20140037000 | APPARATUS FOR ENCODING AND DECODING IMAGE USING ADAPTIVE DCT COEFFICIENT SCANNING BASED ON PIXEL SIMILARITY AND METHOD THEREFOR - The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients. | 02-06-2014 |
20150189277 | APPARATUS FOR ENCODING AND DECODING IMAGE BY SKIP ENCODING AND METHOD FOR SAME - The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal. | 07-02-2015 |
20150296223 | APPARATUS AND METHOD FOR ENCODING AND DECODING MOVING PICTURE USING ADAPTIVE SCANNING - Provided is an apparatus and method for encoding/decoding a moving picture based on adaptive scanning. The moving picture apparatus and method can increase a compression rate based on adaptive scanning by performing intra prediction onto blocks of a predetermined size, and scanning coefficients acquired from Discrete Cosine Transform (DCT) of a residue signal and quantization differently according to the intra prediction mode. The moving picture encoding apparatus includes: a mode selector for selecting and outputting a prediction mode; a predictor for predicting pixel values of pixels to be encoded of an input video based on the prediction mode to thereby output a residue signal block; a transform/quantization unit for performing DCT onto the residue signal block and quantizing the transformed residue signal block; and an encoder for adaptively scanning and encoding the quantized residue signal block based on the prediction mode. | 10-15-2015 |
Soo-Yeul Oh, Seongnam-Si KR
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20100157945 | Apparatus and method for changing serving cell in a high speed wireless communication system - A Radio Network Controller (RNC) in a high speed wireless communication system includes an apparatus to perform method for changing a serving cell in the high speed wireless communication system. The RNC receives UpLink (UL) cell change determination information representing UL channel states from a serving Base Station (BS) and a target BS. The UL is received if a UL soft handover of a Mobile Station (MS) is initiated depending on a DownLink (DL) channel quality of the MS. The RNC can determine UL cell change timing of the MS using the UL cell change determination information. Thereafter, the RNC can send an instruction of a UL cell change of the MS to the serving BS and the target BS. | 06-24-2010 |
Tac Keun Oh, Seongnam-Si KR
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20120138925 | SEMICONDUCTOR CHIP, STACK-TYPE SEMICONDUCTOR PACKAGE, AND METHOD FOR MANUFACTURING THE SAME - A semiconductor chip includes: a first substrate having a first surface and a second surface facing away from the first surface; a first test through silicon via (TSV) passing through the first substrate from the first surface to the second surface; and a conductive protrusion coupled to the first test TSV and protruding from the second surface. | 06-07-2012 |
20120205816 | SEMICONDUCTOR CHIP AND FABRICATING METHOD THEREOF - A semiconductor chip includes a substrate having a front surface and a back surface opposite the front surface, a conductive column part passing through the substrate from the front surface to the back surface, a cavity formed by removing a part of the back surface around an end portion of the conductive column part such that the end portion of the conductive column part protrudes from the cavity, a first insulation layer formed in the cavity such that a portion of the end portion of the conductive column part is exposed, and a back electrode electrically connected to the exposed end portion of the conductive column part. | 08-16-2012 |
Uhtaek Oh, Seongnam-Si KR
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20100209934 | METHOD OF IDENTIFYING AGENTS WHICH MODULATE THE ACTIVITY OF CALCIUM-ACTIVATED CHLORIDE CHANNEL - The present invention provides a method of identifying an agent which modulates an activity of a protein, wherein the protein is represented by the amino acid sequence of SEQ ID NO: 1 or has at least 90% amino acid sequence identity to SEQ ID NO: 1 and transports chloride ions across a cell membrane, comprising: (a) exposing cells which express the protein to the agent; and (b) measuring degree of chloride ion transport in the exposed cells, wherein a change in the degree of chloride ion transport compared to control cells, which express the protein but not exposed to the agent, is indicative of an agent capable of modulating an activity of the protein. The agents identified by this method can be used for the prevention or treatment of various diseases caused by the dysfunction of calcium activated chloride channel. | 08-19-2010 |
Won-Sik Oh, Seongnam-Si KR
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20100167082 | PAPER FOR PREVENTING OUTFLOW OF DOCUMENT AND METHOD FOR MANUFACTURING THEREOF - The present invention relates to printing paper for security and a method of producing the same. According to the printing paper for security of the present invention, a white printing layer and a black printing layer are sequentially printed on a side of a first raw paper sheet and the white printing layer and a black printing layer are sequentially printed on a side of a second raw paper sheet. In addition, while a tag for detection that includes a magnetic material is provided between the black printing layer of the first raw paper sheet and the black printing layer of the second raw paper sheet, the first raw paper sheet and the second raw paper sheet are laminated. According to the present invention, since the tag for detection is not exposed to the outside of the printing paper, intentional damage to the tag for detection can be prevented. | 07-01-2010 |
Woon-Taek Oh, Seongnam-Si KR
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20110194590 | TRANSCEIVER HAVING EMBEDDED CLOCK INTERFACE AND METHOD OF OPERATING TRANSCEIVER - A transceiver comprises a transmitter that converts a plurality of data components into serial data in response to a first clock signal and transmits the serial data, and a receiver that receives the serial data and converts the serial data into the plurality of data components in response to a second clock signal generated from the serial data. The transmitter adds at least one dummy bit to the serial data at predetermined intervals. The at least one dummy bit includes information regarding a data type of the plurality of data components. | 08-11-2011 |
20140240365 | SEMICONDUCTOR DEVICE CONTROLLING SOURCE DRIVER AND DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE THE SAME - A semiconductor device includes: a transmitter transforming n data into first serial data and transmitting the first serial data through a first transmission line and transforming m data into second serial data and transmitting the second serial data through a second transmission line, where n and m are natural numbers at least one of which is greater than 1; a first driver integrated circuit (IC) group including n driver ICs; and a second driver IC group including m driver ICs, wherein each of the n driver ICs receives the first serial data through the first transmission line and is driven by part of the first serial data, each of the m driver ICs receives the second serial data through the second transmission line and is driven by part of the second serial data, and each of the n data and the m data includes identification information about a driver IC. | 08-28-2014 |
20140240371 | Phase Locked Loop for Preventing Harmonic Lock, Method of Operating the Same, and Devices Including the Same - A phase locked loop includes a voltage controlled oscillator including a plurality of delay cells configured to respectively generate a plurality of clock signals having different phases and a harmonic lock detector configured to detect harmonic lock in the voltage controlled oscillator and to generate a reset signal in response. Remaining ones of the delay cells other than a first delay cell among the plurality of delay cells are reset in response to the reset signal. | 08-28-2014 |
Yongsoo Oh, Seongnam-Si KR
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20100033805 | ELECTRONIC PAPER DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - An electronic paper display device and a method of manufacturing the electronic paper display device are disclosed. The method in accordance with an embodiment of the present invention includes forming a plurality of partition walls on a lower board, in which the partition walls partition the lower board into cells, disposing a display unit in the cell, and attaching an upper board on an upper part of the plurality of partition walls such that the display unit is covered. This method can adjust a distance between display units and the shape of the display units, and the quantity of disposed display units can be made uniform, whereby the visual quality of the display can be improved by removing spots formed on a screen. | 02-11-2010 |
20100047528 | ELECTRONIC PAPER DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - An electronic paper display device and a method of manufacturing the electronic paper display device are disclosed. The method can include forming a plurality of relievo patterns on a lower board, in which the relievo patterns are formed to be independent and separated from one another, disposing a display unit in between the plurality of relievo patterns, and attaching an upper board on the plurality of relievo patterns such that the display unit is covered. In accordance with an embodiment of the present invention, the method can improve the freedom of disposing the display units by allowing partition walls to form only at areas to fix the display units. | 02-25-2010 |
20110013258 | Manufacturing method of electronic paper display device and electronic paper display device manufactured therefrom - The present invention relates to a manufacturing method of an electronic paper display device and an electronic paper display device manufactured therefrom. | 01-20-2011 |
Yong Soo Oh, Seongnam-Si KR
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20100300733 | Multilayer ceramic board and manufacturing method thereof - The present invention relates to a multilayer ceramic board and manufacturing method thereof. The multilayer ceramic board includes: a ceramic stacked structure in which multiple ceramic layers are stacked and interconnected to one another through vias; diffused reflection preventing patterns which expose the vias provided on each of the uppermost ceramic layer and the lowermost ceramic layer, and are disposed on each of a top surface and a bottom surface of the ceramic stacked structure; and contact pads which are electrically connected to the vias exposed by the diffused reflection preventing patterns. | 12-02-2010 |
20100307801 | Multilayer ceramic substrate and manufacturing method thereof - The present invention relates to a multilayer ceramic substrate including: a ceramic stacked structure in which multiple ceramic layers are stacked and interconnected to one another through vias provided in respective ceramic layers, the ceramic stacked structure having surface reforming layers | 12-09-2010 |
20110090555 | Electronic paper display device and manufacturing method of the same - The present invention provides an electronic paper display device including: a first electrode; a second electrode facing the first electrode; a barrier layer interposed between the first and second electrodes to define a plurality of cells; and a microcapsule disposed in each cell between the first and second electrodes and maintaining a ratio of minor axis to major axis of 0.9 to 1, and a manufacturing method of the same. | 04-21-2011 |
20110279387 | Transperent Conductive Substrate and Method of Manufacturing the same Touch Screen Using the Same - Disclosed herein are a transparent conductive substrate and a method of manufacturing the same, and a touch screen using the same. The transparent conductive substrate includes a transparent substrate, a transparent electrode that is formed and patterned on the transparent substrate, and a primer that is formed between the transparent substrate and the transparent electrode and is patterned to have a pattern corresponding to the transparent electrode. The transparent electrode is easily patterned by previously patterning the primer to correspond to the transparent electrode and residues do not remain on the transparent substrate. | 11-17-2011 |
20110290293 | Thermoelectric module and method for manufacturing the same - Disclosed herein is a thermoelectric module. The thermoelectric module includes: first and second substrates that are disposed to be separated from each other, facing each other and includes first and second grooves each formed on inner sides thereof; first and second electrodes that are received in the first and second grooves, respectively; and a thermoelectric device that is interposed between the first and second electrodes and is electrically bonded to the first and second electrodes. As a result, the present invention provide a thermoelectric module and a method for manufacturing the same capable of improving the figure of merit and reliability of the thermoelectric module. | 12-01-2011 |
20120113063 | TOUCH PANEL AND A MANUFACTURING METHOD THE SAME - Disclosed herein are a touch panel and a method of manufacturing the same. The touch panel | 05-10-2012 |
20130293512 | MUTUAL CAPACITIVE TOUCH PANEL - Disclosed herein is a mutual capacitive touch panel, including: a first transparent substrate; a first bar-shaped transparent electrode formed on the first transparent substrate and divided in a length direction; first wiring whose one set of ends are connected to the first bar-shaped transparent electrode and whose the other set of ends are arranged on one side of the first transparent substrate; a second transparent substrate; a second bar-shaped transparent electrode formed on the second transparent substrate and divided in a length direction; second wiring whose one set of ends are connected to the second bar-shaped to transparent electrode and whose the other set of ends are arranged on one side of the second transparent substrate; and an adhesive layer disposed between the first bar-shaped transparent electrode and the second bar-shaped transparent electrode such that the first bar-shaped transparent electrode and the second bar-shaped transparent electrode face each other. The mutual capacitive touch panel is advantageous in that, since transparent electrodes are divided, low resistance can be realized even when the transparent electrodes are made of a conductive polymer, thus keeping up with the trend of manufacturing large touch panels. | 11-07-2013 |
Yoonna Oh, Seongnam-Si KR
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20110142325 | METHOD OF INSPECTING A MASK - In a method of inspecting a mask, an image of a pattern on the mask may be obtained. A histogram of the image by grey levels may be obtained. The histogram may be compared with information of the pattern to detect a defect of the mask. Thus, reliability of defect detection in the mask may be remarkably improved. | 06-16-2011 |
20130311831 | VIRTUAL FAIL ADDRESS GENERATION SYSTEM, REDUNDANCY ANALYSIS SIMULATION SYSTEM, AND METHOD THEREOF - A fault distribution generation system is provided. The fault distribution generation system comprises: a fail address mapping module which receives a fail bit map representing failures included in a semiconductor device as a plurality of pixels having a plurality of different failure levels and fail addresses for the failures included in the semiconductor device, and maps the fail addresses to each pixel of the fail bit map; a fault pattern analyzing module which receives information on each pixel to which the fail addresses are mapped from the fail address mapping module, analyzes the received information, and classifies the failures included in each pixel into predetermined fault patterns; and a fault distribution estimating module which estimates an occurrence probability distribution of the fault patterns according to the failure levels based on results of the classification of the fault pattern analyzing module. | 11-21-2013 |
Yu Jin Oh, Seongnam-Si KR
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20120201805 | COMPOSITION FOR IMPROVING BLOOD CIRCULATION AND ALLEVIATING COLD HANDS AND FEET, CONTAINING FERMENTED TEA EXTRACT - Disclosed are a fermented tea obtained by inoculating tea with a microbial strain derived from fermented soybean sauce, and a method for producing the fermented tea. The fermented tea has superior taste and aroma, exhibits an outstanding improving effect on blood circulation and alleviating effect on cold hands and feet, and can be used various ways in the field of health foods or medical products. | 08-09-2012 |
20120231146 | PREPARATION METHOD OF FLAVORED TEAS USING WOOD, AND FLAVORED TEAS PREPARED THEREBY - The present invention relates to a method for preparing flavored teas by using wood, and flavored teas prepared thereby. More specifically, the present invention relates to a preparation method of flavored teas with excellent palatability and flavors in which the method uses natural wood along with the appropriate flavoring time and temperature settings, and flavored teas prepared thereby. | 09-13-2012 |
20120251635 | PREPARATION METHOD OF TEA WATER, AND TEA WATER OBTAINED THEREBY - The present invention provides a preparation method of tea water comprising the following steps of: inactivating enzymes of raw tea leaves and juicing the tea leaves to obtain a tea juice; and removing ions of the tea juice obtained from the previous step to obtain tea water. In addition, the present invention provides tea water obtained by removing ions from a tea juice of raw tea leaves of which enzymes are inactivated. Skin-stimulating components are reduced in the tea water. | 10-04-2012 |
20130259855 | COMPOSITION COMPRISING FERMENTED TEA EXTRACTS FOR REDUCING LIPID LEVEL - The present invention relates to a composition for reducing in-vivo lipid level, inhibiting lipoclasis and promoting discharge of a lipid, wherein the composition comprises, as active ingredients, fermented tea extracts obtained by inoculating strains to tea, wherein the strains are derive from fermented Korean traditional condiment. | 10-03-2013 |
Yun-Je Oh, Seongnam-Si KR
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20090121867 | INDOOR LOCATION SYSTEM HAVING SENSOR AND METHOD FOR CHECKING LOCATION USING THE SAME - An indoor location system having a sensor and a method for checking an indoor location using the indoor location system are disclosed. The method includes: calculating a current location coordinate by using nodes; calculating a first movement distance by comparing the current location coordinate and a stored previous location coordinate; calculating a second movement distance through a sensor; and storing the current location coordinate instead of the previous location coordinate when the distance between the first movement distance and the second movement distance is smaller than a predetermined threshold value. Accordingly, an accurate location of an object can be recognized indoors and an error can be prevented from being caused when the location of the object is recognized. | 05-14-2009 |
20100008582 | METHOD FOR RECOGNIZING AND TRANSLATING CHARACTERS IN CAMERA-BASED IMAGE - A method for recognizing an image photographed by a camera and translating characters in connection with an electronic dictionary is provided. The method includes directly selecting an area to be recognized from the photographed character image and performing character recognition, translating and recognizing characters of a user's selected word in connection with dictionary data, and displaying translation result information of user's selected character or word in connection with dictionary data on a screen device. The recognition includes providing information on location of the selected character image area and location of the recognized character string words to the user, and then translating a character string or word in a location area selected by the user. The electronic dictionary-connected search and translation is for searching the character or word selected in connection with the electronic dictionary database, and providing translation result to the user. | 01-14-2010 |
20100079629 | APPARATUS AND METHOD FOR CORRECTING DEFECTIVE PIXEL - Disclosed is an apparatus for correcting a value of a defective pixel based on values of neighboring pixels of the defective pixel, the apparatus includes a plurality of first-stage median filters for receiving a value of a target pixel and values of neighboring pixels of the target pixel, and outputting median values of the received values; and at least one second-stage median filter for receiving the value of the target pixel and the median values from the first-stage median filters, and outputting a median value of the values received by the second-stage median filter. | 04-01-2010 |
20120072926 | METHOD AND APPARATUS FOR CONSTRUCTING A WIDGET ENVIRONMENT - A method and apparatus construct a widget environment. The method converts an application programming interface (API) into an API call in a Web service format in response to identifying that the API that is not executable in a current device is called. The method transmits the API call in the Web service format to a remote device in which the API is executable. The method receives a result obtained from the API call being executed in the Web service format in the remote device. | 03-22-2012 |
20130135512 | MOBILE ELECTRONIC DEVICE AND DOCKING STATION THEREOF - A mobile electronic device including: a body including an accommodation space; and an aroma capsule that is accommodated in the accommodation space, is removable from the accommodation space, and includes an aroma to diffuse a fragrance. | 05-30-2013 |
20130141640 | DIGITAL PHOTOGRAPHING SYSTEM AND METHOD OF OPERATING DIGITAL PHOTOGRAPHING SYSTEM - A digital photographing system includes a smart mount that includes lenses, a shutter, an image sensor, and an image processor, combined with a camera body or a mobile terminal device. A method of operating the digital photographing system is provided. The digital photographing system includes a lens; a smart mount that captures and processes an image of an object input via the lens; and a body that displays, modifies, stores, or deletes the image captured and processed by the smart mount. | 06-06-2013 |
20130148002 | CAMERA WITH MULTI-FUNCTION DISPLAY - A camera is provided that includes a first panel including a plurality of lens units to capture an image, the lens units being disposed at one side of the first panel; a second panel that is rotatably connected to one edge of the first panel so that the first panel and the second panel rotate relative to each other between a first position contacting the one side of the first panel and a second position contacting the other side of the second panel; and an electronic mirror display unit to display an image if a signal is applied to the electronic mirror display unit and to reflect light if a signal is not applied to the electronic mirror display unit, the electronic mirror display unit being disposed at one side of the second panel corresponding to the one side of the first panel at the first position. | 06-13-2013 |
20140240363 | CONTEXT AWARENESS-BASED SCREEN SCROLL METHOD, MACHINE-READABLE STORAGE MEDIUM AND TERMINAL THEREFOR - A context awareness-based screen scroll method is provided. The method includes detecting information about surrounding circumstances of a terminal, setting a screen scroll mode based on the surrounding circumstances, detecting occurrence of an event corresponding to the set screen scroll mode, and executing screen scroll according to the occurred event. | 08-28-2014 |