Patent application number | Description | Published |
20090190081 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a first insulating substrate, a gate line and a data line provided on the first insulating substrate to cross each other, a first sub-pixel electrode coupled to the gate line and the data line, a second sub-pixel electrode capacitively connected to the first sub-pixel electrode, a second insulating substrate opposite to and facing the first insulating substrate, a common electrode formed on the second insulating substrate, and a cut-out pattern formed on the common electrode. | 07-30-2009 |
20100066963 | DISPLAY PANEL AND METHOD OF FORMING THE SAME - A display device having a gate line on a first substrate, a gate insulating layer covering the gate line, a semiconductor layer on the gate insulating layer, a data line intersecting the gate line and including a source electrode and a drain electrode facing the source electrode on the semiconductor layer, a connection assistant separated from the data line, a passivation layer covering the data line and including contact holes exposing the connection assistant and a pixel electrode, including a plurality of sub-pixel electrodes, and formed on the passivation layer. The sub-pixel electrodes are electrically connected to each other through the connection assistant and at least one of the sub-pixel electrodes is electrically connected to the drain electrode. The connection assistant is connected to facing edges of adjacent sub-pixel electrodes and is disposed at about ¼ the distance from the end of the left or the right side of the sub-pixel electrode. | 03-18-2010 |
20120224130 | LIQUID CRYSTAL DISPLAY WITH PROTRUDING SUB-PIXEL ELECTRODE - A pixel unit of a liquid crystal display includes a first sub-pixel electrode coupled by a direct current path to a corresponding switching element and a second sub-pixel electrode capacitively connected to the first sub-pixel electrode. The second sub-pixel electrode has a protrusion extending upwardly toward a spaced apart common electrode. The common electrode has a cut-out directly above the protrusion. | 09-06-2012 |
Patent application number | Description | Published |
20090021648 | HISTOGRAM EQUALIZER AND HISTOGRAM EQUALIZATION METHOD - A histogram equalizer and histogram equalization method is provided. A histogram equalizer, including: a memory; and an operation unit which reads first data and second data from the memory, and then overwrites the second data of the memory with a summed value, the summed value being obtained by summing the read first data and the read second data. | 01-22-2009 |
20090024783 | APPARATUS AND METHOD FOR NETWORK CONTROL - A network control apparatus and network control method is provided. The network control apparatus including: a content addressable memory receiving to store a plurality of addresses which are generated by at least one master intellectual property, determining whether data corresponding to each of the plurality of stored addresses is received, and generating a determination signal; and a packet decoder transmitting each of the plurality of stored addresses and the data corresponding to each of the plurality of stored addresses to a slave intellectual property according to the determination signal. Accordingly, a multiple address issue function can be supported. | 01-22-2009 |
20090161659 | ON-CHIP APPARATUS AND METHOD OF NETWORK CONTROLLING - An apparatus and method of controlling an on-chip network is provided. An apparatus for controlling a network includes an arbiter which generates a switch control signal based on first route information received from a first router, and a switch which receives from the first router a first data packet associated with the first route information, controls at least one output port according to the switch control signal during a first time interval, and outputs the first data packet via the at least one controlled output port during a second time interval. | 06-25-2009 |
Patent application number | Description | Published |
20090097272 | BACKLIGHT UNIT AND LIQUID CRYSTAL DISPLAY DEVICE COMPRISING THE SAME - A backlight unit capable of reducing or effectively preventing a hot spot phenomenon includes a plurality of light sources generating lights, a light guide plate including a portion on which the lights generated from the light sources are incident and converting the lights incident on the portion into a surface-shaped lights and a light path converter converting a traveling direction of the lights incident on the portion of the light guide plate in an area where the lights emitted from the light sources diodes overlap each other. | 04-16-2009 |
20100157574 | DISPLAY DEVICE - A display device includes a display panel displaying an image, a light source generating light, a light guide plate guiding the light and supplying the light to the display panel, a receiving container receiving the light source and the light guide plate, the receiving container including a sidewall portion adjacent to the light guide plate and a bottom portion extending from the sidewall portion, a photosensor coupled to the receiving container, the photosensor sensing the light, and a light receiving hole formed in the receiving container, the light receiving hole comprising a first end and a second end, the first end being closer to the light guide plate and the second end being closer to the photosensor, wherein a height of the first end is smaller than a thickness of the light guide plate, and the second end overlaps the photosensor. | 06-24-2010 |
20120188793 | BACKLIGHT ASSEMBLY - A backlight assembly includes a light emitting module and a receiving container. The receiving container receives the light emitting module, and includes a first frame, a second frame and a heat dissipation channel. The first frame includes a first bottom, and first sidewalls connected to the first bottom. The second frame includes a second bottom which faces the first bottom and is sealed with the first frame. The first and second bottoms are spaced apart from each other and form the heat dissipation channel therebetween. | 07-26-2012 |
Patent application number | Description | Published |
20090119690 | Disk chucking device and disk driving device having the same - A disk chucking device and a disk driving device having the same are disclosed. The disk chucking device may include: a chuck base, on which a boss is formed; chuck chips inserted in the chuck base in a manner such that the chuck chips protrude out from the chuck base; an elastic member, which elastically supports a pair of adjacent chuck chips towards an outer side of the chuck base; and a protrusion portion, which is formed on a bottom of the boss, and which supports the elastic member. The disk chucking device can improve the environment of the elastic members that support the chuck chips, to improve the alignment between the rotation centers of the disk and the chuck base. | 05-07-2009 |
20100058372 | DISK CHUCKING DEVICE - A disk chucking device is disclosed. In accordance with an embodiment of the present invention, the disk chucking device coupling a disk to a rotor of a motor can include: a housing, which accommodates a boss that is coupled to the rotor; a plurality of chuck pins, which is inserted into the housing such that the chuck pins are protruded to the outside of the housing; an elastic body, which elastically supports an adjacent pair of the chuck pins toward the outside of the housing; a supporting surface, which is formed on an outer circumference of the boss to support a center portion of the elastic body; a guide part, which faces the supporting surface to guide a movement of the elastic body; and a protruding part, which is protruded on a lower end of the guide part toward the boss to support a lower side of the center portion of the elastic body. | 03-04-2010 |
20100072844 | MOTOR - A motor is disclosed. The motor in accordance with an embodiment of the present invention can include: a shaft; a bearing supporting the shaft to rotate; a thrust plate supporting a lower end of the shaft a boss joined to the shaft and having a ring-shaped groove on a side facing the bearing; and a rotor joined to the boss. | 03-25-2010 |
20100123975 | MOTOR AND DISK DRIVER HAVING THE SAME - A motor and a disk driver having the motor are disclosed. The motor in accordance with an embodiment of the present invention includes: a shaft; a boss, which is coupled to one end of the shaft; a bearing, which supports the other end of the shaft such that the shaft can rotate; a holder, which supports the bearing; a stator, which is coupled to the holder; a rotor, which is coupled to the boss and covers the stator; and a ventilation hole, which is formed on a lower surface of the boss such that air flows toward the stator. The motor in accordance with an embodiment of the present invention can make the flow of air around a disk stable by forming an air circulation structure, allowing air to flow from the inside to the outside of the motor. | 05-20-2010 |
20100237730 | MOTOR - A motor is disclosed. The motor in accordance with an embodiment of the present invention can include: a shaft; a bearing supporting the shaft to rotate; a thrust plate supporting a lower end of the shaft a boss joined to the shaft and having a ring-shaped groove on a side facing the bearing; and a rotor joined to the boss. | 09-23-2010 |
Patent application number | Description | Published |
20080316193 | Demultiplexer and Display Device Using the Same - A display device includes a demultiplexer. The demultiplexer programs time-divided and sequentially input data currents to at least two signal lines. The demultiplexer includes first and second sample/hold circuits for alternately sampling data currents and holding sampled data corresponding to the sampled data, and third and fourth sample/hold circuits for respectively sampling the sampled data held by the first and second sample/hold circuits and programming the current which correspond to the sampled data to the two signal lines. | 12-25-2008 |
20090231311 | SCAN DRIVER FOR SELECTIVELY PERFORMING PROGRESSIVE SCANNING AND INTERLACED SCANNING AND A DISPLAY USING THE SAME - A scan driver that selectively performs progressive scanning and interlaced scanning and a display using the same. The scan driver includes a shift register having a plurality of flip-flops arranged in series, an odd line selection unit having a plurality of NAND gates, and an even line selection unit having a plurality of NAND gates. In response to an odd line control signal and an even line control signal input to the odd line selection unit and the even line selection unit, respectively, the scan driver performs progressive scanning or interlaced scanning. The scan driver may also include a mode selection unit to selectively perform progressive scanning or interlaced scanning in response to a mode selection signal. | 09-17-2009 |
20100053128 | CURRENT SAMPLE AND HOLD CIRCUIT AND METHOD AND DEMULTIPLEXER AND DISPLAY DEVICE USING THE SAME - A data current sample and hold circuit having an input terminal of a current source type and an output terminal of a current sink type. The sample and hold circuit includes a first transistor, a capacitor, and a plurality of switches, for sampling and holding the data current sunk to an output terminal of a data driver. When the sampled and held data current is applied to the data line, the data current is sunk to an output terminal of the sample and hold circuit. The sample and hold circuit is used together with a data driver having an output terminal of the current sink type. | 03-04-2010 |
Patent application number | Description | Published |
20110142368 | METHOD AND APPARATUS FOR BLOCK-BASED IMAGE DENOISING - A block-based image denoising method includes determining similarities between a current block and reference blocks within a search range around the current block, from among certain-sized blocks divided from an input image; determining weights of the reference blocks with respect to the current block based on the similarities; and generating resultant blocks by denoising the current block with respect to every block of the input image based on the weights of the reference blocks. | 06-16-2011 |
20120014616 | METHOD AND APPARATUS FOR ENHANCING IMAGE QUALITY USING SPATIAL MODULATION PER BAND - A method and apparatus for enhancing and improving image quality are provided. The method includes separating an input image into at least one low frequency component and at least one high frequency component; modulating the low frequency components in a block unit by dithering; modulating the high frequency components by sampling; and combining the modulated low frequency components and the modulated high frequency components. | 01-19-2012 |
20120177301 | METHOD AND APPARATUS FOR REMOVING IMAGE BLOCKING ARTIFACT BY USING TRANSFORMATION COEFFICIENT - A method and apparatus for removing an image blocking artifact by using a transformation coefficient are provided. The method includes: detecting a first blocking artifact which is in a flat region of the input image; removing the first blocking artifact using a number of low frequency coefficients from among transformation coefficients for each transformation block of a plurality of transformation blocks of the input image, based on a result of detecting the first blocking artifact; detecting an edge region of the input image; and removing a second blocking artifact, which is in an edge region of an intermediate image obtained from the removing of the first blocking artifact of the input image, based on the detected edge region in the input image. | 07-12-2012 |
20120314975 | METHOD AND APPARATUS FOR CONVERTING RESOLUTION OF BLOCK BASED IMAGE - A method and apparatus for converting a resolution of a block-based image. The method includes: dividing a low resolution image frame into a plurality of blocks, each block having a predetermined size; performing motion prediction in a sub-pixel unit of each of the divided blocks and determining a motion vector in the sub-pixel unit; dividing the motion vector of the sub-pixel unit into a first motion vector having an integer pixel unit and a second motion vector having the sub-pixel unit; determining at least one low resolution reference block corresponding to each of the divided blocks by using the first motion vector having the integer pixel unit; converting each of the divided blocks into high resolution block by using the second motion vector having the sub-pixel unit and the one low resolution reference block; and generating a high resolution image frame by using each of the converted high resolution blocks. | 12-13-2012 |
20140146881 | METHOD AND APPARATUS FOR ESTIMATING A QUANTIZATION TABLE FOR A VIDEO IMAGE - A method of estimating a quantization table for an image block compressed in image processing is provided. The method including performing a first quantization using a table dictionary that includes a number of candidate quantization tables for the compressed image block; performing edge-related filtering on the compressed image block and performing a second quantization using the table dictionary for the filtered compressed image block; and estimating a quantization table for the compressed image block based on energy costs of the first-quantized image block and the second-quantized image block. | 05-29-2014 |
20140267161 | USER INTERFACE APPARATUS AND METHOD IN USER TERMINAL WITH A CAPACITIVE TOUCH INPUT SCHEME - A user interface apparatus and method in a user terminal that uses a capacitive touch input scheme are provided. The method includes monitoring an input signal that is generated by a touch on a touch panel; and in response to detecting an input signal generated by the touch, determining an area of the touch based on the input signal, and differently processing a selected command depending on the determined area. | 09-18-2014 |
Patent application number | Description | Published |
20090296476 | Flash Memory Device and Method for Manufacturing the Same - A flash memory device includes a substrate, a cell stack having a semiconductor layer, in which junction areas for setting areas therebetween to channel areas are formed in a shape of a stripe, and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked. The flash memory device further includes an array of gate columns penetrating through the cell stack, perpendicular to the substrate and cutting through the junction areas to dispose the junction areas at both sides thereof, and a trap layered stack introduced into an interface between the gate column and the cell stack to store charge. | 12-03-2009 |
20100308398 | Flash Memory Device With an Array of Gate Columns Penetrating Through a Cell Stack - A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate columns penetrating through the cell stack, perpendicular to the substrate; and a trap layered stack introduced into an interface between the gate columns and the cell stack to store charge. | 12-09-2010 |
20120217572 | Flash Memory Device With an Array of Gate Columns Penetrating Through a Cell Stack - A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate columns penetrating through the cell stack, perpendicular to the substrate; and a trap layered stack introduced into an interface between the gate columns and the cell stack to store charge. | 08-30-2012 |
Patent application number | Description | Published |
20090102364 | Organic light emitting display - An organic light emitting display adapted to be connectable to an external circuit board, the organic light emitting display includes a substrate, a plurality of organic light emitting diodes (OLEDs) on the substrate, and a plurality of input pads coupled with the plurality of OLEDs through wiring lines, the plurality of input pads being connectable to the external circuit board, wherein at least one of the plurality of input pads includes a lead unit extending from a respective one of the wiring lines, and a contact unit contacting the circuit board, and a resistor coupled between the lead unit and the contact unit of the at least one input pad including the lead unit and the contact unit. | 04-23-2009 |
20090283774 | ORGANIC LIGHT EMITTING DISPLAY AND METHOD FOR MAKING THE SAME - An organic light emitting display and a method for making the same includes protection circuitry to avoid damage from static electricity. The display and method allow performing a lighting test during display manufacturing. The organic light emitting display includes a substrate, a display region on the transparent substrate with a matrix of pixels, and a signal transfer unit on the transparent substrate for transferring lighting test signals to the pixels. The signal transfer unit includes transistors for transferring the lighting test signals and a resistor coupled to drains and gates of the transistors for protecting the transistors against damage from static electricity. | 11-19-2009 |
20090311824 | METHOD FOR FABRICATING ORGANIC LIGHT EMITTING DISPLAY DEVICE - A fabricating method of an organic light emitting display device including performing a sheet test as a sheet unit on a mother board formed with panels and sheet wires for supplying test signals to the panels on the mother board, the method including: forming drive elements for driving the panels in each of the panels and forming sheet wires electrically coupled to at least a portion of the drive elements and shorting bar electrically coupling all of the sheet wires; forming organic light emitting diodes in each of the panels and isolating the sheet wires from each other by etching open regions of the shorting bar apart from contact regions of the shorting bar for coupling the shorting bar to the sheet wires; performing the sheet test on the plurality of panels by supplying the test signals to the sheet wires; and separating the panels by scribing the mother board. | 12-17-2009 |
Patent application number | Description | Published |
20080231164 | Flat display panel and method of driving the same - A flat display panel in which a field emission principle of ferroelectrics is applied to improve the luminous efficiency with a low driving voltage, and a method of driving the same. The flat display panel includes a first substrate and a second substrate which face each other, barrier ribs which are disposed between the first and second substrates and partition a space between the first and second substrates into a plurality of display cells, a ferroelectric layer which is disposed to face the display cells and is formed of a ferroelectric material that is to be dielectric-polarized according to an external electric field, a first electrode and a third electrode to which electric fields having different opposite polarities are sequentially applied and which induces polarization inversion in the ferroelectric layer placed between the first and third electrodes so that the ferroelectric layer emits electron beams into the display cells, an excitation gas filled in the display cells to be excited by the electron beams, and a phosphor layer formed in the display cells. | 09-25-2008 |
20090160335 | Plasma display panel and manufacturing method of the same - A PDP includes a first substrate and a second substrate overlapping each other, the first and second substrates being sealed to each other along a sealing line, the sealing line being in peripheral portions of the first and second substrates, a metal layer along the sealing line on at least one of the first and second substrates, the metal layer being between the first and second substrates, and a frit layer on the metal layer. | 06-25-2009 |
20090317604 | Photo-sensitive composition, photo-sensitive paste composition for barrier ribs comprising the same, and method for preparing barrier ribs for plasma display panel - A photosensitive composition, which has a cross-linking monomer having at least two ethylenic double bonds, a photopolymerization initiator, and an organic solvent, and a method of preparing a barrier rib for a plasma display panel, wherein the photosensitive composition is used. The photosensitive composition provides improved adherence to an inorganic material and an organic material. | 12-24-2009 |
Patent application number | Description | Published |
20090137074 | Method of manufacturing display device - A method of manufacturing a display device includes: preparing a substrate including a first area and a second area, forming a first layer on the first area and the second area, forming a second layer on the first layer of the first area, respectively forming a first electrode layer on the second layer of the first area and the first layer of the second area, forming a reflective layer on the first electrode layer of the first area, and forming a second electrode layer on the reflective layer. | 05-28-2009 |
20090236624 | Organic light emitting device and organic light emitting display apparatus comprising the same - An organic light emitting device includes an anode electrode having an improved characteristic. The organic light emitting device is constructed with a first electrode including indium tungsten oxide (IWO) so that the anode electrode can be readily patterned, an organic light emitting layer formed on the first electrode, and a second electrode formed on the organic light emitting layer. An organic light emitting display apparatus may be constructed with the organic light emitting device. | 09-24-2009 |
20090280590 | ORGANIC LIGHT EMITTING DEVICE AND METHOD OF FABRICATING THE SAME - An organic light emitting device (OLED) and a method of fabricating the same are provided, wherein the OLED includes a thin film transistor having a gate electrode, and source and drain electrodes on a substrate; a triple-layered pixel electrode connected to one of the source and drain electrodes through a via-contact hole formed in an insulating layer on the substrate, and having a lower pixel electrode, a reflective layer pattern and an upper pixel electrode; an organic layer disposed on the upper pixel electrode and having at least an emission layer; and an opposite electrode disposed on the organic layer. | 11-12-2009 |
20110111540 | METHOD OF FABRICATING FLAT PANEL DISPLAY - Exemplary embodiments provide a flat panel display and method for forming the same including a substrate having a pixel driving circuit region and an emission region, a thin film transistor in the pixel driving circuit region, and a pixel electrode on the same layer as the source and drain electrodes. The thin film transistor may include a semiconductor layer, a gate electrode, and source and drain electrodes. The pixel electrode may contact one end of the semiconductor layer of the thin film transistor. The source and drain electrodes and the pixel electrode may be stacked structures having a first metal layer, a second metal layer, and a transparent conductive layer. | 05-12-2011 |
20110215330 | ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - An organic light-emitting display device and a method of fabricating the same. The organic light-emitting display device includes: a substrate; a first electrode including a first metal layer disposed on the substrate and formed of titanium (Ti), aluminum (Al), a titanium or aluminum alloy, a second metal layer disposed on the first metal layer, and a transparent conductive layer disposed on the second metal layer; an organic layer disposed on the first electrode and including at least one organic emission layer; and a second electrode disposed on the organic layer. The method includes: forming a first electrode including a first metal layer formed of Ti, Al, or a titanium or aluminum alloy, a second metal layer, and a transparent conductive layer, on a substrate ; forming an organic layer including at least one organic emission layer on the first electrode; and forming a second electrode on the organic layer. | 09-08-2011 |
Patent application number | Description | Published |
20110200623 | POLYPEPTIDE COMPLEX COMPRISING NON-PEPTIDYL POLYMER HAVING THREE FUNCTIONAL ENDS - Disclosed is a protein complex, comprising a physiologically active polypeptide, a dimeric protein and a non-peptidyl polymer having three functional ends (3-arm), with the linkage of both the physiologically active polypeptide and the dimeric protein to the 3-arm non-peptidyl polymer via respective covalent bonds. The protein complex guarantees the long acting activity and biostability of a physiologically active polypeptide. Having the ability to maintain the bioactivity of physiologically active polypeptides or peptides highly and to significantly improve the serum half life of the polypeptides or peptides, the protein complex can be applied to the development of sustained release formulations of various physiologically active polypeptide drugs. Also, it utilizes raw materials including the physiologically active polypeptides without significant loss, thereby increasing the production yield. Further, it can be easily purified. | 08-18-2011 |
20120003712 | METHOD FOR PREPARING A SITE-SPECIFIC PHYSIOLOGICALLY ACTIVE POLYPEPTIDE CONJUGATE - The present invention provides a method for preparing a site-specific physiologically active polypeptide conjugate in a high yield by treating a physiologically active polypeptide with a non-peptidyl polymer in the presence of an alcohol at a specific pH, which can be desirably employed in the development of long acting formulations of various peptide drugs having high in-vivo activity and markedly prolonged in-blood half-life. | 01-05-2012 |
20130028918 | INSULIN CONJUGATE USING AN IMMUNOGLOBULIN FRAGMENT - The present invention relates to an insulin conjugate having improved in vivo duration and stability, which is prepared by covalently linking insulin with an immunoglobulin Fc region via a non-peptidyl polymer, a long-acting formulation comprising the same, and a preparation method thereof. The insulin conjugate of the present invention maintains in vivo activity of the peptide at a relatively high level and remarkably increases the serum half-life thereof, thereby greatly improving drug compliance upon insulin treatment. | 01-31-2013 |
Patent application number | Description | Published |
20080213966 | INDUCTOR EMBEDDED IN SUBSTRATE, MANUFACTURING METHOD THEREOF, MICRO DEVICE PACKAGE, AND MANUFACTURING METHOD OF CAP FOR MICRO DEVICE PACKAGE - An inductor embedded in a substrate, including a substrate, a coil electrode formed by filling a metal in a spiral hole formed on the substrate, an insulation layer formed on the substrate, and an external connection pad formed on the insulation layer to be connected to the coil electrode. The inductor-embedded substrate can be used as a cap for a micro device package by forming a cavity on its bottom surface. | 09-04-2008 |
20090025043 | Multiband receiving apparatus and multiband transmitting apparatus using tunable filter - A multiband receiving apparatus and multiband transmitting apparatus using a tunable band is provided. The receiving apparatus includes a receiving unit for receiving radio frequency (RF) signals, and a tunable filter unit for selectively outputting the received RF signals. As a result, a complicated RF transceiving system is simplified, and time and cost for developing and designing a transceiving apparatus are reduced. | 01-22-2009 |
20090114513 | MICRO ELECTROMECHANICAL SYSTEM (MEMS) SWITCH - A Micro ElectroMechanical System (MEMS) switch is provided. The MEMS switch includes a ground, a moving unit moveable according to a driving signal, for connecting the input to the output or disconnecting the input from the output, and an electrode unit arranged in the configuration of a protrusion formed on a portion of the round, to induce a leakage signal generated between the input and the output to move toward the ground. | 05-07-2009 |
20090115553 | TUNABLE RESONATOR USING FILM BULK ACOUSTIC RESONATOR (FBAR) - A tunable resonator is provided. The tunable resonator includes a film bulk acoustic resonator (FBAR) for performing a resonance, and at least one driver which is arranged at a side of the FBAR and is deformed and brought into contact with the FBAR by an external signal, thereby changing a resonance frequency of the FBAR. Accordingly, a multiband integration and a one-chip manufacture can be implemented simply using a micro electro mechanical system (MEMS) technology and a mass production is possible. | 05-07-2009 |
20090185325 | ARRAY VARIABLE CAPACITOR APPARATUS - An array variable capacitor apparatus includes a line unit including a ground line and a signal line which operates as a lower electrode; and a plurality of plates which are engaged with the line unit to generate capacitance and which operate as upper electrodes, the plurality of plates being arranged in an array pattern and having different degrees of stiffness. | 07-23-2009 |
Patent application number | Description | Published |
20090051008 | Semiconductor device having a resistor and methods of forming the same - In a semiconductor device and a method of making the same, the semiconductor device comprises a substrate including a first region and a second region. At least one first gate structure is on the substrate in the first region, the at least one first gate structure including a first gate insulating layer and a first gate electrode layer on the first gate insulating layer. At least one isolating structure is in the substrate in the second region, a top surface of the isolating structure being lower in height than a top surface of the substrate. At least one resistor pattern is on the at least one isolating structure. | 02-26-2009 |
20110062508 | SEMICONDUCTOR DEVICE INCLUDING RESISTOR AND METHOD OF FABRICATING THE SAME - Embodiments of a semiconductor device including a resistor and a method of fabricating the same are provided. The semiconductor device includes a mold pattern disposed on a semiconductor substrate to define a trench, a resistance pattern including a body region and first and second contact regions, wherein the body region covers the bottom and sidewalls of the trench, the first and second contact regions extend from the extending from the body region over upper surfaces of the mold pattern, respectively; and first and second lines contacting the first and second contact regions, respectively. | 03-17-2011 |
20120126421 | Semiconductor Devices and Methods of Forming the Same - A method of forming a semiconductor device may include forming a contact mold layer on a substrate; forming an interconnection mold layer on the contact mold layer that includes a material having an etching selectivity with respect to the contact mold layer; forming grooves in the interconnection mold layer that extend in a first direction and expose the contact mold layer; forming holes in the contact mold layer connected to the grooves by etching a part of the contact mold layer exposed by the groove; and forming contact portions in the holes and interconnections in the groove. A diffusion coefficient of mobile atoms in the contact mold layer is greater than a diffusion coefficient of mobile atoms in a nitride. | 05-24-2012 |
20120168871 | SEMICONDUCTOR DEVICE HAVING A RESISTOR AND METHODS OF FORMING THE SAME - In a semiconductor device and a method of making the same, the semiconductor device comprises a substrate including a first region and a second region. At least one first gate structure is on the substrate in the first region, the at least one first gate structure including a first gate insulating layer and a first gate electrode layer on the first gate insulating layer. At least one isolating structure is in the substrate in the second region, a top surface of the isolating structure being lower in height than a top surface of the substrate. At least one resistor pattern is on the at least one isolating structure. | 07-05-2012 |
20130187233 | SEMICONDUCTOR MEMORY DEVICES - A semiconductor memory device may include: a well impurity layer including a cell array region and a well drive region adjacent to the cell array region, the well impurity layer having a first conductivity type; at least one word line on the well impurity layer; at least one bit line crossing the at least one word line on the well impurity layer of the cell array region, the at least one bit line connected to a drain region in the well impurity layer, and the drain region having a second conductivity type; and a well drive line crossing the at least one word line on the well impurity layer of the well drive region, the well drive line connected to the well impurity layer of the first conductivity type. | 07-25-2013 |
20140021524 | NON-VOLATILE MEMORY DEVICES HAVING AIR GAPS AND METHODS OF MANUFACTURING THE SAME - Disclosed are non-volatile memory devices and methods of manufacturing the same. The non-volatile memory device includes device isolation patterns defining active portions in a substrate and gate structures disposed on the substrate. The active portions are spaced apart from each other in a first direction and extend in a second direction perpendicular to the first direction. The gate structures are spaced apart from each other in the second direction and extend in the first direction. Each of the device isolation patterns includes a first air gap, and each of a top surface and a bottom surface of the first air gap has a wave-shape in a cross-sectional view taken along the second direction. | 01-23-2014 |
20140080278 | SEMICONDUCTOR DEVICE HAVING A RESISTOR AND METHODS OF FORMING THE SAME - In a semiconductor device and a method of making the same, the semiconductor device comprises a substrate including a first region and a second region. At least one first gate structure is on the substrate in the first region, the at least one first gate structure including a first gate insulating layer and a first gate electrode layer on the first gate insulating layer. At least one isolating structure is in the substrate in the second region, a top surface of the isolating structure being lower in height than a top surface of the substrate. At least one resistor pattern is on the at least one isolating structure. | 03-20-2014 |
20140151777 | Semiconductor Memory Devices and Methods of Fabricating the Same - Provided are a semiconductor memory device and a method of fabricating the same, the semiconductor memory device may include a semiconductor substrate with a first trench defining active regions in a first region and a second trench provided in a second region around the first region, a gate electrode provided on the first region to cross the active regions, a charge storing pattern disposed between the gate electrode and the active regions, a blocking insulating layer provided between the gate electrode and the charge storing pattern and extending over the first trench to define a first air gap in the first trench, and an insulating pattern provided spaced apart from a bottom surface of the second trench to define a second air gap in the second trench. | 06-05-2014 |
20140154885 | METHODS OF FABRICATING SEMICONDUCTOR DEVICES HAVING DOUBLE PATTERNING TECHNOLOGY - Methods of fabricating semiconductor devices and semiconductor devices fabricated thereby are provided. Two photolithography processes and two spacer processes are performed to provide final patterns that have a pitch that is smaller than a limitation of photolithography process. Furthermore, since initial patterns are formed to have line and pad portions simultaneously by performing a first photolithography process, there is no necessity to perform an additional photolithography process for forming the pad portion. | 06-05-2014 |
20140322911 | SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME - A method of forming a semiconductor device may include forming a contact mold layer on a substrate; forming an interconnection mold layer on the contact mold layer that includes a material having an etching selectivity with respect to the contact mold layer; forming grooves in the interconnection mold layer that extend in a first direction and expose the contact mold layer; forming holes in the contact mold layer connected to the grooves by etching a part of the contact mold layer exposed by the groove; and forming contact portions in the holes and interconnections in the groove. A diffusion coefficient of mobile atoms in the contact mold layer is greater than a diffusion coefficient of mobile atoms in a nitride. | 10-30-2014 |
20140332894 | NON-VOLATILE MEMORY DEVICES HAVING AIR GAPS AND METHODS OF MANUFACTURING THE SAME - Disclosed are non-volatile memory devices and methods of manufacturing the same. The non-volatile memory device includes device isolation patterns defining active portions in a substrate and gate structures disposed on the substrate. The active portions are spaced apart from each other in a first direction and extend in a second direction perpendicular to the first direction. The gate structures are spaced apart from each other in the second direction and extend in the first direction. Each of the device isolation patterns includes a first air gap, and each of a top surface and a bottom surface of the first air gap has a wave-shape in a cross-sectional view taken along the second direction. | 11-13-2014 |
20150054176 | Methods of Fabricating Semiconductor Devices and Devices Fabricated Thereby - Methods of fabricating semiconductor devices are provided including performing two photolithography processes and two spacer processes such that patterns are formed to have a pitch that is smaller than a limitation of photolithography process. Furthermore, line and pad portions are simultaneously defined by performing the photolithography process once and, thus, there is no necessity to perform an additional photolithography process for forming the pad portion. Related devices are also provided. | 02-26-2015 |
Patent application number | Description | Published |
20090152742 | Method of manufacturing semiconductor package and semiconductor plastic package using the same - A method of manufacturing a semiconductor package may include: forming a first board; forming second boards, in each of which at least one cavity is formed; attaching the second boards to both sides of the first board, such that the second boards are electrically connected with the first board; and connecting at least one component with the first board by a flip chip method by embedding the component in the cavity. The method can prevent damage to the semiconductor chips and lower manufacturing costs, while the connection material may also mitigate stresses, to prevent cracking in the boards and semiconductor chips, while preventing defects such as bending and warpage. Defects caused by temperature changes may also be avoided. Furthermore, it is not necessary to use an underfill in the portions where the semiconductor chips are connected with the printed circuit board, which allows for easier reworking and lower costs. | 06-18-2009 |
20100291737 | Method of manufacturing semiconductor package - A method of manufacturing a semiconductor package that includes: forming a first board; forming second boards, in each of which at least one cavity is formed; attaching the second boards to both sides of the first board, such that the second boards are electrically connected with the first board; and connecting at least one component with the first board by a flip chip method by embedding the component in the cavity. The method can prevent damage to the semiconductor chips and lower manufacturing costs, while the connection material may also mitigate stresses, to prevent cracking in the boards and semiconductor chips, while preventing defects such as bending and warpage. Defects caused by temperature changes may also be avoided. Furthermore, it is not necessary to use an underfill in the portions where the semiconductor chips are connected with the printed circuit board, which allows for easier reworking and lower costs. | 11-18-2010 |
Patent application number | Description | Published |
20100146526 | CHUCK PIN AND DISK CHUCKING DEVICE HAVING THE SAME - A chuck pin and a disk chucking device equipped with the chuck pin are disclosed. In accordance with an embodiment of the present invention, the chuck pin fastening a disk by compressing an inner circumference of the disk includes a protruding part, which presses against the disk, and a body, in which a front part of the body is coupled to the protruding part and an inclined part is formed on a lower surface of the body such that the front part of the body can be rotated about a back part of the body as a pivot when pressure is applied to an upper surface of the protruding part. With this configuration, the chuck pin is kept from floating when the disk rotates, and the chuck pin can be easily tilted downward when the disk is loaded. | 06-10-2010 |
20100153978 | DISK CHUCKING DEVICE - A disk chucking device is disclosed. In accordance with an embodiment of the present invention, the disk chucking device coupling a disk to a rotor of a motor such that the disk can be mounted and demounted can include a boss, which is coupled with the rotor, a first elastic body, which includes an inner circumference surrounding the boss and in which the first elastic body has elasticity in a radial direction from a center of the boss, a plurality of second elastic bodies, which are radially disposed from the first elastic body and in which the plurality of second elastic bodies are elastically supported by the first elastic body, and a plurality of chuck pins, which press the disk and in which each of the plurality of chuck pins is elastically supported by each of the plurality of second elastic bodies. | 06-17-2010 |
Patent application number | Description | Published |
20100085592 | IMAGE FORMING APPARATUS AND WARMING UP METHOD THEREOF - An image forming apparatus having a plurality of operations and a warming up method thereof, the image forming apparatus including: a user interface to receive a setting of a usage right of a user for a plurality of operations of the image forming apparatus and a login of the user while the image forming apparatus is in a power save mode; and a controller to perform a warming up for at least one operation corresponding to the usage right according to the login. | 04-08-2010 |
20120320149 | DIGITAL PHOTOGRAPHING APPARATUS, METHODS OF CONTROLLING THE SAME, AND COMPUTER-READABLE STORAGE MEDIUM TO INCREASE SUCCESS RATES IN PANORAMIC PHOTOGRAPHY - Digital photographing apparatus, methods of controlling the same, and computer-readable storage medium to increase success rates in panoramic photography are disclosed. A method of controlling a digital photographing apparatus is provided that includes initiating panoramic photography, and providing a capture guide when an image is captured during the panoramic photography. | 12-20-2012 |
20130100481 | IMAGE FORMING APPARATUS AND WARMING UP METHOD THEREOF - A controlling method of an image forming apparatus includes receiving a wake up command for the image forming apparatus in a power save mode; confirming prestored authority of a user to use a plurality of operations of the image forming apparatus; and selectively performing warming up for at least one operation of the image forming apparatus according to the authority of the user. | 04-25-2013 |
20140300688 | IMAGING APPARATUS AND METHOD OF CONTROLLING THE SAME - Disclosed herein is an imaging apparatus including a main body, an imaging unit mounted on the main body that captures an image of an object, an input unit that receives a command to capture the image, a controller that controls operation of the imaging unit to create a panoramic image when a panorama mode is input to the input unit and that determines a current progress angle and a remaining angle to complete creation of the panoramic image based on the operation of the imaging unit during creation of the panoramic image, and a display unit that displays shooting angle information for creation of the panoramic image with a live view. | 10-09-2014 |
Patent application number | Description | Published |
20080199758 | SMALL PORTABLE FUEL CELL AND MEMBRANE ELECTRODE ASSEMBLY USED THEREIN - A fuel cell includes: a fuel cell body; and a fuel supplier supplying fuel to the fuel cell body, wherein the fuel cell body includes: a membrane electrode assembly including an ion exchange membrane, an anode catalyst layer positioned at one surface of the ion exchange membrane, an anode gas diffusion layer positioned at one surface of the anode catalyst layer, and a cathode catalyst layer positioned at other surface of the ion exchange membrane; and a fuel flow field positioned at the one surface of the anode gas diffusion layer and supplying the fuel to the anode catalyst layer through the anode diffusion layer. | 08-21-2008 |
20080311463 | MEMBRANE ELECTRODE ASSEMBLY WITH MULTILAYERED CATHODE ELECTRODE FOR USING IN FUEL CELL SYSTEM - A membrane electrode assembly in a fuel cell system includes a cathode electrode that includes a support layer; a catalyst layer; and a first carbon layer and second carbon layer between the support layer and the catalyst layer, the first carbon layer having a relatively higher porosity and the second carbon layer having a relatively lower porosity. Therefore, the membrane electrode assembly maintains good ion conductivity in the polymer electrolyte membrane by suppressing the movement of water molecules from the polymer electrolyte membrane to the cathode electrode using a water pressure between two carbon layers having different porosity. Also, a flooding phenomenon in the cathode electrode is prevented, thereby maintaining the smooth movement of the oxidizing agent in the cathode. | 12-18-2008 |
20090104490 | FUEL CELL SYSTEM AND INITIAL DRIVING METHOD THEREOF - A fuel cell system is provided including a fuel cell stack and a starting controller. The fuel cell stack has output terminals for applying an output voltage. The starting controller is configured to control the output voltage applied across the output terminals of the fuel cell stack during a starting period to be a starting voltage lower than a rated voltage. | 04-23-2009 |
20090123808 | FUEL CELL STACK - The present disclosure relates to a fuel cell stack capable of making fuel flow within the stack uniform. One embodiment of the present disclosure is configured to provide a fuel cell stack comprising: a stack comprising a plurality of fuel cells disposed in a stack body, a fuel manifold in the stack body fluidly connected to the plurality of fuel cells, an oxidant manifold in the stack body fluidly connected to the plurality of fuel cells, and a baffle disposed in the fuel manifold comprising a longitudinal recess wherein a cross-section of the recess reduces in one direction. | 05-14-2009 |
Patent application number | Description | Published |
20110119346 | METHOD AND APPARATUS FOR PROVIDING REMOTE USER INTERFACE SERVICES - A method and an apparatus by which a remote user interface (UI) client device provides a remote UI service, the method comprising receiving an event message, which includes a URL for accessing a first UI resource providing a UI notifying the receipt of a message, from a remote UI server device; obtaining the first UI resource from the remote UI server device by using the URL; receiving external inputs of message control commands via the first UI resource; and transmitting the message control command to the remote UI server device. | 05-19-2011 |
20110296460 | METHOD AND APPARATUS FOR PROVIDING REMOTE USER INTERFACE (UI) SERVICE - A method and apparatus for providing a remote User Interface (UI) service in a remote UI server, including: receiving description information of a remote UI client and an Audio Video (AV) device from a remote UI proxy server; generating a first UI resource based on the received description information; and transmitting the first UI resource to the remote UI client in response to a request of the remote UI client. | 12-01-2011 |
20130128951 | METHOD AND APPARATUS FOR DECODING CONTENT USING DECODING INFORMATION - Provided are an apparatus and method for decoding content data by using decoding information. The method includes: receiving a content switch requesting signal; receiving new content requested by the content switch requesting signal; extracting decoding information from the new content data; comparing the decoding information of the new content data to decoding information of previous content data; and, based on a result of the comparing the decoding information of the new content data to the decoding information of the previous content data, determining whether to stop a decoder. | 05-23-2013 |
20130132937 | METHOD AND APPARATUS FOR AUTO INSTALLING APPLICATION INTO DIFFERENT TERMINALS - An apparatus and method of automatically installing an application in different terminals by storing terminal information of a user and allowing the user to install an application when the user installs an application in at least two terminals, and in which an installation process may be automatically conducted is provided. Information related to an application installed in a first terminal is received from the first terminal; and a second terminal is requested to install another application corresponding to the application, in the second terminal, by using the received information related to the application. | 05-23-2013 |
20130179572 | COMMUNICATION APPARATUS AND METHOD - Provided is a method of communicating, by a first terminal, with a second terminal connected thereto over a predetermined network. The method includes: executing a first web page provided by a web server to broadcast access information of the first terminal; and forming a communication channel with the second terminal, which has received the access information of the first terminal, wherein the second terminal receives the access information of the first terminal by executing a second web page provided by the web server. | 07-11-2013 |
Patent application number | Description | Published |
20090174445 | Semiconductor devices, methods of operating semiconductor devices, and systems having the same - A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal as a first input. The phase detector generates a voltage signal indicating a phase difference between a second clock signal output from the controller and the timing signal output from the selection circuit. The semiconductor device further includes a data port, a memory core storing data, and a serializer, in response to the timing signal output from the selection circuit, serializing the data output from the memory core and outputting serialized data to the controller via the data port. The first selection signal is generated by the controller based on at least one of the voltage signal and the data output to the controller via the data port. | 07-09-2009 |
20100226196 | DUTY CYCLE CORRECTOR PREVENTING EXCESSIVE DUTY CYCLE CORRECTION IN LOW-FREQUENCY DOMAIN - Provided is a duty cycle corrector including a low frequency detector detecting whether an input clock signal frequency is less than or greater than a predetermined frequency. If less than, a common mode control circuit controlling a common mode of a duty cycle correction amplifier amplifying the input clock signal is disabled. The duty cycle corrector may include a column address strobe (CAS) latency determination unit that determines whether a CAS latency is greater than or less than a predetermined value instead of the low frequency detector. | 09-09-2010 |
20130064030 | SEMICONDUCTOR DEVICES, METHODS OF OPERATING SEMICONDUCTOR DEVICES, AND SYSTEMS HAVING THE SAME - A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal as a first input. The phase detector generates a voltage signal indicating a phase difference between a second clock signal output from the controller and the timing signal output from the selection circuit. The semiconductor device further includes a data port, a memory core storing data, and a serializer, in response to the timing signal output from the selection circuit, serializing data output from the memory core and outputting serialized data to the controller via the data port. The controller generates the first selection signal based on at least one of the voltage signal and the serialized data. | 03-14-2013 |
20130101011 | DATA RECEIVER CIRCUIT AND METHOD OF ADAPTIVELY CONTROLLING EQUALIZATION COEFFICIENTS USING THE SAME - Provided are a data receiver circuit and a method of adaptively controlling an equalization coefficient using the same. The data receiver circuit includes n sampling receivers, n decision feedback equalizer (DFE) circuits, and a data recovery circuit. The n sampling receivers are configured to sample an input signal and output n respective sampling signals in response to n respective clock signals. The n DFE circuits are configured to equalize the n respective sampling signals in response to a DFE control signal and generate n respective pre-recovery signals in response to the n equalized sampling signals and n respective previous pre-recovery signals, the DFE control signal for changing an equalization ability of the n DFE circuits. The data recovery circuit is configured to select one of the n respective pre-recovery signals, and output the selected n pre-recovery signal as a recovered input signal. | 04-25-2013 |
Patent application number | Description | Published |
20090002081 | MEASUREMENT APPARATUS FOR IMPROVING PERFORMANCE OF STANDARD CELL LIBRARY - Disclosed herein is a measurement apparatus for improving performances of standard cells in a standard cell library when verifying performance of the standard cell library through a ring oscillator among various test element groups (TEGs). A built-in circuit is used to measure and verify performance of the standard cell library through a TEG. Therefore, it is possible to effectively improve performances of the standard cells in the standard cell library. Particularly, it is possible to not only remove human errors or internal errors of equipment, but also perform the measurement more readily, rapidly and accurately. Further, it is possible to curtail the use of high-performance equipment or manpower and time required in a measurement process. | 01-01-2009 |
20100169045 | MEASUREMENT APPARATUS FOR IMPROVING PERFORMANCE OF STANDARD CELL LIBRARY - Disclosed herein is a measurement apparatus for improving performances of standard cells in a standard cell library when verifying performance of the standard cell library through a ring oscillator among various test element groups (TEGs). The measurement apparatus includes a ring oscillator block activated in response to an enable signal externally inputted thereto for outputting measurement result values, a decoder for selectively outputting one or more of the measurement result values from the ring oscillator block, and a statistics assistor for receiving output values from the decoder for a predetermined period and outputting a maximum value, a minimum value and an average value of the received values. The ring oscillator block includes a pulse generator for generating a pulse in response to the enable signal, a pulse stable unit for synchronizing the pulse generated by the pulse generator with a system clock pulse, a clock enable unit for outputting the system clock pulse according to a state of the pulse outputted from the pulse stable unit, a counter operating at any one of a rising edge and falling edge of the system clock pulse outputted from the clock enable unit, and a captured data storage unit responsive to the enable signal for receiving an output of the counter and storing a final count value or outputting it to the decoder. | 07-01-2010 |
Patent application number | Description | Published |
20100207482 | STATOR FOR AC MOTOR - A stator of an alternating current (AC) motor is disclosed. The stator includes a stator core having a divided structure including and an outer stator core fitted around the inner stator core while being connected to an inner circumference of the inner stator core. The inner stator core has a rotor insertion hole formed at the inner circumference of the inner stator core and a plurality of tooth members arranged in a circumferential direction at an outer circumference of the inner stator core. Since the coils are wound directly on the tooth members through intervals between the neighboring tooth members at the outer circumference of the inner stator core, manufacturing of the stator is facilitated. In addition, since insertion of the coils into the slots is not performed through gaps formed on an inner side of the inner stator core where the rotor insertion hole is formed, the gaps may be minimized. As a result, the performance of the AC motor is improved. | 08-19-2010 |
20100216749 | Combination Therapy for Neuroprotection - The present invention relates to combination therapy of a pyruvoyl derivative and an anti-oxidant, which is characterized by significant increase of the activity of microglia, inhibition of brain tissue damage by the activation of inflammatory cytokines, improvement of motor skill and recovery effect of neuronal damage. Compared to single treatment with each, this present invention provides a continuous high neuroprotective effect even after 6 hours from the onset of damage. | 08-26-2010 |
20110060156 | Pyruvate Derivatives with Neuroprotective Effect, Process for Preparing the Same and Pharmaceutical Composition Comprising the Same - Novel pyruvate derivatives exhibiting outstanding neuroprotective effect, and pharmaceutically acceptable salts thereof, and pharmaceutical compositions for prevention and treatment of brain disease including them as effective ingredient are provided. | 03-10-2011 |
Patent application number | Description | Published |
20090318165 | Apparatus for transmitting media using social intimacy and method thereof - Disclosed is an apparatus and method for transmitting media data using social intimacy. The apparatus and method can calculate a social intimacy level for a plurality of previously stored terminal information, request at least one terminal of transmitting terminal information according to a media transmission request, and when receiving the requested terminal information from at least one terminal, transmit the media data to a terminal where the terminal information equals the received terminal information among terminal information having higher social intimacy, thereby sharing the media data with people forming a higher social intimacy with a user. | 12-24-2009 |
20100177046 | Key input method and apparatus for portable apparatus - A key input apparatus for a portable apparatus includes a display unit that displays a key selected by a user input. The apparatus includes a light sensor comprising a plurality of light emitting elements and a plurality of light receiving elements. The respective light emitting elements generate first light signals upward at a predetermined angle from a direction in which the light emitting elements face the light receiving elements. The apparatus also includes input detection unit that detects the light receiving elements that receive the first light signals, and detects a user's space input position using the light receiving elements that receive the first light signals if the light receiving elements that receive the first light signals are detected. | 07-15-2010 |
20110286374 | METHOD AND SYSTEM FOR WIRELESS CHARGING USING RADIO WAVE - A method and system for wireless charging using a radio wave. The method includes scanning a radio wave of an access point, determining an available charging frequency band among frequency bands, sending the access point a request for transmitting a charging radio wave at the charging frequency band, and switching power output from an antenna, to a battery circuit. | 11-24-2011 |