Patent application number | Description | Published |
20090114927 | Multi-chips with an optical interconnection unit - A multi-chip having an optical interconnection unit is provided. The multi-chip having an optical interconnection unit includes a plurality of silicon chips sequentially stacked, a plurality of optical device arrays on a side of each of the plurality of the silicon chips such that the optical device arrays correspond to each other and a wiring electrically connecting the silicon chip and the optical device array attached to a side of the silicon chip, wherein the corresponding optical device arrays forms an optical connection unit by transmitting and receiving an optical signal between the corresponding optical device arrays in different layers. Each of the optical device arrays includes at least one of a light emitting device and a light receiving device | 05-07-2009 |
20090136235 | Probe card with optical transmitting unit and memory tester having the same - Example embodiments provide a probe card having an optical transmitting unit and a memory tester having the probe card. The probe card may include a plurality of needles connected to test terminals formed in a memory, a plurality of first terminals connected to the needles, a plurality of second terminals connected to the outside and corresponding to the first terminals, and an optical transmitting unit. The optical transmitting unit may connect the first terminals and the second terminals. | 05-28-2009 |
20100163889 | OPTICAL MODULATOR WITH PIXELIZATION PATTERNS - Provided is an optical modulator having pixelization patterns. The optical modulator includes an optical-electric (O-E) conversion element converting input optical images to current signals using the photoelectric effect, and an electric-optical (E-O) conversion element that emits light using the current signals transferred from the O-E conversion element. Trenches are formed from at least a surface of the optical modulator to a predetermined depth in the optical modulator so as to block or reduce electrical interference between pixels when the electric signals are transferred from the O-E conversion element to the E-O conversion element. | 07-01-2010 |
20100194399 | MEMORY SYSTEM, MEMORY TEST SYSTEM AND METHOD OF TESTING MEMORY SYSTEM AND MEMORY TEST SYSTEM - A memory test system is disclosed. The memory system includes a memory device, a tester generating a clock signal and a test signal for testing the memory device, and an optical splitting module. The optical splitting module comprises an electrical-optical signal converting unit which converts each of the clock signal and the test signal into an optical signal to output the clock signal and the test signal as an optical clock signal and an optical test signal. The optical splitting unit further comprises an optical signal splitting unit which splits each of the optical clock signal and the optical test signal into n signals (n being at least two), and an optical-electrical signal converting unit which receives the split optical clock signal and the split optical test signal to convert the split optical clock signal and the split optical test signal into electrical signals used in the memory device. | 08-05-2010 |
20100195420 | SEMICONDUCTOR MEMORY DEVICE AND SYSTEM - A semiconductor memory system includes a memory controller and a memory. The memory controller includes a control signal converting unit converting a control signal into a converted control signal including n sequential clock pulses and a target clock pulse activated after a time period has elapsed from a start point of the n sequential clock pulses, and output the converted clock signal, and a controller transmitting unit converting the converted control signal into an optical signal, and transmitting the optical signal to the memory. The memory includes a memory receiving unit converting the optical signal into an electrical signal, and a control signal re-converting unit detecting the time period from the electrical signal, and converting the control signal into a control signal corresponding to the time period. | 08-05-2010 |
20110038221 | SEMICONDUCTOR MEMORY DEVICES, CONTROLLERS, AND SEMICONDUCTOR MEMORY SYSTEMS - A semiconductor memory system includes a controller and a memory device that are optical-interconnected. The controller includes a control logic configured to generate a control signal for controlling the memory device and a transmitter configured to convert the control signal into an optical signal, and output the optical signal. The memory device includes a receiving unit filter configured to convert the optical signal into an electric signal, and the electric signal based on a supply voltage corresponding to a period of the optical signal or the electric signal. | 02-17-2011 |
20120002495 | MEMORY SYSTEM, MEMORY TEST SYSTEM AND METHOD OF TESTING MEMORY SYSTEM AND MEMORY TEST SYSTEM - A memory test system is disclosed. The memory system includes a memory device, a tester generating a clock signal and a test signal for testing the memory device, and an optical splitting module. The optical splitting module comprises an electrical-optical signal converting unit which converts each of the clock signal and the test signal into an optical signal to output the clock signal and the test signal as an optical clock signal and an optical test signal. The optical splitting unit further comprises an optical signal splitting unit which splits each of the optical clock signal and the optical test signal into n signals (n being at least two), and an optical-electrical signal converting unit which receives the split optical clock signal and the split optical test signal to convert the split optical clock signal and the split optical test signal into electrical signals used in the memory device. | 01-05-2012 |