52nd week of 2010 patent applcation highlights part 50 |
Patent application number | Title | Published |
20100330670 | Differentiated Pluripotent Stem Cell Progeny Depleted of Extraneous Phenotypes - The invention provides methods for depleting extraneous phenotypes from a mixed population of cells comprising the in vitro differentiated progeny of primate pluripotent stem cells. The invention also provides mixed cell populations enriched for a target cell phenotype where the mixed cell population comprises the differentiated in vitro progeny of primate embryonic stem cells. | 2010-12-30 |
20100330671 | MOLECULAR TRANSPORTERS BASED ON SUGAR AND ITS ANALOGUES AND PROCESSES FOR THE PREPARATION THEREOF - The inventive molecular transporter compound shows significantly high permeability through a biological membrane such as a plasma membrane, nuclear membrane and blood-brain barrier, and accordingly, can be effectively used in delivering various biologically active molecules. | 2010-12-30 |
20100330672 | HUMAN STEM CELLS ORIGINATING FROM HUMAN AMNIOTIC MESENCHYMAL CELL LAYER - Neural stem cells which can be provided stably and which are free from the problem of compatibility in transplantation are disclosed. The stem cells are separated from human amniotic mesenchymal cell layer and express vimentin, nestin and BrdU which are markers of neural stem cells. The stem cells can also be differentiated to cells expressing alkaline phosphatase, that is, osteocytes, and to cells expressing collagen type II, that is, chondrocytes. | 2010-12-30 |
20100330673 | METHODS OF MAKING ENHANCED, AUTOLOGOUS FAT GRAFTS - Cells present in processed lipoaspirate tissue are used to treat patients. Methods of treating patients include processing adipose tissue to deliver a concentrated amount of stem cells obtained from the adipose tissue to a patient. The methods may be practiced in a closed system so that the stem cells are not exposed to an external environment prior to being administered to a patient. Compositions that are administered to a patient include a mixture of adipose tissue and stem cells so that the composition has a higher concentration of stem cells than when the adipose tissue was removed from the patient. | 2010-12-30 |
20100330674 | CELL CULTURE SUPPORT AND ASSOCIATED METHOD FOR CELL GROWTH AND RELEASE - A cell culture support comprising a substrate, and a dual stimuli responsive block copolymer immobilized on the substrate, wherein the dual stimuli responsive block copolymer is both thermoresponsive and pH responsive. A method of culturing cells comprising the cell culture support having a dual stimuli responsive copolymer immobilized on a substrate, wherein the dual stimuli responsive copolymer is thermoresponsive and pH responsive; and growing the cells on the cell culture support. By lowering the temperature, cells are released from the cell culture support. | 2010-12-30 |
20100330675 | INSULATING POLYNUCLEOTIDES DERIVED FROM ELEMENT D4Z4 AND THEIR USES IN TRANSGENESIS - Polynucleotides with insulating properties allowing protection of the expression of a transgene from adjacent cis elements in higher eukaryotic cells. In particular, these polynucleotides can be used for transgenesis, gene therapy and the production of recombinant proteins. | 2010-12-30 |
20100330676 | EXPRESSION OF SURROGATE LIGHT CHAINS - The present invention concerns surrogate light chain (SURROBODY™) constructs comprising surrogate light chain sequences with heterologous signal sequences. | 2010-12-30 |
20100330677 | Improved Reprogramming of Mammalian Cells, and Cells Obtained - Expression of reprogramming factors such as Sox2, klf4, c-myc, Nanog, LIN28 and Oct4 followed by culture in a MEK inhibitor and a GSK3 inhibitor reprograms tissue cells. The invention provides new uses of these inhibitors, for example in inducing completion of the transcriptional resetting of so-called pre-pluripotent (pre-iPS) stem cells, for example as obtained from mammalian neural stem cells or epiblast stem cells treated with single or combinations of the reprogramming factors, expressed transiently or by integrative vectors. Also provided are systems for reprogramming an epiplast stem cells independently of the use of there inhibitors. | 2010-12-30 |
20100330678 | PROCESS FOR THE STABLE GENE INTERRUPTION IN CLOSTRIDIA - The present invention is related to a new method for interrupting multiple DNA sequences in Clostridia, even in genes recognized to be essential for the optimal growth of Clostridii by using a counter-selectable marker that would pinpoint the cells that have lost the plasmid and acquired a modified function that permits survival without the interrupted gene. This method is easy to perform and applicable at an industrial level. This method is useful to modify several genetic loci in Clostridia in a routine manner. This method is based on a replicative vector carrying at least two marker genes. | 2010-12-30 |
20100330679 | DEVICE AND METHOD FOR MEASURING THE WATER ACTIVITY OF FOODS - Example embodiments relate a device for measuring the water activity of foods and method for obtaining a water activity measurement. The device includes a container housing the food sample, a disc of permeable material to support a reactive substance which in turn is used to record the water activity level of the food sample ( | 2010-12-30 |
20100330680 | LABELING PEPTIDES WITH TERTIARY AMINES AND OTHER BASIC FUNCTIONAL GROUPS FOR IMPROVED MASS SPECTROMETRIC ANALYSIS - The present invention provides methods for enhancing the fragmentation of peptides for mass spectrometry by modifying the peptides with a tagging reagent containing a functional group, such as a tertiary amine, having a greater gas-phase basicity than the amide backbone of the peptide. These high gas-phase basicity functional groups are attached to a peptide by reacting the tagging reagent to one or more available carboxylic acid groups of the peptide. Linking these high gas-phase functional groups to the peptides leads to higher charge state ions from electrospray ionization mass spectrometry (ESI-MS), which fragment more extensively during fragmentation techniques, particularly non-ergodic fragmentation techniques such as electron capture dissociation (ECD) and electron transfer dissociation (ETD). | 2010-12-30 |
20100330681 | SELECTIVE DETECTION OF Hg2+ BY CALIX[4]ARENES - Provided herein are compounds, methods of making the compounds and methods for the sensitive and selective detection of Hg | 2010-12-30 |
20100330682 | DIACETYLENIC MATERIALS FOR SENSING APPLICATIONS - Diacetylenic materials for the colorimetric detection of an analyte or exposure to certain environmental factors are disclosed as well as the polymerization reaction products of these diacetylenic compounds. | 2010-12-30 |
20100330683 | METHOD FOR QUANTIFYING OXIDATIVE STRESS CAUSED BY DIFFERENT BIOLOGICAL PATHWAYS - The present invention relates to methods for detecting a oxidative stress in a biological sample, methods of determining a cumulative record of oxidative injury, and methods of diagnosing diseases of aging, such as cardiovascular diseases, based on the presence or absence of a biomarker or a component thereof. The present invention also relates to a kit for detecting oxidative stress in a biological sample comprising a stabilizing reactant and an antibody. In some embodiments of the invention, the biomarker of oxidative stress is selected from an aldehyde-protein adduct and an aldehyde metabolite-protein adduct, and the proposed method further comprises measuring separately for the same protein biomarkers of oxydative stress formed with different amino acids of the protein. | 2010-12-30 |
20100330684 | DIAGNOSTIC DEVICE AND METHOD - Diagnostic devices and methods involve comparison of relative levels of first and second components and/or characteristics of a fluid sample (e.g., saliva), preferably using antibodies arranged to interact with selected components, and colorimetric indicators that are bound or released in proportion to relative concentration or amount of the components or characteristics, as indicative of a health condition such as dehydration state, shock state, stress state, disease state, drug consumption, and drug metabolization. Amylase and IgA may be selected as specific salivary components of interest. | 2010-12-30 |
20100330685 | DIAMINORHODAMINE DERIVATIVE - A compound represented by the following formula (I) or (II): | 2010-12-30 |
20100330686 | NANOSENSOR FOR SUGAR DETECTION - Nanosensors for carbohydrate detection are disclosed. The nanosensors include a nanoparticle conjugated to one or more boronic acid molecules or derivatives thereof and one or more pH sensitive materials. The nanosensors may be provided on a pH indicator paper in order to quickly assay samples, such as food samples. | 2010-12-30 |
20100330687 | ULTRA-SENSITIVE DETECTION TECHNIQUES - Techniques for ultra-sensitive detection are provided. In one aspect, a detection device is provided. The detection device comprises a source; a drain; a nanowire comprising a semiconductor material having a first end clamped to the source and a second end clamped to the drain and suspended freely therebetween; and a gate in close proximity to the nanowire. | 2010-12-30 |
20100330688 | DETECTION METHOD AND DETERMINATION METHOD FOR DETECTION TARGET - It is intended to provide a detection method and a determination method for detection target capable of detecting and determining a detection target promptly and simply with high accuracy at low cost. The detection method includes the steps of: mixing a first conjugate | 2010-12-30 |
20100330689 | HYDROPHILIC POLYMER MICROPARTICLE, FILLER FOR ION EXCHANGE LIQUID CHROMATOGRAPHY, AND METHOD FOR PRODUCTION OF FILLER FOR ION EXCHANGE LIQUID CHROMATOGRAPHY - An object of the present invention is to provide a hydrophilic polymer microparticle which shows reduced swelling in an aqueous medium and has an excellent dispersibility in an aqueous medium, a filler for ion-exchange liquid chromatography which can effectively suppress non-specific adsorption of protein and the like, a method for analyzing glycosylated hemoglobin using the filler for ion-exchange liquid chromatography, a method for production of a filler for ion-exchange liquid chromatography that can maintain suppressive effects on swelling, non-specific adsorption and the like for a long period of time, a filler for ion-exchange liquid chromatography produced by the method for production of a filler for ion-exchange liquid chromatography, and a filler for ion-exchange liquid chromatography for glycosylated hemoglobin analysis. | 2010-12-30 |
20100330690 | Suspended Particulate Matter Measurement Apparatus and Suspended Particulate Matter Measurement Method Using the Same - Provided are a suspended particulate matter measurement apparatus capable of automatically measuring a nitrate ion content and a sulfate ion content in the atmosphere, and a suspended particulate matter measurement method using the same. The suspended particulate matter measurement apparatus includes a filter, suction part, extraction part, measurement part, and a recording part. The suction part suctions air in the atmosphere at a constant flow rate to cause particulate matter contained therein to be adsorbed onto the filter. The extraction part extracts components of the particulate matter adsorbed onto the filter, by dissolving the particulate matter into a solvent, and collects a resultant solution. The measurement part measures at least one of a nitrate ion content and a sulfate ion content in the solution collected by the extraction part, and outputs the measurement result. The recording part records the measurement result outputted from the measurement part. | 2010-12-30 |
20100330691 | Process for Producing Surface Enhanced Membrane - A membrane having a refined surface as well as to a process and an apparatus for producing such a membrane, and which is useful, in particular, for rapid diagnostic tests for identifying specific analytes in liquid media. | 2010-12-30 |
20100330692 | AMMONIA DETECTION AND MEASUREMENT DEVICE - There is disclosed an apparatus and method for detecting and measuring volatile acidic or basic components including ammonia, ammonium, or volatile amines (compound) in a gas or liquid state fluid. Specifically, the present invention provides a PTFE-carrier solid phase indicator film having an ammonia-sensitive indicator dye embedded therein, such that the dye moiety changes color or spectral properties upon exposure to the compound to be detected. | 2010-12-30 |
20100330693 | HIGH PRECISION SCANNING OF ENCODED HYDROGEL MICROPARTICLES - Techniques are provided for high precision scanning of hydrogel microparticles. The high precision is achieved by one or more modifications to the microparticle composition, or microfluidics apparatus that align the microparticles in a detection channel, or method of preparing a sample for introduction into the apparatus, or some combination. An apparatus comprises a body structure having formed therein a central channel and multiple focusing channels in fluid communication with the central channel through multiple junctions. A width of the central channel is smaller in a portion downstream of each junction. A particle comprises a hydrogel matrix and a probe molecule. The particle has an aspect ratio greater than about three. A method includes loading into a sample fluid inlet a mixture, wherein a number of particles lies within a range from about 15 to about 20 particles/μl. | 2010-12-30 |
20100330694 | BROMATE ION MEASUREMENT METHOD AND APPARATUS - A method for measuring bromate ion is provided that provides high-sensitivity measurement results more simply and more quickly than conventional bromate ion measurement methods. A fluorescent substance that is quenched by coexistence with bromate ions is added to a sample and the fluorescence intensity of the fluorescent substance after quenching is measured, the measured fluorescence intensity being subtracted from the fluorescence intensity of a standard sample containing no bromate ions to calculated the fluorescence intensity difference. The bromate ion concentration is calculated from the calculated fluorescence intensity difference, using a pre-determined calibration line between the fluorescence intensity difference and the bromate ion concentration. | 2010-12-30 |
20100330695 | SAMPLE APPLICATORS FOR ANALYTICAL ASSAYS - A liquid applicator for applying a liquid sample to a liquid receiving surface is disclosed. The liquid applicator comprises a bibulous line to hold a first predetermined volume of liquid for application to a liquid receiving surface. A second predetermined volume less than or equal to the first predetermined volume is applied to the liquid receiving surface in a substantially uniform and consistent pattern. Systems and methods for using embodiments of the liquid applicators are also disclosed. | 2010-12-30 |
20100330696 | Method of diagnosing endometriosis in human subjects - A method for diagnosing endometriosis in a human subject comprising the steps of detecting a test amount of an antibody that specifically binds to EPP2 (SEQ ID NO:9) polypeptide or a peptide comprising an epitope of EPP2 in a sample from the subject; and comparing the test amount with a normal range of the antibody in a control sample from a subject who does not suffer from endometriosis, whereby a test amount above the normal range provides a positive indication in the diagnosis of endometriosis. | 2010-12-30 |
20100330697 | COMPLEXES OF TRPC DOMAINS AND SESTD1 DOMAINS AND METHODS AND USES INVOLVING THE SAME - The present invention relates to an isolated complex comprising a first protein comprising or consisting of a classical transient receptor potential channel (TRPC) or a functionally active variant thereof and a second protein comprising or consisting of the first spectrin (Spec 1) domain of SEC14 and spectrin domains 1 (SESTD1), a test system comprising the first protein and the second protein as well as means for detecting interaction of the first and the second protein, a method for screening for a TRPC modulator using the system and the use of the test system for the identification of a TRPC modulator. | 2010-12-30 |
20100330698 | DETECTION OF TARGET COMPONENTS WITH THE HELP OF INDICATOR PARTICLES - The invention relates to a system and a method for the detection of target components ( | 2010-12-30 |
20100330699 | APPARATUS AND METHOD FOR THE DETECTION OF LIQUIDS OR SUBSTANCES FROM LIQUIDS, AND USE OF SAID APPARATUS - The embodiments relate to an apparatus and a method for detecting liquids or substances from liquids in spatially separate reaction zones. The embodiments further relate to the use of the apparatus in a plug-in module or a chip card which can be used for rapid immunological tests, for example, with the help of a reading device. The liquids or substances from liquids are detected by means of a sensor array which includes at least two sensors and on which at least one diaphragm is arranged. Individual sensors are spatially separated from each other on a plane by means of walls. The diaphragm can be filled with liquid that is to be analyzed. Sealed reaction chambers are created when pressure is applied to the diaphragm. Pores in the diaphragm are completely closed in the zone of the walls while the pores are merely reduced in size and liquid can continue to be exchanged in zones directly above the sensors. No liquid can be exchanged between adjacent reaction chambers as long as the pressure is applied to and compresses the diaphragm. In the sealed reaction chambers, reactions can take place independently of reactions in adjacent reaction chamber. Reaction products or substances in the liquid can be measured with smaller measurement errors in sealed reaction chamber than when the liquid flows across the entire diaphragm. | 2010-12-30 |
20100330700 | SUBSTRATE FOR ASSAYING BETA-GLUCAN AND/OR ENDOTOXIN AND ASSAY METHOD - An object of the present invention is to provide a peptide derivative for determining β-glucan or endotoxin which allows high sensitivity measurement, and a method for determining β-glucan and/or endotoxin using the same. The present invention relates to (1) a peptide derivative represented by the following general formula [1]: | 2010-12-30 |
20100330701 | USE OF HEAT-RESISTANT BIOTIN-BINDING PROTEIN, AND SOLID SUPPORT HAVING THE PROTEIN ATTACHED THERETO - The present invention relates to a solid support having a heat-resistant biotin-binding protein attached thereto. The present invention also relates to the use of the solid support of the present invention having a heat-resistant biotin-binding protein attached thereto. The present invention further relates to technical fields such as purification, concentration, detection and/or capture of a biotin-linked substance by means of a heat-resistant biotin-binding protein. Such a biotin-binding protein used in the solid support of the present invention is heat-resistant and is therefore useful for use in assay systems involving exposure to a temperature of 70° C. or more. | 2010-12-30 |
20100330702 | ULTRASENSITIVE DETECTION OF BIOMOLECULES USING IMMUNOSEPARATION AND DIFFRACTOMETRY - Systems and methods for rapid and ultrasensitive detection of target hiomolecules in a sample are presented. The detection of biomolecules is achieved through a synergistic use of immunoseparation and diffractomctry, and the formation of antibody-biomolecule-ligand sandwich complexes that form diffraction gratings. Characteristic diffraction patterns are then produced upon illumination of the diffraction gratings with light. The diffraction patterns can he used to detect very low amounts of biomolecules present in the sample. | 2010-12-30 |
20100330703 | ASSAYS INVOLVING COLORIMETRIC AND OTHER SIGNALING - The present invention generally relates to particles and, in particular, to methods of determining binding involving particles, e.g., using colorimetric and other signaling techniques. In one aspect, a mixture of particles of different colors (e.g., at least a first color and a second color) is provided that exhibits a first collective color, e.g., due to the presence of the different colors of particles within the mixture. The mixture can then be exposed to a medium containing a binding partner able to preferentially bind to some of the particles, e.g., particles of a first color relative to particles of a second color. The bound particles can be separated in some fashion (e.g., filtration, gravity, magnetism, centrifugal separation, etc.), such that the mixture exhibits a second collective color, e.g., due to the presence of a greater number of particles of the second color relative to the number of particles of the first color. Accordingly, by visualizing or otherwise determining a color change, a binding event may be determined. Other aspects of the invention relate to kits involving such particles, methods of promoting the making or use of such particles, or the like. | 2010-12-30 |
20100330704 | COMPOSITE PARTICLE, METHOD FOR PRODUCING THE SAME, DISPERSION SOLUTION, MAGNETIC BIOSENSING APPARATUS AND MAGNETIC BIOSENSING METHOD - To provide a method for producing composite particles small in particle size, excellent in mono-dispersibility, high in magnetic-substance content per particle, large in saturation magnetization, excellent in dispersion stability and having non-specific adsorption suppressibility. | 2010-12-30 |
20100330705 | Immunological Test Element with Improved Control Zone - The invention concerns a test element for carrying out an immunological sandwich test for determining an analyte from a liquid sample containing a reagent zone or conjugate zone which contains a conjugate of an analyte binding partner and a label which can be detected directly or indirectly by visual, optical or electrochemical means (e.g., an enzyme, fluorescent or direct label, etc.) wherein the conjugate can be dissolved by the liquid sample, a detection zone which contains a permanently immobilized (i.e., which cannot be detached by the liquid sample) binding partner for the analyte or for complexes containing the analyte; and a control zone which contains a permanently immobilized binding partner for the conjugate of analyte binding partner and label characterized in that the control zone additionally contains one or more permanently immobilized binding partner(s) for the analyte or for complexes containing the analyte. | 2010-12-30 |
20100330706 | PROBE IMMOBILIZATION AND SIGNAL AMPLIFICATION FOR POLYMER-BASED BIOSENSOR - The present invention provides methods of making polymer-based biosensors and the biosensors made by said methods, wherein the biosensors comprise conducting polymers and negatively charged nanoparticles comprising a capture moiety. The present invention also provides methods of detecting analytes in a solution by contacting the solution with said polymer-based biosensors. | 2010-12-30 |
20100330707 | Robust Self-Aligned Process for Sub-65nm Current-Perpendicular Junction Pillars - A method for fabricating a device includes forming a first insulation layer to cover a removable mask and a device structure that has been defined by the mask. The device structure is below the mask. The mask is lifted off to expose a top portion of the device structure. A conductive island structure is formed over the first insulation layer and the exposed top portion of the device structure. The first insulation layer and the conductive island structure are covered with a second insulation layer. A contact is formed through the second insulation layer to the conductive island structure. | 2010-12-30 |
20100330708 | METHODS FOR MULTI-STAGE MOLDING OF INTEGRATED CIRCUIT PACKAGE - Methods for providing an integrated circuit using a multi-stage molding process to protect wirebonds. In one embodiment, a method includes attaching a die to a leadframe having a lead finger, attaching a wirebond between the die and the leadfinger, applying a first mold material over at least a portion of the wirebond and the die and the leadfinger to form an assembly, waiting for the first mold material to at least partially cure, and applying a second mold material over the assembly. | 2010-12-30 |
20100330709 | WAFER TEMPERATURE CORRECTION SYSTEM FOR ION IMPLANTATION DEVICE - To provide an ion implantation device capable of correcting the temperature of the wafer. The ion implantation device of the present invention has: an irradiation means that radiates ions; a retention means that includes a disk | 2010-12-30 |
20100330710 | METHODS FOR CONSTRUCTING AN OPTIMAL ENDPOINT ALGORITHM - A method for automatically identifying an optimal endpoint algorithm for qualifying a process endpoint during substrate processing within a plasma processing system is provided. The method includes receiving sensor data from a plurality of sensors during substrate processing of at least one substrate within the plasma processing system, wherein the sensor data includes a plurality of signal streams from a plurality of sensor channels. The method also includes identifying an endpoint domain, wherein the endpoint domain is an approximate period within which the process endpoint is expected to occur. The method further includes analyzing the sensor data to generate a set of potential endpoint signatures. The method yet also includes converting the set of potential endpoint signatures into a set of optimal endpoint algorithms. The method yet further includes importing one optimal endpoint algorithm of the set of optimal endpoint algorithms into production environment. | 2010-12-30 |
20100330711 | METHOD AND APPARATUS FOR INSPECTING SCRIBES IN SOLAR MODULES - Embodiments of the present invention generally relate to a method and apparatus for inspecting and analyzing the spacing of isolation trenches scribed in a solar module during the fabrication process. In one embodiment, images of the scribed trenches are captured and analyzed at various points in the fabrication process. The results may then be used either manually or in an automated fashion to diagnose, alter, and tune upstream processes for improved scribe spacing on subsequently processed solar modules. | 2010-12-30 |
20100330712 | THIN FILM DEPOSITION APPARATUS AND METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DEVICE BY USING THE SAME - A thin film deposition apparatus and a method of manufacturing an organic light emitting device (OLED) using the thin film deposition apparatus. The thin film deposition apparatus includes a deposition source; a first nozzle in which a plurality of first slits are formed in one direction; a second nozzle in which a plurality of second slits are formed in the one direction; a second nozzle frame combined with the second nozzle to support the second nozzle; a first barrier wall assembly including a plurality of first barrier walls disposed in the one direction to form a space between the first nozzle and the second nozzle; and a second barrier wall assembly having a plurality of second barrier walls disposed in the one direction and a second barrier wall frame to support the second barrier walls, the second barrier wall assembly disposed at one side of the first barrier wall assembly, wherein the second barrier walls are mounted on the second barrier wall frame in the one direction and the second barrier walls slide on the second barrier wall frame. | 2010-12-30 |
20100330713 | LIQUID CRYSTAL DISPLAY DEVICE WITH PHOTOSENSOR AND METHOD OF FABRICATING THE SAME - A liquid crystal display device comprises a liquid crystal panel including first and second substrates bonded to each other with a liquid crystal layer positioned therebetween, and the photosensor, formed on the second substrate, for sensing an external light from the surroundings, wherein the photosensor includes a semiconductor layer formed on the second substrate and provided with n | 2010-12-30 |
20100330714 | MOLD FOR FORMING A MOLDING MEMBER AND METHOD OF FABRICATING A MOLDER MEMBER USING THE SAME - There are provided a mold for forming a molding member and a method for forming a molding member using the same. The mold includes an upper surface, and a lower surface having an outer peripheral surface and a concave surface surrounded by the outer circumference. Injection and discharge holes extend from the upper surface to the lower surface. Accordingly, after the mold and the package are coupled so that the discharge hole is directed upward, a molding member can be formed on the package by injecting the molding material through the injection hole, whereby it is possible to prevent air bubbles from being captured in the molding member. | 2010-12-30 |
20100330715 | Uniform Transfer of Luminescent Quantum Dots onto a Substrate - A method of uniformly transferring luminescent quantum dots onto a substrate, comprising: a) preparing a colloidal suspension of luminescent quantum dots in a hydrophobic solvent, wherein the density of the hydrophobic solvent is from 0.67 g/cm | 2010-12-30 |
20100330716 | ELECTROLUMINESCENT DEVICE HAVING IMPROVED LIGHT OUTPUT - An electroluminescent device including a transparent substrate, a securing layer, a light scattering layer, an electroluminescent unit including a transparent electrode layer, a light emitting element including at least one light emitting layer, and a reflecting electrode layer in that order, wherein the light scattering layer includes one monolayer of inorganic particles having an index of refraction larger than that of the light emitting layer and wherein the securing layer holds the inorganic particles in the light scattering layer. | 2010-12-30 |
20100330717 | SEMICONDUCTOR LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME - A high-efficiency semiconductor light emitting diode and a method for manufacturing the same are provided. The semiconductor LED has high internal quantum efficiency and can reduce the bad effect caused by the crystal defect. In the semiconductor light emitting diode, a conductive substrate has a three-dimensional top surface, and a light-emitting stack structure has a three-dimensional structure and includes an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer, which are sequentially formed on the conductive substrate. A p-electrode is formed on the p-type nitride semiconductor layer, and an n-electrode is formed on a bottom surface of the conductive substrate. | 2010-12-30 |
20100330718 | Method of manufacturing liquid crystal display device - A method of manufacturing an LCD device is disclosed. The LCD device manufacturing method includes: forming first and second active patterns on P-channel and N-channel thin film transistor formation regions of a substrate using a first masking process, respectively; forming a first gate electrode on the P-channel thin film transistor formation region of the substrate using a second masking process; forming a second gate electrode on the N-channel thin film transistor formation region of the substrate using a third masking process; forming first contact holes partially exposing the respective N and P source regions and second contact holes partially exposing the respective N and P drain regions, using a fourth masking process; forming N and P source electrodes connected to the N and P source regions, and N and P drain electrodes connected to the N and P drain regions, using a fifth masking process; simultaneously forming third contact holes and a common electrode using a sixth masking process; forming fourth contact holes, which expose the respective N and P drain electrodes, using a seventh masking process; and forming a pixel electrode using a eighth masking process. | 2010-12-30 |
20100330719 | METHOD OF FORMING TRANSFLECTIVE LIQUID CRYSTAL DISPLAY PANEL - A method of forming a transflective LCD panel is provided. The transflective LCD includes a substrate, a first polycrystalline silicon pattern disposed in a reflection region, a second polycrystalline silicon pattern disposed in a peripheral region, an insulating layer disposed on the first and second polycrystalline silicon pattern and the substrate, a gate electrode disposed in the reflection region, a common electrode disposed in the peripheral region, a first inter-layer dielectric disposed on the insulating layer, the gate electrode and the common electrode, a reflection electrode disposed on the first inter-layer dielectric, a second inter-layer dielectric disposed on the first inter-layer dielectric and the reflection electrode, and a transmission electrode disposed on the second inter-layer dielectric and electrically connected to the reflection electrode through an opening of the second inter-layer dielectric. The second polycrystalline silicon pattern, the common electrode, and the insulating layer disposed therebetween form a storage capacitor. | 2010-12-30 |
20100330720 | GROUP-III NITRIDE BASED LASER DIODE AND METHOD FOR FABRICATING SAME - A laser diode comprising a first separate confinement heterostructure and an active region on the first separate confinement heterostructure. A second separate confinement heterostructure is on the active region and one or more epitaxial layers is on the second separate confinement heterostructure. A ridge is formed in the epitaxial layers with a first mesa around the ridge. The first mesa is 0.1 to 0.2 microns above the second confinement heterostructure. | 2010-12-30 |
20100330721 | METHOD FOR FORMING BURIED CAVITIES WITHIN A SEMICONDUCTOR BODY, AND SEMICONDUCTOR BODY THUS MADE - A method for the formation of buried cavities within a semiconductor body envisages the steps of: providing a wafer having a bulk region made of semiconductor material; digging, in the bulk region, trenches delimiting between them walls of semiconductor material; forming a closing layer for closing the trenches in the presence of a deoxidizing atmosphere so as to englobe the deoxidizing atmosphere within the trenches; and carrying out a thermal treatment such as to cause migration of the semiconductor material of the walls and to form a buried cavity. Furthermore, before the thermal treatment is carried out, a barrier layer that is substantially impermeable to hydrogen is formed on the closing layer on top of the trenches. | 2010-12-30 |
20100330722 | CMOS MICROELECTROMECHANICAL SYSTEM (MEMS) DEVICE AND FABRICATION METHOD THEREOF - A method for fabricating the MEMS device includes providing a substrate. Then, a structural dielectric layer is formed over the substrate at a first side, wherein a diaphragm is embedded in the structural dielectric layer. The substrate is patterned from a second side to form a cavity in corresponding to the diaphragm and a plurality of venting holes in the substrate. An isotropic etching process is performed from the first side and the second side of the substrate via vent holes to remove a dielectric portion of the structural dielectric layer for exposing a central portion of the diaphragm while an end portion is held by a residue portion of the structural dielectric layer. | 2010-12-30 |
20100330723 | METHOD OF MANUFACTURING PHOTOELECTRIC CONVERSION DEVICE - In a method of manufacturing a photoelectric conversion device having a pixel region and a peripheral circuit region, a semiconductor compound layer is formed by causing a surface of a diffusion layer or gate electrode of a MOS transistor in the peripheral circuit region to react with a high melting point metal, then an insulating layer is formed in the pixel region and the peripheral circuit region after the step of forming a semiconductor compound layer. A contact hole is formed in the insulating layer to expose a diffusion layer in the pixel region, and a contact hole is formed in the insulating layer to expose the semiconductor compound layer formed in the peripheral circuit region. These holes are formed at different timings. Prior to forming the hole which is formed later, a contact plug is formed in the contact hole which is formed earlier. | 2010-12-30 |
20100330724 | SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE - A solid-state imaging device including an imaging region having a plurality of pixels arranged in a two-dimensional matrix and a peripheral circuit detecting output signals from the pixels. An impurity concentration in a transistor of each pixel is lower than an impurity concentration in a transistor of the peripheral circuit. Further, the impurity concentration of a semiconductor well region under a floating diffusion portion in the pixel is set to be lower than the impurity concentration of a semiconductor well region under a transistor portion at the subsequent stage of the floating diffusion portion. | 2010-12-30 |
20100330725 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME - In a semiconductor device which has through holes in an end face, in which a semiconductor element is fixedly mounted on a face of a substrate which has a wiring pattern, which is conductive to the wiring portion formed in the through hole, in at least one face, in which electrodes of the semiconductor element are electrically connected to the wiring pattern, and in which the face of the substrate which has the semiconductor element is coated with a resin, the through hole has a through hole land with a width of 0.02 mm or more, which is conductive to the wiring portion, in a substrate face, and the wiring portion and the through hole land are exposed. | 2010-12-30 |
20100330726 | Photovoltaic module with light reflecting backskin - A photovoltaic module comprises electrically interconnected and mutually spaced photovoltaic cells that are encapsulated by a light-transmitting encapsulant between a light-transparent front cover and a back cover, with the back cover sheet being an ionomer/nylon alloy embossed with V-shaped grooves running in at least two directions and coated with a light reflecting medium so as to provide light-reflecting facets that are aligned with the spaces between adjacent cells and oriented so as to reflect light falling in those spaces back toward said transparent front cover for further internal reflection onto the solar cells, whereby substantially all of the reflected light will be internally reflected from said cover sheet back to the photovoltaic cells, thereby increasing the current output of the module. The internal reflector improves power output by as much as 67%. | 2010-12-30 |
20100330727 | Method for Fabricating Butt-Coupled Electro-Absorptive Modulators - A method for fabricating butt-coupled electro-absorptive modulators is disclosed. A butt-coupled electro-absorptive modulator with minimal dislocations in the electro-absorptive material is produced by adding a dielectric spacer for lining the coupling region before epitaxially growing the SiGe or other electro-absorptive material. It has been determined that during the SiGe growth, the current process has exposed single crystal silicon at the bottom of the hole and exposed amorphous silicon on the sides. SiGe growth on the amorphous silicon is expected to have more dislocations than single crystal silicon. There should also be dislocations or fissures where the SiGe growth from the each nucleation source finally join. Thus, a dielectric sidewall can protect an exposed waveguide face from any etching from an aggressive surface preparation prior to epi growth. | 2010-12-30 |
20100330728 | Method of aligning elements in a back-illuminated image sensor - A back-illuminated image sensor includes a sensor layer disposed between a circuit layer adjacent to a frontside of the sensor layer and a layer disposed on a backside of the sensor layer. One or more first alignment marks are formed in a layer in the circuit layer. A masking layer is aligned to the one or more first alignment marks. The masking layer includes openings that define locations for one or more second alignment marks. The one or more second alignment marks are then formed in or through the layer disposed on a backside of a sensor layer. One or more elements are formed in or on the backside of the sensor layer. The one or more elements are aligned to one or more second alignment marks. | 2010-12-30 |
20100330729 | PHOTOELECTRIC CONVERSION DEVICE, MANUFACTURING METHOD THEREOF AND SEMICONDUCTOR DEVICE - The present invention provides a photoelectric conversion device in which a leakage current is suppressed. A photoelectric conversion device of the present invention comprises: a first electrode over a substrate; a photoelectric conversion layer including a first conductive layer having one conductivity, a second semiconductor layer, and a third semiconductor layer having a conductivity opposite to the one conductivity of the second semiconductor layer over the first electrode, wherein an end portion of the first electrode is covered with the first semiconductor layer; an insulating film, and a second electrode electrically connected to the third semiconductor film with the insulating film therebetween, over the insulating film, are formed over the third semiconductor film, and wherein a part of the second semiconductor layer and a part of the third semiconductor layer is removed in a region of the photoelectric conversion layer, which is not covered with the insulating film. | 2010-12-30 |
20100330730 | Manufacturing Method of Solar Cell - The present invention discloses a method of manufacturing a solar cell by forming two electrode layers on the same side of a wafer, and avoiding sunlight incident to another side from being blocked by the electrode layers to enhance the photoelectric conversion efficiency, and each electrode layer is formed by using a mask layer to perform a vapor deposition process, without requiring any mask lithography or etching process. Of course, the issue of a high-temperature process that deteriorates the quality of the wafer no longer exists. | 2010-12-30 |
20100330731 | METHOD TO FORM A THIN SEMICONDUCTOR LAMINA ADHERED TO A FLEXIBLE SUBSTRATE - A semiconductor donor body such as a wafer is implanted with ions to form a cleave plane. The donor wafer is affixed to a polyimide receiver element, for example by applying polyimide in liquid form to the donor wafer, then curing, or by affixing the donor wafer to a preformed polyimide sheet. Annealing causes a lamina to cleave from the donor wafer at the cleave plane. The resulting adhered lamina and polyimide body are not adhered to another rigid substrate and can be jointly flexed. | 2010-12-30 |
20100330732 | METHOD AND DEVICE FOR MANUFACTURING THIN FILM PHOTOELECTRIC CONVERSION MODULE - A method for manufacturing a thin film photoelectric conversion module includes the steps of forming a plurality of photoelectric conversion elements connected in series on a substrate, and carrying out reverse bias processing simultaneously on a group of photoelectric conversion elements including a plurality of the photoelectric conversion elements positioned with one or a plurality of the photoelectric conversion elements interposed between each of them, by applying a plurality of voltages electrically isolated from one another to the group of photoelectric conversion elements. | 2010-12-30 |
20100330733 | SEMITRANSPARENT FLEXIBLE THIN FILM SOLAR CELLS AND MODULES - A method of manufacturing partially light transparent thin film solar cells generally includes forming a solar cell structure stack and forming multiple openings through the solar cell structure stack. The solar cell structure stack includes a flexible foil substrate, a contact layer formed over the flexible foil substrate, a Group IBIIIAVIA absorber layer formed over the contact layer and a transparent conductive layer formed over the Group IBIIIAVIA absorber layer. A terminal structure including at least one busbar and a plurality of conductive finger patterns is deposited onto a top surface of the transparent conductive layer forming a semi-transparent solar cell. | 2010-12-30 |
20100330734 | SOLAR CELL AND MANUFACTURING METHOD THEREOF - In a manufacturing process of a solar cell comprising an amorphous silicon unit in which a p-type layer, an i-type layer, and an n-type layer are layered, in a step of forming the p-type layer, a doping concentration of a p-type dopant included in the p-type layer is increased as a distance from the i-type layer is increased, and in particular, a high-absorption amorphous silicon carbide layer and a low-absorption amorphous silicon carbide layer are consecutively formed while a state of plasma generation is maintained. | 2010-12-30 |
20100330735 | METHOD OF FORMING OPTICAL SENSOR - A method of forming an optical sensor includes the following steps. A substrate is provided, and a read-out device is formed on the substrate. a first electrode electrically connected to the read-out device is formed on the substrate. a photosensitive silicon-rich dielectric layer is formed on the first electrode, wherein the photosensitive silicon-rich dielectric layer comprises a plurality of nanocrystalline silicon crystals. A second electrode is formed on the photosensitive silicon-rich dielectric layer. | 2010-12-30 |
20100330736 | METHOD OF MANUFACTURING SOLAR BATTERY - When a layered structure of a transparent electrode layer and a metal layer is formed as a back side electrode layer over a surface on a side opposite to a side of incidence of light of a thin film solar battery, a time when formation of the transparent electrode layer is completed and a time when formation of the metal layer is started are made to coincide for one substrate. | 2010-12-30 |
20100330737 | METHOD OF DOPING ORGANIC SEMICONDUCTORS - A method includes the steps of forming a contiguous semiconducting region and heating the region. The semiconducting region includes polyaromatic molecules. The heating raises the semiconducting region to a temperature above room temperature. The heating is performed in the presence of a dopant gas and the absence of light to form a doped organic semiconducting region. | 2010-12-30 |
20100330738 | Oxide semiconductor target and manufacturing method of oxide semiconductor device by using the same - An oxide semiconductor target of a ZTO (zinc tin complex oxide) type oxide semiconductor material of an appropriate (Zn/(Zn+Sn)) composition having high mobility and threshold potential stability and with less restriction in view of the cost and the resource and with less restriction in view of the process, and an oxide semiconductor device using the same, in which a sintered Zn tin complex oxide with a (Zn/(Zn+Sn)) composition of 0.6 to 0.8 is used as a target, the resistivity of the target itself is at a high resistance of 1 Ωcm or higher and, further, the total concentration of impurities is controlled to 100 ppm or less. | 2010-12-30 |
20100330739 | Diamond-Like Carbon Electronic Devices and Methods of Manufacture - Materials, devices, and methods for enhancing performance of electronic devices such as solar cells, fuels cells, LEDs, thermoelectric conversion devices, and other electronic devices are disclosed and described. A diamond-like carbon electronic device can include a conductive diamond-like carbon cathode having specified carbon, hydrogen and sp | 2010-12-30 |
20100330740 | METHOD AND APPARATUS PROVIDING INTEGRATED CIRCUIT HAVING REDISTRIBUTION LAYER WITH RECESSED CONNECTORS - A method of making a semiconductor die includes forming a trench around a conductive stud extending from the first side to a second side of a substrate to expose a portion of the stud and then forming a conductive layer inside the trench and in electrical contact with the stud. | 2010-12-30 |
20100330741 | FABRICATION METHOD FOR SYSTEM-ON-CHIP (SOC) MODULE - A fabrication method for a system-on-chip (SoC) module is provided. The fabrication method includes the steps of providing at least two SoC sub-modules and connecting the SoC sub-modules. The SoC sub-modules are electrically connected with each other by connection interfaces of the SoC sub-modules so as to form the SoC module. As the SoC sub-modules have been verified in advance, the time required for verifying the resulting SoC module can be significantly reduced. As for application-specific SoC modules, they are fabricated by connecting with application-specific SoC sub-modules via the appropriate connection interfaces. Thus, the time and costs for developing SoC modules can both be minimized. | 2010-12-30 |
20100330742 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A first conductive member made of metal is provided over a first wiring substrate, which is a mounting substrate in the lower tier, a through hole is provided in a second wiring substrate, which is a mounting substrate in the upper tier, at a position corresponding to the first conductive member in a plan view, and a wiring is exposed at the sidewall of the through hole. The first conductive member is inserted into the through hole on the corresponding first wiring substrate side and the first wiring substrate and the second wiring substrate are electrically coupled by filling the through hole with a second conductive member. an electrode pad that is electrically coupled to the second conductive member and over which a semiconductor member in the upper tier is mounted is formed on the main surface side of the second wiring substrate. | 2010-12-30 |
20100330743 | Three-Dimensional Integrated Circuits with Protection Layers - A semiconductor structure includes a first die comprising a first substrate and a first bonding pad over the first substrate, a second die having a first surface and a second surface opposite the first surface, wherein the second die is stacked on the first die and a protection layer having a vertical portion on a sidewall of the second die, and a horizontal portion extending over the first die. | 2010-12-30 |
20100330744 | ULTRATHIN SEMICONDUCTOR CIRCUIT HAVING CONTACT BUMPS AND CORRESPONDING PRODUCTION METHOD - The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved. | 2010-12-30 |
20100330745 | PROCESS FOR PRODUCING A SEMICONDUCTOR DEVICE - The process for producing a semiconductor device of the invention is a process for producing a semiconductor device, comprising: a temporarily bonding step of bonding a semiconductor element temporarily on an adherend through an adhesive sheet, a semi-curing step of heating the adhesive sheet under predetermined conditions, thereby turning the sheet into a semi-cured state that the shearing adhering strength of the sheet to the adherend is 0.5 MPa or more, and a wire bonding step of causing the semiconductor element to undergo wire bonding in the state that the adhesive sheet is semi-cured. | 2010-12-30 |
20100330746 | METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE - A method of manufacturing a semiconductor package, including at least a step A that forms a first transforming portion by irradiating a laser beam on at least a portion of a first substrate; a step B that joins together the first substrate and a second substrate in which a functional element is disposed; a step C that removes the first transforming portion that is disposed on the first substrate by etching; and a step D that forms a conductive portion in the first substrate by filling a conductive material in a portion where the first transforming portion has been removed. | 2010-12-30 |
20100330747 | Method of fabricating semiconductor plastic package - A method of fabricating a semiconductor plastic package can include: providing a core board, which includes at least one pad, and which has a coefficient of thermal expansion of 9 ppm/° C. or lower; stacking a build-up insulation layer over the core board; forming an opening by removing a portion of the build-up insulation layer such that the pad is exposed to the exterior; and placing a semiconductor chip in the opening and electrically connecting the semiconductor chip with the pad. This method can be utilized to provide higher reliability in the connection between the semiconductor chip and the circuit board. | 2010-12-30 |
20100330748 | METHOD OF ENCAPSULATING AN ENVIRONMENTALLY SENSITIVE DEVICE - Methods of encapsulating an environmentally sensitive device. The methods involve temporarily laminating a flexible substrate to a rigid support using a reversible adhesive for processing, reversing the reversible adhesive, and removing the device from the rigid support. | 2010-12-30 |
20100330749 | INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING SUCH DEVICES - Packaged semiconductor devices and assemblies including interconnects and methods for forming such interconnects are disclosed herein. One embodiment of a packaged semiconductor assembly includes a die attached to a support layer. A plurality of interconnects are embedded in and project from the support layer, such that the support layer at least partially retains the interconnects in a predetermined array. An encapsulant is molded around each of the interconnects and encases at least a portion of the die, support layer and interconnects. | 2010-12-30 |
20100330750 | THIN FILM TRANSISTOR AND METHOD FOR FABRICATING THE SAME, AND LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A thin film transistor (TFT) including a nanowire semiconductor layer having nanowires aligned in one direction in a channel region is disclosed. The nanowire semiconductor layer is selectively formed in the channel region. A method for fabricating the TFT, a liquid crystal display (LCD) device using the TFT, and a method for manufacturing the LCD device are also disclosed. The TFT fabricating method includes forming alignment electrodes on the insulating film such that the alignment electrodes face each other, to define a channel region, forming an organic film, to expose the channel region, coating a nanowire-dispersed solution on an entire surface of a substrate including the organic film, forming a nanowire semiconductor layer in the channel region by generating an electric field between the alignment electrodes such that nanowires of the nanowire semiconductor layer are aligned in a direction, and removing the organic film. | 2010-12-30 |
20100330751 | Single Electron Transistor Operating at Room Temperature and Manufacturing Method for Same - The present invention relates to a single-electron transistor (SET) operating at room temperature and a method of manufacturing the same, and to be specific, to a single-electron transistor operating at room temperature and a method of manufacturing the same, which are capable of minimizing influence of the gate voltage on tunneling barriers and effectively controlling the electric potential of a quantum dot (QD), by forming the quantum dot using a trenched nano-wire structure and forming the gate to wrap most of the way around the quantum dot. | 2010-12-30 |
20100330752 | Methods of Forming One Transistor DRAM Devices - A one transistor DRAM device includes: a substrate with an insulating layer, a first semiconductor layer provided on the insulating layer and including a first source region and a first region which are in contact with the insulating layer and a first floating body between the first source region and the first drain region, a first gate pattern to cover the first floating body, a first interlayer dielectric to cover the first gate pattern, a second semiconductor layer provided on the first interlayer dielectric and including a second source region and a second drain region which are in contact with the first interlayer dielectric and a second floating body between the second source region and the second drain region, and a second gate pattern to cover the second floating body. | 2010-12-30 |
20100330753 | METHODS OF MANUFACTURING INTEGRATED CIRCUIT DEVICES INCLUDING A TRANSCRIPTION-PREVENTING PATTERN - Integrated circuit devices are provided including a first single-crystalline layer and an insulating layer pattern on the first single-crystalline layer. The insulating layer pattern has an opening therein that partially exposes the first single-crystalline layer. A seed layer is in the opening. A second single-crystalline layer is on the insulating layer pattern and the seed layer. The second single-crystalline layer has a crystalline structure substantially the same as that of the seed layer. A transcription-preventing pattern is on the second single-crystalline layer and a third single-crystalline layer on the transcription-preventing pattern and the second single-crystalline layer. The transcription-preventing pattern is configured to limit transcription of defective portions in the second single-crystalline layer into the third single-crystalline layer. | 2010-12-30 |
20100330754 | METHODS FOR MANUFACTURING ENHANCEMENT-MODE HEMTS WITH SELF-ALIGNED FIELD PLATE - Various embodiments of the disclosure include the formation of enhancement-mode (e-mode) gate injection high electron mobility transistors (HEMT). Embodiments can include GaN, AlGaN, and InAlN based HEMTs. Embodiments also can include self-aligned P-type gate and field plate structures. The gates can be self-aligned to the source and drain, which can allow for precise control over the gate-source and gate-drain spacing. Additional embodiments include the addition of a GaN cap structure, an AlGaN buffer layer, AlN, recess etching, and/or using a thin oxidized AlN layer. In manufacturing the HEMTs according to present teachings, selective epitaxial growth (SEG) and epitaxial lateral overgrowth (ELO) can both be utilized to form gates. | 2010-12-30 |
20100330755 | Semiconductor Device With Localized Stressor - A semiconductor device, such as a PMOS transistor, having localized stressors is provided. Recesses are formed on opposing sides of gate electrodes such that the recesses are offset from the gate electrode by dummy spacers. The recesses are filled with a stress-inducing layer. The dummy recesses are removed and lightly-doped drains are formed. Thereafter, new spacers are formed and the stress-inducing layer is recessed. One or more additional implants may be performed to complete source/drain regions. In an embodiment, the PMOS transistor may be formed on the same substrate as one or more NMOS transistors. Dual etch stop layers may also be formed over the PMOS and/or the NMOS transistors. | 2010-12-30 |
20100330756 | INTEGRATED CIRCUIT STRUCTURE MANUFACTURING METHODS USING HARD MASK AND PHOTORESIST COMBINATION - A method of manufacturing an integrated circuit structure implants a first-type of channel implant in a first area of a substrate and implants a second-type of channel implant in a second area of the substrate. The method forms at least one first gate conductor above the first area of the substrate and forms at least one second gate conductor above the second area of the substrate. The method forms a hard mask over the first gate conductor, the second gate conductor, and the substrate. The hard mask comprises an oxide or a nitride and patterns an organic photoresist over the hard mask, to leave the organic photoresist on areas of the hard mask that are above the first area of the substrate. The method removes portions of the hard mask not protected by the organic photoresist to leave the hard mask on the first area of the substrate and not on the second area of the substrate. The method then removes the organic photoresist, implants impurities in the second area of the substrate to form source and drain regions adjacent the second gate conductor; and removes the hard mask using a wet etching process. | 2010-12-30 |
20100330757 | ENHANCED CAP LAYER INTEGRITY IN A HIGH-K METAL GATE STACK BY USING A HARD MASK FOR OFFSET SPACER PATTERNING - When forming transistor elements on the basis of sophisticated high-k metal gate structures, the efficiency of a replacement gate approach may be enhanced by more efficiently adjusting the gate height of transistors of different conductivity type when the dielectric cap layers of transistors may have experienced a different process history and may thus require a subsequent adaptation of the final cap layer thickness in one type of the transistors. For this purpose, a hard mask material may be used during a process sequence for forming offset spacer elements in one gate electrode structure while covering another gate electrode structure. | 2010-12-30 |
20100330758 | Method of manufacturing semiconductor device - A method of manufacturing a semiconductor device may include forming a first interlayer insulation layer on a substrate including at least one gate structure formed thereon, the substrate having a plurality of source/drain regions formed on both sides of the at least one gate structure, forming at least one buried contact plug on at least one of the plurality of source/drain regions and in the first interlayer insulation layer, forming a second interlayer insulation layer on the first interlayer insulation layer and the at least one buried contact plug, exposing the at least one buried contact plug in the second interlayer insulation layer by forming at least one contact hole, implanting ions in the at least one contact hole in order to create an amorphous upper portion of the at least one buried contact plug, depositing a lower electrode layer on the second interlayer insulation layer and the at least one contact hole, and forming a metal silicide layer in the amorphous upper portion of the at least one buried contact plug. | 2010-12-30 |
20100330759 | NANOWIRE TRANSISTOR WITH SURROUNDING GATE - One aspect of the present subject matter relates to a method for forming a transistor. According to an embodiment of the method, a pillar of amorphous semiconductor material is formed on a crystalline substrate, and a solid phase epitaxy process is performed to crystallize the amorphous semiconductor material using the crystalline substrate to seed the crystalline growth. The pillar has a sublithographic thickness. A transistor body is formed in the crystallized semiconductor pillar between a first source/drain region and a second source/drain region. A surrounding gate insulator is formed around the semiconductor pillar, and a surrounding gate is formed around and separated from the semiconductor pillar by the surrounding gate insulator. Other aspects are provided herein. | 2010-12-30 |
20100330760 | Fabrication method of trenched metal-oxide-semiconductor device - A fabrication method of trenched metal-oxide-semiconductor device is provided. A pattern layer with a plurality of openings is formed on a semiconductor base, and then a spacer is formed on the sidewall of the opening to define the gate trench. After the gate electrode formed in the gate trench, a dielectric structure is formed on the gate electrode by filling dielectric material into the opening. Then, the pattern layer and the spacer are removed and a dielectric layer is formed on the dielectric structure. The portion of the dielectric layer on the sidewall of the dielectric structure defines the source regions. After the source regions are formed in the well, another dielectric layer is formed on the dielectric layer to define the heavily doped regions adjacent to the source regions. | 2010-12-30 |
20100330761 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME - Exposed are a semiconductor device and method of fabricating the same. The device includes an insulation film that is disposed between an active pattern and a substrate, which provides various improvements. This structure enhances the efficiency of high integration and offers an advanced structure for semiconductor devices. | 2010-12-30 |
20100330762 | METHOD FOR FORMING BIT LINES FOR SEMICONDUCTOR DEVICES - A memory device includes a number of memory cells and a number of bit lines. Each of the bit lines includes a first region having a first width and a first depth and a second region having a second width and a second depth, where the first width is less than the second width. The first region may include an n-type impurity and the second region may include a p-type impurity, | 2010-12-30 |
20100330763 | METHOD OF CREATING ASYMMETRIC FIELD-EFFECT-TRANSISTORS - The present invention provides a method of forming asymmetric field-effect-transistors. The method includes forming at least a first and a second gate-mask stack on top of a semiconductor substrate, wherein the first and second gate-mask stacks include at least, respectively, a first and a second gate conductor of a first and a second transistor and have, respectively, a top surface, a first side, and a second side with the second side being opposite to the first side; performing a first halo implantation from the first side of the first and second gate-mask stacks at a first angle while applying the first gate-mask stack in preventing the first halo implantation from reaching a first source/drain region of the second transistor, wherein the first angle is equal to or larger than a predetermined value; and performing a second halo implantation from the second side of the first and second gate-mask stacks at a second angle, thereby creating halo implant in a second source/drain region of the second transistor, wherein the first and second angles are measured against a normal to the substrate. | 2010-12-30 |
20100330764 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a gate electrode, a source region and a drain region, forming a first metal layer,
| 2010-12-30 |
20100330765 | INTEGRATED TRANSISTOR, PARTICULARLY FOR VOLTAGES AND METHOD FOR THE PRODUCTION THEREOF - Integrated transistor and method for the production is disclosed. An explanation is given of, inter alia, a transistor having an electrically insulating isolating trench extending from a main area in the direction of a connection region remote from the main area. Moreover, the transistor contains an auxiliary trench extending from the main area as far as the connection region remote from the main area. The transistor requires a small chip area and has outstanding electrical properties. | 2010-12-30 |
20100330766 | Method for Producing a Plurality of Integrated Semiconductor Components - A method for producing a plurality of integrated semiconductor components on a carrier, in which an active basic structure is introduced into the carrier in a continuous fashion at least across a portion of the boundaries of the semiconductor components to be created. The regions of the semiconductor components on the carrier are defined, and a covering layer is applied to the carrier in the region of each semiconductor component with the aid of a mask. The carrier is severed to form the individual semiconductor components at the boundaries thereof. | 2010-12-30 |
20100330767 | MOSFET with a second poly and an inter-poly dielectric layer over gate for synchronous rectification - This invention discloses a new trenched vertical semiconductor power device that includes a capacitor formed between a conductive layer covering over an inter-dielectric layer disposed on top of a trenched gate. In a specific embodiment, the trenched vertical semiconductor power device may be a trenched metal oxide semiconductor field effect transistor (MOSFET) power device. The trenched gate is a trenched polysilicon gate and the conductive layer is a second polysilicon layer covering an inter-poly dielectric layer disposed on top of the trenched polysilicon gate. The conductive layer is further connected to a source of the vertical power device. | 2010-12-30 |
20100330768 | METHODS FOR ETCHING DOPED OXIDES IN THE MANUFACTURE OF MICROFEATURE DEVICES - Methods for selectively etching doped oxides in the manufacture of microfeature devices are disclosed herein. An embodiment of one such method for etching material on a microfeature workpiece includes providing a microfeature workpiece including a doped oxide layer and a nitride layer adjacent to the doped oxide layer. The method include selectively etching the doped oxide layer with an etchant comprising DI:HF and an acid to provide a pH of the etchant such that the etchant includes (a) a selectivity of phosphosilicate glass (PSG) to nitride of greater than 250:1, and (b) an etch rate through PSG of greater than 9,000 Å/minute. | 2010-12-30 |
20100330769 | Semiconductor device and method of manufacturing thereof - A semiconductor device has a semiconductor substrate, and a capacitor which is provided on the upper side of the semiconductor substrate and composed of a lower electrode, an upper electrode and a dielectric film, the dielectric film being placed in between the lower electrode and the upper electrode, the lower electrode including a noble metal film, and a plurality of conductive oxide films formed in an islands arrangement on the noble metal film. | 2010-12-30 |