52nd week of 2014 patent applcation highlights part 31 |
Patent application number | Title | Published |
20140376247 | DEVICE FOR MAKING THE APPEARANCE OF A MOTOR VEHICLE SIGNAL LIGHT UNIFORM - The invention relates to a device for a motor vehicle signal light ( | 2014-12-25 |
20140376248 | LED LIGHTING DEVICE AND VEHICLE HEADLIGHT HAVING SAME - An LED lighting device includes an LED module; a light guide member disposed adjacent to the LED module guides light emitted from the LED module towards an object; a heat transfer member coupled to the LED module absorbs the heat from the LED module; a heat-absorbing portion is formed in the shape of a capillary tube, injected with working fluid, and coupled to the heat transfer member so as to absorb heat; and a heat pipe loop provided with a heat-dissipating portion for dissipating the heat absorbed in the heat-absorbing portion. The LED lighting device can have a simple structure without a cooling fan while obtaining a high output by including the heat-dissipating portion which has a large dissipation area and high heat transfer performance. Since heat dissipation can be carried out without an additional cooling device, minor failures can be reduced, and maintenance of the device can be simplified. | 2014-12-25 |
20140376249 | HEADLIGHT FOR VEHICLES - A headlight for vehicles, having a reflector, a light source unit which is functionally assigned to the reflector, a lens placed in front of the light source unit in the primary beam direction, and an aperture device arranged between the light source unit and the lens. The aperture device is positioned in a focal point region of the lens and has an aperture edge which runs perpendicular to the optical axis for the purpose of generating a light/dark boundary for a prespecified light distribution. The light source unit has a plurality of light sources separated spatially from each other, such that light can be emitted from an illumination surface. The aperture edge transitions into a correction edge from a central region of the aperture device towards opposite ends of the same. The correction edge runs in such a manner that an optical lens aberration resulting from the light source unit being constructed as an illumination surface is compensated. | 2014-12-25 |
20140376250 | IN-VEHICLE INTERIOR LIGHT UNIT - This invention is to provide an in-vehicle interior light unit that protects a base from a thermal damage attributable to a thermal factor and reduces cost. This is achieved by adopting a general-purpose compact bulb cassette which does not have a heat shielding function although the bulb cassette still uses a heat-resistant resin as the material thereof, and the thermal deformation due to the radiant heat from a bulb is prevented by a heat shield plate integrally formed when punch-molding a bus bar, which is formed of a conductive metal member. Thus, the radiant heat from the bulb is blocked by the heat shield plate. | 2014-12-25 |
20140376251 | Adjustment Device for Light Modules of a Vehicle - The invention relates to an adjustment device for light modules of a vehicle, by which the light module is arranged pivotal about a horizontal or vertical axis in reference to a housing, with an actuator arranged articulate along a direction of adjustment, which is connected via a link to a support frame carrying the light module, with the link comprising on the one hand a spherical link and on the other hand a cup-shaped link part accepting the former, with the cup-shaped link part comprising a laminar support section for the laminar contact at a fastening part of the support frame, with the laminar support section being supported at the fastening part in a manner displaceable perpendicular in reference to the direction of adjustment. | 2014-12-25 |
20140376252 | VEHICULAR LAMP - A vehicular lamp includes a plurality of light emitting units, each of light emitting units including a substrate, an organic electro luminescence device having an organic light emitting layer formed on the substrate, and a cap configured to seal the organic electro luminescence device. At least two of the plurality of light emitting units have the organic light emitting layers which are different in shape or size, the substrates which are same in shape and size, and the caps which are same in shape and size. | 2014-12-25 |
20140376253 | VEHICLE LIGHTING DEVICE - A vehicle lighting device includes a light source, a light source housing, and a covering member. The light source housing holds the light source therein and has an opening. The covering member is attached to the light source housing so as to cover the opening of the light source housing and configured to pass light emitted by the light source therethrough. The covering member includes a transparent sheet portion and a cover portion. The sheet portion includes an electrode layer. The cover portion is welded to one of surfaces of the sheet portion by insert molding and arranged on the light source housing to cover the opening of the light source housing and a light exit surface of the light source such that a surface of the cover portion without the sheet portion faces the light source. | 2014-12-25 |
20140376254 | LIGHT SOURCE DEVICE - A light guide propagates light emitted by a light source in the long axis direction. A fluorescent material layer surrounds the outer periphery of the light guide except for an opening along the long axis direction. A light reflecting pattern is provided on the outer periphery of the light guide opposite to the fluorescent material layer. The fluorescent material layer captures light reflected by the light reflecting pattern and exiting from the outer periphery of the light guide, reflects part of the light, and emits light of different wavelengths. The light emitted by the fluorescent material layer is transmitted into the light guide, and the light having entered therein from the end and the light emitted by the fluorescent material layer are emitted to the object from a portion of the light guide that is exposed in the opening. | 2014-12-25 |
20140376255 | DISPLAY - A display including a backlight module, a display panel, and a color filter layer is provided. The backlight module includes a light source having a luminescence spectrum with three protrusions. Peaks of the protrusions fall in different ranges and full width at half maximum (FWHM) of each of the peaks are in respective ranges. The display panel is disposed on the backlight module. The color filter layer disposed on the backlight module includes three color filtering patterns. Peaks of transmission spectra of the color filtering patterns respectively overlap the FWHM ranges of the three protrusions. | 2014-12-25 |
20140376256 | LIGHT SOURCE MODULE - A light source module includes a light guide plate, at least one light emitting element, a circuit board, and a heat conductive structure. The light guide plate has a light incident surface and a bottom surface adjacent to each other. The light emitting element is disposed beside the light incident surface. The circuit board has a bottom and a sidewall. The bottom extends toward the light guide plate from an end of the sidewall. The sidewall has a first surface facing the light incident surface, and the bottom has a second surface facing the bottom surface. The light emitting element is disposed on the first surface. The heat conductive structure is disposed on the circuit board contacted the first surface and the second surface of the circuit board, for transmitting heat generated by the light emitting element and the circuit board. | 2014-12-25 |
20140376257 | OPERATING PANEL AND INFORMATION APPARATUS PROVIDED WITH SAME - There is provided with a light transmissive substrate | 2014-12-25 |
20140376258 | PLANAR LIGHT SOURCE - A planar light source including a light guide plate (LGP) and a light source device is provided. The LGP includes a plate portion and at least one prism portion. The plate portion has a light incident surface, a reflective surface, a bottom surface, and a light exiting surface. The prism portion is disposed on the bottom surface of the plate portion, and has a first plane and a second plane. An included angle between the first plane and the bottom surface is smaller than an included angle between the second plane and the bottom surface, and a shortest distance between the first plane and the light incident surface is smaller than a shortest distance between the second plane and the light incident surface. The light source device is disposed adjacent to the light incident surface. The disclosure provides planar light source with good light uniformity. | 2014-12-25 |
20140376259 | RED PHOSPHOR, WHITE LIGHT EMITTING DEVICE, DISPLAY APPARATUS AND ILLUMINATION APPARATUS - A red phosphor includes a nitride represented by an empirical formula of Sr | 2014-12-25 |
20140376260 | Hybrid Concentrator for a Backlight - This document describes techniques and apparatuses for implementing a hybrid concentrator for a backlight. The backlight includes a light guide and multiple light sources positioned along an input end of the light guide. The backlight further includes multiple hybrid concentrators that each include a lens in a central region of the concentrator and one or more total-internal-reflection (TIR) zones. Each hybrid concentrator is positioned between a corresponding light source and the light guide, and is configured to concentrate light into the light guide. The light guide then projects the concentrated light to illuminate a modulating display panel to form images for viewing. | 2014-12-25 |
20140376261 | BACK LIGHT MODULE - A back light module includes a light guide plate, at least one first light source, at least one second light source and at least one first reflection element. The light guide plate includes a first light incident surface, a second light incident surface opposite to the first light incident surface, a light emitting surface, and a bottom surface opposite to the light emitting surface. The first light source is disposed beside the first light incident surface and suitable to provide a first non-collimated light beam to the first light incident surface. The second light source is disposed beside the second light incident surface and suitable to provide a first collimated light beam to the second light incident surface. The first reflection element is disposed beside the first light incident surface to reflect the first collimated light beam emitted so as to make the first collimated light beam diverge. | 2014-12-25 |
20140376262 | VEHICULAR DISPLAY APPARATUS - A vehicular display apparatus includes a light source and a light guide member. The light guide member includes (i) an interior portion that receives light from the light source and (ii) outer faces that reflect the light repeatedly to permit the light to propagate in the interior portion. The light guide member further includes a viewable portion and a light absorption member serving as a light attenuation portion. The viewable portion reflects a part of the light propagating in the interior portion towards a viewer side so as to appear to be luminous. The light absorption member absorbs a part of light reflected by the outer face. | 2014-12-25 |
20140376263 | LIGHT EMITTING DEVICE FOR BACKLIGHT DEVICE AND METHOD OF OPERATING THE LIGHT EMITTING DEVICE - A light emitting device ( | 2014-12-25 |
20140376264 | LIGHT GUIDE PLATE, METHOD OF MANUFACTURING SAME, AND BACKLIGHT MODULE HAVING SAME - A light guide plate includes a main body including a light emitting surface. A number of glues, each with a different, and lower, refractive index when cured, are applied through a covering plate onto the light emitting surface. Each type of glue forms a layer on the layer below, the stack of layers forms a plurality of spaced micro-rods on the light emitting surface. Each layer in the micro-rod thus includes top and bottom and side surfaces. The different refraction indexes of each layer, reducing along a direction from the light emitting surface to the top surface of each rod, causes light to be emitted substantially equally from the periphery of each layer in the micro-rod as well as from the top of each rod. The maximum refraction index of any layer in the micro-rod is not greater than that of the main body. | 2014-12-25 |
20140376265 | CIRCUIT BOARD AND LIGHTING DEVICE HAVING THE CIRCIUT BOARD - Provided is a circuit board including: a support substrate; a plurality of light emitting devices mounted on the support substrate; and a device protection portion surrounding one of the light emitting devices, or three or more surfaces of the plurality of light emitting devices. | 2014-12-25 |
20140376266 | FLAT PANEL LIGHTING DEVICE - The light fixture includes a frame, a substantially flat light emitting diode (LED) panel disposed within the frame, power circuitry disposed within at least one of a number of channels within the frame, and a central wire-way. The frame includes a bottom assembly and a top assembly coupled to the bottom assembly. The bottom assembly and the top assembly cooperate to form the channels within the frame. The bottom assembly has a back surface. The power circuitry is configured to electrically couple the substantially flat LED panel to an external AC power supply. The central wire-way is disposed adjacent the back surface of the bottom assembly and configured to route wiring to or from the power circuitry disposed within at least one of the channels within the frame. | 2014-12-25 |
20140376267 | FLAT PANEL LIGHTING DEVICE - The light fixture includes a frame with a bottom assembly and a top assembly coupled to the bottom assembly. The bottom assembly and the top assembly cooperate to form a plurality of channels within the frame. A substantially flat light emitting diode (LED) panel is disposed within the frame. Power circuitry is disposed within at least one of the plurality of channels within the frame. The power circuitry is configured to electrically couple the substantially flat light emitting diode (LED) panel to an external AC power supply. A wire compartment is disposed within at least one of the plurality of channels within the frame. The wire compartment is configured to house wiring electrically coupled to the external AC power supply. | 2014-12-25 |
20140376268 | METAL WORKING POWER SUPPLY CONVERTER SYSTEM AND METHOD - A power supply for welding, cutting and similar operations includes a dual two-switch forward converter. The converter has two inverter circuits coupled in parallel but controlled to provide output power in an interleaved fashion. To avoid “walking” of the circuits (which could result in different duty cycles and imbalance of the load sharing), control signals are determined and applied to a first of the inverter circuits, and “on” times of the first circuit is monitored, such as by augmenting a counter to determine the number of clock cycles the first circuit is “on”. The same duration is then used for commanding output from the second inverter circuit. The duty cycles of both circuits is thus ensured to be the same regardless of changes in the total output power. | 2014-12-25 |
20140376269 | DEAD-TIME OPTIMIZATION OF RESONANT INVERTERS - The present disclosure is directed to an electrosurgical generator including a resonant inverter having an H-bridge and a tank. A sensor array measures at least one property of the tank. A pulse width modulation (PWM) controller outputs a first PWM timing signal and a second PWM timing signal to the H-bridge. The PWM controller controls a dead-time between the first PWM timing signal and the second PWM timing signal based on the at least one property measured by the sensor array. | 2014-12-25 |
20140376270 | POWER CONVERTERS INCLUDING LLC CONVERTERS AND METHODS OF CONTROLLING THE SAME - Photovoltaic (PV) power converters including an LLC converter stage are described. A PV power converter includes a LLC converter stage and a controller. The LLC converter stage includes an input for receiving a direct current (DC) power input from a PV module, a first transformer having a primary winding and a secondary winding and defining a DC side and an alternating current (AC) side of the PV power converter, a plurality of switches on the DC side of the first transformer, and an output coupled to the secondary winding of the first transformer to provide a DC power output. The plurality of switches is coupled between the primary winding of the first transformer and the input. The controller is located on the AC side of the PV power converter. The controller is operatively connected to the plurality of switches and configured to control operation of the plurality of switches. | 2014-12-25 |
20140376271 | Switching Power-Supply Device - A switching power-supply device, includes a first terminal; a first winding connected to the first terminal; a second winding, which is connected in series to the first winding and is magnetically coupled to the first winding; a first capacitor connected in series to the second winding; a transformer including a primary winding connected in series to the first capacitor and a secondary winding magnetically coupled to the primary winding; a rectifying-and-smoothing circuit connected to the secondary winding; a second terminal, which is connected to an opposite end of the primary winding opposite to a connection end connecting to the first capacitor; a first switching element, which is connected between a connection point of the first winding and the second winding and the second terminal; and a control circuit, which controls first switching element to turn on-and-off. | 2014-12-25 |
20140376272 | CONTROL CIRCUIT FOR A SYNCHRONOUS RECTIFICATION CIRCUIT, LLC RESONANT CONVERTER AND ASSOCIATED METHOD - A control circuit for a synchronous rectification circuit, a LLC resonant converter and a control method. The control circuit has a first comparing circuit, a second comparing circuit, a blanking circuit, a first logic circuit and a second logic circuit. The blanking circuit is configured to provide a first blanking signal and a second blanking signal to avoid one or more repeated conduction of a first synchronous rectifier and a second synchronous rectifier respectively, and the first blanking signal and the second blanking signal are logic complementary. | 2014-12-25 |
20140376273 | SWITCHING POWER SUPPLY APPARATUS - In a switching power supply apparatus, when it is detected at time t1 that a voltage Vis has exceeded a first threshold Vth1, a timer counting a period of time T1 is started, and the number times the input voltage Vis does not exceed Vth1 is started to be counted. When the timer expires before the count reaches a predetermined number, a first overcurrent protection operation is performed. When it is detected at time t2 that Vis has exceeded a second threshold Vth2, a second overcurrent protection operation is immediately performed. As a result, appropriate overcurrent protection is performed in accordance with the operating state of a load. | 2014-12-25 |
20140376274 | SWITCHING POWER SUPPLY DEVICE - In a switching power supply device, a partition portion that includes a slit divides a winding portion of a bobbin. A primary winding of a transformer is wound to a height h1 in a first section, and a secondary winding is wound to a height h2 in a second section. A low side drive winding and a high side drive winding are wound around the primary winding to a height h3 with the high side drive winding being located toward the secondary winding. | 2014-12-25 |
20140376275 | SWITCHING POWER SUPPLY APPARATUS - A switching power supply apparatus includes: a dead time circuit that receives an output control signal and generates dead time signal to specify a time width when both first and second switching elements are turned OFF; an output signal generation circuit that generates first and second output signals which specify the ON time of the first and second switching elements respectively in accordance with the output control signal and the dead time signal; and a dead time adjustment circuit that adjusts the turn ON timings of the first and second switching elements by changing the time width of the dead time signal in accordance with the change of voltage of the DC input power or the change of the output voltage of the capacitor. | 2014-12-25 |
20140376276 | SWITCHING POWER SUPPLY DEVICE - Included are a switching power supply device main body, and a frequency control circuit that controls the switching frequency of a switching element in accordance with a feedback signal in accordance with the output voltage of the switching power supply device main body. The frequency control circuit is divided into a frequency control region wherein the amount of the feedback signal is greater than a predetermined boundary value and a frequency control region wherein the amount is less, linear frequency control whereby the switching frequency of the switching element is caused to change linearly in accordance with the feedback signal is executed in the frequency control region wherein the feedback amount is less, and linear cycle control whereby the switching cycle of the switching element is caused to change linearly in accordance with the feedback signal is executed in the frequency control region wherein the feedback amount is greater. | 2014-12-25 |
20140376277 | HIGH-VOLTAGE (HV) STARTUP DEVICE - A high-voltage (HV) startup device is disclosed. The HV startup device is connected with a control circuit of a switching power supply and receives a high voltage to provide and increase a triggering voltage received by the control circuit, wherein the control circuit is a pulse width modulator (PWM) or a pulse frequency modulator (PFM). When the triggering voltage reaches to a preset voltage of the control circuit, the control circuit sends out a control signal and the switching power supply uses the control signal to generate a sense signal. The HV startup device receives the control signal or the sense signal to stop providing the triggering voltage. | 2014-12-25 |
20140376278 | METHOD AND APPARATUS FOR PROVIDING POWER CONVERSION USING AN INTERLEAVED FLYBACK CONVERTER WITH REACTIVE POWER CONTROL - A method and apparatus for converting DC input power to DC output power with reactive power control. The apparatus includes a plurality of flyback circuits, coupled in parallel, and a DC-AC inversion circuit coupled across an output of each flyback circuit of the plurality of flyback circuits. The apparatus also including a reactive power control circuit coupled to an output of one flyback circuit of the plurality of flyback circuits, and across an output of the DC-AC inversion circuit; and a controller operative to coordinate timing of switches in each flyback circuit of the plurality of flyback circuits and the reactive power control circuit to generate AC output power of a desired power factor. | 2014-12-25 |
20140376279 | POWER ESTIMATION DEVICE USING COAXIAL WINDING TRANSFORMER - Disclosed is a power estimation device using a coaxial winding transformer which includes: a switching control unit that generates primary current by performing switching control on power source; a coaxial winding transformer that includes a core, and a primary winding, a secondary winding, and an auxiliary winding which are wound on the core and outputs secondary current in accordance with the winding ratio of the secondary winding to the primary winding by receiving the primary current; and a power estimation unit that estimates power outputted to the secondary winding by sensing output of the auxiliary winding in accordance with the winding ratio of the auxiliary winding to the primary winding, in which the coaxial winding transformer is formed by winding a cable, which uses at least inner conductor as the secondary winding and uses one outer conductor surrounding the inner conductor as the auxiliary winding, around the core. | 2014-12-25 |
20140376280 | PRECISE OUTPUT POWER DETECTION - A switching power converter provides regulated output power to a load. The switching power converter comprises a transformer including a primary winding coupled to an input voltage, a secondary winding coupled to an output of the switching power converter, an auxiliary winding on a primary side of the transformer, and a switch coupled to the primary winding of the transformer. Output voltage across the secondary winding is reflected as a feedback voltage across the auxiliary winding. The switching power converter detects output current based on a reset time of the transformer. Based on the detected output power, the switching power converter controls switching of the switch to provide regulated output power. | 2014-12-25 |
20140376281 | SWITCHING POWER SUPPLY DEVCE - A switching power supply device wherein an input voltage is stepped-up by first and second switching elements that are driven on and off in a complementary way, thus obtaining a stabilized output voltage. The switching power supply device includes a comparator that detects fluctuation in an operating reference potential of the second switching element accompanying fluctuation in the input voltage, and a drive signal generator circuit that carries out a logical operation on an output control signal, a dead time signal, and the output signal of the comparator, thus generating first and second drive signals that determine the on-state time of the first and second switching elements. | 2014-12-25 |
20140376282 | POWER CONVERSION SYSTEM, AND VOLTAGE DETECTION DEVICE THEREOF - A detection target voltage is divided by a voltage divider circuit wherein a large number of resistor circuits, each of which is formed by a plurality of resistors being connected in parallel, are connected in series, and the voltage is detected. The output of a multiple voltage detector circuit formed of an operational amplifier, and the like, connected to three arbitrary places in the voltage divider circuit is input into a CPU twice, when the switch is in an on-state and when it is in an off-state. The CPU, based on the two measured voltages, can determine that trouble has occurred when there is, for example, trouble such as a short circuit or disconnection of a resistor of the resistor circuits related to the places connected to the three places in the voltage divider circuit. | 2014-12-25 |
20140376283 | SYSTEMS AND METHODS FOR ACTIVE DAMPING DEVICE FOR STABILIZING A POWER GRID OF ACTIVE SOURCES AND LOADS - Embodiments relate to systems and methods for an active damping device for stabilizing a power grid of active sources and loads. In power system networks or grids which incorporate active power sources and active loads, such as motors, the output voltage transfer function can exhibit instabilities due to the presence of poles in the positive real portion (right hand side) of the complex plane. Those poles can induce uncontrolled ringing, oscillations, or other artifacts or instabilities. According to implementations, an active damping element can be introduced into the power system grid, which operates to drive the poles of the output transfer function to the negative real (left hand) portion of the complex plane. Output voltage and other parameters can thereby be stabilized. In implementations, the damping element can include an R-C network for DC output systems, or a controller including a voltage source inverter for AC output systems. | 2014-12-25 |
20140376284 | SYSTEMS AND METHODS FOR TUNING THE CONTROL OF A SHUNT ACTIVE POWER FILTER OVER A VARIABLE FREQUENCY - Embodiments relate to systems and methods for tuning the control of a shunt active power filter over a variable frequency. In aspects, a shunt active power filter is provided to filter current harmonics from the output delivered to a dc load via a recitifier. The shunt active power filter control can be configured as a set of resonant regulators connected in a parallel configuration. Each of the resonant regulators can be tuned to dampen or eliminate a particular harmonic, such as the 5th, 7 | 2014-12-25 |
20140376285 | Auxiliary Power Supplies - The invention relates to auxiliary power supplies. | 2014-12-25 |
20140376286 | POWER CONVERSION APPARATUS - When a snubber capacitor is charged to a level greater than or equal to a predetermined voltage, a protection circuit renders a clamp diode conductive to complete charging of the snubber capacitor. | 2014-12-25 |
20140376287 | MULTILEVEL VOLTAGE SOURCE CONVERTERS AND SYSTEMS - Nested neutral point clamped (NNPC) multilevel power converter stages and systems are presented, in which the converter stage includes an NPC inverter core circuit with a flying (switched) capacitor nesting circuit, with the switches of the NPC core and the switched capacitor circuit being gated using selected redundant switching states to control the voltage of the switched capacitors to achieve a multilevel output voltage having equally spaced voltage step values. Multiple inverter stages can meet cascaded or connected in various configurations to implement single or multiphase power conversion systems, and higher output voltages can be achieved by forming to converter stages into an H-bridge configuration, and connecting multiple H-bridge stages in series with one another. | 2014-12-25 |
20140376288 | APPARATUS AND METHOD FOR CONTROLLING MODULE SWITCHING OF POWER CONVERTING SYSTEM - A technology is disclosed for controlling switching of power converters included in a power converting system. Phase angles are allocated to a plurality of sub-units corresponding to the power converters, and the respective sub-units create local switching carriers based on the allocated phase angles. The sub-units compare a reference AC voltage with the local switching carriers, and switch the power converters according to the result of the comparison. | 2014-12-25 |
20140376289 | METHODS, SYSTEMS, COMPUTER PROGRAM PRODUCTS, AND DEVICES FOR RENEWABLE ENERGY SITE POWER LIMIT CONTROL - The present invention provides methods, systems, computer program products, and devices for renewable energy site power limit control that address conditions of plant saturation and loop delay. In an exemplary embodiment, power limit control of the present invention is broken into two levels of control: a site-wide real power limit control that produces a single site-wide command, SitePlimCom, for all inverters, and inverter-level power limit control that outputs a command, Inv[x].PlimCom[k], for individual inverters. In some embodiments, the invention has one or more of the following features: an integrator with nonlinear gains, limit based anti-windup, a power limit control term based on the sum of both integrator and feed-forward terms, and an inverter-level controller designed to meet slew rate and site power overshoot constraints. The invention can be used at any renewable energy site employing inverters wherein improved dynamic control performance is needed, including solar, wind, and tidal energy sites. | 2014-12-25 |
20140376290 | ALTERNATING CURRENT-TO-DIRECT CURRENT CIRCUIT - An AC to DC circuit includes a rectifier circuit, a voltage detecting circuit, the current source and the output circuit. The rectifier circuit converts the AC power to pulsating DC. The constant current source provides current to the voltage detection circuit and to the control port of the output circuit. The current passing throughout the constant current source is the sum of the current flowing to the voltage detection circuit and to the output circuit. The voltage detection circuit increases with the instantaneous value of the output voltage of the rectifier circuit, it absorbs more current from the current provided by the constant current source and less current flows from the constant current source to the control port of the output circuit. The output circuit amplifies the current of the control port and outputs it to power the load. The AC to DC circuit of the present invention can rectify the portion of an alternating input voltage below a sine peak of the alternating current, working at a sine wave ascending area and a sine wave descending area, and it can carry a capacitive load. | 2014-12-25 |
20140376291 | SYSTEMS, CIRCUITS, DEVICES, AND METHODS WITH BIDIRECTIONAL BIPOLAR TRANSISTORS - Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low. | 2014-12-25 |
20140376292 | FLOATING BIAS GENERATOR - In various embodiments a circuit is provided which may include a node at which a circuit potential may be provided; an alternating voltage providing circuit configured to provide a DC current free alternating voltage; a rectifier coupled to the alternating voltage providing circuit, the rectifier including a first rectifier terminal and a second rectifier terminal, wherein the first rectifier terminal or the second rectifier terminal may be coupled to the node; and a first output terminal and a second output terminal, wherein the first output terminal may be coupled to the first rectifier terminal to provide a first potential and wherein the second output terminal may be coupled to the second rectifier terminal to provide a second potential different from the first potential, the difference between the first potential and the second potential defining an output voltage, wherein the output voltage may be constant independent of the circuit potential. | 2014-12-25 |
20140376293 | PARALLELABLE THREE-PHASE PHOTOVOLTAIC POWER CONVERTER - The invention is a bipolar solar photovoltaic to three-phase AC power converter with a novel non-isolated power conversion topology which allows multiple power converter outputs to be directly paralleled without the need for synchronized switching or galvanic isolation. The invention directly supports a new approach to solar photovoltaic system design wherein a large number of distributed lower power converters are used in lieu of one large central inverter. | 2014-12-25 |
20140376294 | Single-Phase Inverter and Three-Phase Inverter - A single-phase inverter and a three-phase inverter are disclosed. The single-phase inverter includes a first and a second inverting topology unit, a first and a second direct-current voltage boost circuit, and four diodes. The first inverting topology unit is connected between a positive output end and a negative output end of the direct-current power supply; the second inverting topology unit is connected between a cathode of a diode and an anode of another diode; and a middle point of the first inverting topology unit is connected to a middle point of the second inverting topology unit and serves as an alternating-current output end of the single-phase inverter. The first and the second inverting topology unit work in a parallel structure to reduce a conduction loss of a switching transistor when the direct-current power supply outputs a high voltage. | 2014-12-25 |
20140376295 | MEMORY DEVICE AND SYSTEM INCLUDING THE SAME - A memory device includes a plurality of first dies stacked on a substrate, and a second die configured to perform an error correction operation on data written in the first dies and data read out from the first dies. | 2014-12-25 |
20140376296 | MULTI-BIT MEMORY DEVICE - Disclosed is a multi-bit memory device including: a first electrode; a third electrode which is disposed apart from the first electrode; a second electrode which is disposed between the first electrode and the third electrode; a first memory unit which is disposed between the first electrode and the second electrode and includes a material which is electrically polarized and exhibits hysteresis; and a second memory unit which is disposed between the second electrode and the third electrode and includes a material which is electrically polarized and exhibits hysteresis. | 2014-12-25 |
20140376297 | DATA ENCODING FOR NON-VOLATILE MEMORY - A data storage device includes a memory and a controller. Mapping circuitry is configured to apply a mapping to received data to generate mapped data to be stored in storage elements. The mapping is configured to reduce average write time by mapping at least one incoming data value into a mapped value such that no transitions of storage elements from a second state to a first state are used for storing the mapped value into the storage elements. | 2014-12-25 |
20140376298 | DATA ENCODING FOR NON-VOLATILE MEMORY - A data storage device includes a memory and a controller. Mapping circuitry is configured to apply a mapping to received data to generate mapped data to be stored in storage elements. The mapping is configured to reduce average write time by mapping at least one incoming data value into a mapped value such that no transitions of storage elements from a second state to a first state are used for storing the mapped value into the storage elements. The mapping of the received data to the mapped data does not depend on the states of the storage elements prior to the writing of the mapped data. | 2014-12-25 |
20140376299 | METHODS AND CIRCUITS FOR BULK ERASE OF RESISTIVE MEMORY - A resistive random access memory integrated circuit for use as a mass storage media and adapted for bulk erase by substantially simultaneously switching all memory cells to one of at least two possible resistive states. Bulk switching is accomplished by biasing all bottom electrodes within an erase area to a voltage lower than that of the top electrodes, wherein the erase area can comprise the entire memory array of the integrated circuit or else a partial array. Alternatively the erase area may be a single row and, upon receiving the erase command, the row address is advanced automatically and the erase step is repeated until the entire array has been erased. | 2014-12-25 |
20140376300 | DIFFERENTIAL BIT CELL - A differential bit cell includes two memory elements that are configured to have different states. Each of the two memory elements is connected to a respective switching element. Each of these switching elements may have process variances, which may result in a degradation of read and/or write margins. To mitigate the effect of such variances, another switching element is coupled to the two memory elements and their respective switching elements in a manner that couples the aforementioned switching elements in a parallel fashion. In this way, the mismatch effects between the switching elements can be negated during read operations. During programming operations, such a configuration allows for the programming of both memory elements to different states with a single current pulse and also reduces the effective resistance of the programming path. | 2014-12-25 |
20140376301 | MEMORY ELEMENT AND MEMORY DEVICE - A memory element includes: a memory layer disposed between a first electrode and a second electrode. The memory layer includes: an ion source layer containing one or more metallic elements, and one or more chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se); and a resistance change layer disposed between the ion source layer and the first electrode, the resistance change layer including a layer which includes tellurium and nitrogen (N) and is in contact with the ion source layer. | 2014-12-25 |
20140376302 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device comprises a cell array including plural MATs (unit cell arrays) arranged in matrix, each MAT containing a plurality of first lines, a plurality of second lines intersecting the plurality of first lines, and a plurality of memory cells connected at intersections of the first and second lines between both lines, each memory cell containing an electrically erasable programmable variable resistive element of which resistance is nonvolatilely stored as data; and a plurality of write/erase circuits connected to the MATs and operative to execute data write or erase to the memory cells inside the MATs in accordance with input data. A part of the plurality of write/erase circuits writes data to memory cells inside a corresponding MAT while another part of the plurality of write/erase circuits erases data from memory cells inside a corresponding MAT at the same time. | 2014-12-25 |
20140376303 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING VARIABLE RESISTANCE ELEMENT - According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control circuit. The memory cell array include the memory cells each including a variable resistance element in which a reset current flowing in a reset operation is smaller than a set current flowing in a set operation by not less than one order of magnitude. The control circuit performs the reset operation and the set operation for the memory cells. The control circuit performs the reset operation for all memory cells being in the low resistance state and connected to selected first interconnections and selected second interconnections. | 2014-12-25 |
20140376304 | RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS - The gate of the access transistor of a 1 transistor 1 resistor (1T1R) type RRAM cell is biased relative to the source of the access transistor using a current mirror. Under the influence of a voltage applied across the 1T1R cell (e.g., via the bit line), the RRAM memory element switches from a higher resistance to a lower resistance. As the RRAM memory element switches from the higher resistance to the lower resistance, the current through the RRAM cell switches from being substantially determined by the higher resistance of the RRAM device (while the access transistor is operating in the linear region) to being substantially determined by the saturation region operating point of the access transistor. | 2014-12-25 |
20140376305 | CIRCUIT FOR ENHANCING ROBUSTNESS OF SUB-THRESHOLD SRAM MEMORY CELL - The present invention discloses a circuit for improving process robustness of sub-threshold SRAM memory cells, which serves as an auxiliary circuit for a sub-threshold SRAM memory cell. The output of the circuit is connected to the PMOS tube of the sub-threshold SRAM memory cell and the substrate of a PMOS tube in the circuit. The circuit comprises a detection circuit for threshold voltage of PMOS tube and a differential input and single-ended output amplifier. The circuit changes the substrate voltage of the PMOS tubes in the sub-threshold SRAM memory cell and the substrate voltage of the PMOS tube in the circuit in a self-adapting manner by detecting threshold voltage fluctuations of PMOS tubes and NMOS tubes resulted from process fluctuations and thereby regulate the threshold voltages of the PMOS tubes, so that the threshold voltage of PMOS tubes matches the threshold voltage of NMOS tubes. The circuit improves the noise margin of sub-threshold SRAM memory cells and effectively improves the process robustness of sub-threshold SRAM memory cells. | 2014-12-25 |
20140376306 | METHODS FOR A PHASE-CHANGE MEMORY ARRAY - Methods of operating phase-change memory arrays are described. A method includes determining a pattern to be written to a phase-change memory array and executing, according to the pattern, two or more proper reset sequences on the phase-change memory array to write the pattern to the phase-change memory array. Another method includes executing a set sequence on a phase-change memory array and performing a proper read of the phase-change memory array to obtain a pattern derived from executing the set sequence. | 2014-12-25 |
20140376307 | MULT-LEVEL RECORDING IN A SUPERATTICE PHASE CHANGE MEMORY CELL - A phase-change device capable of realizing a multi-level record in a superlattice phase-change memory cell in which a superlattice phase-change material is used as a recording film, and thereby achieving the reduction in power consumption and the capacity increase is provided. To a phase-change memory cell composed of GeTe/Sb | 2014-12-25 |
20140376308 | PHASE CHANGE MEMORY, WRITING METHOD THEREOF AND READING METHOD THEREOF - A phase change memory (PCM), a writing method thereof and a reading method thereof are provided. The PCM has a plurality of memory cells. The writing method comprises the following steps. At least one stress pulse is applied for aging at least one of the memory cells. A starting pulse is applied to all of the memory cells of the PCM for decreasing a resistance of each memory cell. A detection pulse is applied to all of the memory cells of the PCM for detecting the resistance of each memory cell. A set pulse is applied to the aged memory cells. A reset pulse is applied to the non-aged memory cells. | 2014-12-25 |
20140376309 | PHASE CHANGE MEMORY MATERIAL AND SYSTEM FOR EMBEDDED MEMORY APPLICATIONS - A family of phase change materials Ge | 2014-12-25 |
20140376310 | METHOD OF WRITING DATA IN NON-VOLATILE MEMORY DEVICE - A method of writing data in a non-volatile memory device includes receiving a program command and a first row address corresponding to a first word line; performing a first partial programming operation with respect to first memory cells coupled to the first word line; performing a second partial programming operation with respect to second memory cells coupled to a second word line adjacent to the first word line; performing a first verification operation by verifying the first partial programming operation; and selectively performing a first additional programming operation with respect to the first memory cells depending on a result of the first verification operation. | 2014-12-25 |
20140376311 | METHOD AND APPRATUS FOR SHORTENED ERASE OPTION - A nonvolatile memory array has a multiple erase procedures of different durations. A block of memory cells of the array can be erased by one of the different erase procedures. | 2014-12-25 |
20140376312 | NONVOLATILE MEMORY DEVICES AND METHODS OF PROGRAMMING NONVOLATILE MEMORY DEVICES - A nonvolatile memory device includes a memory cell array, a page buffer unit which output a verify-read result, a reference current generating unit which generates a reference current signal, a page buffer decoding unit which outputs currents according to the verify-read result. The nonvolatile memory device further includes an analog bit counting unit which counts the currents, a digital adding unit which calculates an accumulated sum of the counting result, a pass/fail checking unit which outputs a pass signal or fail signal according to the calculation result, and a control unit controlling a program operation. | 2014-12-25 |
20140376313 | APPARATUSES AND METHODS FOR LIMITING STRING CURRENT IN A MEMORY - Apparatuses, current control circuits, and methods for limiting string current in a memory are described. An example apparatus includes a memory cell string including a memory cell. The example apparatus further includes a sense circuit configured to sense a current through the memory cell string, and a select gate configured to couple the memory cell string to a source based on a select gate voltage. The example apparatus further includes a current control circuit coupled to the select gate. The current control circuit is configured to limit current through the memory cell string during a memory access operation based on a reference current. | 2014-12-25 |
20140376314 | FLASH MULTIPLE-PASS WRITE WITH ACCURATE FIRST-PASS WRITE - An instruction to write to a location in the Flash memory is received. It is determining if the Flash memory exposes a level placement setting associated with defining what voltage range corresponds to what level. In the event it is determined that the Flash memory exposes a level placement setting, an accurate coarse write is performed on the location, including by configuring the level placement setting to be a first value, and after the accurate coarse write is performed on the location, a fine write is performed on the location, including by configuring the level placement setting to be a second value, in response to receiving the instruction. | 2014-12-25 |
20140376315 | SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device includes a memory cell, a page buffer including a first and a second switching devices coupled in common to a sensing node coupled to the memory cell through a bit line and a first and a second sensing latch units coupled to the sensing node, respectively, through the first and the second switching devices, and a control logic suitable for transferring a first and a second sensing signals, respectively, to the first and the second switching devices when a threshold voltage of the memory cell is reflected on the sensing node through the bit line during a verification operation. The first and the second switching devices are turned on or off, respectively, in response to the first and the second sensing signals, and data are sensed by the first and the second sensing latch units. | 2014-12-25 |
20140376316 | PROGRAMMABLE MEMORY CELL AND DATA READ METHOD THEREOF - A programmable memory cell includes a non-volatile memory unit, a reference current generator and a readout unit. The non-volatile memory unit is configured to be performed by a program operation, a read operation or an erase operation. The reference current generator is configured to generate a reference current; wherein a value of the reference current is dynamically modulated according to a count number of the program and erase operations performed on the non-volatile memory unit. The readout unit, electrically coupled to the non-volatile memory unit and the reference current generator, is configured to read a data stored in the non-volatile memory cell according to the reference current. A data read method applied to the aforementioned programmable memory cell is also provided. | 2014-12-25 |
20140376317 | REDUCING THE POWER CONSUMPTION OF MEMORY DEVICES - Systems and methods for reducing the power consumption of memory devices. A method of operating a memory device may include monitoring a plurality of sense amplifiers, each sense amplifier configured to evaluate a logic value stored in a memory cell, determining whether each of the plurality of sense amplifiers has completed its evaluation, and stopping a reference current from being provided to the sense amplifiers in response to all of the sense amplifiers having completed their evaluations. An electronic circuit may include memory cells, sense amplifiers coupled to the memory cells, transition detection circuits coupled to the sense amplifiers, and control circuitry coupled to the transition detection circuits, the transition detection circuits configured to stop a reference current from being provided to the sense amplifiers if each transition detection circuit determines that its respective sense amplifier has identified a logic value stored in a respective memory cell. | 2014-12-25 |
20140376318 | CIRCUIT AND METHOD FOR SENSING A DIFFERENCE IN VOLTAGE ON A PAIR OF DUAL SIGNAL LINES, IN PARTICULAR THROUGH EQUALIZE TRANSISTOR - a circuit for sensing a difference in voltage on a pair of dual signal lines comprising a first signal line and a second signal line complementary to the first signal line, comprising:
| 2014-12-25 |
20140376319 | DELAY CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE - According to an embodiment, a load adjusting circuit adjusts the load of an inverter circuit based on a threshold voltage of a first conductive type transistor provided on the inverter circuit, and a driving force adjusting circuit adjusts the driving force of the inverter circuit based on the threshold voltage of the first conductive type transistor. | 2014-12-25 |
20140376320 | SPARE MEMORY EXTERNAL TO PROTECTED MEMORY - A memory subsystem employs spare memory cells external to one or more memory devices. In some embodiments, a processing system uses the spare memory cells to replace individual selected cells at the protected memory, whereby the selected cells are replaced on a cell-by-cell basis, rather than exclusively on a row-by-row, column-by-column, or block-by-block basis. This allows faulty memory cells to be replaced efficiently, thereby improving memory reliability and manufacturing yields, without requiring large blocks of spare memory cells. | 2014-12-25 |
20140376321 | SEMICONDUCTOR MEMORY DEVICE AND DATA PROCESSING SYSTEM - To include a plurality of core chips to which different pieces of chip information from each other are given in advance. A first refresh command is divided into a plurality of second refresh commands having different timings from each other, and a refresh operation is performed on a core chip for which a count value of the second refresh commands and at least a portion of the chip information match each other. With this configuration, even when the second refresh command is commonly supplied to a plurality of core chips, it is possible to shift a timing for the refresh operation in each of the core chips. Therefore, it is possible to reduce a peak current at the time of the refresh operation. | 2014-12-25 |
20140376322 | RETENTION OF DATA DURING STAND-BY MODE - An embodiment of the present disclosure refers to retention of data in a storage array in a stand-by mode. A storage device comprises one or more storage array nodes, and a Rail to Rail voltage adjustor operatively coupled to the storage array nodes. The Rail to Rail voltage adjustor is configured to selectively alter the voltage provided at each said storage array node during stand-by mode. The storage device may further comprise a storage array operatively coupled to said Rail to Rail voltage adjustor and a Rail to Rail voltage monitor operatively coupled to said storage array nodes and configured to control said Rail to Rail voltage adjustor to provide sufficient voltage to retain data during stand-by mode. | 2014-12-25 |
20140376323 | SEMICONDUCTOR DEVICE - A plurality of memory banks bank through bank is provided. Each memory bank includes a row decoder that selects a main word line based on a row address, a column decoder that selects a column selection line based on a column address, and a memory cell array made up of a plurality of memory cells. The memory cell array included in the memory bank bank is divided into a plurality of memory blocks MB that differ by a power of. According to the present invention, the memory cell array can be more flexibly laid out. Therefore, the chip shape can be a shape that is close to a square without providing a large empty space. | 2014-12-25 |
20140376324 | TESTING THROUGH-SILICON-VIAS - Embodiments generally relate to integrated circuit devices having through silicon vias (TSVs). In one embodiment, an integrated circuit (IC) device includes a field of TSVs and an address decoder that selectably couples at least one of the TSVs to at least one of a test input and a test evaluation circuit. In another embodiment, a method includes selecting one or more TSVs from a field of TSVs in at least one IC device, and coupling each selected TS V to at least one of a test input and a test evaluation circuit. | 2014-12-25 |
20140376325 | SEMICONDUCTOR DEVICE HAVING A REDUCED FOOTPRINT OF WIRES CONNECTING A DLL CIRCUIT WITH AN INPUT/OUTPUT BUFFER - An apparatus includes a clock terminal configured to receive an external clock signal, a clock generator configured to generate an internal clock signal in response to the external clock signal, first and second output circuits each coupled to the clock generator, a first clock line coupled between the clock generator and the first output circuit, and the second clock line coupled between the clock generator and the second output circuit. The first clock line represents a first capacitance and a first resistance while the second clock line represents a second capacitance and a second resistance. A first value defined as the product of the first capacitance and the first resistance is substantially equal to a second value defined as the product of the second capacitance and the second resistance. | 2014-12-25 |
20140376326 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes a clock pulse generating circuit suitable for outputting a command enable clock pulse when a predetermined command is input during a predetermined command-masking period, a command interface circuit suitable for outputting an internal command signal based on the command enable clock pulse and the command, and a target operating circuit suitable for performing an operation corresponding to the command based on the internal command signal. | 2014-12-25 |
20140376327 | DEVICE FOR CARRYING OUT MECHANICAL, CHEMICAL, AND/OR THERMAL PROCESSES - A device for carrying out mechanical, chemical, and/or thermal processes in a housing ( | 2014-12-25 |
20140376328 | MIXING DEVICE, DISCHARGE DEVICE PROVIDED THEREWITH, AND DISCHARGE METHOD - Problem: A mixing device is provided which can solve problems resulting from friction between a vessel and a stirrer, which can generate a circulatory flow even below the stirrer, and which allows a desired number of stirrers to be arranged at desired positions. A discharge device provided with the mixing device, and a discharge method are also provided. Solution: The mixing device includes a stirrer incorporating a magnet, a stirrer holding mechanism that specifies a position of the stirrer by exerting a magnetic force on the stirrer from the lateral side, and a rotation mechanism that rotates the stirrer holding mechanism, wherein the rotation mechanism rotates the stirrer holding mechanism, thereby rotating the stirrer. The discharge device includes the mixing device, and the discharge method is carried out using the discharge device. | 2014-12-25 |
20140376329 | SYSTEMS AND METHODS FOR REDUCING MARINE FOULING - Systems and methods are provided for a marine seismic streamer usable underwater for marine seismic surveys. The marine seismic streamer includes: a lead-in section; at least one bird section; at least one data acquisition module; and at least one vibration module configured to vibrate the marine seismic streamer, wherein the lead-in section, the at least one bird section, the at least one data acquisition module and the at least one vibration module are connected together to form the marine seismic streamer. | 2014-12-25 |
20140376330 | WIDE AZIMUTH SEISMIC DATA ACQUISITION METHOD AND SYSTEM WITH AT LEAST THREE STREAMER SETS - Wide azimuth data acquisition systems using at least three streamer sets achieve shorter survey time and enhanced angular coverage relative to conventional systems using two streamer sets. Various techniques such as high-density seismic source activation and alternating surveyed bands with skipped bands lead to data quality similar to the conventional system, while maintaining the increased productivity advantage. | 2014-12-25 |
20140376331 | WIDE AZIMUTH SEISMIC DATA ACQUISITION METHOD AND SYSTEM SKIPPING LINES - Wide azimuth data acquisition systems using at least three streamer sets achieve shorter survey time and enhanced angular coverage relative to conventional systems using two streamer sets. Various techniques such as high-density seismic source activation and alternating surveyed bands with skipped bands lead to data quality similar to the conventional system, while maintaining the increased productivity advantage. | 2014-12-25 |
20140376332 | Optical Fiber Well Deployment for Seismic Surveying - Disclosed are a system, apparatus, and method for optical fiber well deployment in seismic optical surveying. Embodiments of this disclosure may include methods of deploying a spooled optical fiber distributed sensor into the wellbore integrated in a ballast or weight for a seismic optic tool, to achieve deployment of a lightweight disposable fiber optic cable against the wellbore walls via gravity. The method may further include unspooling the spooled optical fiber distributed sensor and using the optical fiber as a distributed seismic receiver. Once the fiber optic distributed sensor is deployed according to methods of the present disclosure, surveys may be obtained and processed by various methods. | 2014-12-25 |
20140376333 | SYSTEMS AND METHODS FOR REDUCING FALSE TARGETS IN ULTRASONIC RANGE SENSING APPLICATIONS - An ultrasonic range sensor comprises at least one transducer adapted to generate an ultrasonic pulse having a first axis of transmission and detect a reflected signal that is associated with the ultrasonic pulse and propagates along the first axis of transmission. The ultrasonic range sensor also comprises a deflecting region adapted to reflect the reflected signal along a second axis different from the first axis of transmission. In one embodiment, the second axis is deflected from the first axis by a non-zero angle determined by a characteristic of the deflecting region. | 2014-12-25 |
20140376334 | ACOUSTIC MONITORING SYSTEM AND A METHOD OF ACOUSTIC MONITORING - The invention relates to an acoustic monitoring system comprising at least two isolated acoustic receivers ( | 2014-12-25 |
20140376335 | OSCILLATION DEVICE - A vibration member ( | 2014-12-25 |
20140376336 | NON-IONIZING AND NON-MRI METHODS FOR INTERROGATING MR CONDITIONAL STATUS OF IMPLANTED DEVICES - A method and system of obtaining information by interrogating an information mark attached to a device implanted in a body of a patient by transmitting a non-ionizing pulse through the body of the patient, receiving, from the information mark, a response to the transmitted non-ionizing pulse, the response including encoded information, and extracting the encoded information from the response. | 2014-12-25 |
20140376337 | TIMEPIECE ASSEMBLY WITH OVERMOULDED WHEEL SETS - Timepiece assembly ( | 2014-12-25 |
20140376338 | TIMEPIECE MOVEMENT HAVING A BARREL WITH REDUCED CORE DIAMETER - A timepiece movement, including a plate and a bridge carrying a barrel including a barrel mainspring between a drum and a receiving surface of a core and a cover fixed to the drum. The spring is made of a multiphase, cobalt-nickel-chromium based alloy, having a Young's modulus of between 200 and 240 GPa and a shear modulus of between 80 and 100 GPa, and having a width to thickness ratio of between 3 and 23, and the maximum radius of the steel or stainless steel core relative to the pivot axis is less than nine times the maximum thickness of the spring. The movement further includes a mechanism limiting shake including a shim-washer independent of the core and guided by a shoulder of the core. | 2014-12-25 |
20140376339 | MAGNETIC DEVICES INCLUDING NEAR FIELD TRANSDUCER - An apparatus having at least an air bearing surface (ABS), the apparatus including a near field transducer (NFT) positioned adjacent the ABS of the apparatus, wherein the NFT includes a plasmonic material; and not greater than about 200 ppm of one or more microalloy dopants. | 2014-12-25 |
20140376340 | PEG ONLY NEAR-FIELD TRANSDUCER - An apparatus for a heat assisted magnetic recording device that includes a write pole, a near-field transducer, and a heat sink. The near-field transducer is comprised only of a peg disposed adjacent the write pole. The heat sink is disposed between the write pole and at least a portion of the near-field transducer. | 2014-12-25 |
20140376341 | NEAR-FIELD TRANSDUCER PEG ENCAPSULATION - A near field transducer with a peg region, an enlarged region disposed adjacent the peg region, and a barrier material disposed between the peg region and the enlarged region. The barrier material reduces or eliminates interdiffusion of material between the peg region and the enlarged region. | 2014-12-25 |
20140376342 | NEAR-FIELD TRANSDUCER PEG ENCAPSULATION - A near field transducer with a peg region, an enlarged region disposed adjacent the peg region, and a barrier material disposed between the peg region and the enlarged region. The barrier material reduces or eliminates interdiffusion of material between the peg region and the enlarged region. | 2014-12-25 |
20140376343 | PEG ONLY NEAR-FIELD TRANSDUCER - An apparatus for a heat assisted magnetic recording device that includes a write pole, a near-field transducer, and a heat sink. The near-field transducer is comprised only of a peg disposed adjacent the write pole. The heat sink is disposed between the write pole and at least a portion of the near-field transducer. | 2014-12-25 |
20140376344 | NEAR FIELD TRANSDUCER AND HEAT SINK DESIGN FOR HEAT ASSISTED MAGNETIC RECORDING - Apparatuses, systems, and methods are disclosed related to heat assisted magnetic recording. According to one embodiment, an apparatus that includes a heat sink region and a near field transducer region is disclosed. The near field transducer region is thermally coupled to the heat sink region. At least one of the heat sink region and the near field transducer region includes both an inner core and an outer shell. The inner core can be comprised of a non-plasmonic material and the outer shell can be comprised of a plasmonic material. In further embodiments, the inner core is comprised of a material having a relatively higher electron-phonon coupling constant and the outer shell is comprised of a material having a relatively lower electron-phonon coupling constant. | 2014-12-25 |
20140376345 | NEAR FIELD TRANSDUCER WITH ISOLATED PEG - A method fabricating a near field transducer for a heat assisted magnetic recording head including forming a peg region of a near field transducer along a first portion of a substrate of a heat assisted magnetic recording head, removing a first portion of the peg region, fabricating a barrier material along a surface of the peg region created by the removal of the first portion of the peg region; and forming an enlarged region adjacent the surface such that the barrier material is disposed at least between the surface of the peg region and the enlarged region. | 2014-12-25 |
20140376346 | METHODS OF FORMING MATERIALS FOR AT LEAST A PORTION OF A NFT AND NFTS FORMED USING THE SAME - A method including depositing a plasmonic material at a temperature of at least 150° C.; and forming at least a peg of a near field transducer (NFT) from the deposited plasmonic material. | 2014-12-25 |