50th week of 2012 patent applcation highlights part 14 |
Patent application number | Title | Published |
20120313055 | METHOD OF MANUFACTURING TRANSPARENT CONDUCTIVE FILM, THE TRANSPARENT CONDUCTIVE FILM, ELEMENT AND TRANSPARENT CONDUCTIVE SUBSTRATE USING THE FILM, AS WELL AS DEVICE USING THE SUBSTRATE - By using a coating method, which is a simple method of manufacturing a transparent conductive film at low cost, a transparent conductive film formed with heating at a low temperature, in particular, lower than 300° C. with both of excellent transparency and conductivity and also with excellent film strength and a method of manufacturing this transparent conductive film are provided. | 2012-12-13 |
20120313056 | COMPOSITIONS COMPRISING CONDUCTIVE PARTICLES WITH SURFACE-MODIFIED NANOPARTICLES COVALENTLY ATTACHED THERETO, AND METHODS OF MAKING - Compositions are disclosed comprising a plurality of conductive particles wherein each conductive particle comprises a plurality of surface-modified nanoparticles that are covalently bonded to the surface of the conductive particle. Compositions are also disclosed wherein the plurality of conductive particles comprising a plurality of surface-modified nanoparticles covalently bonded thereto, are provided in an organic vehicle. | 2012-12-13 |
20120313057 | In-Ga-Sn OXIDE SINTER, TARGET, OXIDE SEMICONDUCTOR FILM, AND SEMICONDUCTOR ELEMENT - An oxide sintered body including indium element (In), gallium element (Ga) and tin element (Sn) in atomic ratios represented by the following formulas (1) to (3): | 2012-12-13 |
20120313058 | COMPOSITION FOR ULTRAVIOLET ABSORBENT SUBSTANCE AND ULTRAVIOLET ABSORBENT SUBSTANCE COMPRISING SAME - A composition for an ultraviolet absorbent substance which comprises at least one metal complex represented by formula (1) and at least one matrix material and/or polymerizable monomer as a precursor of a matrix material, and an ultraviolet absorbent substance comprising the composition: | 2012-12-13 |
20120313059 | LABORATORY JACK - A laboratory jack having a scissors-type jack assembly connected to upper and lower platforms includes guide members and thrust bearings or rollers, which provide improved stability across a longer stroke than previous laboratory jacks. One laboratory jack includes upper and lower tiers of scissor assemblies comprised of scissor arms and guide rods disposed between the ends of each of the upper and lower scissor assemblies. The guide rods are carried by cross-brace members that are connected to and extend between opposing portions of the scissor assemblies, and the guide rods slide through a through bore in at least one of the cross-brace members. The scissor assemblies include rollers at the interface between laterally shifting ends of the scissor arms and an adjacent platform. | 2012-12-13 |
20120313060 | DECKING AND PLANK REMOVAL TOOL - A versatile lever-type decking and plank removal tool for more efficiently prying floor-boards from deck foundations and floor-joists to which they are nailed. The decking and plank removal tool uses an offset inverted hook to tear off any deckboard in any configuration in seconds with a minimum of effort, allowing the user to remain completely upright for the entire process. | 2012-12-13 |
20120313061 | VEHICLE LIFTING SYSTEM - A vehicle lifting system comprising a mechanism fixedly disposed within a center pillar at the side of a vehicle, for extending out of the pillar and exerting a downward force onto the surface on which the vehicle is positioned. When the force is exerted on the surface, the side of the vehicle is lifted above the surface. A control device is utilized for selectively extending the mechanism out of the pillar and retracting the mechanism back into the pillar. | 2012-12-13 |
20120313062 | CRASH BARRIER WITH OVER-PRESSURE RELIEF SYSTEM - A crash barrier system is provided that generally includes a hydraulic actuator driven piston operably connected to a hydraulic circuit and the crash barrier. In general, the hydraulic circuit includes a normal-UP and normal-DOWN section, an emergency-UP section, and an external pressure relief valve. In order to automatically provide corrective action in the event of an overpressure condition, the external pressure relief valve is connected to the hydraulic circuit. Upon occurrence of condition that causes the hydraulic fluid pressure to exceed a predetermined value, hydraulic fluid is released through the pressure relief valve to maintain the pressure at or below the predetermined value. | 2012-12-13 |
20120313063 | NONVOLATILE MEMORY DEVICE HAVING AN ELECTRODE INTERFACE COUPLING REGION - Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another. | 2012-12-13 |
20120313064 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor memory device includes a cell array layer having a memory cell. The memory cell has a current control device, a variable resistance device and a metal layer for silicide. A method for manufacturing the semiconductor memory device includes: forming the metal layer for silicide on a semiconductor layer for forming the current control device and a variable resistance device layer; selectively removing the variable resistance device layer and the metal layer through first etching; forming a first protective layer to cover at least a side surface of the metal layer exposed by the first etching; selectively removing a part of the semiconductor layer, through second etching; and forming a second protective layer to cover the variable resistance device layer, the metal layer for silicide, and the semiconductor layer. | 2012-12-13 |
20120313065 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor memory device includes a cell array layer including a first wire, a memory cell stacked on the first wire, and a second wire formed on the memory cell. The memory cell includes a variable resistance element and a current control element The current control element includes a first conductivity-type semiconductor into which a first impurity is doped, an i-type semiconductor in contact with the first conductivity-type semiconductor, a second conductivity-type semiconductor into which a second impurity is doped, and an impact ionization acceleration unit being formed between the i-type semiconductor and one of the first conductivity-type semiconductor and the second conductivity-type semiconductor. | 2012-12-13 |
20120313066 | NONVOLATILE MEMORY DEVICES, NONVOLATILE MEMORY CELLS AND METHODS OF MANUFACTURING NONVOLATILE MEMORY DEVICES - A nonvolatile memory cell includes first and second interlayer insulating films which are separated from each other and are stacked sequentially, a first electrode which penetrates the first interlayer insulating film and the second interlayer insulating film, a resistance change film which is formed along a side surface of the first electrode and extends parallel to the first electrode, and a second electrode which is formed between the first interlayer insulating film and the second interlayer insulating film. The second electrode includes a conductive film which is made of metal and a diffusion preventing film which prevents diffusion of a conductive material contained in the conductive film. | 2012-12-13 |
20120313067 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A memory device includes a lower interconnection in a semiconductor substrate, the lower interconnection being made of a material different from the semiconductor substrate, a selection element on the lower interconnection, and a memory element on the selection element. | 2012-12-13 |
20120313068 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND A MANUFACTURING METHOD THEREOF - Provided is a resistance change type nonvolatile semiconductor storage device including a diode capable of passing therethrough a sufficient current to a resistance changing operation even when the memory cell is miniaturized. A nonvolatile semiconductor storage device has first wires extending in X direction, second wires extending in Y direction, and memory cells disposed at intersection points of the first wires and the second wires. The memory cell includes a diode disposed over the first wire, and coupled to the first wire at one end, and a resistance change part disposed over the diode, and series-coupled to the diode at one end, and coupled to the second wire at the other end, and storing information through changes in resistance value. The diode includes a first conductivity type first semiconductor layer, and a second conductivity type second semiconductor layer extending into the inside of the first semiconductor layer. | 2012-12-13 |
20120313069 | WORK FUNCTION TAILORING FOR NONVOLATILE MEMORY APPLICATIONS - Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another. | 2012-12-13 |
20120313070 | CONTROLLED SWITCHING MEMRISTOR - A controlled switching memristor includes a first electrode, a second electrode, and a switching layer positioned between the first electrode and the second electrode. The switching layer includes a material to switch between an ON state and an OFF state, in which at least one of the first electrode, the second electrode, and the switching layer is to generate a permanent field within the memristor to enable a speed and an energy of switching from the ON state to the OFF state to be substantially symmetric to a speed and energy of switching from the OFF state to the ON state. | 2012-12-13 |
20120313071 | CONTACT STRUCTURE AND METHOD FOR VARIABLE IMPEDANCE MEMORY ELEMENT - A memory element can include an opening formed within at least one insulating layer formed on an etch stop layer that exposes a first electrode portion and the etch stop layer at a bottom of the opening; a second electrode portion, formed on at least a side surface of the opening and in contact with the first electrode portion, the second electrode portion not filling the opening and being substantially not formed over a top surface of the at least one insulating layer; and at least one memory layer formed on a top surface of the at least one insulating layer and in contact with the second electrode portion, the at least one memory layer being reversibly programmable between at least two impedance states. Methods of forming such memory elements are also disclosed. | 2012-12-13 |
20120313072 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES HAVING DOUBLE CROSS POINT ARRAY AND METHODS OF FABRICATING THE SAME - Three-dimensional semiconductor memory devices and methods of fabricating the same. The device may include first, second and third conductive lines disposed at different vertical levels to define two intersections, and two memory cells disposed at the two intersections, respectively. The first and second conductive lines may extend parallel to each other, and the third conductive line may extend to cross the first and second conductive lines. The first and second conductive lines can be alternatingly arranged along the length of third conductive line in vertical sectional view, and the third conductive line may be spaced vertically apart from the first and second conductive lines. | 2012-12-13 |
20120313073 | NICKEL-BASED ELECTROCATALYTIC PHOTOELECTRODES - A photoelectrode, methods of making and using, including systems for water-splitting are provided. The photoelectrode can be a semiconductive material having a photocatalyst such as nickel or nickel-molybdenum coated on the material. | 2012-12-13 |
20120313074 | LONG WAVELENGTH LIGHT EMITTING DEVICES WITH HIGH QUANTUM EFFICIENCIES - Various embodiments of light emitting devices with high quantum efficiencies are described herein. In one embodiment, a light emitting device includes a first contact, a second contact spaced apart from the first contact, and a first active region between the first and second contacts. The first active region is configured to produce a first emission via electroluminescence when a voltage is applied between the first and second contacts, and the first emission having a first center wavelength. The light emitting device also includes a second active region spaced apart from the first active region. The second active region is configured to absorb at least a portion of the first emission and produce a second emission via photoluminescence, and the second emission having a second center wavelength longer than the first center wavelength. | 2012-12-13 |
20120313075 | OPTICAL COMPONENT, PRODUCTS INCLUDING SAME, AND METHODS FOR MAKING SAME - An optical component is disclosed that comprises a first substrate, an optical material comprising quantum confined semiconductor nanoparticles disposed over a predetermined region of a first surface of the first substrate, a layer comprising an adhesive material disposed over the optical material and any portion of the first surface of the first substrate not covered by the optical material, and a second substrate disposed over the layer comprising an adhesive material, wherein the first and second substrates are sealed together. In certain embodiments, the optical component further includes a second optical material comprising quantum confined semiconductor nanoparticles disposed between the layer comprising the adhesive material and the second substrate. Method are also disclosed. Also disclosed are products including the optical component. | 2012-12-13 |
20120313076 | LOW DROOP LIGHT EMITTING DIODE STRUCTURE ON GALLIUM NITRIDE SEMIPOLAR SUBSTRATES - A light emitting diode structure of (Al,Ga,In)N thin films grown on a gallium nitride (GaN) semipolar substrate by metal organic chemical vapor deposition (MOCVD) that exhibits reduced droop. The device structure includes a quantum well (QW) active region of two or more periods, n-type superlattice layers (n-SLs) located below the QW active region, and p-type superlattice layers (p-SLs) above the QW active region. The present invention also encompasses a method of fabricating such a device. | 2012-12-13 |
20120313077 | HIGH EMISSION POWER AND LOW EFFICIENCY DROOP SEMIPOLAR BLUE LIGHT EMITTING DIODES - High emission power and low efficiency droop semipolar blue light emitting diodes (LEDs). | 2012-12-13 |
20120313078 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device ( | 2012-12-13 |
20120313079 | GRAPHENE ELECTRONIC DEVICES HAVING MULTI-LAYERED GATE INSULATING LAYER - A graphene electronic device includes a multi-layered gate insulating layer between a graphene channel layer and a gate electrode. The multi-layered gate insulating layer includes an organic insulating layer and an inorganic insulating layer on the organic insulating layer. | 2012-12-13 |
20120313080 | Semiconductor photocapacitor device - A photocapacitor device is provided for responding to a photon having at least a specified energy. The photocapacitive device includes a first portion composed of a photocapacitive material; a second portion composed of a non-photocapacitive material; and a depletion region disposed between the first and second portions. The ph otocapacitive and non-photocapacitive materials respectively have first and second Fermi-energy differences, with the second Fermi-energy difference being higher than the first Fermi-energy difference. | 2012-12-13 |
20120313081 | ELECTRONIC DEVICE - An electronic device, such as a thin-film transistor, includes a semiconducting layer formed from a semiconductor composition. The semiconductor composition comprises a polymer binder and a small molecule semiconductor. The semiconducting layer has been deposited on an alignment layer that has been aligned in the direction between the source and drain electrodes. The resulting device has increased charge carrier mobility. | 2012-12-13 |
20120313082 | OPTOELECTRONIC DEVICE AND STACKING STRUCTURE - Disclosed is an optoelectronic device that includes a light source, an emission layer disposed on the light source including a light emitting particle dispersed in a matrix polymer, and a polymer film disposed on the emission layer, the polymer film including a polymerized polymer of a first monomer including at least two thiol (—SH) groups and a second monomer including at least two carbon-carbon unsaturated bond-containing groups at a terminal end. | 2012-12-13 |
20120313083 | 6,12-DINAPHTHYLCHRYSENE DERIVATIVE AND ORGANIC LIGHT-EMITTING DEVICE USING THE DERIVATIVE - Provided are an organic compound having high heat stability suitable for use in an organic light-emitting device, and an organic light-emitting device using the organic compound. The organic light-emitting device is an organic light-emitting device, including: an anode; a cathode; and an organic compound layer disposed between the anode and the cathode, in which at least one layer of the organic compound layer has a 6,12-dinaphthylchrysene derivative represented by one of the following general formulae (1) and (2): | 2012-12-13 |
20120313084 | METAL OXIDE SEMICONDUCTOR TRANSISTOR - A metal oxide semiconductor transistor includes a gate, a metal oxide active layer, a gate insulating layer, a source, and a drain. The metal oxide active layer has a first surface and a second surface, and the first surface faces to the gate. The gate insulating layer is disposed between the gate and the metal oxide active layer. The source and the drain are respectively connected to the metal oxide active layer. The second surface defines a mobility enhancing region between the source and the drain. An oxygen content of the metal oxide active layer in the mobility enhancing region is less than an oxygen content of the metal oxide active layer in the region outside the mobility enhancing region. The metal oxide semiconductor transistor has high carrier mobility. | 2012-12-13 |
20120313085 | NOVEL ORGANIC COMPOUND AND ORGANIC LIGHT-EMITTING DEVICE - A novel organic compound suitable for blue light emission and an organic light-emitting device containing the novel organic compound are provided. | 2012-12-13 |
20120313086 | Organic Semiconductor Material, Organic Semiconductor Composition, Organic Thin Film, Field-Effect Transistor, And Manufacturing Method Therefor - A field-effect transistor having a specific top-gate bottom-contact structure, the field-effect transistor containing as organic semiconductor materials a compound represented by the formula (1) and a compound represented by the formula (2): | 2012-12-13 |
20120313087 | FLUORINE-FLUORINE ASSOCIATES - The present invention relates, inter alia, to compositions comprising, a compound which is able to emit and/or absorb light and a compound which is able either to absorb or emit light, where both compounds each include at least one fluorine radical. The present invention is furthermore directed to a process for the preparation of the composition, to the use of the composition in electronic devices and to the device itself. | 2012-12-13 |
20120313088 | PHOTOELECTRIC CONVERSION DEVICE, IMAGING DEVICE AND PRODUCTION METHODS THEREOF - A photoelectric conversion device is provided and includes: a first electrode, a second electrode, and a photoelectric conversion layer between the first and second electrodes, the photoelectric conversion layer containing a mixture of an organic photoelectric conversion dye, a fullerene or a fullerene derivative, and a fullerene polymer; various embodiments of the device, a photosensor, an imaging device, and production methods for these devices. | 2012-12-13 |
20120313089 | ORGANIC ELECTROLUMINESCENCE DEVICE - A material for a light emitting device containing a compound represented by the following formula (1): | 2012-12-13 |
20120313090 | PHENYL-SUBSTITUTED 1,3,5-TRIAZINE COMPOUND, PROCESS FOR PRODUCING THE SAME, AND ORGANIC ELECTROLUMINESCENT DEVICE CONTAINING THE SAME AS COMPONENT - A phenyl-substituted 1,3,5-triazine compound represented by the general formula (1): | 2012-12-13 |
20120313091 | COMPOUND FOR AN ORGANIC PHOTOELECTRIC DEVICE, ORGANIC PHOTOELECTRIC DEVICE INCLUDING THE SAME, AND DISPLAY DEVICE INCLUDING THE ORGANIC PHOTOELECTRIC DEVICE - A compound for an organic photoelectric device, an organic photoelectric device including the same, and a display device including the organic photoelectric device, the compound being represented by the following Chemical Formula 1: | 2012-12-13 |
20120313092 | METAL OXIDE TFT WITH IMPROVED SOURCE/DRAIN CONTACTS - A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal. | 2012-12-13 |
20120313093 | Oxide Thin Film Transistor and Method of Fabricating the Same - An oxide thin film transistor (TFT) and a fabrication method thereof are provided. First and second data wirings are made of different metal materials, and an active layer is formed on the first data wiring to implement a short channel, thus enhancing performance of the TFT. The first data wiring in contact with the active layer is made of a metal material having excellent contact characteristics and the other remaining second data wiring is made of a metal material having excellent conductivity, so as to be utilized to a large-scale oxide TFT process. Also, the first and second data wirings may be formed together by using half-tone exposure, simplifying the process. | 2012-12-13 |
20120313094 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device which uses a semiconductor substrate having a TEG pattern to reduce defects induced by dicing. The semiconductor device includes a semiconductor substrate which is to be or has been divided into individual semiconductor chips by dicing; an interlayer insulating layer formed over the semiconductor substrate; a seal ring provided in the interlayer insulating layer and formed along the periphery of the semiconductor chip; and a TEG wiring having one end coupled to the seal ring and the other end extending toward an end face of the periphery of the semiconductor chip. | 2012-12-13 |
20120313095 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT EMPLOYING POLYSILICON DIODE - An electrostatic discharge (ESD) protection circuit includes a polysilicon diode, a switch element, and a load element. The poly silicon diode has a first terminal and a second terminal. The switch element has a control terminal coupled to the first terminal of the polysilicon diode, a first terminal coupled to the second terminal of the polysilicon diode, and a second terminal. The load element is coupled to the control terminal of the switch element and the second terminal of the switch element. | 2012-12-13 |
20120313096 | OXIDE SEMICONDUCTOR COMPOSITION AND PREPARATION METHOD THEREOF, METHOD OF FORMING OXIDE SEMICONDUCTOR THIN FILM, METHOD OF FABRICATING ELECTRONIC DEVICE AND ELECTRONIC DEVICE FABRICATED THEREBY - Provided are an oxide semiconductor composition, a preparation method thereof, an oxide semiconductor thin film using the composition, and a method of forming an electronic device. The oxide semiconductor composition includes a photosensitive material and an oxide semiconductor precursor. | 2012-12-13 |
20120313097 | FLASH MEMORY DEVICE HAVING A GRADED COMPOSITION, HIGH DIELECTRIC CONSTANT GATE INSULATOR - A graded composition, high dielectric constant gate insulator is formed between a substrate and floating gate in a flash memory cell transistor. The gate insulator comprises amorphous germanium or a graded composition of germanium carbide and silicon carbide. If the composition of the gate insulator is closer to silicon carbide near the substrate, the electron barrier for hot electron injection will be lower. If the gate insulator is closer to the silicon carbide near the floating gate, the tunnel barrier can be lower at the floating gate. | 2012-12-13 |
20120313098 | Organic Light-Emitting Display Apparatus - An organic light-emitting display apparatus may include a substrate; a thin-film transistor (TFT) disposed on the substrate, and having an active layer, a gate electrode, a source electrode and a drain electrode; a signal line formed on the same layer as the source electrode and the drain electrode; a first insulating layer covers the signal line, the source electrode, and the drain electrode; a pixel electrode formed on the first insulating layer, and electrically connected to the TFT; a pixel-defining layer formed on the first insulating layer, includes an opening exposing the pixel electrode; an intermediate layer formed on the pixel electrode, and includes a light-emitting layer; and an opposite electrode formed on the intermediate layer. The intermediate layer is formed on the pixel-defining layer so as to overlap with the signal line. | 2012-12-13 |
20120313099 | ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - The organic light emitting display device includes a substrate, a thin film transistor (TFT) formed on the substrate, a first insulating layer covering the TFT, a first electrode formed on the first insulating layer and electrically connected to the TFT, a second insulating layer formed on the first insulating layer to cover the first electrode and has an opening to expose a portion of the first electrode, an organic layer formed on a portion of the second insulating layer and the first electrode, a second electrode formed on the second insulating layer and the organic layer includes a first region and a second region, a capping layer formed on a first region of the second electrode and having first edges, and a third electrode formed on a second region of the second electrode and having second edges whose side surfaces contact side surfaces of the first edges. | 2012-12-13 |
20120313100 | PIXEL STRUCTURE - A pixel structure including a semiconductor layer having at least one source region and at least one drain region; a first insulating layer covering the semiconductor layer; a first conductive layer on the first insulating layer and including at least one gate; a second insulating layer covering the first conductive layer; a second conductive layer on the second insulating layer and including at least one source electrode, at least one drain electrode and at least one bottom electrode, the source region, the source electrode, the drain region, the drain electrode and the gate forming at least one thin film transistor; a third insulating layer covering the second conductive layer; a third conductive layer on the third insulating layer and including at least one top electrode, the top electrode and the bottom electrode forming at least one capacitor; and a pixel electrode electrically connected to the thin film transistor. | 2012-12-13 |
20120313101 | THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - The present disclosure discloses a method for manufacturing a TFT array substrate, comprising: depositing a gate metal layer, a gate insulating layer, a semiconductor layer and a source-drain electrode layer in this order on a base substrate, performing a first photolithograph process to form a common electrode line, a gate line, a gate electrode, a source electrode, a drain electrode and a channel defined between the source electrode and the drain electrode; depositing a passivation layer, performing a second photolithograph process to form a first via hole and a second via hole in the passivation layer; and depositing a pixel electrode layer and a data line layer in this order, perform a third photolithograph process to form a data line connected to the source electrode through the first via hole and a pixel electrode connected to the drain electrode through the second via hole. | 2012-12-13 |
20120313102 | ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME - An array substrate and a liquid crystal display (LCD) device having the array substrate are provided. The array substrate may include a pixel electrode, a coupling electrode and an opposite electrode. The pixel electrode may include a first sub-electrode having first electrode bars receiving a first voltage and a second sub-electrode having second electrode bars. The first electrode bars and the second electrode bars may be spaced apart from each other. The coupling electrode may be electrically connected to a portion of the first electrode bars, may have a opposite electrode bars and may overlap a portion of the second electrode bars to form coupling capacitor. The opposite electrode may be disposed between the first electrode bars and the second electrode bars to receive a second voltage different from the first voltage. | 2012-12-13 |
20120313103 | RADIOACTIVE-RAY IMAGING APPARATUS, RADIOACTIVE-RAY IMAGING DISPLAY SYSTEM AND TRANSISTOR - Disclosed herein is a transistor including: a semiconductor layer; a first gate insulation film and a first interlayer insulation film which are provided on a specific surface side of the semiconductor layer; a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film; an insulation film provided on the other surface side of the semiconductor layer; source and drain electrodes provided by being electrically connected to the semiconductor layer; and a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode, wherein at least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film. | 2012-12-13 |
20120313104 | ANALOG MEMORY CELL CIRCUIT FOR THE LTPS TFT-LCD - The present invention provides an analog memory cell circuit for the LTPS TFT-LCD. The circuit comprises the first transistor, second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the capacitor. It comprises a plurality of operation period, wherein the transistors are controlled in accordance with the first scan signal, the second scan signal, and the third scan signal, the output signal is output in the opposite to the output jack. | 2012-12-13 |
20120313105 | UNIPOLAR DIODE WITH LOW TURN-ON VOLTAGE - A unipolar diode with low turn-on voltage includes a subcathode semiconductor layer, a low-doped, wide bandgap cathode semiconductor layer, and a high-doped, narrow bandgap anode semiconductor layer. A junction between the cathode layer and the anode layer creates an electron barrier in the conduction band, with the barrier configured to produce a low turn-on voltage for the diode. A unipolar diode with low turn-on voltage includes an n | 2012-12-13 |
20120313106 | Enhancement Mode Group III-V High Electron Mobility Transistor (HEMT) and Method for Fabrication - According to one disclosed embodiment, an enhancement mode high electron mobility transistor (HEMT) comprises a heterojunction including a group III-V barrier layer situated over a group III-V semiconductor body, and a gate structure formed over the group III-V barrier layer and including a P type group III-V gate layer. The P type group III-V gate layer prevents a two dimensional electron gas (2DEG) from being formed under the gate structure. One embodiment of a method for fabricating such an enhancement mode HEMT comprises providing a substrate, forming a group III-V semiconductor body over the substrate, forming a group III-V barrier layer over the group III-V semiconductor body, and forming a gate structure including the P type group III-V gate layer over the group III-V barrier layer. | 2012-12-13 |
20120313107 | Semiconductor Device - A semiconductor device includes a main body made of a GaN-based semiconductor material, and at least one electrode structure. The electrode structure includes an ohmic contact layer that is formed on the main body, a buffer layer that is formed on the ohmic contact layer opposite to the main body, and a circuit layer that is made of a copper-based material and that is formed on the buffer layer opposite to the ohmic contact layer. The ohmic contact layer is made of a material selected from titanium, aluminum, nickel, and alloys thereof. The buffer layer is made of a material different from the material of the ohmic contact layer and selected from titanium, tungsten, titanium nitride, tungsten nitride, and combinations thereof. | 2012-12-13 |
20120313108 | SEMICONDUCTOR DIODE - To provide a semiconductor diode with a part of a semiconductor lamination portion having a mesa structure portion, which is the part where a pn-junction is formed by lamination of an n-type semiconductor layer and a p-type semiconductor layer on a substrate, comprising: a protective insulating film formed by coating a main surface of the mesa structure portion, a side face of the mesa structure portion in which an interface of the pn-junction is exposed, and an etched and exposed surface of the n-type semiconductor layer; and an anode electrode formed in ohmic-contact with the p-type semiconductor layer exposed from an opening formed on a part of the main surface of the mesa structure portion of the protective insulating film, extending from the main surface, through the side face of the mesa structure portion, to the surface of the n-type semiconductor layer. | 2012-12-13 |
20120313109 | Nitride Semiconductor Light Emitting Device and Fabrication Method Thereof - Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a delta doped second nitride semiconductor layer formed above the active layer. According to the present invention, the optical power of the nitride semiconductor light emitting device is enhanced, optical power down phenomenon is improved and reliability against ESD (electro static discharge) is enhanced. | 2012-12-13 |
20120313110 | LIGHT EMITTING DEVICE - Disclosed are a light emitting device. A light emitting diode comprises a light emitting device comprises a plurality of N-type semiconductor layers including a first N-type semiconductor layer and a second N-type semiconductor layer on the first N-type semiconductor layer, an active layer on the second N-type semiconductor layer, and a P-type semiconductor layer on the active layer, wherein the first N-type semiconductor layer comprises a Si doped Nitride layer and the second N-type semiconductor layer comprises a Si doped Nitride layer, and wherein the first and second N-type semiconductor layers have a Si impurity concentration different from each other. | 2012-12-13 |
20120313111 | DIE ALIGNMENT WITH CRYSTALLOGRAPHIC AXES IN GaN-ON-SiC AND OTHER NON-CUBIC MATERIAL SUBSTRATES - A semiconductor chip comprises: a semiconductor structure having a single crystal substrate having a non-cubic crystallographic structure and epitaxial layers disposed on the substrate wherein adjacent sides of the semiconductor structure are at oblique angles. A method for separating a plurality of integrated circuit chips. The method includes: providing a semiconductor wafer having single crystal substrate, such substrate having a non-cubic crystallographic structure with an epitaxial layer disposed on the substrate; forming scribe lines at oblique angles to one another in the epitaxial layer; and cutting or cleaving through the substrate along the scribe lines to separate the chips. | 2012-12-13 |
20120313112 | SEMICONDUCTOR DEVICE - A MOSFET includes a silicon carbide substrate, a drift layer made of silicon carbide and including a main surface having an off angle of 50° or more and 65° or less with respect to a {0001} plane, and a gate oxide film formed on and in contact with the main surface of the drift layer. The drift layer includes a p type body region formed to include a region in contact with the gate oxide film. The p type body region has an impurity density of 5×10 | 2012-12-13 |
20120313113 | PHOTOVOLTAIC ORGANIC LIGHT EMITTING DIODES DEVICE AND MANUFACTURING METHOD THEREOF - A photovoltaic organic light emitting diodes (PV-OLED) device and manufacturing method thereof are introduced. The PV-OLED device includes a substrate, a solar cell module, and a plurality of organic light emitting diodes. The solar cell module is disposed on a surface of the substrate. The organic light emitting diodes are disposed on the same surface of the substrate that the solar cell module is disposed on. The organic light emitting diode is electrically isolated from the solar cell module. The solar cell module can apply power to the organic light emitting diodes for emitting light. | 2012-12-13 |
20120313114 | Method of manufacturing thin film transistor, thin film transistor manufactured by using the method, method of manufacturing organic light-emitting display apparatus, and organic light-emitting display apparatus manufactured by using the method - A method of manufacturing a thin film transistor (TFT), a TFT manufactured by the method, a method of manufacturing an organic light-emitting display apparatus that includes the TFT, a display including the TFT. By including a buffer layer below and an insulating layer above a silicon layer for the TFT, the silicon layer can be crystallized without being exposed to air, so that contamination can be prevented. Also, due to the overlying insulating layer, the silicon layer can be patterned without directly contacting photoresist. The result is a TFT with uniform and improved electrical characteristics, and an improved display apparatus. | 2012-12-13 |
20120313115 | LIGHT EMITTER DEVICE PACKAGES, MODULES AND METHODS - Light emitter device packages, modules and methods are disclosed having a body and a cavity that can be formed from a single substrate of material. The material can be thermally conductive and/or metallic. A light emitter device package can have at least one isolating layer creating at least a first isolated portion of the body and/or first isolated portion of the cavity. The isolating layer can be formed from the same material as the single substrate which forms the package body and cavity, and can be a layer which is thermally and electrically isolated. A light emitter or light emitter device, such as an LED chip can be mounted upon a surface of the cavity and upon at least a portion of the isolating layer. | 2012-12-13 |
20120313116 | Liquid Crystal Display and Chip On Film Thereof - A chip on film (COF) is disclosed in the present disclosure, which comprises an adhesive base layer, a driving integrated circuit (IC), an adhesive layer and a copper layer. The driving IC is embedded on a surface of the adhesive base layer; the adhesive layer is located under the adhesive base layer; the copper layer is located under the adhesive layer. The adhesive base layer is formed with a heat and pressure spreading structure. A heat and pressure spreading structure is disposed on the adhesive base layer of the COF so that deformation or unevenness of the glass substrate in the bonded area can be avoided when the COF is thermally pressed to the glass substrate of the LCD. These guarantees the consistency between the bonded area and the unbounded area, the bonded area and the unbounded area of the glass substrate will have the same transmissivity and luminance. | 2012-12-13 |
20120313117 | LIGHT-EMITTING DIODE PACKAGE - Disclosed is a light-emitting diode package according to an embodiment, including; a body having a cavity formed therein, a lead frame placed in the cavity; and a light emitting diode electrically connected to the lead frame while having a slope angle relative to the bottom surface of the cavity, wherein a light emitting part and a non-light emitting part are present on the light emitting diode, and wherein a connection part is provided in a region of the cavity to be connected to at least a region of the non-light emitting part. | 2012-12-13 |
20120313118 | ACTIVE-MATRIX ORGANIC LIGHT-EMITTING DIODE DISPLAY DEVICE WITH SHORT PROTECTION - An active-matrix OLED display device, which reduces the adverse effects of short circuits across OLED devices in a densely packed array by having a thin-film resistive layer integrated in series with the OLED device. The OLED device includes a substrate, and first and second pixels situated proximate each other on the substrate. The first pixel comprises an OLED and means for preventing a failure of the first pixel due to a short from affecting the operation of the second pixel. The preventing means includes a resistor electrically connected in series with the OLED of the first pixel. The resistor is in the form of a thin-film resistive layer. The first pixel includes an anode, wherein the thin-film resistive layer is situated adjacent the anode. The anode and the thin-film resistive layer have substantially the same dimensions and are formed simultaneously. | 2012-12-13 |
20120313119 | THREE DIMENSIONAL LIGHT-EMITTING-DIODE (LED) STACK AND METHOD OF MANUFACTURING THE SAME - A three dimensional (3-D) light-emitting-diode (LED) stack and method of manufacturing the same, comprising: a substrate; at least a first LED, stacked on said substrate; and at least a second LED, stacked on said first LED, such that energy gap of said first LED is smaller than energy gap of said second LED. In said stack mentioned above, a material of larger energy gap capable of emitting light of shorter wavelength can be penetrated by lights emitted by another material of smaller energy gap capable emitting lights of longer wavelength, such that lights are mixed together and then emitted, and said materials are put into a three dimensional stack arrangement, to form a brand new light emitting device of mixed light, so as to emit lights as required. | 2012-12-13 |
20120313120 | Method For Depositing A Phosphor Layer On LEDs, And Apparatus Made Thereby - A method for depositing a phosphor layer on a light-emitting diode (“LED”) chip includes coating at least a light-emitting side of the LED chip with a phosphor-adhesive material, and applying phosphor particles to an exposed surface of the material such that the phosphor layer forms of phosphor particles that adhere to the exposed surface. A method for depositing phosphor layers on each of a plurality of LED chips includes mounting the LED chips to a common substrate, coating at least a light-emitting side of the LED chips with a phosphor-adhesive material, and applying phosphor particles to exposed surfaces of the material such that the phosphor layers form of phosphor particles that adhere to the material. A processed LED chip includes an unpackaged LED chip, a phosphor-adhesive material applied to a light-emitting side of the LED chip, and a phosphor layer formed of phosphor particles adhered to the material. | 2012-12-13 |
20120313121 | DISPLAY DEVICE AND METHOD THEREOF - A display device includes a pixel electrode disposed on a first substrate, and including a first portion, a second portion and a connection portion disposed between the first portion and the second portion, a capacitor line disposed on the first substrate and between the first substrate and the connection portion, a nonsymmetrical shaped capacitor electrode disposed on the first substrate and overlapping the pixel electrode and the capacitor line, and electrically connected to the pixel electrode through contact holes, and a common electrode disposed on a second substrate and including first and second opening patterns disposed overlapping the first portion and the second portion of the pixel electrode, respectively. | 2012-12-13 |
20120313122 | SUBSTRATE FOR MOUNTING LIGHT-EMITTING ELEMENTS, AND LIGHT-EMITTING DEVICE - A substrate for mounting light-emitting elements to mount a plurality of double wire type light-emitting elements so as to be connected in parallel, comprising a substrate main body made of a sintered product of an inorganic material powder and having a mounting surface for light-emitting elements; wiring conductors provided so as to be connected to electrodes of the light-emitting elements in one-to-one at a position out of a portion between the light-emitting elements, on the mounting surface; a reflection film formed on the mounting surface excluding the wiring conductors and a periphery thereof; and an overcoat glass film provided on the mounting surface so as to cover the entire reflection film including its edge and so as to exclude the wiring conductors and a periphery thereof, and a light-emitting device using it. | 2012-12-13 |
20120313123 | DISPLAY DEVICE HAVING A SPACER - A display device includes a first substrate having a plurality of pixel regions separated by a non-pixel region; a second substrate facing the first substrate; and a spacer disposed between the first substrate and the second substrate to maintain a gap between the first substrate and the second substrate. The pixel regions include a first pixel region and a second pixel region which neighbor each other, the non-pixel region between the first pixel region and the second pixel region is bisected into a first non-pixel region adjacent to the first pixel region and a second non-pixel region adjacent to the second pixel region, and the spacer is formed on the non-pixel region between the first pixel region and the second pixel region. An area of the first non-pixel region occupied by the spacer is smaller than an area of the second non-pixel region occupied by the spacer. | 2012-12-13 |
20120313124 | GALIUM-SUBSTITUTED YTTRIUM ALUMINUM GARNET PHOSPHOR AND LIGHT EMITTING DEVICES INCLUDING THE SAME - Provided herein are phosphor compositions that include a YAG phosphor that is substituted with gallium, such as Y | 2012-12-13 |
20120313125 | LIGHT EMITTING DEVICES WITH EFFICIENT WAVELENGTH CONVERSION AND ASSOCIATED METHODS - Various embodiments of light emitting devices with efficient wavelength conversion and associated methods of manufacturing are described herein. In one embodiment, a light emitting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The active region is configured to produce a light via electroluminescence. The light emitting device also includes a conversion material on the second semiconductor material, the conversion material containing aluminum gallium indium phosphide (AlGaInP) doped with an N-type dopant. | 2012-12-13 |
20120313126 | LED PACKAGE - An LED package comprises an encapsulation layer, an LED die and two electrodes. The LED die is capable of emitting a first light beam with a first wavelength, and, respectively, electrically connecting to the two electrodes. The encapsulation layer covers the LED die, and comprises a luminescent conversion element and a light-compensating element. A heat exhaustion of the luminescent conversion element is converse to that of the light-compensating element. The second and third wave lengths of the second and third light beams generated by the luminescent conversion element and the light-compensating element have oppositely different rates of change when temperatures of the luminescent conversion element and the light-compensating element are increased | 2012-12-13 |
20120313127 | MANUFACTURING METHOD OF LED BASE PLATE, LED BASE PLATE AND WHITE LIGHT LED STRUCTURE - An LED base plate enabling the LED to emit high luminance white light. The base plate has a reflective surface, and protrusions disposed on the reflective surface have top portions formed with curved surfaces. The protrusions have bottom widths of 2 to 4 micrometers and heights of 1.2 to 1.8 micrometers, with adjacent protrusions having spaces of 0.6 to 3 micrometers. An InGaN epitaxy layer is coated on the reflective surface of the base plate and emits ultraviolet of wavelength in the range of 380 to 410 nanometer when the InGaN epitaxy layer is electrified. Ultraviolet light reflected by the reflective surface of the base plate and the protrusions stimulates and mixes fluorescent compounds of zinc oxide and yttrium aluminum garnet to generate complementary light of ultraviolet light. High luminance white light scatteringly emitted is used for illumination. | 2012-12-13 |
20120313128 | Lighting Device and Method for Manufacturing the Same - A lighting device is formed using a light-emitting element by a more simplified method. The lighting device includes a light-emitting element including a light-emitting layer between a first electrode and a second electrode, a substrate provided with the light-emitting element and an uneven region around the periphery of the light-emitting element, a sealing substrate facing the substrate, connection electrodes connected to the first electrode and the second electrode and formed over the uneven region, and a sealant for bonding the substrate and the sealing substrate. The connection electrodes are each formed using a conductive paste, and the sealant is in contact with the connection electrodes and the uneven region provided around the periphery of the light-emitting element. | 2012-12-13 |
20120313129 | ORGANIC ELECTROLUMINESCENT ELEMENT, AND METHOD FOR MANUFACTURING ORGANIC ELECTROLUMINESCENT ELEMENT - An object of the present invention is to realize an OLED capable of attaining high luminescence luminance and easy to manufacture. An organic electroluminescence device ( | 2012-12-13 |
20120313130 | SOLID STATE LIGHT EMITTER WITH PUMPED NANOPHOSPHORS FOR PRODUCING HIGH CRI WHITE LIGHT - A solid state white light emitting device includes a semiconductor chip producing near ultraviolet (UV) energy. The device may include a reflector forming and optical integrating cavity. Phosphors, such as doped semiconductor nanophosphors, within the chip packaging of the semiconductor device itself, are excitable by the near UV energy. However the re-emitted light from the phosphors have different spectral characteristics outside the absorption ranges of the phosphors, which reduces or eliminates re-absorption. The emitter produces output light that is at least substantially white and has a color rendering index (CRI) of 75 or higher. The white light output of the emitter may exhibit color temperature in a range along the black body curve. | 2012-12-13 |
20120313131 | LED LEADFRAME OR LED SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING LED LEADFRAME OR LED SUBSTRATE - An LED leadframe or LED substrate includes a main body portion having a mounting surface for mounting an LED element thereover. A reflection metal layer serving as a reflection layer for reflecting light from the LED element is disposed over the mounting surface of the main body portion. The reflection metal layer comprises an alloy of platinum and silver or an alloy of gold and silver. The reflection metal layer efficiently reflects light emitted from the LED element and suppresses corrosion due to the presence of a gas, thereby capable of maintaining reflection characteristics of light from the LED element. | 2012-12-13 |
20120313132 | PIXEL STRUCTURE - A pixel structure including an active device, a capacitor electrode line, a light shielding layer, a color filter pattern and a pixel electrode is provided. The active device and the capacitor electrode line are disposed on a substrate. The light shielding layer is disposed on the substrate, and the dielectric constant of the light shielding layer is less than 6. The light shielding layer defines a unit area on the substrate, and a contact hole is formed in the light shielding layer above the active device. A color filter pattern is disposed in the unit area, wherein the dielectric constant of the color filter pattern is less than 6, and the color filter pattern does not fill into the contact hole. The pixel electrode is disposed on the color filter pattern, in which the pixel electrode fills into the contact hole so as to electrically connect with the active device. | 2012-12-13 |
20120313133 | HETEROSTRUCTURE CONTAINING IC AND LED AND METHOD FOR FABRICATING THE SAME - A heterostructure contains an IC and an LED. An IC and an LED are initially provided. The IC has at least one first electric-conduction block and at least one first connection block. The IC electrically connects with the first electric-conduction block. The first face of the LED has at least one second electric-conduction block and at least one second connection block. The LED electrically connects to the second electric-conduction block. Subsequently, the first electric-conduction block and the first connection block are respectively joined to the second electric-conduction block and the second connection block. The first electric-conduction block is electrically connected with the second electric-conduction block and forms a heterostructure. The system simultaneously provides functions of heat radiation and electric communication for the IC and LED resulting in a high-density, multifunctional heterostructure. | 2012-12-13 |
20120313134 | GLASS SUBSTRATE COATED WITH A HIGH-INDEX LAYER UNDER AN ELECTRODE COATING, AND ORGANIC LIGHT-EMITTING DEVICE COMPRISING SUCH A SUBSTRATE - A glass substrate including a first face and a second face opposing the first face, the substrate including, above the second face, an electrode layer which includes at least one electrically conducting layer, wherein the substrate includes, between the second face and the electrode layer, at least one layer of vitreous material having an index in the range from 1.7to 2.4and including from 40% to 60% by weight of bismuth oxide Bi | 2012-12-13 |
20120313135 | MOUNTING BOARD AND STRUCTURE OF THE SAME - A mounting board including a pair of patterned electrodes, a lower surface and an upper surface opposed thereto on which a substrate of an electronic component is to be mounted, a pass-through hole penetrating through the upper surface and the lower surface, and a peripheral side surface that defines the pass-through hole. The pass-through hole includes a plurality of penetrating grooves that are cut into the mounting board and penetrate through the upper and lower surfaces. The plurality of penetrating grooves electrically split the pair of patterned electrodes. The pair of patterned electrodes is partly positioned inside the peripheral side surface, and a connection portion connecting the at least one pair of patterned electrodes and at least one pair of patterned electrodes provided on the upper surface of the substrate of the electronic component is to be disposed inside the peripheral side surface that defines the pass-through hole. | 2012-12-13 |
20120313136 | ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING THE SAME - In one aspect, an organic light emitting diode (OLED) display that includes: a substrate; an organic light emitting element on the substrate; a thin film encapsulation layer on the substrate and covering the organic light emitting element; a polymer carpet layer directly on the thin film encapsulation layer; and a cover film directly on the polymer carpet layer is provided. | 2012-12-13 |
20120313137 | ORGANIC LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - An organic light emitting device and a method for manufacturing that same are discussed, which can reduce thickness and weight of the device as well as the manufacturing cost. The organic light emitting device includes according to an embodiment an organic light emitting diode (OLED) formed on a glass substrate; an adhesive layer formed to cover the OLED; and a metal foil formed on the adhesive layer to seal the OLED and bonded to the glass substrate, wherein the metal foil is formed of an alloy having the same or substantially the same thermal expansion coefficient as that of the glass substrate. | 2012-12-13 |
20120313138 | OPTOELECTRONIC SEMICONDUCTOR CHIP AND USE OF AN INTERMEDIATE LAYER BASED ON AlGaN - An optoelectronic semiconductor chip includes an epitaxially grown semiconductor layer sequence based on GaN, InGaN, AlGaN and/or InAlGaN, a p-doped layer sequence, an n-doped layer sequence, an active zone that generates an electromagnetic radiation and is situated between the p-doped layer sequence and the n-doped layer sequence, and at least one AlxGa 1-xN-based intermediate layer where 02012-12-13 | |
20120313139 | IGBT AND DIODE - In an IGBT, defects generated by ion implantation for introduction of the P-type collector region or N-type buffer region into the N | 2012-12-13 |
20120313140 | Method of Fabricating a Deep Trench Insulated Gate Bipolar Transistor - In one embodiment, a method comprises forming an epitaxial layer over a substrate of an opposite conductivity type, the epitaxial layer being separated by a buffer layer having a doping concentration that is substantially constant in a vertical direction down to the buffer layer. A pair of spaced-apart trenches is formed in the epitaxial layer from a top surface of the epitaxial layer down at least into the buffer layer. A dielectric material is formed in the trenches over the first and second sidewall portions. Source/collector and body regions of are formed at the top of the epitaxial layer, the body region separating the source/collector region of the pillar from a drift region of the epitaxial layer that extends from the body region to the buffer layer. An insulated gate member is then formed in each of the trenches adjacent to and insulated from the body region. | 2012-12-13 |
20120313141 | FAST SWITCHING HYBRID IGBT DEVICE WITH TRENCHED CONTACTS - A hybrid IGBT device having a VIGBT and LDMOS structures comprises at least a drain trenched contact filled with a conductive plug penetrating through an epitaxial layer, and extending into a substrate; a vertical drain region surrounding at least sidewalls of the drain trenched contact, extending from top surface of the epitaxial layer to the substrate, wherein the vertical drain region having a higher doping concentration than the epitaxial layer. | 2012-12-13 |
20120313142 | IMAGING DEVICE, METHOD FOR FABRICATING IMAGING DEVICE, AND IMAGING APPARATUS - According to an aspect of the invention, an imaging device includes a plurality of photoelectric conversion elements and a read-out portion. The photoelectric conversion elements are arranged above a substrate. The read-out portion reads out signal corresponding to charges which are generated from each of the photoelectric conversion elements. Each of the photoelectric conversion elements includes a first electrode that collects the charge, a second electrode that is disposed opposite to the first electrode, a photoelectric conversion layer that generates the charges and disposed between the first electrode and the second electrode, and an electron blocking layer that is disposed between the first electrode and the photoelectric conversion layer. Distance between the first electrodes of adjacent photoelectric conversion elements is 250 nm or smaller. Each of the electron blocking layers has a change in surface potential of −1 to 3 eV from a first face to a second face. | 2012-12-13 |
20120313143 | HIGHLY SCALED ETSOI FLOATING BODY MEMORY AND MEMORY CIRCUIT - A floating body memory cell, memory circuit, and method for fabricating floating body memory cells. The floating body memory cell includes a bi-layer heterojunction having a first semiconductor coupled to a second semiconductor. The first semiconductor and the second semiconductor have different energy band gaps. The floating body memory cell includes a buried insulator layer. The floating body memory cell includes a back transistor gate separated from the second semiconductor of the bi-layer heterojunction by at least the buried insulated layer. The floating body memory cell also includes a front transistor gate coupled to the first semiconductor of the bi-layer heterojunction. | 2012-12-13 |
20120313144 | RECESSED GATE FIELD EFFECT TRANSISTOR - A semiconductor device having a gate positioned in a recess between the source region and a drain region that are adjacent either side of the gate electrode. A channel region is below a majority of the source region as well as a majority of the drain region and the entire gate electrode. | 2012-12-13 |
20120313145 | SEMICONDUCTOR DEVICE WITH SPACER LAYER BETWEEN CARRIER TRAVELING LAYER AND CARRIER SUPPLYING LAYER - A nitride semiconductor device is disclosed. The device includes a stack of semiconductor layers including the channel layer, the spacer layer, and the doped layer. The spacer layer is made of AlN while the doped layer is InAlN. A feature of the embodiment is that the spacer layer has a thickness of 0.5 to 1.25 nm. | 2012-12-13 |
20120313146 | TRANSISTOR AND METHOD OF FORMING THE TRANSISTOR SO AS TO HAVE REDUCED BASE RESISTANCE - Disclosed is a transistor structure, having a completely silicided extrinsic base for reduced base resistance R | 2012-12-13 |
20120313147 | Semiconductor Device and Method of Forming a Power MOSFET With Interconnect Structure Silicide Layer and Low Profile Bump - A semiconductor device has a substrate with a source region and a drain region formed on the substrate. A silicide layer is disposed over the source region and drain region. A first interconnect layer is formed over the silicide layer and includes a first runner connected to the source region and second runner connected to the drain region. A second interconnect layer is formed over the first interconnect layer and includes a third runner connected to the first runner and a fourth runner connected to the second runner. An under bump metallization (UBM) is formed over and electrically connected to the second interconnect layer. A mask is disposed over the substrate with an opening in the mask aligned over the UBM. A conductive bump material is deposited within the opening in the mask. The mask is removed and the conductive bump material is reflowed to form a bump. | 2012-12-13 |
20120313148 | SELF-ALIGNED TRENCH CONTACT AND LOCAL INTERCONNECT WITH REPLACEMENT GATE PROCESS - A semiconductor device fabrication process includes forming insulating mandrels over one or more replacement metal gates on a semiconductor substrate. The mandrels include a first insulating material. Each mandrel has approximately the same width as its underlying gate with each mandrel being at least as wide as its underlying gate. Mandrel spacers are formed around each insulating mandrel. The mandrel spacers include the first insulating material. Each mandrel spacer has a profile that slopes from being wider at the bottom to narrower at the top. A second insulating layer of the second insulating material is formed over the transistor. Trenches to the sources and drains of the gates are formed by removing the second insulating material from portions of the transistor between the mandrels. Trench contacts to the sources and drains of the gates are formed by depositing conductive material in the first trenches. | 2012-12-13 |
20120313149 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a semiconductor structure and a method for manufacturing the same. The method comprises the following steps: providing a semiconductor substrate, forming sequentially a gate dielectric layer, a metal gate, a CMP stop layer, and a poly silicon layer on the semiconductor substrate; etching the gate dielectric layer, the metal gate, the CMP stop layer and the poly silicon layer to form a gate stack; forming a first interlayer dielectric layer on the semiconductor substrate to cover the gate stack on the semiconductor substrate and the portions on both sides of the gate stack; performing a planarization process, such that the CMP stop layer is exposed and flushed with the upper surface of the first interlayer dielectric layer. Accordingly, the present invention further provides a semiconductor structure. Through adding the CMP stop layer, the present invention is able to effectively shorten the height of a metal gate, thus effectively reduces the capacitance between the metal gate and contact regions, and therefore optimizes the subsequent process for etching through holes. | 2012-12-13 |
20120313150 | THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS - A thin film transistor includes: an organic semiconductor layer which is formed from a metal-containing material containing at least one of a metallic element and a semi-metallic element capable of reacting with an etching gas; a source electrode and a drain electrode spaced apart from each other; and an organic conductive layer which is inserted between the organic semiconductor layer and the source and drain electrodes in the regions where the organic semiconductor layer overlaps with the source and drain electrodes and which is formed from a non-metal-containing material not containing at least one of a metallic element and a semi-metallic element capable of reacting with the etching gas. | 2012-12-13 |
20120313151 | SEMICONDUCTOR DEVICE INCLUDING CONTACT STRUCTURE, METHOD OF FABRICATING THE SAME, AND ELECTRONIC SYSTEM INCLUDING THE SAME - A semiconductor device includes a gate structure on a semiconductor substrate, an impurity region at a side of the gate structure and the impurity region is within the semiconductor substrate, an interlayer insulating layer covering the gate structure and the impurity region, a contact structure extending through the interlayer insulating layer and connected to the impurity region, and an insulating region. The contact structure includes a first contact structure that has a side surface surrounded by the interlayer insulating layer and a second contact structure that has a side surface surrounded by the impurity region. The insulating region is under the second contact structure. | 2012-12-13 |
20120313152 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A transistor which includes an oxide semiconductor and is capable of high-speed operation and a method of manufacturing the transistor. In addition, a highly reliable semiconductor device including the transistor and a method of manufacturing the semiconductor device. The semiconductor device includes an oxide semiconductor layer including a channel formation region, and a source and drain regions which are provided so that the channel formation region is interposed therebetween and have lower resistance than the channel formation region. The channel formation region and the source and drain regions each include a crystalline region. | 2012-12-13 |
20120313153 | SYSTEM AND METHOD OF PLATING CONDUCTIVE GATE CONTACTS ON METAL GATES FOR SELF-ALIGNED CONTACT INTERCONNECTIONS - According to one embodiment of the invention, the gate contact is formed by a selective deposition on the gate electrode. One acceptable technique for the selective deposition is by plating. Plating is one process by which a metal structure, such as a gate contact, may be formed directly on the gate electrode. The plating is carried out by immersing the semiconductor die in a plating solution with the gate electrode exposed. The gate contact is plated onto the gate electrode and thus is ensured of being fully aligned exactly to the gate electrode. After this, the appropriate dielectric layers are formed adjacent the gate contact and over the source and drain to ensure that the gate electrode is electrically isolated from other components of the transistor. | 2012-12-13 |
20120313154 | MOS Transistor Having Combined-Source Structure With Low Power Consumption and Method for Fabricating the Same - The present invention discloses a MOS transistor having a combined-source structure with low power consumption, which relates to a field of field effect transistor logic devices and circuits in CMOS ultra-large-scaled integrated circuits. The MOS transistor includes a control gate electrode layer, a gate dielectric layer, a semiconductor substrate, a Schottky source region, a highly-doped source region and a highly-doped drain region. An end of the control gate extends to the highly-doped source region to form a T shape, wherein the extending region of the control gate is an extending gate and the remaining region of the control gate is a main gate. The active region covered by the extending gate is a channel region, and material thereof is the substrate material. A Schottky junction is formed between the Schottky source region and the channel under the extending gate. The combined-source structure according to the invention combines a Schottky barrier and a T-shaped gate, improves the performance of the device, and the fabrication method thereof is simple. Thus, a higher turn-on current, a lower leakage current, and a steeper subthreshold slope can be obtained, and the present application can be applied in the field of low power consumption and have a higher practical value. | 2012-12-13 |