49th week of 2013 patent applcation highlights part 17 |
Patent application number | Title | Published |
20130320272 | INTERMEDIATE TRANSFER MEMBERS CONTAINING FLUORINATED POLYAMIC ACIDS - An intermediate transfer member that includes a fluorinated polyamic acid and a conductive component. | 2013-12-05 |
20130320273 | NANOCOMPOSITES FOR NEURAL PROSTHETICS DEVICES - Implantable electrically conductive devices are provided having a nanocomposite material coating comprising gold nanoparticles or carbon nanotubes. Such an implantable device may be a neural or other implantable prosthesis, including microelectrodes for use in vivo. The devices may have dimensions on a cellular scale. Further, the devices may be highly flexible and electrically conductive, while also having low impedance and high storage charge capacity. Layer-by-layer methods for fabricating such nanocomposite materials for implantable devices are also provided. Methods for direct-write lithography patterning of such nanocomposite material coatings are also provided. | 2013-12-05 |
20130320274 | PARTICULATE MATERIALS, COMPOSITES COMPRISING THEM, PREPARATION AND USES THEREOF - Methods of processing particulate carbon material, such as graphic particles or agglomerates of carbon nanoparticles such as CNTs are provided. The starting material is agitated in a treatment vessel in the presence of low-pressure (glow) plasma generated between electrodes. The material is agitated in the presence of conductive contact bodies such as metal balls, on the surface of which plasma glow is present and amongst which the material to be treated moves. The methods effectively deagglomerate nanoparticles, and exfoliate graphitic material to produce very thin graphitic sheets showing graphene-type characteristics. The resulting nanomaterials used by dispersal in composite materials, e.g. conductive polymeric composites for electric or electronic articles and devices. The particle surfaces can be functionalized by choosing appropriate gas in which to form the plasma. | 2013-12-05 |
20130320275 | Vanadium Compensated, SI SiC Single Crystals of NU and PI Type and the Crystal Growth Process Thereof - In a crystal growth apparatus and method, polycrystalline source material and a seed crystal are introduced into a growth ambient comprised of a growth crucible disposed inside of a furnace chamber. In the presence of a first sublimation growth pressure, a single crystal is sublimation grown on the seed crystal via precipitation of sublimated source material on the seed crystal in the presence of a flow of a first gas that includes a reactive component that reacts with and removes donor and/or acceptor background impurities from the growth ambient during said sublimation growth. Then, in the presence of a second sublimation growth pressure, the single crystal is sublimation grown on the seed crystal via precipitation of sublimated source material on the seed crystal in the presence of a flow of a second gas that includes dopant vapors, but which does not include the reactive component. | 2013-12-05 |
20130320276 | MARKED THERMOPLASTIC COMPOSITIONS, METHODS OF MAKING AND ARTICLES COMPRISING THE SAME, AND USES THEREOF - In an embodiment, a method of inscribing a substrate comprises contacting the substrate with a laser beam to generate a mark, wherein the mark results from increasing the reflectivity of the thermoplastic material, wherein the substrate comprises a composition comprising a non-reflective thermoplastic material. In an embodiment, a method for generating a mark on an article comprises bonding a first component to a second component with a laser beam having a wavelength of greater than or equal to 800 nanometers, wherein the first component composition comprises a thermoplastic composition absorbing light having a wavelength of less than or equal to 500 nanometers and wherein the second component comprises a thermoplastic composition absorbing light having a wavelength of greater than or equal to 800 nanometers. | 2013-12-05 |
20130320277 | TRANSLUCENT POLYCRYSTALLINE MATERIAL AND MANUFACTURING METHOD THEREOF - Provided is a method for manufacturing a translucent polycrystalline material with optical properties continuously varying in the material. A slurry including single crystal grains that are acted upon by a force when placed in a magnetic field is immobilized in a gradient magnetic field with a spatially varying magnetic flux density and then sintered. For example, where a slurry including single crystal grains of YAG doped with Er and single crystal grains of YAG undoped with a rare earth material is immobilized in the gradient magnetic field, the region with a strong magnetic field becomes a laser oscillation region that is rich in Er-doped YAG, whereas the region with a weak magnetic field becomes a translucent region rich in YAG undoped with a rare earth material. A polycrystalline material having a core with laser oscillations and a guide surrounding the core are obtained at once. | 2013-12-05 |
20130320278 | POWER DOOR OPENER - A power door opener including an actuator having a housing with an electrically powered actuator shaft that can be extended from a closed to an extended position. In one embodiment, a movable push plate is affixed to the actuator shaft and a fixed push plate is fixed in its position with respect to the housing. In the closed position of the actuator shaft, the fixed and movable push plates are aligned to form a combined edge for insertion into the space between a door and door jamb. The actuator shaft extends to move the movable push plate apart from the fixed push plate to spread the space and release the door from the door jamb. Alternatively, a double ended power door opener is located between opposite door jambs and the extending of the actuator shaft forces the door jambs apart to release the door from the door jamb. | 2013-12-05 |
20130320279 | WIRE PULLING ASSIST DEVICE - A wire pulling assist device has a tong shaped member having two arms biasedly connected at one of the two ends of each arm. A leaf spring at the connected ends of the arms maintains the device in a biasedly open position when the tool is not being used. Wire supports, consisting of curved elements, extend from near the second end of the arms. Applying a squeezing pressure on the arm members compels them and the wire supports towards each other, permitting the wire supports to be inserted into a hole in a metal stud. Metal clad wire can then be threaded through the wire supports and run smoothly and efficiently through the metal stud without impediment. | 2013-12-05 |
20130320280 | BACK SAVER (A-FRAME PULLY SYSTEM) - A wire feeding pulley A-Frame System is provided for feeding electrical, telephone, communication wires ect. into manholes, transformers, switchgears ect. including a frame having four vertical rails, one horizontal cross member at the top which has four short pieces of square tubing welded to it which the vertical rails sleeve over and are held together by horizontal pins. The bottom of the frame has four horizontal pieces welded into a square that have four short vertical pieces welded to it that the vertical rails can sleeve into and are held together by horizontal pins. It has three vertical pieces of square tubing welded to the bottom side of the horizontal top main beam that three pulleys can be attached to for wire to be fed through. There is also a square tube that can be attached to the bottom frame that has a smaller square tube sleeved inside of it that has a pulley that pins on the end of it making it a snorkel attachment for feeding into devices with small doorways. | 2013-12-05 |
20130320281 | FENCE SYSTEM - A fence panel and method of assembly. The fence panel includes end brackets that are affixed to panel facing sides of fence uprights. A top rail and a base rail span between the uprights. Panel and spacer members are secured between the top and base rails. The fence panel construction method facilitates construction of lengths of fence by a single person by first installing uprights in the ground, then affixing the base rail to the uprights. A magnetic strip spans between the uprights. Spacers and panels are supported by the base rail and by the magnetic strip. After placement of the spacers and panels, a top rail is positioned between the uprights and adjacent to upper ends of the spacers and panels, thereby securing the spacers and panels between the top rail and the base rail to form a fence panel. | 2013-12-05 |
20130320282 | Wedge Locking Unit for a Rail Assembly - The invention provides an easy to assemble railing assembly used for residential and commercial purposes. The railing assembly includes a plurality of locking components, a plurality of upright members and a plurality of locking pins. A locking component includes a plurality of wedge shaped locking slots. An upright member is configured to receive the locking component therewithin. The locking pin of the plurality of locking pins has each end connected to one or more wedge shaped locking slots of the plurality of wedge shaped locking slots. | 2013-12-05 |
20130320283 | Memory Arrays And Methods Of Forming An Array Of Memory Cells - A method of forming an array of memory cells includes forming lines of covering material that are elevationally over and along lines of spaced sense line contacts. Longitudinal orientation of the lines of covering material is used in forming lines comprising programmable material and outer electrode material that are between and along the lines of covering material. The covering material is removed over the spaced sense line contacts and the spaced sense line contacts are exposed. Access lines are formed. Sense lines are formed that are electrically coupled to the spaced sense line contacts. The sense lines are angled relative to the lines of spaced sense line contacts and relative to the access lines. Other embodiments, including structure independent of method, are disclosed. | 2013-12-05 |
20130320284 | FIELD FOCUSING FEATURES IN A RERAM CELL - A resistive random access memory (ReRAM) cell, comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes a second conductive electrode over the dielectric storage material layer and an interface region comprising a plurality of interspersed field focusing features that are not photo-lithographically defined. The interface region is located between the first conductive electrode and the dielectric storage material layer or between the dielectric storage material layer and the second conductive electrode. | 2013-12-05 |
20130320285 | FIELD FOCUSING FEATURES IN A RERAM CELL - A resistive random access memory (ReRAM) cell comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes a second conductive electrode over the dielectric storage material layer and a layer of conductive nanoclusters ( | 2013-12-05 |
20130320286 | SWITCHING ELEMENTS AND DEVICES, MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A switching element includes: a first electrode; a second electrode; and a silicon-containing chalconitride layer between the first electrode and the second electrode. A switching device includes: a threshold switch material layer between a first electrode and a second electrode. The threshold switch material layer includes a cationic metal element, a chalcogen element, a silicon element and a nitrogen element. A memory device include: a plurality of first wirings arranged in parallel with each other; a plurality of second wirings crossing the first wirings, and arranged in parallel with each other; and a memory cell formed at each intersection of the plurality of first wirings and the plurality of second wirings. The memory cell includes a laminate having a silicon-containing chalconitride layer, an intermediate electrode, and a memory layer. | 2013-12-05 |
20130320287 | MEMORY CELL THAT EMPLOYS A SELECTIVELY GROWN REVERSIBLE RESISTANCE-SWITCHING ELEMENT AND METHODS OF FORMING THE SAME - A method of forming a memory cell is provided that includes forming a steering element above a substrate, forming a material layer on the substrate, patterning and etching the material layer, and oxidizing the patterned and etched material layer to form a reversible resistance-switching material. Numerous other aspects are provided. | 2013-12-05 |
20130320288 | Semiconductor Constructions and Memory Arrays - Some embodiments include semiconductor constructions having an electrically conductive interconnect with an upper surface, and having an electrically conductive structure over the interconnect. The structure includes a horizontal first portion along the upper surface and a non-horizontal second portion joined to the first portion at a corner. The second portion has an upper edge. The upper edge is offset relative to the upper surface of the interconnect so that the upper edge is not directly over said upper surface. Some embodiments include memory arrays. | 2013-12-05 |
20130320289 | RESISTANCE RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME - A resistance random access memory including a first electrode layer, a second electrode layer, and a stacked structure is provided. The stacked structure includes a HfZrON layer and a ZrON layer and is located between the first electrode layer and the second electrode layer. In addition, the disclosure further provides a method of fabricating a resistance random access memory. | 2013-12-05 |
20130320290 | PHASE CHANGE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A phase change memory device includes a phase change memory unit and a heat sink. The phase change memory unit includes a phase change material layer pattern, a lower electrode beneath the phase change material layer pattern configured to heat the phase change material layer pattern, and an upper electrode on the phase change material layer pattern. The heat sink configured to absorb heat from the phase change memory unit. The heat sink has a top surface lower than a top surface of the upper electrode and is spaced apart from the phase change memory unit. | 2013-12-05 |
20130320291 | SEMICONDUCTOR STRUCTURES AND MEMORY CELLS INCLUDING CONDUCTIVE MATERIAL AND METHODS OF FABRICATION - Methods of forming conductive elements, such as interconnects and electrodes, for semiconductor structures and memory cells. The methods include forming a first conductive material and a second conductive material comprising silver in a portion of at least one opening and performing a polishing process to fill the at least one opening with at least one of the first and second conductive materials. An annealing process may be performed to form a mixture or an alloy of the silver and the first conductive material. The methods enable formation of silver containing conductive elements having reduced dimensions (e.g., less than about 20 nm). The resulting conductive elements have a desirable resistivity. The methods may be used, for example, to form interconnects for electrically connecting active devices and to form electrodes for memory cells. A semiconductor structure and a memory cell including such a conductive structure are also disclosed. | 2013-12-05 |
20130320292 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device in accordance with an embodiment comprises first lines, second lines, and a memory cell array including memory cells. Each of the memory cells is disposed at each of intersections of the first lines and the second lines and is configured by a rectifier element and a variable resistor connected in series. The rectifier element comprises a first semiconductor region of a first conductivity type including an impurity of a first impurity concentration, and a second semiconductor region of a second conductivity type including an impurity of a second impurity concentration lower than the first impurity concentration. The first semiconductor region and the second semiconductor region are formed by silicon. A junction interface of the first semiconductor region and the second semiconductor region is a pseudo-heterojunction formed by two layers that have different band gap widths and are formed of the same material. | 2013-12-05 |
20130320293 | SEMICONDUCTOR LIGHT EMITTING DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME - A semiconductor light emitting device package includes a base unit including a main body having electrical insulation properties and at least one pair of first and second through electrodes formed in the main body in a thickness direction thereof and formed of a semiconductor material, and a light emitting structure disposed on the base unit and including first and second conductivity type semiconductor layers and an active layer interposed there between. The manufacturing process thereof may be simplified, whereby a reduction in manufacturing costs and time may be achieved. | 2013-12-05 |
20130320294 | COMMON-SUBSTRATE SEMICONDUCTOR DEVICES HAVING NANOWIRES OR SEMICONDUCTOR BODIES WITH DIFFERING MATERIAL ORIENTATION OR COMPOSITION - Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition and methods to form such common-substrate devices are described. For example, a semiconductor structure includes a first semiconductor device having a first nanowire or semiconductor body disposed above a crystalline substrate. The first nanowire or semiconductor body is composed of a semiconductor material having a first global crystal orientation. The semiconductor structure also includes a second semiconductor device having a second nanowire or semiconductor body disposed above the crystalline substrate. The second nanowire or semiconductor body is composed of a semiconductor material having a second global crystal orientation different from the first global orientation. The second nanowire or semiconductor body is isolated from the crystalline substrate by an isolation pedestal disposed between the second nanowire or semiconductor body and the crystalline substrate. | 2013-12-05 |
20130320295 | Vacuum Encapsulated, High Temperature Diamond Amplified Cathode Capsule and Method for Making Same - A vacuum encapsulated, hermetically sealed cathode capsule for generating an electron beam of secondary electrons, which generally includes a cathode element having a primary emission surface adapted to emit primary electrons, an annular insulating spacer, a diamond window element comprising a diamond material and having a secondary emission surface adapted to emit secondary electrons in response to primary electrons impinging on the diamond window element, a first high-temperature solder weld disposed between the diamond window element and the annular insulating spacer and a second high-temperature solder weld disposed between the annular insulating spacer and the cathode element. The cathode capsule is formed by a high temperature weld process under vacuum such that the first solder weld forms a hermetical seal between the diamond window element and the annular insulating spacer and the second solder weld forms a hermetical seal between the annular spacer and the cathode element whereby a vacuum encapsulated chamber is formed within the capsule. | 2013-12-05 |
20130320296 | LIGHT EMITTING DEVICE WITH QCSE-REVERSED AND QCSE-FREE MULTI QUANTUM WELL STRUCTURE - A light-emitting device comprises a semiconductor stacked structure, the semiconductor stacked structure comprising a p-type semiconductor layer, a n-type semiconductor layer and an multiple quantum well structure between the p-type semiconductor layer and the n-type semiconductor layer, wherein the multiple quantum well structure comprises a first multiple quantum well structure near the n-type semiconductor layer and a second multiple quantum well structure near the p-type semiconductor layer, wherein the first multiple quantum well structure has positive interface bound charge and the second multiple quantum well structure has zero interface bound charge. | 2013-12-05 |
20130320297 | LARGE EMISSION AREA LIGHT-EMITTING DEVICES - Light-emitting devices, and related components, systems and methods are disclosed. | 2013-12-05 |
20130320298 | SEMICONDUCTOR STRUCTURE HAVING NANOCRYSTALLINE CORE AND NANOCRYSTALLINE SHELL WITH INSULATOR COATING - A semiconductor structure comprises a nanocrystalline core of a first semiconductor material, a nanocrystalline shell of a second, different, semiconductor material at least partially surrounding the nanocrystalline core, and an insulator layer encapsulating the nanocrystalline shell and core, wherein an outer surface of the insulator layer is ligand-functionalized. | 2013-12-05 |
20130320299 | MONOLITHIC SEMICONDUCTOR LIGHT EMITTING DEVICES AND METHODS OF MAKING THE SAME - A monolithic semiconductor light emitting device is described. The device includes an n-type region, a p-type region, an active region of a multiple quantum well structure comprising a plurality of alternating barrier and active layers interposed between the n-type region and the p-type region. The device emits multiple single-wavelength spectral distributions of ultraviolet light each having a peak wavelength of between 210 nm and 400 nm and/or a broadband spectral output having a wavelength of between 210 nm and 400 nm. Methods of making the device and lamps comprising the device are also described. | 2013-12-05 |
20130320300 | LIGHT-EMITTING DEVICES - Light-emitting devices are provided, the light-emitting devices include a light-emitting structure layer having a first conductive layer, a light-emitting layer and a second conductive layer sequentially stacked on a first of a substrate, a plurality of seed layer patterns formed apart each other in the first conductive layer; and a plurality of first electrodes formed through the substrate, wherein each of the first electrodes extends from a second side of the substrate to each of the seed layer patterns. | 2013-12-05 |
20130320301 | LIGHT EMITTING DIODE HAVING PHOTONIC CRYSTAL STRUCTURE AND METHOD OF FABRICATING THE SAME - Disclosed are a light emitting diode (LED) having a photonic crystal structure and a method of fabricating the same. An LED comprises a support substrate, a lower semiconductor layer positioned on the support substrate, an upper semiconductor layer positioned over the lower semiconductor layer, an active region positioned between the lower and upper semiconductor layers, and a photonic crystal structure embedded in the lower semiconductor layer. The photonic crystal structure may prevent the loss of the light advancing toward the support substrate and improve the light extraction efficiency. | 2013-12-05 |
20130320302 | DEVICES COMPRISING GRAPHENE AND A CONDUCTIVE POLYMER AND RELATED SYSTEMS AND METHODS - The present invention generally relates to devices comprising graphene and a conductive polymer (e.g., poly(3,4-ethylenedioxythiophene) (PEDOT)), and related systems and methods. In some embodiments, the conductive polymer is formed by oxidative chemical vapor deposition. | 2013-12-05 |
20130320303 | Radiation Hardened Transistors Based on Graphene and Carbon Nanotubes - Graphene- and/or carbon nanotube-based radiation-hard transistor devices and techniques for the fabrication thereof are provided. In one aspect, a method of fabricating a radiation-hard transistor is provided. The method includes the following steps. A radiation-hard substrate is provided. A carbon-based material is formed on the substrate wherein a portion of the carbon-based material serves as a channel region of the transistor and other portions of the carbon-based material serve as source and drain regions of the transistor. Contacts are formed to the portions of the carbon-based material that serve as the source and drain regions of the transistor. A gate dielectric is deposited over the portion of the carbon-based material that serves as the channel region of the transistor. A top-gate contact is formed on the gate dielectric. | 2013-12-05 |
20130320304 | Carrier transport material and electronic device - A carrier transport material and an electronic device are provided. The carrier transport material includes a conjugated polyelectrolyte and a functional organic molecule. The conjugated polyelectrolyte includes a conjugated backbone and at least one alkyl side-chain, where a tail end of the alkyl side-chain has a first ionic group. The functional organic molecule includes a functional main-chain and a second ionic group located at a tail end of the functional organic molecule. Electrostatic attraction is formed between the first ionic group of the conjugated polyelectrolyte and the second ionic group of the functional organic molecule, and the carrier transport material presents an electrically neutral state. | 2013-12-05 |
20130320305 | Memory Device with a Double Helix Biopolymer Layer and Fabricating Method Thereof - The present invention relates to a write-once and read-many-times memory device and the fabricating method thereof. The structure of the memory device comprises: a substrate, a first electrode, a double helix biopolymer layer and a second electrode, and a plurality of metal nanoparticles are distributed in the double helix biopolymer layer. The first electrode is disposed on the substrate, the double helix biopolymer layer is disposed on the first electrode and the substrate, and the second electrode is disposed on the double helix biopolymer layer. When illuminating, the memory device will produce a low-conductivity state and high-conductivity state for writing data. Later, when a voltage is applied to the first electrode and the second electrode, the data will be read. | 2013-12-05 |
20130320306 | ORGANIC LIGHT-EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - An organic light-emitting display apparatus including an active layer and a first insulating layer on a substrate; a gate electrode on first insulating layer and including a first transparent conductive layer and a first metal layer, a second insulating layer on the gate electrode and including contact holes exposing source and drain areas of the active layer; source and drain electrodes including a second metal layer in the contact holes and on the second insulating layer, a pixel electrode on the first insulating layer and including the first transparent conductive layer, a reflection layer, and a second transparent conductive layer, and a pixel-defining layer on the source and drain electrodes and exposing the pixel electrode. The pixel-defining layer covers upper edges of the first transparent conductive layer of the pixel electrode. The reflection layer and the second transparent conductive layer contact sides of the pixel-defining layer. | 2013-12-05 |
20130320307 | Organic Light Emitting Device - The present invention relates to an organic light emitting device comprising a layered structure including a substrate, a bottom electrode and a top electrode, wherein the bottom electrode is closer to the substrate than the top electrode, the region between the bottom electrode and the top electrode defining an electronically active region, wherein the electronically active region comprises a scattering layer having a thickness of less than 50 nm; and an organic light emitting device additionally having at least one light emitting layer in the electronically active region, and this device further comprising a specific chemical compound outside of the electronically active region. | 2013-12-05 |
20130320308 | Organic Light Emitting Display Device and Method for Manufacturing the Same - The present invention has been made in an effort to provide an organic light emitting display device comprising: a substrate; and subpixels formed on the substrate, each of the subpixels comprising an emission layer consisting of a first host layer made of a first host material, a mixed layer made of the first host material, a dopant material, and a second material, and a second host layer made of the second host material. | 2013-12-05 |
20130320309 | ORGANIC IMAGE SENSOR WITH OPTICAL BLACK REGIONS - An organic image sensor includes a first organic photoelectric conversion pixel circuit on an active region of a substrate and a second organic photoelectric conversion pixel circuit on an optical black region of the substrate. The first organic photoelectric conversion pixel circuit includes a first organic photoelectric conversion element configured to generate charges responding to incident light and a first readout circuit configured to receive a first input signal including the charges generated in the first organic photoelectric conversion element. The second organic photoelectric conversion pixel circuit includes a second organic photoelectric conversion element and a second readout circuit configured to receive a second input signal generated irrespective of the incident light. | 2013-12-05 |
20130320310 | ORGANIC ELECTROLUMINESCENT ELEMENT, MATERIALS FOR ORGANIC ELECTROLUMINESCENT ELEMENT, AND LIGHT EMITTING DEVICE, DISPLAY DEVICE, OR ILLUMINATION DEVICE, EACH USING THE ELEMENT, AND COMPOUNDS USED IN THE ELEMENT - An organic electroluminescent element comprising: a substrate; a pair of electrodes including an anode and a cathode, disposed on the substrate; and at least one organic layer including a light emitting layer, disposed between the electrodes. At least one of the organic layer contains a compound of general formula (1): A-(B) | 2013-12-05 |
20130320311 | ELECTROLUMINESCENT ORGANIC TRANSISTOR - The present invention relates to a field effect electroluminescent ambipolar organic transistor in which there are two couples of control electrodes, a layer of ambipolar organic semiconductor in direct contact with the source and the drain electrode and two separate dielectric layers, and wherein said dielectric layers are each arranged between the ambipolar organic semiconductor layer and a couple of control electrodes. | 2013-12-05 |
20130320312 | ORGANIC ELECTROLUMINESCENT ELEMENT AND COMPOUND - [Disclosed is] a high-efficiency and durable organic electroluminescent element having a low drive voltage, being an organic electroluminescent element having on a substrate a pair of electrodes comprising an anode and a cathode and at least one organic layer including a light-emitting layer between these electrodes, with this organic electroluminescent element containing a specific compound having a dibenzothiophene or dibenzofuran structure and a phenanthrene structure in at least one layer out of the aforementioned at least one organic layer. [Also disclosed is] this specific compound. | 2013-12-05 |
20130320313 | ORGANIC ELECTRONIC DEVICES, COMPOSITIONS, AND METHODS - Organic electronic devices, compositions, and methods are disclosed that employ electrically conductive nanowires and conducting materials such as conjugated polymers such as sulfonated regioregular polythiophenes which provide high device performance such as good solar cell efficiency. Devices requiring transparent conductors that are resilient to physical stresses can be fabricated, with reduced corrosion problems. | 2013-12-05 |
20130320314 | ORGANIC LIGHT EMITTING DIODE DISPLAY - An OLED display includes: a substrate; a first signal line provided on the substrate; a second signal line crossing the first signal line; a thin film transistor connected to the first signal line and the second signal line; a pixel electrode connected to a drain electrode of the thin film transistor; an emission layer formed on the pixel electrode; a common electrode formed on the emission layer and formed of a reflective material; and a capacitor overlapping the pixel electrode. | 2013-12-05 |
20130320315 | ORGANIC LIGHT-EMITTING DEVICE - An organic light-emitting device (OLED) is disclosed. The OLED includes a light-emitting layer, a first electrode, and a second electrode, in which the light-emitting layer is interposed between the first and the second electrodes and includes a first molecular energy level of a host, and a second molecular energy level of a dopant. The first molecular energy level has a highest occupied molecular orbital (HOMO) which is substantially same as the HOMO of the second molecular energy level, or the first molecular energy level has a lowest unoccupied molecular orbital (LUMO) which is substantially the same as to the LUMO of the second molecular energy level. | 2013-12-05 |
20130320316 | FUSED POLYCYCLIC HETEROAROMATIC COMPOUND, ORGANIC THIN FILM INCLUDING COMPOUND AND ELECTRONIC DEVICE INCLUDING ORGANIC THIN FILM - A low-molecular-weight fused polycyclic heteroaromatic compound may have a compact planar structure in which seven or more rings are fused together, and thereby exhibits high charge mobility, and furthermore, enables the use of a deposition process or a room-temperature solution process when applied to devices, therefore realizing improved processibility. An organic thin film and electronic device may include the fused polycyclic heteroaromatic compound. | 2013-12-05 |
20130320317 | THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY - An embodiment of the invention provides a thin film transistor substrate includes: a substrate; and a plurality of transistors, wherein each of the transistors includes a gate electrode disposed on the substrate; a first diffusion barrier layer disposed on the substrate and covering an upper surface and a ring sidewall of the gate electrode; a gate insulating layer disposed on the first diffusion barrier layer; an active layer disposed on the gate insulating layer and over the gate electrode; a source electrode disposed on the substrate and electrically connected to the active layer; a drain electrode disposed on the substrate and electrically connected to the active layer; and a protective layer covering the source electrode and the drain electrode. | 2013-12-05 |
20130320318 | IRIDIUM COMPLEX WITH METHYL-D3 SUBSTITUTION - Novel organic compounds comprising ligands with deuterium substitution are provided. In particular, the compound is an iridium complex comprising methyl-d | 2013-12-05 |
20130320319 | ELECTROACTIVE MATERIALS - There is provided a compound having Formula I or Formula II: | 2013-12-05 |
20130320320 | ORGANIC LIGHT-EMITTING DISPLAY APPARATUS - An organic light-emitting display apparatus for selectively realizing circular polarization according to external light conditions, including a substrate; an organic light-emitting device on the substrate; a sealing member on the organic light-emitting device; a phase retardation layer on a surface of the substrate, the organic light-emitting device, or the sealing member; and a linear polarization layer on another surface of the substrate, the organic light-emitting device, or the sealing member, wherein the linear polarization layer is located to be closer to a source of external light than the phase retardation layer, and wherein the linear polarization layer comprises a photochromic material. | 2013-12-05 |
20130320321 | LIGHT EMITTING DEVICE AND ELECTRONIC APPLIANCE USING THE SAME - A light emitting device comprises a pair of electrodes and a mixed layer provided between the pair of electrodes. The mixed layer contains an organic compound which contains no nitrogen atoms, i.e., an organic compound which dose not have an arylamine skeleton, and a metal oxide. As the organic compound, an aromatic hydrocarbon having an anthracene skeleton is preferably used. As such an aromatic hydrocarbon, t-BuDNA, DPAnth, DPPA, DNA, DMNA, t-BuDBA, and the like are listed. As the metal oxide, molybdenum oxide, vanadium oxide, ruthenium oxide, rhenium oxide, and the like are preferably used. Further, the mixed layer preferably shows absorbance per 1 μm of 1 or less or does not show a distinct absorption peak in a spectrum of 450 to 650 nm when an absorption spectrum is measured. | 2013-12-05 |
20130320322 | TRANSPARENT CONDUCTIVE LAMINATE BODY AND ORGANIC THIN FILM DEVICE - A problem is to provide a transparent conductive laminate body that has a low surface resistivity and an organic thin film device using the laminate body, and the problem is solved by a transparent conductive laminate body having a transparent substrate having laminated directly on at least one surface thereof in this order a conductive metal pattern layer and a conductive organic layer having a conductive organic polymer compound, a material for forming the conductive metal pattern layer being at least one metal selected from gold, silver, copper and platinum, or an alloy having the metal, and an organic thin film device using the same. | 2013-12-05 |
20130320323 | METHOD FOR FABRICATING ORGANIC ELECTROLUMINESCENCE DEVICE AND ORGANIC ELECTROLUMINESCENCE DEVICE - A method for fabricating an organic electroluminescence device according to the present invention includes: preparing an organic electroluminescence device having a lower electrode, an organic layer including an emitting layer, an upper electrode, and a shorted part in which the lower electrode and the upper electrode are shorted; and irradiating a part surrounding the shorted part in which the lower electrode and the upper electrode are shorted to alter a material composing the lower electrode or the upper electrode and to form a space between the lower electrode and the upper electrode in a region corresponding to a region surrounded by an altered part. | 2013-12-05 |
20130320324 | ORGANIC EL DEVICE AND METHOD OF MANUFACTURING ORGANIC EL DEVICE - An organic EL device includes: a first substrate having electrical conductivity; an organic layer formed on the first substrate; a second substrate having translucency; and an electrode layer formed on the second substrate. The electrode layer on the first substrate and the organic layer on the second substrate contact each other. The organic layer is not formed in the peripheral portion of the second substrate. In the region where the organic layer is not formed, a portion of the electrode layer is provided to extend, and the first substrate is not present to face the extended electrode layer, and the portion of the electrode layer is exposed to form an electrode portion. Thus, the electrode portion can be formed by a simple procedure in which, for example, the first substrate is removed, and the organic EL device can be efficiently manufactured. | 2013-12-05 |
20130320325 | SURFACE LIGHT-EMITTING OBJECT - A surface light emitter according to an embodiment of the present invention, includes: a base material; a plurality of ribbon-shaped organic electroluminescent elements provided side by side on the base material; and a lenticular sheet that is attached to the base material and the ribbon-shaped organic electroluminescent elements through an adhesion layer, and that has a plurality of convex cylindrical lenses provided side by side. A direction in which the convex cylindrical lenses extend and a direction in which the ribbon-shaped organic electroluminescent elements extend are substantially parallel to each other. | 2013-12-05 |
20130320326 | INSULATING MATERIAL FORMING COMPOSITION FOR ELECTRONIC DEVICES, INSULATING MATERIAL FOR ELECTRONIC DEVICES, ELECTRONIC DEVICES AND THIN FILM TRANSISTOR - A composition for forming an insulating material used in electronic devices which includes, as a polymerizable component, a monomer comprising two or more (meth)acrylic moieties and a polycyclic alicyclic structure. | 2013-12-05 |
20130320327 | THIN FILM TRANSISTOR AND METHOD OF FORMING THE SAME - A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode. | 2013-12-05 |
20130320328 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF - The present invention relates to a thin film transistor, a thin film transistor array panel, and a manufacturing method thereof. A thin film transistor according to an exemplary embodiments of the present invention includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a channel region overlapping the gate electrode, the gate insulating layer interposed between the channel region and the gate electrode; and a source region and a drain region, facing each other with respect to the channel region, positioned in the same layer as the channel region, and connected to the channel region, wherein the channel region, the source region, and the drain region comprise an oxide semiconductor, and wherein a carrier concentration of the source region and the drain region is larger than a carrier concentration of the channel region. | 2013-12-05 |
20130320329 | THIN FILM TRANSISTOR STRUCTURE AND ARRAY SUBSTRATE USING THE SAME - A thin film transistor structure is provided. The thin film transistor structure includes a first transistor having a first active layer, a second transistor having a second active layer, a first protection layer contacting the first active layer, and a second protection layer contacting the second active layer. The oxygen contents of the first and the second protection layers are controlled to affect the oxygen vacancy number of the first and the second active layers to satisfy the various electronic requirements of the first and the second transistors. | 2013-12-05 |
20130320330 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - In order to form a structure in which an oxide semiconductor layer through which a carrier flows is not in contact with a gate insulating film, a buried channel structure in which the oxide semiconductor layer through which a carrier flows is away from the gate insulating film containing silicon is provided. Specifically, a buffer layer is provided between the gate insulating film and the oxide semiconductor layer. Both the oxide semiconductor layer and the buffer layer are formed using materials containing indium and another metal element. The composition of indium with respect to gallium contained in the oxide semiconductor layer is higher than the composition of indium with respect to gallium contained in the buffer layer. The buffer layer has a smaller thickness than the oxide semiconductor layer. | 2013-12-05 |
20130320331 | LIGHT-EMITTING DEVICE - To provide a novel light-emitting device that can be manufactured with high productivity. In a light-emitting device in which a light-emitting diode (LED) layer is provided over a substrate, a metal oxide semiconductor (c-axis aligned crystalline oxide semiconductor (CAAC-OS)) substrate including a crystal part having a c-axis which is substantially perpendicular to a surface of the substrate is used as the substrate. The substrate may have either a single-layer structure of a CAAC-OS substrate or a structure in which a thin CAAC-OS substrate is stacked over a base substrate. | 2013-12-05 |
20130320332 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region of the oxide semiconductor film is increased. Note that an oxide semiconductor film is subjected to a process for reducing the resistance to have low resistance. The process for reducing the resistance of the oxide semiconductor film may be a laser process or heat treatment at a temperature higher than or equal to 450° C. and lower than or equal to 740° C., for example. A process for increasing the resistance of the channel region of the oxide semiconductor film having low resistance may be performed by plasma oxidation or implantation of oxygen ions, for example. | 2013-12-05 |
20130320333 | SEMICONDUCTOR DEVICE - In a display portion of a liquid crystal display device, the dead space corresponding to a unit pixel is reduced while the aperture ratio of the unit pixel is increased. One amplifier circuit portion is shared by a plurality of unit pixels, so that the area of the amplifier circuit portion corresponding to the unit pixel is reduced and the aperture ratio of the unit pixel is increased. In addition, when the amplifier circuit portion is shared by a larger number of unit pixels, a photosensor circuit corresponding to the unit pixel can be prevented from increasing in area even with an increase in photosensitivity. Furthermore, an increase in the aperture ratio of the unit pixel results in a reduction in the power consumption of a backlight in a liquid crystal display device. | 2013-12-05 |
20130320334 | SEMICONDUCTOR DEVICE - A highly reliable semiconductor device including an oxide semiconductor is provided by preventing a change in its electrical characteristics. A semiconductor device which includes a first oxide semiconductor layer which is in contact with a source electrode layer and a drain electrode layer and a second oxide semiconductor layer which serves as a main current path (channel) of a transistor is provided. The first oxide semiconductor layer serves as a buffer layer for preventing a constituent element of the source and drain electrode layers from diffusing into the channel. By providing the first oxide semiconductor layer, it is possible to prevent diffusion of the constituent element into an interface between the first oxide semiconductor layer and the second oxide semiconductor layer and into the second oxide semiconductor layer. | 2013-12-05 |
20130320335 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device is provided which is used as a power device for a high-power application, includes an oxide semiconductor, and has high withstand voltage and high reliability. A semiconductor device for a high-power application with high productivity is also provided. In a crystal part included in an oxide semiconductor film having a crystalline structure, a c-axis is aligned in a direction parallel to a normal vector of a surface where the oxide semiconductor film is formed or a normal vector of a surface of the oxide semiconductor film, triangular or hexagonal atomic arrangement which is seen from the direction perpendicular to the a-b plane is formed, and metal atoms are arranged in a layered manner or metal atoms and oxygen atoms are arranged in a layered manner when seen from the direction perpendicular to the c-axis. | 2013-12-05 |
20130320336 | Oxide Semiconductor Sputtering Target, Method Of Manufacturing Thin-Film Transistors Using The Same, And Thin Film Transistor Manufactured Using The Same - An oxide semiconductor sputtering target which is used for depositing a thin film having high electron mobility and high operational reliability, a method of manufacturing thin-film transistors (TFTs) using the same, and a TFT manufactured using the same. The oxide semiconductor sputtering target is used in a sputtering process for depositing an active layer on a TFT. The oxide semiconductor sputtering target is made of a material based on a composition including indium (In), tin (Sn), gallium (Ga) and oxygen (O). The method includes the step of depositing an active layer using the above-described oxide semiconductor sputtering target. The thin-film transistor may be used in a display device, such as a liquid crystal display (LCD) or an organic light-emitting display (OLED). | 2013-12-05 |
20130320337 | SEMICONDUCTOR DEVICE - A highly reliable semiconductor device that includes a transistor including an oxide semiconductor, which can display a high-definition image and can be manufactured with a high yield. The semiconductor device includes a pixel portion including a plurality of pixels, a gate signal line driver circuit portion, and a source signal line driver circuit portion including a first circuit that controls timing of sampling video signals and a second circuit that samples the video signals in accordance with the timing and then inputs the sampled video signals to the pixels. The second circuit includes a plurality of transistors in each of which an oxide semiconductor stacked layer is used as a channel formation region, the first circuit and the second circuit are electrically connected to each other by a wiring, and the wiring is electrically connected to gates of at least two transistors of the plurality of transistors. | 2013-12-05 |
20130320338 | METHOD OF MANUFACTURING THIN-FILM TRANSISTOR, THIN-FILM TRANSISTOR, DISPLAY APPARATUS, SENSOR, AND DIGITAL X-RAY IMAGE-CAPTURING APPARATUS - A method of fabricating a thin-film transistor, the method including: film-forming an active layer, that contains as a main component thereof an oxide semiconductor structured by O and at least two elements among In, Ga and Zn, in a film formation chamber into which at least oxygen is introduced, and b) heat treating the active layer at less than 300° C. in a dry atmosphere, wherein the film-forming a) and the heat treating are carried out such that, given that an oxygen partial pressure with respect to an entire pressure of an atmosphere within the film formation chamber in the film-forming is PO | 2013-12-05 |
20130320339 | THIN-FILM SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A thin-film semiconductor device includes a gate electrode formed above a substrate; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed above the gate insulating film and having a channel region; a channel protective layer formed above the semiconductor layer and containing an organic material which includes silicon, oxygen, and carbon; an interfacial layer which is formed in contact with the channel protective layer between the semiconductor layer and the channel protective layer, and which includes carbon as a major component, the carbon originating from the organic material; and a source electrode and a drain electrode which are electrically connected to the semiconductor layer. | 2013-12-05 |
20130320340 | CIRCUIT TECHNIQUE TO ELECTRICALLY CHARACTERIZE BLOCK MASK SHIFTS - A physical test integrated circuit has a plurality of repeating circuit portions corresponding to an integrated circuit design. A first of the portions is fabricated with a nominal block mask location, and additional ones of the portions are deliberately fabricated with predetermined progressive increased offset of the block mask location from the nominal block mask location. For each of the portions, the difference in threshold voltage between a first field effect transistor and a second field effect transistor is determined. The predetermined progressive increased offset of the block mask location is in a direction from the first field effect transistor to the second field effect transistor. The block mask overlay tolerance is determined at a value of the progressive increased offset corresponding to an inflection of the difference in threshold voltage from a zero difference. A method for on-chip monitoring, and corresponding circuits, are also disclosed. | 2013-12-05 |
20130320341 | Three dimensional memory structure - A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 microns in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques. | 2013-12-05 |
20130320342 | ULTRA-LARGE GRAIN POLYCRYSTALLINE SEMICONDUCTORS THROUGH TOP-DOWN ALUMINUM INDUCED CRYSTALLIZATION (TAIC) - A seed layer structure is annealed. The seed layer structure comprises a crystallization catalyst material on a seed semiconductor over a substrate. The seed semiconductor comprises an amorphous portion. Annealing of the seed layer structure converts the amorphous portion into a crystalline portion. The crystalline portion is connected to the substrate by subsurface crystal legs. The crystallization catalyst material formed underneath the crystalline portion by annealing is removed from the underneath of the crystalline portion. | 2013-12-05 |
20130320343 | STRUCTURE FOR CREATING OHMIC CONTACT IN SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURE - A semiconductor-to-metal interface with ohmic contact is provided. The interface includes a semiconductor material, a metal layer, and a silicon carbide layer disposed between the semiconductor material and the metal layer. The silicon carbide layer causes the formation of a semiconductor-to-metal interface with ohmic contact. Applications include forming a photovoltaic device with ohmic contact by disposing a layer of silicon carbide over the photovoltaic material before depositing a bottom electrode layer of metal to complete the bottom of a photovoltaic cell. | 2013-12-05 |
20130320344 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel includes: a semiconductor layer disposed on an insulation substrate; a gate electrode overlapping the semiconductor layer; a source electrode and a drain electrode overlapping the semiconductor layer; a first barrier layer disposed between the source electrode and the semiconductor layer; and a second barrier layer disposed between the drain electrode and the semiconductor layer, wherein the first barrier layer and the second barrier layer include nickel-chromium (NiCr). | 2013-12-05 |
20130320345 | METHOD OF FORMING AN ACTIVE PATTERN, DISPLAY SUBSTRATE FORMED BY THE SAME, AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE - In a method of forming an active pattern, a gate metal layer is formed on a base substrate. The gate metal layer is patterned to form a gate line, and a gate pattern spaced apart from the gate line. A gate insulation layer is formed on the base substrate including the gate line and the gate pattern thereon, to form a first protruded boundary surface corresponding to an area including the gate pattern. An amorphous semiconductor layer is formed on the base substrate including the gate insulation layer thereon, to form a second protruded boundary surface corresponding to the first protruded boundary surface. The amorphous semiconductor layer is crystallized by illuminating a laser to the amorphous semiconductor layer on the second protruded boundary surface. | 2013-12-05 |
20130320346 | ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - An array substrate for a liquid crystal display (LCD) and manufacturing method thereof are provided. The array substrate for a liquid crystal display (LCD) includes: a substrate, including: a gate electrode, a pixel electrode, and a common electrode, a gate pad formed on the substrate, and connected to the gate electrode, a gate insulating layer formed on the gate pad, a first protective layer formed on the gate insulating layer, a second protective layer formed on the first protective layer, a first metal layer formed on the second protective layer, and connected to the gate pad through a first contact hole which exposes the gate pad, a third protective layer formed on the first metal layer and the second protective layer, and a second metal layer formed on the third protective layer, and connected to the first metal layer through a second contact hole which exposes the first metal layer. | 2013-12-05 |
20130320347 | THIN FILM TRANSISTOR ARRAY PANEL AND A METHOD FOR MANUFACTURING THE SAME - A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors. | 2013-12-05 |
20130320348 | Analog Memory Cell Circuit for the LTPS TFT-LCD - The present invention provides an analog memory cell circuit for the LTPS TFT-LCD. The circuit comprises the first transistor, second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the capacitor. It comprises a plurality of operation period, wherein the transistors are controlled in accordance with the first scan signal, the second scan signal, and the third scan signal, the output signal is output in the opposite to the output jack. | 2013-12-05 |
20130320349 | IN-SITU BARRIER OXIDATION TECHNIQUES AND CONFIGURATIONS - Embodiments of the present disclosure describe apparatuses, methods, and systems of an integrated circuit (IC) device. The IC device may include a buffer layer disposed on a substrate, the buffer layer including gallium (Ga) and nitrogen (N), a barrier layer disposed on the buffer layer, the barrier layer including aluminum (Al) and nitrogen (N), wherein the barrier layer includes an oxidized portion of the barrier layer, a gate dielectric disposed on the oxidized portion of the barrier layer, and a gate electrode disposed on the gate dielectric, wherein the oxidized portion of the barrier layer is disposed in a gate region between the gate electrode and the buffer layer. | 2013-12-05 |
20130320350 | Compound Semiconductor Transistor with Self Aligned Gate - A transistor device includes a compound semiconductor body having a first surface and a two-dimensional charge carrier gas disposed below the first surface in the compound semiconductor body. The transistor device further includes a source in contact with the two-dimensional charge carrier gas and a drain spaced apart from the source and in contact with the two-dimensional charge carrier gas. A first passivation layer is in contact with the first surface of the compound semiconductor body, and a second passivation layer is disposed on the first passivation layer. The second passivation layer has a different etch rate selectivity than the first passivation layer. A gate extends through the second passivation layer into the first passivation layer. | 2013-12-05 |
20130320351 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor light emitting device is provided and includes a protective element including a first lower conductivity-type semiconductor layer and a second lower conductivity-type semiconductor layer. First and second lower electrodes are connected to the first lower conductivity-type semiconductor layer and the second lower conductivity-type semiconductor layer, respectively. A light emitting structure includes a first upper conductivity-type semiconductor layer, an active layer, and a second upper conductivity-type semiconductor layer sequentially formed on the protective element. First and second upper electrodes are connected to the first upper conductivity-type semiconductor layer and the second upper conductivity-type semiconductor layer, respectively. | 2013-12-05 |
20130320352 | Ohmic Contact to Semiconductor Layer - A perforating ohmic contact to a semiconductor layer in a semiconductor structure is provided. The perforating ohmic contact can include a set of perforating elements, which can include a set of metal protrusions laterally penetrating the semiconductor layer(s). The perforating elements can be separated from one another by a characteristic length scale selected based on a sheet resistance of the semiconductor layer and a contact resistance per unit length of a metal of the perforating ohmic contact contacting the semiconductor layer. The structure can be annealed using a set of conditions configured to ensure formation of the set of metal protrusions. | 2013-12-05 |
20130320353 | METHOD OF FORMING A GROUP III-NITRIDE CRYSTALLINE FILM ON A PATTERNED SUBSTRATE BY HYDRIDE VAPOR PHASE EPITAXY (HVPE) - A method of depositing a high quality low defect single crystalline Group III-Nitride film. A patterned substrate having a plurality of features with inclined sidewalls separated by spaces is provided. A Group III-Nitride film is deposited by a hydride vapor phase epitaxy (HVPE) process over the patterned substrate. The HVPE deposition process forms a Group III-Nitride film having a first crystal orientation in the spaces between features and a second different crystal orientation on the inclined sidewalls. The first crystal orientation in the spaces subsequently overgrows the second crystal orientation on the sidewalls and in the process turns over and terminates treading dislocations formed in the first crystal orientation. | 2013-12-05 |
20130320354 | Semiconductor Device Including a Normally-Off Transistor and Transistor Cells of a Normally-On GaN HEMT - A semiconductor device includes a first semiconductor die including a normally-off transistor and a second semiconductor die including a plurality of transistor cells of a normally-on GaN HEMT. One of a source terminal and a drain terminal of the normally-off transistor is electrically coupled to a gate terminal of the normally-on GaN HEMT, and the other one of the source terminal and the drain terminal of the normally-off transistor is electrically coupled to one of a source terminal and a drain terminal of the normally-on GaN HEMT. The second semiconductor die further includes a gate resistor electrically coupled between the gate terminal of the normally-off transistor and respective gates of the plurality of transistor cells, and a voltage clamping element electrically coupled between the gate terminal and one of the source terminal and the drain terminal of the normally-on GaN HEMT. | 2013-12-05 |
20130320355 | Substrate Structure, Method of Forming the Substrate Structure and Chip Comprising the Substrate Structure - A groove structure formed on a surface of a substrate. The groove structure includes a lateral epitaxial pattern in a cross section perpendicular to the surface, which has: a first edge inclined to the surface; a second edge adjacent to first edge and parallel to the surface; a third edge parallel to the first edge, having a projection on the surface covering the second edge; and a fourth edge adjacent to the third edge. A first intersection between the second edge and the third edge on the second edge and an injection of a second intersection between the third edge and the fourth edge on the second edge are located on two sides of a third intersection between the first edge and the second edge, or the injection of the second intersection between the third edge and the fourth edge on the second edge coincides with the third intersection. | 2013-12-05 |
20130320356 | SEMICONDUCTOR STRUCTURE HAVING A NITRIDE ACTIVE LAYER ON A DOPED SILICON CARBIDE HEAT SPREADER - A semiconductor structure having: a doped silicon carbide heat spreader; a semi-insulating silicon carbide layer disposed over the doped silicon carbide heat spreader; and a nitride (such as GaN, Indium nitride, Aluminum nitride) semiconductor layer disposed on the semi-insulating silicon carbide layer. | 2013-12-05 |
20130320357 | EPITAXIAL SILICON CARBIDE SINGLE CRYSTAL SUBSTRATE AND METHOD FOR PRODUCING SAME - Provided are an epitaxial silicon carbide single crystal substrate having a high-quality silicon carbide single crystal thin film with less stacking faults on a silicon carbide single crystal substrate and a production method therefor. The epitaxial silicon carbide single crystal substrate is produced by growing a silicon carbide epitaxial layer on a silicon carbide single crystal substrate having an off-angle of 4° or less so that the number of stacking faults emitting light at wavelengths ranging from 400 to 600 nm by photoluminescence on the substrate is less than 10/cm | 2013-12-05 |
20130320358 | SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME - A semiconductor device is manufactured by forming at least one epitaxial structure over a substrate. A portion of the substrate is cut and lifted to expose a partial surface of the epitaxial structure. A first electrode is then formed on the exposed partial surface to result in a vertical semiconductor device. | 2013-12-05 |
20130320359 | HETEROGENEOUS STACK STRUCTURES WITH OPTICAL TO ELECTRICAL TIMING REFERENCE DISTRIBUTION - A heterogeneous stack structure is provided which includes one or more optical signal-based chips and multiple electrical signal-based chips. The optical chip(s) and the electrical chip(s) are different layers of the stack structure, and the optical chip(s) includes optical signal paths extending at least partially laterally within the optical chip(s). Electrical signal paths are provided extending between and coupling the optical chip(s) and the electrical chips. The electrical signal paths include one or more through substrate vias (TSVs) through one or more electrical chips of the multiple electrical chips in the stack structure. In one embodiment, the optical chip(s) is configured laterally to locally distribute, via one or more paths of the electrical signal paths, a timing reference signal for one or more electrical chips in the stack. Conversion between optical and electrical signals within the stack structure occurs within the optical chip(s). | 2013-12-05 |
20130320360 | DIFFUSION TYPE LED APPARATUS UTILIZING DYE-SENSITIZED SOLAR CELLS - An LED luminaire has a dye-sensitized solar cell for converting light emitted from a light source to electric energy and uses the converted electric energy. Since the dye-sensitized solar cell plays a role of a diffusion plate, the LED luminaire may diffuse light and convert wasted light into power. Further, since energy consumption and green-house gas generation decrease, it is possible to provide an environment-friendly LED luminaire Moreover, if the power generated by the dye-sensitized solar cell is used for cooling the LED luminaire, it is possible to enhance heat dissipation efficiency of the LED luminaire | 2013-12-05 |
20130320361 | MULTICHIP PACKAGE STRUCTURE FOR GENERATING A SYMMETRICAL AND UNIFORM LIGHT-BLENDING SOURCE - A multichip package structure for generating a symmetrical and uniform light-blending source includes a substrate unit, a light-emitting unit and a package unit. The substrate unit includes a substrate body and at least one bridging conductive layer disposed on the top surface of the substrate body. The light-emitting unit includes at least two first light-emitting elements diagonally disposed on the substrate body and electrically connected to the substrate body and at least two second light-emitting elements diagonally disposed on the substrate body and electrically connected to the substrate body. The package unit includes at least two first light-transmitting package bodies respectively covering the at least two first light-emitting elements and at least two second light-transmitting package bodies respectively covering the at least two second light-emitting elements. | 2013-12-05 |
20130320362 | HIGH VOLTAGE LIGHT EMITTING DIODE PACKAGE AND METHOD FOR MANUFACUTING THE SAME - A high voltage LED package includes a substrate and LED chips formed on a top surface of the substrate. A periphery of each LED chip is roughened. The LED chips are electrically connected in series. | 2013-12-05 |
20130320363 | SAPPHIRE SUBSTRATE CONFIGURED TO FORM LIGHT EMITTING DIODE CHIP PROVIDING LIGHT IN MULTI-DIRECTIONS, LIGHT EMITTING DIODE CHIP, AND ILLUMINATION DEVICE - A sapphire substrate configured to form a light emitting diode (LED) chip providing light in multi-directions, a LED chip and an illumination device are provided in the present invention. The sapphire substrate includes a growth surface and a second main surface opposite to each other. A thickness of the sapphire substrate is thicker than or equal to 200 micrometers. The LED chip includes the sapphire substrate and at least one LED structure. The LED structure is disposed on the growth surface and forms a first main surface where light emitted from with a part of the growth surface without the LED structures. At least a part of light beams emitted from the LED structure pass through the sapphire substrate and emerge from the second main surface. The illumination device includes at least one LED chip and a supporting base. The LED chip is disposed on the supporting base. | 2013-12-05 |
20130320364 | DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - A display device in which light leakage in a monitor element portion is prevented without increasing the number of steps and cost is provided. The display device includes a monitor element for suppressing influence on a light-emitting element due to temperature change and change over time and a TFT for driving the monitor element, in which the TFT for driving the monitor element is provided so as not to overlap the monitor element. Furthermore, the display device includes a first light shielding film and a second light shielding film, in which the first light shielding film is provided so as to overlap a first electrode of the monitor element and the second light shielding film is electrically connect to the first light shielding film through a contact hole formed in an interlayer insulating film. The contact hole is formed so as to surround the outer edge of the first electrode of the monitor element. | 2013-12-05 |
20130320365 | LIGHTING DEVICE - A lighting device includes a heat sink, through which air can flow transversely to its longitudinal extension and a plurality of semiconductor light sources, in particular light-emitting diodes, arranged on the heat sink, wherein at least two of the semiconductor light sources are aligned in different directions. | 2013-12-05 |
20130320366 | LIGHT SOURCE AND LIGHT-SOURCE BAND - LED light source having at least one light-emitting component. The light-emitting component is at least partly protected with a transparent protective material, which contains aliphatic thermoplastic polyurethane (TPU). A light-source band also includes at least one light-emitting component. | 2013-12-05 |
20130320367 | ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - An organic light emitting display device including a plurality of sub pixels, each of the sub pixels including an emissive layer between a pixel electrode and a counter electrode; and a partition wall defining regions of the plurality of sub pixels, wherein the partition wall is not located between at least one pair of adjacent sub pixels of the plurality of sub pixels. | 2013-12-05 |
20130320368 | Light-Emitting Element, Light-Emitting Device, Display Device, Electronic Device, and Lighting Device - Disclosed is a light-emitting element comprising a plurality of light-emitting units which are separated from one another by a charge generation layer. The light-emitting units each have a light-emitting layer which is featured by a stack of two layers. Each of the two layers includes a host material and a phosphorescent material where the phosphorescent material in one of the two layers is blue emissive while the phosphorescent material in the other of the two layers exhibits a maximum emission peak in a range from 500 nm to 700 nm. The phosphorescent material exhibiting a maximum emission peak in a range from 500 nm to 700 nm may be different from light-emitting unit to light-emitting unit. An additive may be included in at least one of the two layers so that an exciplex is formed with the host material. | 2013-12-05 |
20130320369 | OPTOELECTRONIC SEMICONDUCTOR DEVICE - An optoelectronic semiconductor device includes a first light source that emits green, white or white-green light and includes a semiconductor chip that emits in the blue spectral range, and a first conversion element attached directly to the semiconductor chip, a second light source that emits red light, having a semiconductor chip, that emits in a blue spectral range, and having a second conversion element attached directly to the semiconductor chip, and/or having a semiconductor chip that emits in a red spectral range, a third light source that emits blue light and has a semiconductor chip emitting in the blue spectral range, and a filler body having a matrix material into which a conversion agent is embedded, wherein the filler body is disposed downstream of the light sources collectively. | 2013-12-05 |
20130320370 | SOLID STATE TRANSDUCER DIES HAVING REFLECTIVE FEATURES OVER CONTACTS AND ASSOCIATED SYSTEMS AND METHODS - Systems and methods for improved light emitting efficiency of a solid state transducer (SST), for example light emitting diodes (LED), are disclosed. One embodiment of an SST die in accordance with the technology includes a reflective material disposed over electrical connectors on a front side of the die. The reflective material has a higher reflectivity than a base material of the connectors such that light traveling toward the connectors reflects back out of the device. | 2013-12-05 |
20130320371 | DEVICE MODULE - According to one embodiment, a device module includes a mounting substrate, a device, and a bonding agent. The mounting substrate has a mounting surface and a plurality of pads. The device includes a plurality of electrode surfaces arranged in a first direction. The pad has a first width portion and a second width portion. The first width portion has a width in a second direction orthogonal to the first direction. The second width portion is wider than the first width portion and the electrode surfaces in the second direction. One end portion in the first direction of the electrode surface is bonded to the pad on the first width portion via the bonding agent. The other end portion in the first direction of the electrode surface is bonded to the pad on the second width portion via the bonding agent. | 2013-12-05 |