48th week of 2011 patent applcation highlights part 21 |
Patent application number | Title | Published |
20110291641 | VOLTAGE DETECTION AND MEASUREMENT CIRCUIT - A voltage detection and measurement circuit is provided. The circuit includes a first Zener diode operatively coupled to an AC power input line and a second Zener diode operatively coupled to a reference voltage line. The first and second Zener diodes are configured to pass portions of input AC voltage from the AC power input line to generate output waveforms. The circuit also includes an optocoupler coupled to the first and second Zener diodes to receive the output waveforms from the first and second Zener diodes to detect the input AC voltage and a processing circuit configured to receive the output waveforms from the optocoupler and to determine a magnitude of the input AC voltage based upon the output waveforms | 2011-12-01 |
20110291642 | POWER MEASUREMENT CIRCUIT - A system for power measurement in an electronic device includes a sensing unit, an analog-to-digital converter (ADC) and a controller. The sensing unit senses voltage across a power source and modulates a carrier signal based on the sensed voltage. The ADC converts a combination of the modulated carrier signal and audio signals received by the electronic device to generate a digitized combined signal and provides the digitized combined signal to the controller. The controller separates digitized modulated carrier signal and digitized audio signals. The digitized modulated carrier signal is demodulated to generate an output signal that provides a measure of the power consumed by the electronic device. | 2011-12-01 |
20110291643 | MODULAR NANO AND MICROSCALE SENSORS - Exemplary embodiments of the present invention disclose a modular testing assay. According to various embodiments of the present invention, the sensor arrays, or microplates, are removably attached to a substrate. In some embodiments, the electrical connection between the sensors of the sensor array and the substrate provide for the removal of one sensor array or microplate with another or similar sensor array. The sensor arrays can be aligned using various types of alignment devices or the substrate can be configured to allow various alignments and spatial orientations of one or more sensor arrays. | 2011-12-01 |
20110291644 | PHYSICAL QUANTITY SENSOR AND ELECTRONIC APPARATUS - A physical quantity sensor includes a first rocking body and a second rocking body. Each of the rocking bodies is supported on a substrate by a first supporting portion and a second supporting portion. The first rocking body is partitioned into a first region and a second region by a first axis (supporting axis) when viewed in plane, and the second rocking body is partitioned into a third region and a fourth region by a second axis (supporting axis) when viewed in plane. The mass of the second region is larger than the mass of the first region, and the mass of the third region is larger than the mass of the fourth region. An arranged direction of the first region and the second region is the same as an arranged direction of the third region and the fourth region. | 2011-12-01 |
20110291645 | MEASURING APPARATUS FOR THE DETECTION OF A RELATIVE MOVEMENT - A measuring apparatus for detecting a relative movement between at least one magnetic field sensor array integrated into a semiconductor chip and a transmitter for the sensor array is provided. The transmitter and the sensor array are exposed to the magnetic flux of a magnet. The transmitter has teeth that can be moved past the sensor array during the relative movement, or the transmitter has magnet poles that can be moved past the sensor array during the relative movement. The magnetic field sensor includes a differential magnetic field sensor which comprises a first measuring plate and a second measuring plate that are offset in relation to one another in a direction of the relative movement. The magnetic field sensor also includes a sensor element which is designed to measure the absolute magnetic field and comprises a third measuring plate that is arranged between the first measuring plate and the second measuring plate in the direction of the relative movement. | 2011-12-01 |
20110291646 | ORIGIN POSITION SIGNAL DETECTOR - An origin position signal detector comprising: a rotary or linear scale ( | 2011-12-01 |
20110291647 | EXTERNAL-COUPLED ELECTRONIC ANGLE MEASUREMENT APPARATUS - The present invention proposes an external-coupled electronic angle measurement apparatus including a housing, a display element, an angle detection system and a coupling portion. The housing is movable through the coupling portion to fasten the external-coupled electronic angle measurement apparatus to a desired location of different hand tools to accurately measure turning angles of a screw driven by the hand tool through the angle detection system and display the result on the display element. | 2011-12-01 |
20110291648 | DEVICE AND METHOD FOR DETERMINING THE SPEED OF A WHEELED TERRESTRIAL VEHICLE FROM MEASUREMENTS OF A MAGNETIC FIELD - A device for measuring the speed of movement of a wheeled terrestrial vehicle is characterised in that it comprises a magnetometer intended to take measurements of a magnetic field and positioned so as to be sensitive to the magnetic field variations caused by the rotation of at least one partially metallic wheel, as it is, of the vehicle and capable of delivering a corresponding signal, and means for processing said signal that are capable of establishing a frequency spectrum thereof, of determining, from said frequency spectrum, a frequency of rotation of said wheel, and of deducing therefrom, on the basis of information representative of the radius of the wheel, the speed of movement of the vehicle. | 2011-12-01 |
20110291649 | MAGNETO-IMPEDANCE SENSOR ELEMENT AND METHOD FOR MANUFACTURING THE SAME - A magneto-impedance sensor element is formed in a planar type structure in which an amorphous wire is incorporated in a substrate. The magneto-impedance sensor element includes a nonmagnetic substrate, an amorphous wire arranged in an aligning direction of a planar pattern that forms a detecting coil, a spiral detecting coil formed of a planar pattern and a cubic pattern on an outer periphery of the amorphous wire, a planar insulating portion that insulates the planar pattern from the amorphous wire, a wire fixing portion to fix the amorphous wire on an upper surface of the planar insulating portion, and a cubic insulating portion that insulates the cubic pattern from the amorphous wire. | 2011-12-01 |
20110291650 | SEMICONDUCTOR CHIP AND METHOD FOR GENERATING PULSE EDGES, ASSIGNED SYNCHRONOUSLY TO THE MOVEMENT OF A MECHANICAL PART - In a method for generating pulse edges, assigned synchronously to the movement of a mechanical part, a magnetic field is generated. At least two measuring signals phase-shifted to one another for the magnetic field are detected. The magnetic field is changed as a function of the movement of the mechanical part in such a way that the measuring signals are modulated. A first measuring signal is compared with at least one first reference value. A second measuring signal is compared with at least one second reference value and/or the value of the first measuring signal is compared with the value of the second measuring signal. When at least one of these comparisons produces an agreement or the result of the relevant comparison changes its sign, a pulse edge is generated. | 2011-12-01 |
20110291651 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - A magnetic resonance imaging apparatus according to an embodiment includes an executing unit, a calculating unit, and a correcting unit. The executing unit executes a pre-scan while using a pulse sequence by which a plurality of echo signals are collected. The calculating unit calculates a phase difference between at least two echo signals of which a fluctuation of phase differences is stable and that are selected out of the plurality of echo signals collected during the pre-scan and are selected while excluding echo signals collected during an initial time period. The correcting unit that corrects a pulse sequence used for a main scan, based on the phase difference calculated by the calculating unit. | 2011-12-01 |
20110291652 | Membrane proteins, mechanisms of action and uses thereof - The invention relates to the atomistic functional understanding of the M2 protein from the influenza A virus. This acid-activated selective proton channel has been the subject of numerous conductance, structural, and computational studies. Previously, little was known at the atomic level about the heart of the functional mechanism of this tetrameric protein, a tetrad of HxxxW residues. The structure of the M2 conductance domain in a lipid bilayer is disclosed and displays the defining features of the native protein that have not been attainable from structures solubilized by detergents. A detailed mechanism for acid activation and proton conductance, involving a strong hydrogen bond between two adjacent histidines and specific interactions with the tryptophan gate, is provided and elucidates many observations on the M2 proton conductance. | 2011-12-01 |
20110291653 | MAGNETIC RESONANCE IMAGING APPARATUS - A magnetic resonance imaging apparatus according to an embodiment includes an executing unit, a calculating unit, and a correcting unit. The executing unit executes a first pre-scan in which a readout gradient magnetic field and a phase encoding gradient magnetic field are not applied and sampling gradient magnetic fields is applied in a phase encoding direction and a second pre-scan in which the readout gradient magnetic field is not applied, the sampling gradient magnetic field is applied at the same echo signal as that in the first pre-scan, and a representative phase encoding gradient magnetic field in a main scan. The calculating unit calculates the amount of correction from phase differences between the echo signals collected by the first pre-scan and between the echo signals collected by the second pre-scan. The correcting unit corrects the pulse sequence for the main scan on the basis of the calculated amount of correction. | 2011-12-01 |
20110291654 | METHOD FOR REDUCING MAGNETIC RESONANCE TEMPERATURE MEASUREMENT ERRORS - A method for reducing magnetic resonance temperature measurement errors, which is used for the high-intensity focused ultrasound device for monitoring magnetic resonance imaging includes obtaining a magnetic resonance phase diagram as a reference image before the high-intensity focused ultrasound device heats the heating area; obtaining another magnetic resonance phase diagram as a heating image during or after the heating process of the high intensity focused ultrasound device; calculating the temperature changes in the heating area according to said heating image and reference image. The method further includes measuring the magnetic field changes caused by the position changes of the ultrasonic transducer of said high-intensity focused ultrasound device, and then compensating for the temperature changes according to said magnetic field changes. The present invention can significantly reduce the temperature errors caused by the position changes of the ultrasonic transducer. | 2011-12-01 |
20110291655 | FAILSAFE PROTECTION FROM INDUCED RF CURRENT FOR MRI RF COIL ASSEMBLY HAVING TRANSMIT FUNCTIONALITY - An electrically-controlled failsafe switch is included in an MRI transmit-and-receive RF coil assembly so as to protect it from induced RF currents in the event it is disconnected from an MRI system, but inadvertently left linked to strong MRI RF fields during imaging procedures using other RF coils. | 2011-12-01 |
20110291656 | MAGNETIC RESONANCE APPARATUS COMPRISING A FASTENING ELEMENT FOR ATTACHING A NOISE-INSULATING ELEMENT AND A METHOD FOR ATTACHING A NOISE-INSULATING ELEMENT - A magnetic resonance apparatus is provided. The magnetic resonance apparatus comprises a gradient coil unit, a housing cover and a noise protection unit which has at least one noise-insulating element which is arranged between the gradient coil unit and the housing cover for deadening an operating noise of the gradient coil unit. The magnetic resonance apparatus also comprises at least one fastening element for attaching the at least one noise-insulating element. The fastening element engages in a connection with the gradient coil unit for attaching the at least one noise-insulating element. | 2011-12-01 |
20110291657 | MAGNETIC RESONANCE IMAGING COMPATIBLE SWITCHED MODE POWER SUPPLY - A switched mode power supply (SMPS) employs only energy storage components that are devoid of ferromagnetic materials. The SMPS operates only at switching frequencies such that any potential electromagnetic interference of interest is generated at frequencies appearing only outside the imaging bandwidth of a corresponding magnetic resonance imaging system powered by the SMPS. | 2011-12-01 |
20110291658 | High resolution three dimensional electromagnetic survey method - A method for electromagnetic surveying below the bottom of a body of water includes deploying a plurality of nodal recording devices in a selected pattern on the water bottom. An electromagnetic transmitter is towed in the water. At least one electromagnetic sensor streamer is concurrently towed in the water. The electromagnetic transmitter is actuated at selected times and signals detected by sensors in the nodal recording devices and in the at least one streamer are recorded. | 2011-12-01 |
20110291659 | Method and apparatus for measuring resistivity of formations - An apparatus for determining the resistivity of formation surrounding a borehole comprising:
| 2011-12-01 |
20110291660 | System and Method for Low Battery Detection - Systems and methods for monitoring a voltage pump to determine the status of a battery connected to the voltage pump are provided. The operation of the voltage pump is monitored during at least one monitoring period which corresponds to a period of relatively heavy consistent load. The operation of the voltage pump can be monitored by sampling a control signal that corresponds to the operation of the voltage pump. | 2011-12-01 |
20110291661 | ELECTRICAL FAULT LOCATION DETERMINATION - A method of determining the location of a fault in a cable at an underwater fluid extraction facility is provided. The method comprises: providing a time domain reflectometry unit at the facility, the unit being connected to at least one wire within the cable; causing the unit to transmit a current pulse to the wire; detecting a reflected pulse received at the unit; determining the time duration between the pulse transmission and the reflected pulse reception and using the duration to calculate a distance between the fault and the unit; and determining the location of a fault on the wire using the calculated distance. | 2011-12-01 |
20110291662 | METHOD AND APPARATUS TO MONITOR ELECTRIC ISOLATION OF A HIGH-VOLTAGE DIRECT CURRENT ELECTRICAL CIRCUIT - An electrically isolated high-voltage direct-current electric circuit is monitored. Electrical signals are periodically sampled, and ground isolation indexes are calculated. A trend corresponding to trend elements is characterized. The characterized trend is compared with an expected trend with deviations indicative of potential faults. | 2011-12-01 |
20110291663 | PRINTING APPARATUS AND LIQUID DETECTION SENSOR INSPECTION METHOD - The printing apparatus applies a first waveform to the liquid detection sensor, and measures a second waveform output from the liquid detection sensor in response to the application of the first waveform. Based on a measurement result of the second waveform, the printing apparatus inspects whether the liquid detection sensor can be driven. Further, prior to the application of the first waveform to the liquid detection sensor, the printing apparatus measures the first waveform itself, and performs an inspection based on a measurement result of the first waveform. | 2011-12-01 |
20110291664 | Device for testing surface mounted connectors - This invention describes a device for testing a surface mounted connector using a test probe assembly that utilizes a vacuum to force the test wires and the test probe's wire array into intimate contact with the connector to be tested. The wires are directed through a wire module assembly and have a wide spacing at one end, and a narrow spacing corresponding to the spacing required for the specific units to be tested at the opposite end. The wires are kept in contact with the unit under test by the use of spring loaded test connectors and vacuum | 2011-12-01 |
20110291665 | TIMER CIRCUIT - A timer circuit is provided with a comparator CMP | 2011-12-01 |
20110291666 | DEVICE AND METHOD FOR DETERMINING PARTIAL DISCHARGES AT AN ELECTRICAL COMPONENT - The present invention relates to a method for determining partial discharges at an electrical component ( | 2011-12-01 |
20110291667 | Modular Test Plug For Voltage, Current and Current Transformer Saturation Testing - A modular test plug for voltage, current and saturation testing has a housing having a handle portion, a plurality of jaw connections for injecting upstream toward the equipment to be tested, a plurality of blade connections for injecting downstream toward a transformer, a first plurality of binding posts on a top of the housing connected to the jaw connections, and a second plurality of binding posts also on a top of the housing connected to the blade connections. Also provided is a short-defeating insert for defeating a shorting mechanism in an FT switch. This insert has a thin flat extension member extending from the body to prevent a bottom cam on a shorting blade from making contact with a shorting spring that would otherwise short the circuit when the switch handle is moved from the open position to the closed position. | 2011-12-01 |
20110291668 | PROTECTION OF UNSEALED ELECTRICAL CONNECTORS - A monitoring system for connector pins exposed to conductive/corrosive fluids and/or corrosive environments includes a first sensing portion having a pin monitoring section configured to measure a pin current flow of at least one conductor pin, and transfer a first signal. A second sensing portion produces a second signal indicating by a contactless determination the presence of a fastener providing physical connection between an interface member and a component. A decision logic device receives the first and second signals, compares the pin current flow to a predetermined range of values, and isolates electrical power to the conductor pin when the first signal indicates the pin current flow is outside the predetermined range of values. A sensor body created of a non-ferrous material and connected to the component includes a first insert member having the conductor pin and a second insert member defining a sensor sensing proximal presence of the fastener. | 2011-12-01 |
20110291669 | METHOD AND DEVICE FOR AUTOMATICALLY CALIBRATING TOUCH DETECTION - A method and device for automatically calibrating touch detection is disclosed. The present invention includes providing a sensing layer including a plurality of sensors, and each sensor senses a sensing range, and the sensing ranges of the sensors intersecting each other to form a crossing array; continuously detecting signals of the sensors as a detection signal set; performing update of an initial signal set based on the detection signal set; and when a default signal set does not match the initial signal set and the default signal set matches the detection signal set, performing update of the initial signal set. | 2011-12-01 |
20110291670 | CONDUCTIVITY MEASUREMENT CELL - The application relates to a conductivity measurement cell for measuring the concentration of a preselected biomarker or analyte in a body fluid, such as urine. In order to reduce the effect of sample dilution on measured concentration, the measured concentration can be normalised by a dilution factor, which can be determined from electrical conductivity. A test strip and measurement apparatus is disclosed for performing such normalised concentration measurement. | 2011-12-01 |
20110291671 | BIDIRECTIONAL WIRELESS ELECTRICAL ENERGY MONITORING SYSTEM - The present invention relates to the technical field of energy monitoring system, and particularly to a bidirectional wireless electrical energy monitoring system which comprises a bidirectional wireless electrical energy monitoring apparatus and a bidirectional wireless electrical energy monitoring switchgear; the bidirectional wireless electrical energy monitoring apparatus comprises a first wireless bidirectional module for receiving a current signal from the bidirectional wireless electrical energy monitoring switchgear and transmitting a control signal to the bidirectional wireless electrical energy monitoring switchgear; the bidirectional wireless electrical energy monitoring switchgear comprises a second wireless bidirectional module for receiving the control signal from the bidirectional wireless electrical energy monitoring apparatus and transmitting the current signal of electrical equipment to the second wireless bidirectional module of the bidirectional wireless electrical energy monitoring apparatus; bidirectional wireless connection is realized between the bidirectional wireless electrical energy monitoring apparatus and the bidirectional wireless electrical energy monitoring switchgear through the first wireless bidirectional module and the second wireless bidirectional module. The present invention may realize the bidirectional signal transmission, bidirectional control and remote control between the bidirectional wireless electrical energy monitoring apparatus and the bidirectional wireless electrical energy monitoring switchgear. | 2011-12-01 |
20110291672 | GALVANICALLY ISOLATED FUNCTIONAL TEST FOR COMPONENTS - A method and a circuit functionally test a semiconductor component. The functional test is performed with galvanic isolation by using a transformer. The test itself is based on determining the frequency-dependent impedance of a series circuit of capacitors and inductors using the semiconductor component itself. The impedance is strongly influenced by the conduction state of the semiconductor component, in other words, by the instantaneous conductivity or blocking capability of the semiconductor component. | 2011-12-01 |
20110291673 | CHEMICAL SENSOR - Provided is a chemical sensor requiring no ion-sensitive film. Specifically provided is a chemical sensor ( | 2011-12-01 |
20110291674 | APPARATUS AND METHOD FOR ANALYZING THE STATE OF OIL-FILLED ELECTRICAL DEVICES - Provided is an apparatus for analyzing the state of oil-filled electrical devices. The apparatus simulates the state of an oil-filled electrical device in which copper wire wrapped in insulating paper is immersed in insulating oil. The apparatus for analyzing the state of oil-filled electrical devices includes a first paper-covered copper wire and a second paper-covered copper wire, which are adjacent to each other; a tank which holds the first and second paper-covered copper wires as well as insulating oil extracted from the oil-filled electrical device, thereby immersing the first and second paper-covered copper wires in the insulating oil; and a capacitance measurement unit which measures the capacitance between the first and second paper-covered copper wires. The first and second paper-covered copper wires includes copper wire and insulating paper wrapped therearound. The insulating paper wrapper around each copper wire includes the same material as the insulating paper in the oil-filled electrical device. | 2011-12-01 |
20110291675 | Bi-Directional High Side Current Sense Measurement - A system for measuring a voltage drop between two nodes in an electrical circuit, comprising a switched capacitor integrator (SCI), a comparator and a counter. The SCI alternately (a) captures charge onto a set of sampling capacitors and (b) selectively accumulates/transfers the charge onto a pair of integration capacitors, where the charge includes a first portion that is based on the voltage drop and a second portion that depends on a digital indicator signal. The comparator generates the digital indicator signal based on whether an analog output of the SCI is positive or negative. The counter counts a number of ones occurring in the digital indicator signal during a measurement interval. At the end of the measurement interval, the count value represents a measure of the voltage drop. Knowing the resistance between the two nodes, the voltage drop may be converted into a current measurement. | 2011-12-01 |
20110291676 | Sensor for Measuring the Concentration of a Solvent or Solute in a Mixed Solution System - The invention described relates to an apparatus and method for measuring the concentration of a low molecular weight alcohol, in an aqueous liquid feed solution, comprising a first sensor including a hydrophilic capillary tube having an inner diameter, being disposed between two electrodes to form a first capacitor, a second sensor including a hydrophobic capillary tube having the same inner diameter as a capillary tube of the first sensor; said hydrophobic capillary tube having a hydrophobic coating on the inner diameter, being disposed between two electrodes to form a second capacitor, wherein the first hydrophilic and second hydrophobic sensors are dipped to the same depth in the aqueous solution to measure the solution concentration, means for measuring the capacitance of the two capacitors, and control means including a control circuit driven by a computer, wherein the difference in capacitance between the two capacitors is a measure of the concentration of the solution, independent of the depth of dipping of the two capacitors in the aqueous solution. In another embodiment, a single hydrophilic sensor is employed. | 2011-12-01 |
20110291677 | METHOD AND APPARATUS FOR DEFECT DETECTION - A system for detecting a defect in a membranous article ( | 2011-12-01 |
20110291678 | Low Power Metering Using Pulse Counting - A metering system can include a pull up circuit to be selectively coupled between a voltage node and a metering line that communicates a signal indicative of status of a flow line through which a metered substance flows. An impedance of the pull up circuit is set to reduce power consumption based on a calibration, and the pull up circuit can be disabled between sampling of the signal to reduce power consumption. | 2011-12-01 |
20110291679 | TESTING INTEGRATED CIRCUITS - A method of testing integrated circuits is provided. The method includes establishing at least one first physical communication channel between a test equipment and a respective group of integrated circuits under test by having probes of the test equipment contacting at least one corresponding physical contact terminal of each integrated circuit of the respective group. The method further includes having the test equipment exchanging, over the at least one first physical communication channel, the same test stimuli with each integrated circuit of the group. The method still further includes having each integrated circuit of the group establishing a corresponding second physical communication channel with the test equipment by having at least one physical contact terminal of the integrated circuit contacted by a corresponding probe of the test equipment. The method further includes having each integrated circuit of the group exchanging, over the second physical communication channel, a corresponding test response signal based on the received test stimuli with the test equipment. The test stimuli are exchanged by modulating at least one first carrier wave based on the test stimuli; the at least one first carrier wave has at least one first frequency. The test response signals of each integrated circuit of the group are exchanged by modulating at least one respective second carrier wave based on the test response signals; each second carrier wave have at least one respective second frequency. | 2011-12-01 |
20110291680 | CHUCK FOR SUPPORTING AND RETAINING A TEST SUBSTRATE AND A CALIBRATION SUBSTRATE - A chuck for supporting and retaining a test substrate includes a device for supporting and retaining a calibration substrate. The chuck comprises a first support surface for supporting a test substrate and a second support surface, which is laterally offset to the first support surface, for supporting a calibration substrate. The calibration substrate has planar calibration standards for calibration of a measuring unit of a prober, and dielectric material or air situated below the calibration substrate at least in the area of the calibration standard. In order to be able to take the actual thermal conditions on the test substrate and in particular also on known and unknown calibration standards and thus the thermal influence on the electrical behavior of the calibration standard used into consideration, the second support surface is equipped for temperature control of the calibration substrate. | 2011-12-01 |
20110291681 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes: a first power line coupled to a first power transfer pad; a second power line coupled to a second power transfer pad; and a test option unit coupled to the first and second power lines and configured to couple the first and second power lines. | 2011-12-01 |
20110291682 | PIN CARD AND TEST APPARATUS USING THE SAME - A first switch is arranged such that a first terminal thereof is connected to an AC test unit and a second terminal thereof is connected to an I/O terminal and a DC test unit. A first switch is configured so as to be capable of switching states between a connection state in which the first terminal and the second terminal are connected to each other, and a disconnection state in which they are disconnected from each other. A bypass capacitor is arranged between the first terminal and the second terminal, and is configured to bypass the frequency component which is cut off by the first switch. | 2011-12-01 |
20110291683 | APPARATUS AND METHOD FOR ELECTROSTATIC DISCHARGE (ESD) REDUCTION - A substrate support unit adapted for a system for testing or processing of a substrate is provided. The substrate support unit includes a support table having at least one substrate carrier structure adapted to support a substrate, wherein the substrate carrier structure is electrically floating with respect to ground. | 2011-12-01 |
20110291684 | SWITCH PROBE AND DEVICE AND SYSTEM FOR SUBSTRATE INSPECTION - A switch probe for use in a substrate inspection device to inspect a substrate includes a first tubular element, a first rod element partially accommodated in the first tubular element, and pressed into the first tubular element when the certain part is mounted for substrate inspection, a second tubular element fixed in the first tubular element, a second rod element partially accommodated in the second tubular element which is inside the first tubular element, and contacting with the first rod element when the first rod element is pressed into the first tubular element, and a fixing mechanism configured to temporarily fix the second rod element in a position so that the second rod element does not contact with the first rod element even when the first rod element is pressed into the first tubular element. | 2011-12-01 |
20110291685 | PROBE | 2011-12-01 |
20110291686 | ELECTRIC CONTACT AND SOCKET FOR ELECTRICAL PART - A contact pin includes a base material composed of a material having a conductive property and an outermost surface layer made of a material into which Sn is dissolved and diffused by applying heat. | 2011-12-01 |
20110291687 | PROBE CARD FOR TESTING SEMICONDUCTOR DEVICE AND PROBE CARD BUILT-IN PROBE SYSTEM - A probe card is includes a wafer and a plurality of needle patterns penetrating the wafer. The needle patterns are configured to supply an electrical signal for testing a separate wafer. The probe card may be mounted to a printed circuit board in a manner in which conductive patterns of the probe card are electrically connected to conductive terminals of the printed circuit board. The needle patterns may protrude from a lower end of the wafer and be formed so that an interval between needle patterns is the same as an interval between pads of a wafer to be tested. | 2011-12-01 |
20110291688 | Identifying A Signal On A Printed Circuit Board Under Test - Apparatus and methods for identifying a signal on a printed circuit board (‘PCB’) under test, including an integrated circuit mounted on the PCB, the integrated circuit having a test signal generator that transmits a test signal to an output pin of the integrated circuit, with the output pin connected to a test point on the PCB; the integrated circuit also having signal identification logic that inserts into the test signal, an identifier of the signal; a test probe in contact with the test point; and a signal-identifying controller that receives the test signal and the identifier from the test probe and displays, in dependence upon the identifier, the identity of the signal. | 2011-12-01 |
20110291689 | SAS INTERFACE OUTPUT SIGNAL DETECTING APPARATUS - A serial attached small computer system interface (SCSI) (SAS) interface output signal detecting apparatus includes an SAS female connector, an SAS male connector, and two subminiature version A (SMA) connectors. Each of the SAS female and male connectors includes first and second groups of data pins and a group of power pins. The power pins of the SAS female connector are connected to the power pins of the SAS male connector. The SMA connectors are connected to two data output pins of the second or first group of data pins of the SAS female connector in response to the first group of data pins of the SAS female connector being connected to the first group of data pins of the SAS male connector or the second group of data pins of the SAS female connector being connected to the second group of data pins of the SAS male connector. | 2011-12-01 |
20110291690 | Apparatus and Method for Testing Non-Contact Pads of a Semiconductor Device to be Tested - The present invention relates to an apparatus and a method for testing non-contact pads of a semiconductor device to be tested. The apparatus includes an insulating body, at least one testing module and a plurality of probes. The insulating body includes an accommodating cavity, a lower opening and at least one side opening. The side opening communicates with the accommodating cavity and the lower opening. The testing module is disposed in the side opening, and each testing module includes a circuit board and an active chip. The active chip is disposed on to and electrically connected to the circuit board. The active chip has a plurality of testing pads exposed to the accommodating cavity. The probes are disposed in the lower opening. Whereby, the non-contact pads of the semiconductor device to be tested face but not in physically contact with the testing pads of the active chip, so as to test the proximity communication between the non-contact pads of the semiconductor device and the testing pads of the active chip. | 2011-12-01 |
20110291691 | CHIP AND CHIP TEST SYSTEM - According to an example embodiment, a chip includes a plurality of circuit blocks, a power switch unit configured to supply power to the plurality of circuit blocks, and a power switch controller configured to control the power switch unit in response to an external control signal. The external control signal selectively control supply of power to at least one circuit block of the plurality of circuit blocks. | 2011-12-01 |
20110291692 | METHOD AND APPARATUS FOR INSPECTING SEMICONDUCTOR USING ABSORBED CURRENT IMAGE - Provided is an apparatus for automatically detecting a failure position on a specified wiring line. The apparatus and a method for automatically detecting the failure position even on a long wiring line by applying a probe and an electron beam onto a sample and using an image of the current absorbed by the sample are provided. The apparatus obtains an absorbed current image, while laterally moving at right angle with the probe applied onto the sample, and based on the obtained absorbed current image, correction is performed by means of both an image shift and a stage. Countermeasures are taken, using a stage not having a sample rotating stage, against factors including a hardware factor of not moving at a correct angle, such as backlash, the wiring line is accurately and continuously displayed even when the apparatus moves to the ends of the long wiring line, and the failure position is detected, while the apparatus automatically reciprocates several times between the both ends of the wiring line. | 2011-12-01 |
20110291693 | TESTING FUSE CONFIGURATIONS IN SEMICONDUCTOR DEVICES - Methods, systems, and apparatus for testing semiconductor devices. A semiconductor device includes one or more external terminals configured to receive fuse configuration data from an external source. The semiconductor device also includes a soft-blow circuit to generate a soft-blow signal based on the fuse configuration data, and a fuse circuit that includes a fuse and has first and second operational states corresponding to the fuse being intact and blown, respectively. The fuse circuit is configured to receive the soft-blow signal and to select its operational state to be the first or second operational state based on the received soft-blow signal. | 2011-12-01 |
20110291694 | TELEVISION APPARATUS, SEMICONDUCTOR PACKAGE, AND ELECTRONIC DEVICE - According to one embodiment, a television apparatus includes a circuit board, a conductive portion, and an easily broken portion. The circuit board is mounted with an electronic component. The conductive portion is located on a surface or the inside of the circuit board. A breakage detection mechanism detects breakage of the conductive portion by conduction. The easily broken portion is provided to at least part of the conductive portion. The easily broken portion is broken easier than other portions of the conductive portion when a stress is applied to the circuit board. | 2011-12-01 |
20110291695 | MONITORING DEVICE FOR AN ELECTRIC POWER SYSTEM - A monitoring device for an electric power system includes a detection unit and a display unit. The detection unit has a power module, a current detecting module and a transmission module. The power module includes positive and negative electrodes and is coupled to the current detecting module. The current detecting module includes a first switching unit and a second switching unit. The first and second switching units are coupled between the positive and negative electrodes to detect currents on detection points of the electric power system. The transmission module includes a micro-controller unit and a transmission device coupled to the micro-controller unit. The micro-controller unit includes a first end and a second end. The first end is coupled to the first switching unit and the second end is coupled to the second switching unit. The display unit is coupled to the transmission device for receiving signals from the detection unit. | 2011-12-01 |
20110291696 | Method for Protecting a Logic Circuit Against External Radiation and Associated Electronic Device - A method for protecting an electronic circuit having at least one output against external radiation includes functionally duplicating the electronic circuit and linking the outputs of the electronic circuit and the duplicated electronic circuit to homologous inputs of at least functionally equivalent combinatorial or sequential elements. The homologous outputs of all the combinatorial or sequential elements are linked together. The electronic circuit can be duplicated multiple times. | 2011-12-01 |
20110291697 | DIGITAL LOGIC CIRCUIT AND MANUFACTURE METHOD THEREOF - A digital logic circuit and a manufacture method of the digital logic circuit thereof are provided. The digital logic circuit includes a voltage rail, a ground rail, and a plurality of logic circuit rails, wherein each of the logic circuit rails is electrically connected to the voltage rail and the ground rail. The logic circuit rail includes a logic unit and an auxiliary unit electrically connected to the voltage rail and the ground rail. The logic unit includes a logic voltage end electrically connected to the voltage rail and a logic ground end electrically connected to the ground rail. The auxiliary unit includes an auxiliary voltage end electrically connected to the voltage rail and an auxiliary ground end electrically connected to the ground rail. At least one of the width ratio between the auxiliary voltage end and the logic voltage end and the width ratio between the auxiliary ground end and the logic ground end is greater than 1. | 2011-12-01 |
20110291698 | IMPEDANCE ADJUSTING DEVICE - An impedance adjusting device includes a calibration unit configured to generate an impedance code for adjusting a termination impedance value, a plurality of termination units configured to be enabled by resistance selection information and terminate an interface node in response to the impedance code, a resistance providing unit coupled in parallel to the plurality of termination units and configured to provide a resistance in response to the resistance selection information, and a selection signal generation unit configured to generate the resistance selection information according to a target impedance value. | 2011-12-01 |
20110291699 | IMPEDANCE CODE GENERATION CIRCUIT, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND METHOD FOR SETTING TERMINATION IMPEDANCE - An impedance code generation circuit includes a first code generation unit configured to compare a voltage of a calibration node with a reference voltage and generate a first impedance code, a code modification unit configured to generate a modified impedance code by performing an operation on the first impedance code according to a setting value, and a second code generation unit configured to generate a second impedance code based on the modified impedance code. | 2011-12-01 |
20110291700 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes an impedance control signal generation block configured to transmit first impedance control signals and second impedance control signals through same signal lines at predetermined time intervals, and input/output blocks configured to separately receive the first impedance control signals and the second impedance control signals at corresponding time intervals and perform a data input/output operation based on set impedance. | 2011-12-01 |
20110291701 | HIGH SPEED FLIP-FLOP CIRCUIT AND CONFIGURATION METHOD THEREOF - A high speed flip-flop circuit and a configuration method thereof are provided. A small number of transistors may be used to configure a flip-flop circuit, so that the flip-flop circuit may be operated at a high-speed. Additionally, an area occupied by the flip-flop circuit may be reduced, and power consumption may be reduced. Accordingly, the flip-flop circuit may be integrated together with a microwave frequency integrated circuit using a Gallium Arsenide (GaAs) compound semiconductor process. | 2011-12-01 |
20110291702 | SIGNAL TRANSMISSION SYSTEM AND SIGNAL TRANSMISSION METHOD - A signal transmission system according to the present invention includes a first data conversion circuit ( | 2011-12-01 |
20110291703 | Method and Apparatus to Sterialize Parallel Data Input Values - A method and apparatus to serialize parallel data input values is disclosed. In a particular embodiment, a method of serializing parallel data input values includes receiving multiple data input values in parallel at an input tier of a selection circuit, where the input tier includes multiple combinatorial gate multiplexers. The method further includes selecting an output value at an output tier of the selection circuit, where the output tier includes at least one combinatorial gate multiplexer. | 2011-12-01 |
20110291704 | Input Pin State Detection Circuit and Method Therefor - A state-detection circuit facilitates the detection of the state of an input pin relative to several different types of input circuits. According to an example embodiment, a state-detection circuit includes a plurality of comparators and circuit components, configured to provide a plurality of binary output signals that collectively indicate a state of an input pin to which the comparators are coupled. The state-detection circuit is configured to facilitate the detection of several different types of input circuits, based upon the binary output signals. | 2011-12-01 |
20110291705 | ELECTRONIC EQUIPMENT AND POWER SUPPLY CONTROL METHOD - Electronic equipment includes a battery, an interface portion to which a recording medium can be attached, a kind detection portion for detecting the kind of a recording medium, an access processing portion for executing a predetermined access process to a recording medium, a current consumption detection portion for detecting a value of current consumed by execution of the predetermined access process to the recording medium, an additional storage portion for storing a current consumption value corresponding to the detected kind into a storage portion, a power supply circuit for taking out and outputting electric power from the battery, and a power supply control portion for controlling the power supply circuit. The power supply control portion varies control on the power supply circuit in accordance with the current consumption value stored corresponding to the detected kind. | 2011-12-01 |
20110291706 | ELIMINATION OF FRACTIONAL N BOUNDARY SPURS IN A SIGNAL SYNTHESIZER - A portable frequency synthesizer is provided with fine tuning over a broad bandwidth using a Fractional N type Delta Sum Phase Locked Loop circuit that enables elimination of boundary value spurs. In the system, frequencies where spurs occur are calculated to define a region of fractional N values that cannot be used with a first time base. To avoid the boundary spurs, a second time base reference is selected that can generate boundary spurs that do not overlap with the first time base. Circuitry is provided to select the appropriate time base and the fractional N values to generate desired output frequencies throughout the synthesizer range while avoiding the boundary spurs. | 2011-12-01 |
20110291707 | Driver with Accurately Controlled Slew Rate and Limited Current - A driver circuit, that provides slew rate control of its output voltage, including a current generator, an output transistor, and optionally, a capacitor. The current generator has an input port, an output port and reference port. The output port couples to the gate of the output transistor. The capacitor couples between the gate and drain of the output transistor. The current generator controls a current I | 2011-12-01 |
20110291708 | ELECTRONIC APPARATUS AND METHOD OF DRIVING THE SAME - An electronic apparatus includes an electronic circuit including a driving transistor, an additional capacitive element and a first switch for controlling a connection between a circuit point and a control terminal and a driving circuit which controls the first switch to an off state and changes the potential of the control terminal such that the driving transistor transitions to an on state in a first period, controls the first switch to the on state so as to set the potential of the control terminal to an initial compensation value, in a second period, and controls the first switch to the on state and changes the driving potential from the first potential to the second potential such that the driving transistor transitions to the on state, in a third period. | 2011-12-01 |
20110291709 | APPARATUS AND METHOD FOR GENERATING RAMP WAVEFORM - A ramp waveform generating apparatus generates a reference waveform by using an input signal and generates a driving control signal for turning on and off a switch having a first terminal connected to a load and a second terminal connected to a power supply by comparing the voltage of the reference waveform with the voltage of the load. While the switch is repetitively turned on and off in accordance with the driving control signal, a ramp waveform may be generated. | 2011-12-01 |
20110291710 | CLOCK SUPPLY APPARATUS - A clock supply apparatus for supplying clock signals to a plurality of circuit blocks includes a supply unit configured to supply, to reset the plurality of circuit blocks, a clock signal rising at timing different from one circuit block to another to each of the plurality of circuit blocks. | 2011-12-01 |
20110291711 | POWER-UP SIGNAL GENERATION APPARATUS AND METHOD - A power-up signal generation apparatus includes: a pre-power-up signal generation unit configured to generate a pre-power-up signal depending on a level of a power supply voltage; and a control unit configured to output the pre-power-up signal as a power-up signal in response to an active signal. | 2011-12-01 |
20110291712 | SCANNING-LINE DRIVE CIRCUIT - A gate-line drive circuit is driven by three clock signals of different phases, and includes a plurality of cascade-connected unit shift registers. In a normal operation, activation periods of the three clock signals do not overlap one another. However, the two clock signals of them are simultaneously activated at the beginning of a frame period. A unit shift register of the first stage is adapted to activate an output signal in accordance with the simultaneous activation of the two clock signals. | 2011-12-01 |
20110291713 | SLAVE DEVICE, SYSTEM INCLUDING MASTER DEVICE AND SLAVE DEVICE, METHOD FOR OPERATING THE SAME, AND CHIP PACKAGE - A slave device communicating with a master device includes a transmission unit configured to transmit a signal to the master device through a communication channel, a calibration unit configured to measure a flight time of a calibration signal which is transmitted to the master device and fed back through a calibration channel coupled to the master device, and a transmission delay unit configured to delay the signal transmitted from an internal circuit of the slave device to the transmission unit by a delay value determined according to the measurement result of the calibration unit. | 2011-12-01 |
20110291714 | Phase-Locked Loop With Novel Phase Detection Mechanism - A phase-locked loop (PLL) with novel phase detection mechanism is provided, including a phase frequency detector (PFD), a controller, a digital-to-analog (D2A) module, and a voltage-controlled oscillator/current-controlled oscillator (VCO/ICO), wherein PFD has a reference signal input and an input from output signal of the VCO/ICO and is connected to the controller, the controller is then further connected to D2A module, D2A module converts the control signal from the controller into an analog voltage to control the frequency and phase of VCO/ICO. It is worth noting that the PFD of the present invention has a novel phase detection mechanism so that the phase detection does not rely on edge alignment. In addition, the novel phase detection mechanism also allows flexible reference signal input, as opposed to the aforementioned fixed external source, such as, a crystal. | 2011-12-01 |
20110291715 | PHASE ADJUSTMENT CIRCUIT - In a phase adjustment circuit that divides the frequency of a double-frequency clock to obtain a 50% duty-cycle clock, a first 1/2 frequency division circuit having a phase inversion function generates an intermediate reference clock apart in phase from both a phase reference clock and a phase-adjusted clock. A first phase control circuit controls the phase of the intermediate reference clock to be in a desired phase state with respect to the phase reference clock. A second phase control circuit controls the phase of the phase-adjusted clock to be in a desired phase state with respect to the intermediate reference clock. Thus, when the phase-adjusted clock is adjusted to be close in phase to the phase reference clock, the phase difference between these clocks can be determined correctly and stably even if it varies due to clock jitter. | 2011-12-01 |
20110291716 | FAST-SWITCHING LOW-NOISE CHARGE PUMP - In one embodiment of the invention, a method for a charge pump is disclosed. The method includes biasing a plurality of transistors; switching a pair of main transistor switches to apply or remove a net charge on an output terminal though the biased transistors; and turning on auxiliary transistor switches when the main transistor switches are turned off. The auxiliary transistor switches when turned on provide an auxiliary equalizing path to nodes between the main transistor switches and the biased transistors. The auxiliary equalizing path equalizes voltages between the intermediate nodes to rapidly turn off the biased transistors and reduce noise on the output terminal of the charge pump. | 2011-12-01 |
20110291717 | SEMICONDUCTOR DEVICE - A semiconductor device includes a delay locked loop including a replica delay unit which is configured to delay a signal reflecting a delay amount of an output path of a signal, and a delay time compensator configured to compensate for a difference of a delay time between the replica delay unit and the output path by comparing an output signal of the replica delay unit and an output signal of the output path. | 2011-12-01 |
20110291718 | CLOCK GENERATION CIRCUIT AND DELAY LOCKED LOOP USING THE SAME - A clock generation circuit includes a plurality of variable delay units configured to control a delay of an input clock signal under the control of delay control signals assigned thereto among a plurality of delay control signals, and output a plurality of delayed clock signals; a phase comparison unit configured to compare a phase of a reference clock signal which has a predetermined phase difference from the input clock signal and a phase of a delayed clock signal which is outputted from any one variable delay unit among the plurality of variable delay units; and a delay control unit configured to generate the plurality of delay control signals based on a comparison result from the phase comparison unit. | 2011-12-01 |
20110291719 | PHASE CORRECTION CIRCUIT, DATA ALIGNMENT CIRCUIT AND METHOD OF ALIGNING DATA USING THE SAME - Various exemplary embodiments of a phase correction circuit are disclosed. In one exemplary embodiment, the phase correction circuit may include a delay unit configured to delay a clock signal by a predetermined delay time and generate a delay clock signal, a delay line configured to delay a data strobe signal by a variable delay time in response to a delay control signal and generate a corrected data strobe signal, a phase detector configured to detect a phase difference between the delay clock signal and the corrected data strobe signal and generate a phase detection signal, and a shift register configured to generate the delay control signal in response to the phase detection signal. | 2011-12-01 |
20110291720 | DELAY LOCKED LOOP CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME - A semiconductor device includes a delay line configured to delay a source clock by a delay equal to a first number of delay units in response to a delay control code and to generate a delayed source clock; a delay amount sensing unit configured to sense whether the delay amount of the delay line reaches a delay amount limit; a clock cycle measuring unit configured to measure the cycle of the source clock by counting a sampling clock in response to an output signal of the delay amount sensing unit, wherein a cycle of the sampling clock is equal to a second number of delay units; and a delay amount controlling unit configured to change the delay amount of the delay line in response to the measured cycle of the source clock as determined from an output signal of the clock cycle measuring unit. | 2011-12-01 |
20110291721 | Wide Frequency Range Delay Locked Loop - A delay locked loop operates over a wide range of frequencies and has high accuracy, small silicon area usage, low power consumption and a short lock time. The DLL combines an analog domain and a digital domain. The digital domain is responsible for initial lock and operational point stability and is frozen after the lock is reached. The analog domain is responsible for normal operation after lock is reached and provides high accuracy using smaller silicon area and low power. | 2011-12-01 |
20110291722 | PHASE CORRECTION CIRCUIT - A phase correction circuit includes a skew detection unit configured to generate first skew detection signals and second skew detection signals by comparing multi-phase signals with one another, a phase control signal generation unit configured to generate a plurality of phase control signals by combining the first skew detection signals with the second skew detection signals, and a phase adjustment unit configured to delay the multi-phase signals by delay time corresponding to the plurality of the phase control signals. | 2011-12-01 |
20110291723 | STREAM SIGNAL TRANSMISSION DEVICE AND TRANSMISSION METHOD - Provided is a stream signal transmission device that can eliminate transmission delay fluctuation with a fast change such as network jitter with high accuracy and synchronize a plurality of streams. The stream signal transmission device includes at least one reception unit that receives a stream signal to which a time code is attached from a network, at least one extraction unit that extracts the time code from the stream signal received by the reception unit, and at least one delay control unit that determines an output time by adding a predetermined fixed delay to a time indicated by the time code extracted by the extraction unit, and outputs the stream signal received by the reception unit after holding the stream signal up to the output time. | 2011-12-01 |
20110291724 | DUTY CYCLE CORRECTION CIRCUIT - A duty cycle correction circuit for correcting the duty cycle of a clock signal generated by a clock generator includes a complementary buffer chain, level shifter circuits and a self-bias circuit. A clock signal with a distorted duty cycle and its complement are provided to the level shifter circuits. The level shifter circuits reduce the magnitude of voltage of the clock signal and the complement and generate level shifted signals. The level shifted signals are provided to a differential amplifier that generates a control signal indicating the magnitude of distortion in the duty cycle. The control signal is used to correct the duty cycle of the clock signal. The self-bias circuit is used to bias the differential amplifier. | 2011-12-01 |
20110291725 | DUTY DETECTION CIRCUIT AND DUTY CYCLE CORRECTION CIRCUIT INCLUDING THE SAME - A duty cycle correction circuit includes a duty adjustment circuit configured to generate an output clock by adjusting a duty cycle of an input clock in response to a duty adjustment code, a duty detection circuit configured to measure a difference between a width of a high pulse and a width of a low pulse of the output clock at each update period, and generate a duty detection code corresponding to the measured value, an accumulation circuit configured to generate the duty adjustment code by accumulating a value of the duty detection code outputted at each update period, and a toggling number adjustment circuit configured to adjust a toggling number of the output clock, which adjustment determines the update period, according to a frequency of the output clock. | 2011-12-01 |
20110291726 | DUTY CORRECTING CIRCUIT, DELAY-LOCKED LOOP CIRCUIT INCLUDING THE CIRCUIT, AND METHOD OF CORRECTING DUTY - A duty correcting circuit includes a duty steerer circuit, a differential clock generator, and a charge pump circuit. The duty steerer circuit corrects a duty cycle of an input clock signal in response to a duty control signal and generates an output clock signal. The differential clock generator generates two internal clock signals having a phase difference of 180° from each other based on the output clock signal. The charge pump circuit performs a charge pump operation in a differential mode in response to the internal clock signals to generate a duty control signal. | 2011-12-01 |
20110291727 | DELAY CIRCUIT AND METHOD FOR DRIVING THE SAME - A delay circuit includes a pulse generation unit configured to generate a pulse signal, which is activated in response to an input signal and has a pulse width corresponding to delay information, and an output unit configured to activate a final output signal in response to a deactivation of the pulse signal. | 2011-12-01 |
20110291728 | PHASE SHIFTER AND POWER AMPLIFIER AND MAGNETIC RESONANCE IMAGING APPARATUS - A phase shifter is provided. The phase shifter includes a first phase shifter that is continuously adjustable within a range of 0 degrees to 90 degrees, two 4-way switches each configured to selectively switch on one of a capacitance, an inductance, an open circuit, and a short circuit under control of a control voltage, and a bridge. A first input end and a first output end of said bridge are respectively connected to a first 4-way switch of the two 4-way switches. A second input end of said bridge is connected to an output end of said first phase shifter or a second output end of said bridge is connected to an input end of said first phase shifter. | 2011-12-01 |
20110291729 | Hardware performance monitor (HPM) with extended resolution for adaptive voltage scaling (AVS) systems - An apparatus includes a delay line having at least two parallel branches, where each branch includes multiple delay cells coupled in series. The delay line is configured to receive an input signal and to propagate the input signal in parallel through the delay cells in the branches. The apparatus also includes multiple sampling circuits configured to sample the input signal at different taps in the branches of the delay line and to output sampled values. The taps in a first of the branches are associated with different amounts of delay compared to the taps in a second of the branches. At least some of the delay cells in the branches of the delay line could have a minimum delay, and a difference in delay between at least one tap in the first branch and at least one tap in the second branch could be less than a smallest of the minimum delays. | 2011-12-01 |
20110291730 | OPEN LOOP TYPE DELAY LOCKED LOOP AND METHOD FOR OPERATING THE SAME - An open loop type delay locked loop includes a delay amount pulse generation unit configured to generate a delay amount pulse having a pulse width corresponding to a delay amount for delay locking a clock signal, a delay amount coding unit configured to output a code value by coding the delay amount in response to the delay amount pulse, a clock control unit configured to adjust a toggling period of the clock signal in response to a control signal, and a delay line configured to delay an adjusted clock signal outputted from the clock control unit in response to the code value. | 2011-12-01 |
20110291731 | Integrated circuit with timing adjustment mechanism - An integrated circuit | 2011-12-01 |
20110291732 | DIGITAL SIGNAL GENERATOR - The invention relates to a digital signal generator for providing one or more phases of a local oscillator signal for use in digital to analogue converters and harmonic rejection mixers. Embodiments disclosed include a local oscillator signal generator ( | 2011-12-01 |
20110291733 | TRANSMITTER, INTERFACE DEVICE, AND CAR MOUNTED COMMUNICATION SYSTEM - A transmitter includes a capacitor from one end of which a charge voltage is derived; a first constant current source to generate a charge current for the capacitor; a second constant current source to generate a discharge current for the capacitor; a charge/discharge controller to perform charge/discharge control of the capacitor based on a logic level of a transmission input signal and a comparison result between the charge voltage and a reference voltage; an output stage to generate the transmission output signal, wherein a slew rate of which is set in response to the charge voltage, and wherein an amplitude of the transmission output signal is set in response to an output side power source voltage; a reference voltage generator to fluctuate the reference voltage depend on the output side power source voltage; and a constant current controller to fluctuate a current value of the charge current and the discharge current depend on the reference voltage. | 2011-12-01 |
20110291734 | CONFIGURABLE CALCULATING CIRCUIT AND RECEIVER HAVING A PLURALITY OF CONFIGURABLE CALCULATING CIRCUITS - A configurable calculating circuit includes a multiplexer, a mixer and an accumulator. The multiplexer is for receiving input signals including at least a first and a second input signals, and selectively outputting at least one of the input signals. The mixer is for mixing a selected input signal outputted from the multiplexer with a local oscillation signal to generate a mixed signal. The accumulator is for accumulating the mixed signal to generate an accumulated signal. When the configurable calculating circuit is operated under a first mode, the multiplexer selects the first input signal, and the accumulator performs a first accumulating operation upon the mixed signal; and when the configurable calculating circuit is operated under a second mode, the multiplexer selects the second input signal, and the accumulator performs a second accumulating operation, different from the first accumulating operation, upon the mixed signal. | 2011-12-01 |
20110291735 | SWITCH CIRCUIT - A switch circuit, particularly suitable for dimmer switches, detects zero-crossing or similar points in the supply and uses those to make predictions of future zero-crossing occurrences. The predicted occurrences may be used to time the operation of the switch itself to chop the supply which results in less variation in the power supplied (flicker if the switch circuit is operating a lamp) since the positions of the measured zero-crossings can be subject to noise but flicker is reduced if the switch is operated at times with respect to the true supply waveform. The predicted times may be obtained from a local oscillator having a period set by, for example, low pass filtering the period of the measured zero-crossings. The phase of the oscillator may be adjusted such that an error between the predicted and measured zero-crossings is reduced. | 2011-12-01 |
20110291736 | Switching methods and apparatus - Embodiments of the invention controlling power distribution in an ablation control apparatus or the like. In one embodiment, a power switching apparatus comprises a first switch assembly having an input end to receive a power input signal, the first switch assembly having a plurality of output channels; a second switch assembly coupled to the output channels of the first switch assembly; a plurality of power receiving members coupled to the second switch assembly; and a controller controlling the first switch assembly to selectively transmit the power input signal to the output channels one at a time in a cyclical manner according to a first switching rate. The controller controls the second switch assembly to transmit the power input signal from the output channels of the first switch assembly to one subset of the power receiving members at a time according to a second switching rate, so as to transmit the power input signal to a subset of power receiving members one power receiving member at a time within the subset of power receiving members according to the first switching rate. | 2011-12-01 |
20110291737 | Multilevel Unidirectional Rectifier with N-2 Switches Per Phase Leg - An N-level rectifier, wherein N is a number of voltage levels of the rectifier, includes an input; a plurality of switching devices connected in parallel, wherein the plurality of switching devices are connected to the input, wherein a number of the plurality of switching devices is equal to N−2; and a plurality of capacitors connected in series, wherein the plurality of capacitors are connected to the plurality of switching devices, wherein a number of the plurality of capacitors is equal to N−1, and wherein the plurality of capacitors are connected to an output of the N-level rectifier; wherein N is greater than three. | 2011-12-01 |
20110291738 | JFET Series Connection - The invention relates to a switching device for switching a current between a first connection ( | 2011-12-01 |
20110291739 | MULTI-USE INPUT - Interfaces for coupling an electronic device to a power source control element and devices therefrom are provided. An interface includes a single node that is configured to receive a state signal and a serial communication signal from the electronic device. The interface also includes a switch circuit that is configured for providing a control signal for the power source control element based on the state signal, the switch signal capable of being influenced by the receipt of the state signal and the serial communication signal at the single node. The interface further includes a switch buffer circuit coupling the single node to the switch circuit, the switch buffer circuit comprising an impedance network configured to prevent the serial communication signal from activating the switch circuit. | 2011-12-01 |
20110291740 | METHOD FOR SUPPLYING AN OUTPUT SUPPLY VOLTAGE TO A POWER GATED CIRCUIT AND AN INTEGRATED CIRCUIT - An integrated circuit, that includes: (i) a power gating switch, the power gating switch includes (a) an input port for receiving an input supply voltage; (b) an output port for outputting an output supply voltage; and (c) a control port for receiving a control signal that determines a difference between a value of the input supply voltage and a value of the output supply voltage; (ii) a power gated circuit, coupled to the output port of the switch, for receiving the output supply voltage; (iii) a mode indicator generator for generating a mode indicator that indicates of a desired mode of the power gated circuit; (iv) a leakage indicator generator for generating a leakage indicator that indicates of a leakage level of the power gated circuit; and (iv) a control circuit, for receiving the mode indicator and the leakage indicator, and for selecting the value of the control signal based on the mode indicator and on the leakage indicator. | 2011-12-01 |