46th week of 2013 patent applcation highlights part 68 |
Patent application number | Title | Published |
20130305013 | MICROPROCESSOR THAT MAKES 64-BIT GENERAL PURPOSE REGISTERS AVAILABLE IN MSR ADDRESS SPACE WHILE OPERATING IN NON-64-BIT MODE - A microprocessor includes hardware registers that instantiate the IA-32 Architecture EDX and EAX GPRs and hardware registers that instantiate the Intel 64 Architecture R8-R15 GPRs. The microprocessor associates with each of the R8-R15 GPRs a respective unique MSR address. In response to an IA-32 Architecture RDMSR instruction that specifies the respective unique MSR address of one of the R8-R15 GPRs, the microprocessor reads the contents of the hardware register that instantiates the specified one of the R8-R15 GPRs into the hardware registers that instantiate the EDX:EAX registers. In response to an IA-32 Architecture WRMSR instruction that specifies the respective unique MSR address of one of the R8-R15 GPRs, the microprocessor writes into the hardware register that instantiates the specified one of the R8-R15 GPRs the contents of the hardware registers that instantiate the EDX:EAX registers. The microprocessor does so even when operating in non-64-modes. | 2013-11-14 |
20130305014 | MICROPROCESSOR THAT ENABLES ARM ISA PROGRAM TO ACCESS 64-BIT GENERAL PURPOSE REGISTERS WRITTEN BY X86 ISA PROGRAM - A microprocessor includes hardware registers that instantiate the Intel 64 Architecture R8-R15 GPRs. The microprocessor associates with each of the R8-R15 GPRs a respective unique MSR address. The microprocessor also includes hardware registers that instantiate the ARM Architecture GPRs. In response to an ARM MRRC instruction that specifies the respective unique MSR address of one of the R8-R15 GPRs, the microprocessor reads the contents of the hardware register that instantiates the specified one of the R8-R15 GPRs into the hardware registers that instantiate two of the ARM GPRs registers. In response to an ARM MCRR instruction that specifies the respective unique MSR address of one of the R8-R15 GPRs, the microprocessor writes into the hardware register that instantiates the specified one of the R8-R15 GPRs the contents of the hardware registers that instantiate two of the ARM Architecture GPRs registers. The hardware registers may be shared by the two Architectures. | 2013-11-14 |
20130305015 | PERFORMING A CYCLIC REDUNDANCY CHECKSUM OPERATION RESPONSIVE TO A USER-LEVEL INSTRUCTION - In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed. | 2013-11-14 |
20130305016 | PERFORMING A CYCLIC REDUNDANCY CHECKSUM OPERATION RESPONSIVE TO A USER-LEVEL INSTRUCTION - In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed. | 2013-11-14 |
20130305017 | COMPILED CONTROL CODE PARALLELIZATION BY HARDWARE TREATMENT OF DATA DEPENDENCY - An apparatus comprising a buffer and a processor. The buffer may be configured to store a plurality of fetch sets. The processor may be configured to perform a change of flow operation based upon at least one of (i) a comparison between addresses of two memory locations involved in each of two memory accessess, (ii) a first predefined prefix code, and (iii) a second predefined prefix code. | 2013-11-14 |
20130305018 | MFENCE and LFENCE Micro-Architectural Implementation Method and System - A system and method for fencing memory accesses. Memory loads can be fenced, or all memory access can be fenced. The system receives a fencing instruction that separates memory access instructions into older accesses and newer accesses. A buffer within the memory ordering unit is allocated to the instruction. The access instructions newer than the fencing instruction are stalled. The older access instructions are gradually retired. When all older memory accesses are retired, the fencing instruction is dispatched from the buffer. | 2013-11-14 |
20130305019 | Instruction and Logic to Control Transfer in a Partial Binary Translation System - A dynamic optimization of code for a processor-specific dynamic binary translation of hot code pages (e.g., frequently executed code pages) may be provided by a run-time translation layer. A method may be provided to use an instruction look-aside buffer (iTLB) to map original code pages and translated code pages. The method may comprise fetching an instruction from an original code page, determining whether the fetched instruction is a first instruction of a new code page and whether the original code page is deprecated. If both determinations return yes, the method may further comprise fetching a next instruction from a translated code page. If either determinations returns no, the method may further comprise decoding the instruction and fetching the next instruction from the original code page. | 2013-11-14 |
20130305020 | VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF - A vector friendly instruction format and execution thereof. According to one embodiment of the invention, a processor is configured to execute an instruction set. The instruction set includes a vector friendly instruction format. The vector friendly instruction format has a plurality of fields including a base operation field, a modifier field, an augmentation operation field, and a data element width field, wherein the first instruction format supports different versions of base operations and different augmentation operations through placement of different values in the base operation field, the modifier field, the alpha field, the beta field, and the data element width field, and wherein only one of the different values may be placed in each of the base operation field, the modifier field, the alpha field, the beta field, and the data element width field on each occurrence of an instruction in the first instruction format in instruction streams. | 2013-11-14 |
20130305021 | METHOD FOR CONVERGENCE ANALYSIS BASED ON THREAD VARIANCE ANALYSIS - Basic blocks within a thread program are characterized for convergence based on variance analysis or corresponding instructions. Each basic block is marked as divergent based on transitive control dependence on a block that is either divergent or comprising a variant branch condition. Convergent basic blocks that are defined by invariant instructions are advantageously identified as candidates for scalarization by a thread program compiler. | 2013-11-14 |
20130305022 | Speeding Up Younger Store Instruction Execution after a Sync Instruction - Mechanisms are provided, in a processor, for executing instructions that are younger than a previously dispatched synchronization (sync) instruction is provided. An instruction sequencer unit of the processor dispatches a sync instruction. The sync instruction is sent to a nest of one or more devices outside of the processor. The instruction sequencer unit dispatches a subsequent instruction after dispatching the sync instruction. The dispatching of the subsequent instruction after dispatching the sync instruction is performed prior to receiving a sync acknowledgement response from the nest. The instruction sequencer unit performs a completion of the subsequent instruction based on whether completion of the subsequent instruction is dependent upon receiving the sync acknowledgement from the nest and completion of the sync instruction. | 2013-11-14 |
20130305023 | EXECUTION OF A PERFORM FRAME MANAGEMENT FUNCTION INSTRUCTION - Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests. | 2013-11-14 |
20130305024 | METHOD AND SYSTEM USING EXCEPTIONS FOR CODE SPECIALIZATION IN A COMPUTER ARCHITECTURE THAT SUPPORTS TRANSACTIONS - A method and system uses exceptions for code specialization in a system that supports transactions. The method and system includes inserting one or more branchless instructions into a sequence of computer instructions. The branchless instructions include one or more instructions that are executable if a commonly occurring condition is satisfied and include one or more instructions that are configured to raise an exception if the commonly occurring condition is not satisfied. | 2013-11-14 |
20130305025 | METHOD FOR DYNAMIC LOADING OF OPERATING SYSTEMS ON BOOTABLE DEVICES - A method for booting is provided. A devices manager of a host operating system residing on a host machine (or a boot loader) disables resources of one or more bootable devices having resource conflicts. The device manager enables resources required by one of the one or more bootable device. The device manager initiates booting of the one of the one or more bootable device. If the one of the one or more bootable device fails to boot, the failed bootable device is identified as unavailable for booting. | 2013-11-14 |
20130305026 | SYSTEM AND METHOD FOR INPUT TOOL INVOCATION AND PROXY DEVICE - A system and a method for input tool invocation and a proxy device enable an installable operating system to perform input operation by invoking the input tool of a local operating system, such as a soft keyboard of the local operating system, an input method of the local operating system, or a soft keyboard and an input method of the local operating system. Even an operating system not installed with input tools can perform input operation by invoking an input tool of a local operating system, thereby avoiding repeated installations of input tools for different operating systems, and resolving the issue of large resource usage caused by repetitive installations of input tools. | 2013-11-14 |
20130305027 | MULTI-BIOS CIRCUIT AND SWITCHING METHOD BETWEEN MULTIPLE BIOS CHIPS - The present invention relates to a multi-BIOS circuit and a BIOS switching method accomplished through the circuit. The multi-BIOS circuit comprises at least two BIOS chips, a SPI Select chip is disposed between the BIOS chips and a Southbridge chip, the BIOS chips are connected to the SPI Select chip pins, and the SPI Select chip is connected to the Southbridge chip pins. The present invention can significantly enhance the safety of computers, and increases the stability as well as the convenience in use and operation. | 2013-11-14 |
20130305028 | METHOD AND APPARATUS FOR AUTHORIZING HOST TO ACCESS PORTABLE STORAGE DEVICE - A method and apparatus for authorizing a host to access a portable storage device and a method and apparatus of providing information for authorizing a host to access a portable storage device. The method includes: verifying integrity of host software requesting to transmit data; determining whether the host is authorized to access the portable storage device; and determining whether the host software is authorized to access the portable storage device. Accordingly, user information may be stored on the portable storage device and moved with security. | 2013-11-14 |
20130305029 | METHOD FOR AUTOMATIC START UP OF A COMMUNICATION TERMINAL CONFIGURED FOR VOICE COMMUNICATION ON A COMMUNICATION TERMINAL CONFIGURED FOR TEXT COMMUNICATION - In the case of a method or an arrangement for the automatic start up of a first communication terminal (EG A, EG B) configured for voice communication on at least one second communication terminal (CL A, CL B) configured for text communication, the voice communication between communication terminals is conveyed via at least one voice communication server (SCS) and the text communication between communication terminals is conveyed via at least one text communication server (TCS). The at least one voice communication server (SCS) and the at least one text communication server (TCS) exchange information via at least one conversion device (GW). The start up of at least one first communication terminal (CL A, CL B) is effected via the at least one text communication server (TCS), the at least one conversion device (GW) and the at least one voice communication server (SCS) to at least one second voice communication terminal (EG A, EG B). | 2013-11-14 |
20130305030 | TESTING A CONFIGURATION CHANGE - An approach is presented for testing a change (i.e., configuration change) in a configuration of a computing environment. A user identifier (ID) of a user is received from an administrative user having an administrative user ID. First configurable attributes of the user ID are determined. A temporary simulation user ID (TSID) having second configurable attributes is generated so that the values of respective first and second configurable attributes are identical. The configuration change is received. The configuration change is associated with the TSID and with no other user ID. Based on the configuration change being associated with the TSID and with no other user ID, a simulation is performed by tracking data record modifications made by the TSID and based on the configuration change. The user ID and administrative user ID are unaffected by the configuration change. After completing the simulation, the data record modifications are undone. | 2013-11-14 |
20130305031 | DIGITAL CONTROL DEVICE AND EXECUTION METHOD THEREOF - In a digital control device, when a normal mode for carrying out a normal process is selected by a mode switch, a computation unit transfers base process code and APL process code which controls the normal process from a code storage device to a main memory, loads the base process code and the APL process code which are transferred to the main memory, and carries out the normal process. When a test mode for carrying out a test process is selected by the mode switch, the computation unit transfers the base process code and test process code which controls the test process from the code storage device to the main memory, loads the base process code and the test process code which are transferred to the main memory, and carries out the test process. | 2013-11-14 |
20130305032 | ANONYMIZATION OF DATA WITHIN A STREAMS ENVIRONMENT - Streams applications may decrypt encrypted data even though the decrypted data is not used by an operator. Operator properties are defined to permit decryption of data within the operator based on a number of criteria. By limiting the number of operators that decrypt encrypted data, the anonymous nature of the data is further preserved. Operator properties also indicate whether an operator should send encrypted or decrypted data to a downstream operator. | 2013-11-14 |
20130305033 | DATA ENCRYPTION METHOD - A method performed by a computing system. Embodiments of the method include shifting source data by a shift amount and encrypting the shifted data with an encryption key to produce encrypted data. An encryption package is produced by removing a portion of the encrypted data. Decryption data is generated that includes the shift amount, the encryption key, the location in the encrypted data from which the data was removed, and the data that was removed. Copies of the encryption package are sent to remote client computing devices and the system waits until a decryption time. At the decryption time, copies of the decryption data are sent to the client computing devices, which are each configured to decrypt the encryption package using the decryption data to obtain the information of the source data at substantially the same time. | 2013-11-14 |
20130305034 | ANONYMIZATION OF DATA WITHIN A STREAMS ENVIRONMENT - Streams applications may decrypt encrypted data even though the decrypted data is not used by an operator. Operator properties are defined to permit decryption of data within the operator based on a number of criteria. By limiting the number of operators that decrypt encrypted data, the anonymous nature of the data is further preserved. Operator properties also indicate whether an operator should send encrypted or decrypted data to a downstream operator. | 2013-11-14 |
20130305035 | VIRTUAL TRANSPORTATION POINT OF SALE - Embodiments provided herein include techniques for enabling a mobile device to communicate with smart media in a manner that can sidestep the secure element of the mobile device—and the costs associated with it. The mobile device can communicate with the smart media using near-field communication (NFC) by creating an encrypted connection with a remote computer while bypassing a secure element of the mobile device. This allows the mobile device to provide point-of-sale (POS) functionality by reading and/or writing to the smart media, without compromising the security of the smart media. | 2013-11-14 |
20130305036 | TLS ABBREVIATED SESSION IDENTIFIER PROTOCOL - A method, system and computer program product related to an authentication security protocol, which associates a unique Abbreviated Session Identifier (ASI) with some application data packets transmitted, for example, from a client to a server. The present technology can be a modified version of the Transport Layer Security (TLS) protocol. A method of authentication comprises an initial setup comprising negotiating a secure network connection between client and server using TLS, providing a unique ASI by the server, associating the ASI with a TLS protocol session identifier, transmitting the unique ASI and the TLS protocol session identifier to the client, and establishing the secure network connection between the client and server. Subsequent data packets transferred between the client and server may include the unique ASI. | 2013-11-14 |
20130305037 | Method And Apparatus For Accelerating Connections In A Cloud Network - Various embodiments provide a method and apparatus of providing accelerated encrypted connections in a cloud network supporting transmission of data including per-user encrypted data. Transmission of encrypted data from an application server uses an encryption scheme that encrypts static data using a first encryption scheme that derives keys from the content itself and encrypts dynamic data, such as dynamic website content with personalized user data, using a second encryption scheme. | 2013-11-14 |
20130305038 | NETWORK SECURITY LOAD BALANCING - A website hosting system includes a request routing node and a plurality of security termination nodes coupled to the request routing node. Each security termination node is configured to secure connections between servers hosting websites and customers of the websites in accordance with a predetermined quality of service level. The request routing node balances incoming requests for secure websites among the security termination nodes based on an application-specific parameter (e.g., quantity of items in a product catalog, location, etc.). | 2013-11-14 |
20130305039 | CLOUD FILE SYSTEM - A cloud storage system supporting user agnostic encryption and deduplication of encrypted files is described. Further the cloud storage system enables users to share a file, a group of files, or an entire file system with other users without a user sending each file to the other users. The cloud storage system further allows a client device to minimize the utilization of bandwidth by determining whether the encrypted data to transfer is already present in the cloud storage system. Further the cloud storage system comprises mechanisms for a client device to inform the cloud storage system of which data is likely to be required in the future so that the cloud storage system can make that data available with less latency one the client device requests the data. | 2013-11-14 |
20130305040 | SECURE MESSAGING BY KEY GENERATION INFORMATION TRANSFER - A system is configured to receive a first authentication request from a first device, authenticate the first device, establish a secure connection with the first device based on authenticating the first device, and receive, via the secure connection with the first device, a set of parameters from the first device. The first device is capable of generating an encryption key for a secure message, intended for a second device, based on the set of parameters. The system is also configured to receive a second authentication request from a second device, authenticate the second device and establish a secure connection with the second device based on receiving the second authentication request, and send, via the secure connection with the second device, the set of parameters to the second device. The second user device is capable of generating a decryption key for the secure message based on the set of parameters. | 2013-11-14 |
20130305041 | METHOD, DEVICE, AND SYSTEM OF SECURE ENTRY AND HANDLING OF PASSWORDS - Devices, system, and methods of secure entry and handling of passwords and Personal Identification Numbers (PINs), as well as for secure local storage, secure user authentication, and secure payment via mobile devices and via payment terminals. A server includes: an authentication module to send, to a remote client device, a server authentication certificate; an accreditation certificate stored in a pre-defined location on the server, wherein the pre-defined location is accessible to the remote client device; wherein the accreditation certificate indicates a condition that the server authentication certificate needs to meet in order for the server authentication certificate to be accepted for authentication by the remote client device. | 2013-11-14 |
20130305042 | SYSTEM AND METHOD FOR ISSUING DIGITAL CERTIFICATE USING ENCRYPTED IMAGE - The disclosure relates to a system and method for issuing a digital certificate using an encrypted image, in which a digital certificate is sealed in a digital envelope image so as to protect a digital certificate user from damages caused by hacking, phishing attacks and the like in the course of issuance, update and re-issuance of the digital certificate, and the method for issuing a digital certificate comprises the steps of: storing a user select image for issuing the digital certificate, by a proxy server or a certificate server; and requesting the certificate server to issue the digital certificate and, if the digital certificate is issued, creating a sealed digital envelope image by combining the digital certificate with the user select image and transmitting the digital envelope image to a user terminal. | 2013-11-14 |
20130305043 | System and Methods to Perform Public Key Infrastructure (PKI) Operations in Vehicle Networks using One-Way Communications Infrastructure - A set of certificate management methods designed to significantly reduce or eliminate reliance on infrastructure network connectivity after vehicles are sold uses techniques to support certificate management operations in order to reduce the frequency which vehicles need to communicate with the Certificate Authorities (CAs) and the amount of data that needs to be exchanged between vehicles and the CA. These methods include, for example, approaches to use one-way communications and vehicle-to-vehicle (V2V) communications to replace expired certificates, approaches to use one-way communications and V2V communications to replace revoked certificates, and use of a small subset of vehicles as proxies to help retrieve and distribute Certificate Revocation Lists (CRLs) and replacement certificates. The combination of these techniques leads to solutions that can eliminate the need for roadside infrastructure networks completely. | 2013-11-14 |
20130305044 | Geothentication Based on New Network Packet Structure - A system and method for verifying and/or geolocating network nodes in a network in attenuated environments for cyber and network security applications are disclosed. The system involves an origination network node, a destination network node, and at least one router network node. The origination network node is configured for transmitting a data packet downstream to the destination network node through at least one router network node. The data packet contains a header portion and a payload data portion. At least one of the network nodes is an enabled network node. The enabled network node(s) is configured to verify any of the network nodes that are located upstream from the enabled network node(s) by analyzing the header portion and/or the payload data portion of the data packet. | 2013-11-14 |
20130305045 | INDISCRIMINATE VIRTUAL CONTAINERS FOR PRIORITIZED CONTENT-OBJECT DISTRIBUTION - A system may be provided for dynamically serving a content file with embedded content objects over the Internet to an end user system. A content object request function may receive a request for a webpage defined by the content file, the content file comprising embedded content objects. A content-file modifier may modify the content file to inject a reporting code that instructions to generate one or more reports comprising information relating to the content objects. A report receiver may receive the reports, the reports indicating where the content objects were rendered within the webpage. An object prioritizor may prioritize the content objects based on where the content objects were rendered. A delivery controller may adapt protocols for delivering the content objects to improve access to high-priority content objects. | 2013-11-14 |
20130305046 | System and Method for Virtual Machine Data Protection in a Public Cloud - According to one embodiment of the present disclosure, a method includes partitioning a disk image file into a plurality of segments. The method also includes generating a unique key for each segment, storing the unique keys in an image mapping file, and transmitting the image mapping file to a particular one of a plurality of nodes on a network. The method further includes transmitting a first segment and a second segment of the plurality of segments to different nodes of the plurality of nodes. | 2013-11-14 |
20130305047 | METHOD, AND DEVICE AND SYSTEM FOR UNLOCKING TERMINAL BY OPERATOR - The disclosure provides a method, device and system for unlocking a mobile terminal by an operator. The method includes the following steps. An operator device receives an unlocking request from the mobile terminal, wherein the unlocking request carries unlocking identification information; the operator device determines to allow the mobile terminal to unlock according to the unlocking identification information, and according to the unlocking identification information, queries a cryptographic key list database pre-stored in the operator device to obtain an unlocking cryptographic key; and the operator device sends the unlocking cryptographic key to the mobile terminal to ensure that the mobile terminal carries out the unlocking according to the unlocking cryptographic key. According to the disclosure, the problem of relatively poor safety of unlocking by a mobile terminal under the control of an operator is solved. | 2013-11-14 |
20130305048 | METHODS AND APPARATUSES FOR DISTRIBUTING KEYS FOR PTP PROTOCOL - The present invention provides a solution of automatically distributing PIP keys, and on that basis, provides a new encryption method. A domain control device is proposed to verify whether a network node is an eligible node in the domain; if the network node is an eligible node in the domain, then a key for the PTP protocol is sent to the network node. The methods and apparatuses according to the present invention enable access authentication of various forms of PTP network nodes, as well as the automatic configuration and dynamic sending of PTP keys, such that the security of the keys are significantly increased. Additionally, by means of SignCryption encryption algorithm, it is enabled that for each PTP message, not only message source authentication, message integrity authentication, message confidentiality, and replay protection can be provided, but also its sending network node can be tracked. Thus, the security is significantly increased. | 2013-11-14 |
20130305049 | SECURE MESSAGE TRANSFER AND STORAGE - Messages are transmitted from a computer sending device to a first main server. The first main server splits the message into a plurality of message parts and the plurality of message parts is transmitted to a plurality of parallel file servers. The message parts are stored in the file servers or are transmitted to a second main server. The second main server triggers the transmission of the plurality of message parts to the second main server and the second main server recombines the plurality of message parts to a complete message. The message is then transmitted from the second main server to the computer receiving device. The message transfer and the message part transfer are encrypted processes. | 2013-11-14 |
20130305050 | METHOD AND SYSTEM FOR ESTABLISHING TRUST BETWEEN A SERVICE PROVIDER AND A CLIENT OF THE SERVICE PROVIDER - Trust is established between a service provider ( | 2013-11-14 |
20130305051 | METHODS AND SYSTEMS FOR SERVER-SIDE KEY GENERATION - Systems and methods for generating credentials are described. A subject private key that has been encrypted with a session key and a subject public key are received. A storage session key is generated and the subject private key is encrypted with the storage session key. A storage private key is retrieved and the storage session key is encrypted with the storage private key. The subject private key encrypted with the storage session key and the encrypted storage session key are stored in a memory. | 2013-11-14 |
20130305052 | SYSTEM AND METHOD FOR OBTAINING AND SHARING MEDIA CONTENT - A device initialization method includes generating a license request for a personal media device. A timeout indicator may be obtained for a subscription associated with the personal media device. The license request and the timeout indicator may be combined to form a device license for the personal media device. The device license may be digitally-signed to form a signed device license. | 2013-11-14 |
20130305053 | SYSTEMS, METHODS, AND APPARATUS TO AUTHENTICATE COMMUNICATIONS MODULES - In one implementation, a communications module includes a host interface, a communications link interface, a memory, and a processor operatively coupled to the host interface, to the communications link interface, and to the memory. The memory includes a signature based on a data set and a private key of a key pair. The processor provides the data set and the signature via the host interface. | 2013-11-14 |
20130305054 | TRULY ANONYMOUS CLOUD KEY BROKER - Embodiments of systems and methods for providing anonymous cloud encryption are provided. One embodiment of a method for providing anonymous cloud encryption includes communicating an anonymizing token to a key broker. Additionally, the method may include communicating at least one encryption key associated with the anonymizing token to the key broker. The method may also include conducting a secure anonymous transaction with a cloud service using at least one of the encryption keys associated with the anonymizing token. | 2013-11-14 |
20130305055 | BIOMETRIC IDENTIFICATION METHOD - A biometric and cryptographic processing unit includes a biometric receiver receiving biometric information of a BCU user. A biometric unit of the BCU has a store of biometric information of an authorized BCU user and compares received biometric information with the stored biometric information to determine if the user is an authorized BCU user. A cryptographic unit generates/stores an asymmetric cryptographic public/private key pair associated with each authorized BCU user. An input/output port allows encrypted/unencrypted data to be input to/output from the BCU. The cryptographic unit operates in response to a specific authorized user giving permission to undertake a specific cryptographic operation on data input to the BCU only upon the specific authorized user being determined as an authorized BCU user, whereby a specific private key corresponding to the specific authorized user is enabled for use in the specific cryptographic operation after which the specific private key is disabled. | 2013-11-14 |
20130305056 | IN-CIRCUIT SECURITY SYSTEM AND METHODS FOR CONTROLLING ACCESS TO AND USE OF SENSITIVE DATA - The invention disclosed herein is an in-circuit security system for electronic devices. The in-circuit security system incorporates identity credential verification, secure data and instruction storage, and secure data transmission capabilities. It comprises a single semiconductor chip, and is secured using industry-established mechanisms for preventing information tampering or eavesdropping, such as the addition of oxygen reactive layers. This invention also incorporates means for establishing security settings, profiles, and responses for the in-circuit security system and enrolled individuals. The in-circuit security system can be used in a variety of electronic devices, including handheld computers, secure facility keys, vehicle operation/ignition systems, and digital rights management. | 2013-11-14 |
20130305057 | CRYPTOGRAPHIC ERASURE OF SELECTED ENCRYPTED DATA - Exemplary method, system, and computer program product embodiments for cryptographic erasure of selected encrypted data are provided. In one embodiment, by way of example only, data files are configured with a derived key. The derived keys adapted to be individually shredded in a subsequent erasure operation. The derived key allows for cryptographic erasure of the selected encrypted data in the data files without necessitating at least one of removal and rewrite of retained data. Additional system and computer program product embodiments are disclosed and provide related advantages. | 2013-11-14 |
20130305058 | CONTROLLING ENTERPRISE DATA ON MOBILE DEVICE VIA THE USE OF A TAG INDEX - A method, system and computer program product for controlling enterprise data on mobile devices. Data on a mobile device is tagged as being associated with either enterprise data or with personal data. Upon identifying the storage location of the tagged data and the identifier of the application that generated the tagged data, the tag, the storage location of the tagged data and the identifier of the application are stored in an index. A mobile agent residing on the mobile device may be directed by a mobile device management server of the enterprise to perform various actions (e.g., deleting, encrypting, backing-up) on the enterprise data using the index. In this manner, the enterprise has the ability to control their applications and data that resides on employees' mobile devices to ensure that such data is not lost or used in a manner that is contrary to the wishes of the employer. | 2013-11-14 |
20130305059 | Airport Security Check System and Method Therefor - A decryption system for decrypting user identification information encrypted on a storage device associated with a user identity document is disclosed. The system comprises: a server configured to collect user identity document data from the user and to construct a token including the user identity document data encoded in a machine readable form; a key construction unit communicatively coupled to a reader configured to read the data from the token and configured to read the data encoded on the storage device. The key construction unit uses the user identity document data read from the token to construct a key which enables the identity document reader to decrypt the user identification information stored on the storage device. | 2013-11-14 |
20130305060 | DISTRIBUTED STORAGE NETWORK DATA REVISION CONTROL - Multiple revisions of an encoded data slice are generated, with each revision having the same slice name. Each of the data slices represents the same original data portion, but each is encoded so that no single data slice can be used to reconstruct the original data portion. Appropriate revision numbers are associated with each encoded data slice, and the encoded data slices and associated revision numbers are transmitted for storage in selected storage units of a distributed storage network. If write confirmations are received from at least a write threshold number of storage units, a commit command is transmitted so that the most recently written data slices will be available for access. After a commit command is issued, a current directory used to access the encoded data slices can be sliced, encoded, and stored in the same way as the data slices. | 2013-11-14 |
20130305061 | DATA STORAGE DEVICE AND DATA PROTECTION METHOD - A flash memory includes a plurality of blocks. A controller encrypts a first file to produce a first encrypted file and stores the first encrypted file to the flash memory, wherein the controller further comprises a key generation module, an encryption/decryption module and a key eliminating module. The key generation module produces a first key according to a first write command of a host device, wherein the first key is stored in a first block of the blocks. The encryption/decryption module encrypts the first file according to the first key to produce a first encrypted file, wherein the first encrypted file is stored in at least one second block of the blocks. The key eliminating module deletes the first key stored in the first block according to a first eliminating command in order to invalidate the first encrypted file stored in the second block. | 2013-11-14 |
20130305062 | DEVICE AND METHOD FOR PROTECTING A SECURITY MODULE FROM MANIPULATION ATTEMPTS IN A FIELD DEVICE - A device for protecting a security module from manipulation attempts in a field device. A control device is configured to control the field device, a security module is configured to provide cryptographic key data which is to be used by the control device, and an interface device is connected to the control device. The security module is configured to allow the control device access to the cryptographic key data in the security module and to prevent access to the cryptographic key data in the event of a manipulation attempt on the field device. | 2013-11-14 |
20130305063 | UPS DEVICE AND UPS STRUCTURE WITH PROLONGED POWER SUPPLY - An uninterruptible power supply (UPS) device for providing a DC operating power to operate a motherboard is disclosed. The UPS device includes a main power supply system, a backup power supply system and a disable control unit. In a normal condition, the main power supply system converts and outputs a first DC standby power to the motherboard. The backup power supply system outputs a second DC standby power to the motherboard when the main power supply system is incapable of normally outputting the first DC standby power. The disable control unit receives a power supply-off signal outputted by the motherboard in a power-off state to generate a disable signal to the backup power supply system. In response to the disable signal, the backup power supply system stops outputting the second DC standby power to the motherboard. | 2013-11-14 |
20130305064 | ALLOCATING AND DISTRIBUTING POWER - Example apparatus and methods to allocate and distribute power are disclosed. An example apparatus includes an availability calculator to determine first and second power allocations based on an available power. The example apparatus includes a distributer to supply a first power to a first device and to supply a second power to a second device. The example apparatus includes a power identifier provider to send an identifier of the second power allocation to the second device. | 2013-11-14 |
20130305065 | CONTROLLER AND SEMICONDUCTOR SYSTEM - A controller is formed as one chip, and controls a voltage regulator that supplies a power supply voltage to a CPU. The controller includes: an input unit for receiving a monitor voltage for monitoring the power supply voltage applied to the CPU; a control unit for detecting that the power supply voltage is decreased to a target voltage by the monitor voltage with the voltage regulator being in OFF state in a discharge mode; and an output unit for outputting a result signal indicating to make transition to a normal mode, when the power supply voltage has reached the target voltage. The control unit includes a calculation circuit, which is operated in accordance with a program. The calculation circuit is provided between the input unit and the output unit. | 2013-11-14 |
20130305066 | METHODS, SYSTEMS AND APPARATUS FOR ENABLING AN ACCESSORY FOR USE WITH A HOST DEVICE - Methods, systems, and apparatus for enabling a power path between a power source and a host device via an accessory. A host device may send, to an accessory arranged within the power path, via a first data pin arranged in the host device, a request for an accessory identifier. The accessory identifier identifies the accessory. The host device may then determine whether the accessory identifier is received from the accessory within a specified period of time or whether a received accessory identifier is valid. If the accessory identifier is not received from the accessory within the specified period of time, or a received accessory identifier is not valid, the host device sends a new request for the accessory identifier to the accessory via a second data pin different than the first data pin. | 2013-11-14 |
20130305067 | DYNAMIC MANAGEMENT OF THERMAL LOADS - A method, system, and computer program product for dynamic management of thermal load in a data processing system are provided in the illustrative embodiments. A component of the data processing system is identified whose temperature has reached a temperature threshold, the component forming a critical component. A workload is selected from a set of workloads that is using the critical component. The workload is modified such that work performed by the critical component is reduced, the modifying further causing the temperature of the critical component to reduce below the temperature threshold. A power consumption of a cooling system associated with the thermal zone is reduced responsive to the temperature reducing below the temperature threshold. | 2013-11-14 |
20130305068 | Leakage Variation Aware Power Management For Multicore Processors - A system and method are provided to improve power efficiency of processor cores, such as processor cores in a multicore processor. A break-even time of a processor core may be determined that affects which power saving mode a processor core should enter when an expected idle of the processor core is identified. The break-even time of the processor core may be determined during run-time to help determine an applicable power saving mode that improves power efficiency of the processor core. | 2013-11-14 |
20130305069 | INFORMATION PROCESSING APPARATUS, CONTROL METHOD THEREOF, AND STORAGE MEDIUM - An information processing apparatus including a volatile storage unit, and is operated in any of a plurality of modes including a first power mode and a second power mode, power being supplied to the storage unit in the first power mode and the second power mode, power consumption in the first power mode being higher than power consumption in the second power mode. | 2013-11-14 |
20130305070 | DATA INTERFACE POWER CONSUMPTION CONTROL - Apparatus and techniques relating to data interface power consumption control are disclosed. Components of a data transfer module may be selectively moved between their normal operating states and reduced power states at times when the data transfer module is not to be used for transferring data. Decisions as to particular components that are to be moved to their reduced power states may be based on respective timing characteristics of the components and/or respective power consumption characteristics of the components, for example. In some embodiments, an action may be performed to reduce a powering up time of the data transfer module when normal operation of the data transfer module is to resume. In the case of a multiple-connection interface having respective data transfer modules for each connection, the interface may be partially shut down by moving a subset of the data transfer modules into reduced power states. | 2013-11-14 |
20130305071 | System and Method for Providing Dynamic Power Management - A power management system suitable for dynamically allocating power provided by a selected power source among one or more associated loads and methods for manufacturing and using same. In a normal operation mode, the power source provides power to one or more enabled loads. The selection of loads that are enabled, and therefore the provided power, can dynamically vary over time. If an undesired power condition arises, a power limiting mode is entered, wherein at least one of the enabled loads is disabled. The resultant power provided by the power source to the remaining enabled loads is measured, and the power limit mode is maintained until the undesired power condition is resolved. As needed, further corrective action, such as disabling additional enabled loads, can be applied to resolve the undesired power condition. The power management system thereby can comprise a hierarchical system for dynamically resolving undesired power conditions. | 2013-11-14 |
20130305072 | HOST APPARATUS CONNECTED TO IMAGE FORMING APPARATUS AND POWER SAVE MODE CONTROL METHOD THEREOF - A method of controlling a power save mode of an image forming apparatus connected to a host apparatus, the method includes: requesting information on a power mode of the image forming apparatus; transmitting the power mode information and information on an entering time for a power save mode of the image forming apparatus from the image forming apparatus; and displaying the entering time for the power save mode of the image forming apparatus on a basis of the entering time information. | 2013-11-14 |
20130305073 | CONTROLLING METHODS OF OPTICAL DISC DRIVE AND COMPUTER SYSTEM - A controlling method of an optical disc drive includes the following steps. After an optical disc is loaded into the optical disc drive, a start-up procedure is performed to acquire a disc parameter and a disc information of the optical disc. Then, the optical disc drive enters a ready state. If a command from the computer system is received within a predetermined time interval, the command is executed and the optical disc drive enters the ready state again. If no command is received within the predetermined time interval, the optical disc drive enters an idle state corresponding to the presence of the optical disc. Then, the disc parameter, the disc information and a power index tag are written into a non-volatile memory, and a power-interruptible event is issued to the computer system. | 2013-11-14 |
20130305074 | PROTOCOL FOR MEMORY POWER-MODE CONTROL - In one embodiment, a memory device includes a memory core and input receivers to receive commands and data. The memory device also includes a register to store a value that indicates whether a subset of the input receivers are powered down in response to a control signal. A memory controller transmits commands and data to the memory device. The memory controller also transmits the value to indicate whether a subset of the input receivers of the memory device are powered down in response to the control signal. In addition, in response to a self-fresh command, the memory device defers entry into a self-refresh operation until receipt of the control signal that is received after receiving the self-refresh command. | 2013-11-14 |
20130305075 | GENERATION OF ENERGY CONSUMPTION PROFILES - The subject matter described herein relates to a system and a method for generation of energy consumption profiles corresponding to a plurality of computing systems. For each of the plurality of the computing systems, a plurality of consumption parameters from at least one measurement device is received. The consumption parameters include a processor utilization parameter and an energy consumption parameter. Further, a normalization factor corresponding to each of the plurality of the computing systems is identified. Based on the normalization factor, the processor utilization parameter is normalized. Based on the normalized processor utilization parameter and the energy consumption parameter, the energy consumption profile is generated. The energy consumption profile is indicative of energy efficiency of the plurality of the computing systems. | 2013-11-14 |
20130305076 | UNATTENDED WAKEUP - Embodiments provide methods and apparatuses delaying unattended wakeup events based on the operating conditions. In one embodiment, the operating conditions may be detected by the computing device while in a first power state, wherein the unattended wakeup event is to transition the computing device to a second power state. | 2013-11-14 |
20130305077 | METHOD FOR SHARING A RESOURCE AND CIRCUIT MAKING USE OF SAME - A method is provided for interfacing a plurality of processing components with a shared resource. A token signal path is provided to allow propagation of a token through the processing components, wherein possession of the token enables a processing component to conduct a transaction with the shared resource. Token processing logic is provided for propagating the token from one processing component to another along the token signal path, the propagating being done at a propagation rate related to a transaction rate of the shared resource. The token processing logic also generates a trigger signal at least in part based on the token and propagates to trigger signal to the shared resource to convey initiation of a transaction with the shared resource. A circuit comprising a plurality of processing components and a shared resource is provided wherein the processing components and the shared resource interface with one another using the method proposed. | 2013-11-14 |
20130305078 | SYSTEM ON CHIP (SOC), METHOD OF OPERATING THE SOC, AND SYSTEM HAVING THE SOC - A data processing system, comprising: a PLL configured to receive a reference clock and to generate a common clock; a processing unit configured to output an operation condition data based on one of temperature, voltage, or process information; and at least two data processing circuits, each comprising: a first clock signal generator configured to receive the common clock signal, the first clock signal generator having a first clock latency adjusting circuit configured to adjust clock signal propagation delay based on the operation condition data; and a second clock signal generator configured to receive the common clock signal, the second clock signal generator having a second clock latency adjusting circuit configured to adjust clock signal propagation delay based on the operation condition data. | 2013-11-14 |
20130305079 | Memory Component that Samples Command/Address Signals in Response to Both Edges of a Clock Signal - A memory component has a signaling interface, data input/output (I/O) circuitry and command/address (CA) circuitry. The signaling interface includes an on-die terminated data I/O and an unterminated CA input. The data I/O circuitry is dedicated to sampling write data bits at the data I/O timed by a strobe signal and to transmitting read data bits timed by a first clock signal, each of the write and read data bits being valid for a bit time at the data I/O. The CA circuitry samples CA signals at the CA input in response to both rising-edge and falling-edge transitions of a second clock signal, the CA signals indicating read and write operations to be performed within the memory component. | 2013-11-14 |
20130305080 | Real-Time Event Storm Detection in a Cloud Environment - A method, an apparatus and an article of manufacture for detecting an event storm in a networked environment. The method includes receiving a plurality of events via a plurality of probes in a networked environment, each of the plurality of probes monitoring a monitored information technology (IT) element, aggregating the plurality of events received into an event set, and correlating the plurality of events in the event set to determine whether the plurality of events are part of an event storm by determining if the plurality of events in the event set meet one or more event storm criteria. | 2013-11-14 |
20130305081 | METHOD AND SYSTEM FOR DETECTING SYMPTOMS AND DETERMINING AN OPTIMAL REMEDY PATTERN FOR A FAULTY DEVICE - Computer-implemented systems, methods, and computer-readable media electronic for detecting symptoms and determining an optimal remedy pattern for one or more faulty components of a device is disclosed. First the symptoms of the faulty device are detected and associated faulty components of the device are identified. Different tests are performed to confirm the status of the faulty components. Based on the historical data, cost information and remedy cost function an optimal remedy pattern is determined. | 2013-11-14 |
20130305082 | RECOVERING INFORMATION - A first memory device receives session information associated with a session between a first network device and a user device. The first memory device outputs the session information associated with the session information. A second memory device receives the session information, associated with the session, from the first memory device. The second memory device receives a communication from the first memory device that the first network device is not functioning. The second memory device sends session information to a second network device, based on receiving the communication from the first network device that the first network device is not functioning, the second network device taking over the session from the first network device. | 2013-11-14 |
20130305083 | CLOUD SERVICE RECOVERY TIME PREDICTION SYSTEM, METHOD AND PROGRAM - A recovery schedule storing means ( | 2013-11-14 |
20130305084 | SERVER CONTROL AUTOMATION - Control over servers and partitions within a computer network may be automated to improve response to disaster events within the computer network. For example, a monitoring server may be configured to automatically monitor servers through remote communications sessions. A disaster event may be detected based on information received from the partitions and servers within the network. After a disaster event occurs, the monitoring server may automatically execute a script or take other action to make a backup server or partition available. For example, the monitoring server may stop and deactivate a first partition that has failed, activate a second partition that is a mirror image of the first partition, and start the second partition. | 2013-11-14 |
20130305085 | NETWORK TRAFFIC ROUTING - A service appliance is installed between production servers running service applications and service users. The production servers and their service applications provide services to the service users. In the event that a production server is unable to provide its service to users, the service appliance can transparently intervene to maintain service availability. To maintain transparency to service users and service applications, service users are located on a first network and production servers are located on a second network. The service appliance assumes the addresses of the service users on the second network and the addresses of the production servers on the first network. Thus, the service appliance obtains all network traffic sent between the production server and service users. While the service application is operating correctly, the service appliance forwards network traffic between the two networks using various network layers. | 2013-11-14 |
20130305086 | USING CACHE TO MANAGE ERRORS IN PRIMARY STORAGE - An occurrence of at least one storage error is determined in an addressable portion of a primary storage storing a block of data. In response to determining the occurrence of the at least one storage error, it is determined whether the block of data is available in cache storage. In response to determining the block of data is cached, the cached block of data is used rather than the block of data from the addressable portion of the primary storage. | 2013-11-14 |
20130305087 | METHOD AND SYSTEM FOR REAL-TIME ERROR MITIGATION - A method of organizing on-chip data memory in an embedded system-on-chip platform whereon a deterministic application needs to meet a guaranteed constraint on its functional system behavior is disclosed. In one aspect, the method includes: a) dividing the deterministic application into blocks one of which corresponds to a part of a subtask of the application, the block receiving input data and/or generating output data and including internal intermediate data for transforming the input data into the output data, b) splitting the internal intermediate data into state and non-state data, and c) putting the non-state data and a part of the state data in a protected buffering module being part of the data memory and being provided with an error detection and correction module, so that they are available for mitigating the effect of faults on the functional system behavior on-line while meeting the at least one guaranteed constraint. | 2013-11-14 |
20130305088 | ELECTRONIC DEVICE AND TEST CARD THEREOF - A testing card includes a power interface, a plurality of serial ports connected to a plurality of test instruments. The microprocessor includes a processing unit having been burnt with a plurality of test programs, the processing unit is configured to execute one of the test programs according a user selection and generate a test command, and a serial ports management unit configured to convert the test command into a control signal, and send the control signal to a corresponding test instrument via the corresponding one of the serial port to control the test instrument to test a target device. An electronic device using the test card is also provided. | 2013-11-14 |
20130305089 | MOTHERBOARD TESTING APPARATUS AND METHOD FOR TESTING - The present disclosure provides a motherboard testing apparatus and method. The motherboard testing method includes following steps. A motherboard testing apparatus is provided. The testing computer and the testing device are electrically connected to a motherboard. The testing computer runs an operating system based on the motherboard. The testing computer receives an input testing times and sends the input testing times and a running signal to the testing device. The testing device powers off the motherboard, reduces the input testing times by 1 to a current testing times after a period of determined time, and powers on the motherboard after determining that the current testing times is greater than 0. | 2013-11-14 |
20130305090 | TEST CONFIGURATION RESOURCE MANAGER - A test configuration resource manager and a method of managing test configuration resources in a network test system. A computer readable storage medium may store instructions that, when executed, cause a computing device to receive a user input identifying a portion of a first test configuration, store the identified portion of the first test configuration as a test configuration resource in a library of test configuration resources, receive a user input identifying a stored test configuration resource, retrieve the identified stored test configuration resource, and incorporate the retrieved test configuration resource into a second test configuration. The library of test configuration resources may include one or more of port resources, protocol resources, and traffic resources. | 2013-11-14 |
20130305091 | DRAG AND DROP NETWORK TOPOLOGY EDITOR FOR GENERATING NETWORK TEST CONFIGURATIONS - There is disclosed a method and apparatus for editing test configurations. The method includes displaying a graphical representation of a test configuration to be tested by a test system on a user interface and receiving user input identifying network topology to be added to the test configuration, the network topology including a device group defined by a number of emulated traffic sources, a set of protocols and a number of ports. The method further includes updating the graphical representation of the test configuration to include the network topology; the graphical representation of the network topology including graphical representations of the test system, the emulated traffic sources, the set of protocols, and the number of ports connecting the emulated traffic sources to the test system. | 2013-11-14 |
20130305092 | Problem Determination and Diagnosis in Shared Dynamic Clouds - A method, an apparatus and an article of manufacture for problem determination and diagnosis in a shared dynamic cloud environment. The method includes monitoring each virtual machine and physical server in the shared dynamic cloud environment for at least one metric, identifying a symptom of a problem and generating an event based on said monitoring, analyzing the event to determine a deviation from normal behavior, and classifying the event as a cloud-based anomaly or an application fault based on existing knowledge. | 2013-11-14 |
20130305093 | Problem Determination and Diagnosis in Shared Dynamic Clouds - Techniques for problem determination and diagnosis in a shared dynamic cloud environment. A method includes monitoring each virtual machine and physical server in the shared dynamic cloud environment for at least one metric, identifying a symptom of a problem and generating an event based on said monitoring, analyzing the event to determine a deviation from normal behavior, and classifying the event as a cloud-based anomaly or an application fault based on existing knowledge. | 2013-11-14 |
20130305094 | OBSERVABILITY CONTROL WITH OBSERVABILITY INFORMATION FILE - Methods of managing observability code in an application program include generating an application program including an observability point, the observability point including a location in the application at which observability code, or a call to observability code, can be inserted, loading the application program into a memory of a target system, retrieving observability information from an observability point information file, and inserting the observability code, or the call to the observability code, at the observability point in the memory of the target system using the observability information retrieved from the observability point information file. | 2013-11-14 |
20130305095 | METHOD FOR GENERATING TEST DATA FOR EVALUATING PROGRAM EXECUTION PERFORMANCE - Test data used in evaluating the performance of a program is generated. First, a source program targeted for performance evaluation, sample data, and a generation parameter used for determining the size of the test data to be generated are received from an input device. A processor then executes the source program using the sample data and obtains the number of executions for each of a plurality of statements in the source program. In addition, on the basis of the obtained number of executions, the processor generates test data having a size that is a multiple of the generation parameter of the sample data size, the test data being such that the frequency of executions for each of the plurality of statements in the source program is the same as the frequency of executions for each of the plurality of statements when executing the source program using the sample data. | 2013-11-14 |
20130305096 | SYSTEM AND METHOD FOR MONITORING WEB SERVICE - Provided are a system and a method for monitoring a web service. The web service monitoring system includes a management module configured to provide an interface for receiving an test scenario and a policy for a simulation test of a target system from an administrator and outputting the simulation test result of the target system to the administrator, a database configured to store the received policy and test scenario, and an agent configured to access the target system according to the test scenario and the policy stored in the database and carry out the simulation test of the target system. | 2013-11-14 |
20130305097 | COMPUTER PROGRAM TESTING - To centrally manage execution of tests of software in an event oriented manner, a test execution engine reads a first test case from a test case component, where the test case represents tasks that have to be run to test a first procedure of a software program under evaluation. Further, the test execution engine identifies a participant node configured for sending events to an event queue and obtains events from the event queue. With those obtained events, the test execution engine evaluates whether the first procedure of the software program executed successfully and indicates whether the first procedure executed properly. The participant node has a node agent transmits events about the procedure and the first test case to the event queue. | 2013-11-14 |
20130305098 | METHODS, MEDIA, AND SYSTEMS FOR DETECTING AN ANOMALOUS SEQUENCE OF FUNCTION CALLS - Methods, media, and systems for detecting an anomalous sequence of function calls are provided. The methods can include compressing a sequence of function calls made by the execution of a program using a compression model; and determining the presence of an anomalous sequence of function calls in the sequence of function calls based on the extent to which the sequence of function calls is compressed. The methods can further include executing at least one known program; observing at least one sequence of function calls made by the execution of the at least one known program; assigning each type of function call in the at least one sequence of function calls made by the at least one known program a unique identifier; and creating at least part of the compression model by recording at least one sequence of unique identifiers. | 2013-11-14 |
20130305099 | METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT - A method for retrieving trace data from a target device is proposed. The target device comprises a program memory, a processor, a trace unit, and a trace buffer. The processor is operable to retrieve instructions from the program memory and to execute them. The trace buffer may contain trace data generated by the trace unit in response to the processor retrieving or executing instructions from the program memory. One or more patch instructions are written to the program memory. The processor executes said one or more patch instructions. The target device, in response to the processor executing said one or more patch instructions, performs a data transfer operation for copying the trace data from the trace buffer to a second memory outside the target device. | 2013-11-14 |
20130305100 | System and method for predicting and avoiding network downtime - This invention teaches how to use prediction software and algorithms to minimize the risk of failure, and to increase the likelihood of success of information technology (IT) and telecommunications system changes. The method identifies the systems, people, documents and other unanticipated consequences of system changes. The invention teaches how use of the prediction software and algorithms allow system administrators to find more advantageous ways and times to perform system changes. | 2013-11-14 |
20130305101 | Techniques for Autonomic Reverting to Behavioral Checkpoints - Aspect methods, systems and devices may be configured to create/capture checkpoints without significantly impacting the performance, power consumption, or responsiveness of the mobile device. An observer module of the mobile device may instrument or coordinate various application programming interfaces (APIs) at various levels of the mobile device system and constantly monitor the mobile device (via a low power process, background processes, etc.) to identify the normal operation patterns of the mobile device and/or to identify behaviors that are not consistent with previously computed normal operation patterns. The mobile device may store mobile device state information in a memory as a stored checkpoint when it determines that the mobile device behaviors are consistent with normal operation patterns, and upload a previously stored checkpoint to a backup storage system when it determines that the mobile device behaviors are not consistent with normal operation patterns. | 2013-11-14 |
20130305102 | AUTOMATED TROUBLE TICKET GENERATION - Control over servers and partitions within a computer network may be automated to improve response to disaster events within the computer network. For example, a monitoring server may be configured to automatically monitor servers through remote communications sessions. A disaster event may be detected based on information received from the partitions and servers within the network. When a disaster event or events leading to a disaster event are detected, a trouble ticket may be generated. The trouble ticket may also generate an alert displayed to an administrator through a customized hierarchical graphical display. When the administrator is not logged in, messages may be generated to alert the administrator to the problem. The administrator may then log in remotely and respond to the alert. | 2013-11-14 |
20130305103 | RELEVANT ALERT DELIVERY IN A DISTRIBUTED PROCESSING SYSTEM WITH EVENT LISTENERS AND ALERT LISTENERS - Relevant alert delivery including determining, by an events listener associated with an event queue, whether one or more events in an events queue have not been assigned to any events pool by any event analyzer; and if one or more events in the events queue have not been assigned to any events pool, identifying by the events listener in dependence upon the event analysis rules one or more alerts; sending by the event listener to an alerts queue all the alerts identified by the event listener; the alerts queue having an associated alerts listener; determining whether one or more alerts in the alerts queue have not been assigned to any alert pool; if one or more alerts in the alerts queue have not been assigned to any alerts pool, and determining in dependence upon alert analysis rules whether to suppress the alerts; and transmitting the unsuppressed alerts. | 2013-11-14 |
20130305104 | DEVICE FAULT HANDLING SYSTEM AND COMMUNICATION-COMPATIBLE DEVICE - A device fault handling system includes a host device provided on a network and a communication-compatible device that enables communication with the host device through the network. The communication-compatible device is configured to send to the host device fault event information indicating an occurrence of a fault in a specific function of the communication-compatible device, and the host device is configured to provide notification of query information to the user, based on the fault event information, as to whether the fault is to be handled by the user or whether the fault is to be handled on a host device side. | 2013-11-14 |
20130305105 | DETERMINISTIC DATA VERIFICATION IN STORAGE CONTROLLER - Exemplary method, system, and computer program embodiments for performing deterministic data verification by a storage controller are provided. Each of a plurality of concurrent write tasks is configured to be placed in a plurality of overlapping data storage ranges by performing at least one of: implementing a data generation function for generating pseudo-random data using a data seed, and generating a range map, the range map utilized as a lookup data structure to verify a chronological order for performing the plurality of concurrent write tasks, wherein a data address space is first designated in the range map as undetermined. Each of a plurality of read tasks is analyzed by comparing data read from a sub range in the plurality of overlapping data storage ranges against the data seed associated with the sub range. | 2013-11-14 |
20130305106 | INTEGRATED CIRCUITS CAPABLE OF GENERATING TEST MODE CONTROL SIGNALS FOR SCAN TESTS - Various embodiments of methods and integrated circuits capable of generating a test mode control signal for a scan test through a scan chain (such as in an integrated circuit) are provided. The integrated circuit includes a test pattern detection block, a counter circuit, and a control circuit. The test pattern detection block is configured to receive a detection pattern and to detect a first pattern corresponding to a shift phase and a second pattern corresponding to a capture phase of a test pattern based on the detection pattern and to generate a trigger signal based upon the detection of the patterns. The control circuit generates and controls the test mode control signal based on the count states. The counter circuit is configured to generate one or more count states corresponding to one of the shift phase, the capture phase and the clock signal based on the detected pattern. | 2013-11-14 |
20130305107 | ON-CHIP COMPARISON AND RESPONSE COLLECTION TOOLS AND TECHNIQUES - Disclosed herein are exemplary embodiments of a so-called “X-press” test response compactor. Certain embodiments of the disclosed compactor comprise an overdrive section and scan chain selection logic. Certain embodiments of the disclosed technology offer compaction ratios on the order of 1000×. Exemplary embodiments of the disclosed compactor can maintain about the same coverage and about the same diagnostic resolution as that of conventional scan-based test scenarios. Some embodiments of a scan chain selection scheme can significantly reduce or entirely eliminate unknown states occurring in test responses that enter the compactor. Also disclosed herein are embodiments of on-chip comparator circuits and methods for generating control circuitry for masking selection circuits. | 2013-11-14 |
20130305108 | 1149.1 TAP LINKING MODULES - IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations. | 2013-11-14 |
20130305109 | HIERARCHICAL ACCESS OF TEST ACCESS PORTS IN EMBEDDED CORE INTEGRATED CIRCUITS - An integrated circuit can have plural core circuits, each having a test access port that is defined in IEEE standard 1149.1. Access to and control of these ports is though a test linking module. The test access ports on an integrated circuit can be arranged in a hierarchy with one test linking module controlling access to plural secondary test linking modules and test access ports. Each secondary test linking module in turn can also control access to tertiary test linking modules and test access ports. The test linking modules can also be used for emulation. | 2013-11-14 |
20130305110 | REDUCED SIGNALING INTERFACE METHOD & APPARATUS - This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is limited. The bus may be used for a variety of serial communication operations such as, but not limited to, serial communication related test, emulation, debug, and/or trace operations of an IC or core design. Other aspects of the disclosure include the use of reduced pin buses for emulation, debug, and trace operations and for functional operations. In a fifth aspect of the present disclosure, an interface select circuit, FIGS. | 2013-11-14 |
20130305111 | Circuit And Method For Simultaneously Measuring Multiple Changes In Delay - A circuit and method provide built-in measurement of delay changes in integrated circuit paths. The circuit includes a digital shift register to access multiple paths, and may be implemented in digital boundary scan to test I/O pin delays. Synchronous to a first frequency, the circuit applies an alternating signal to the paths and samples the paths' output logic values synchronous with a second frequency that is asynchronous and coherent to the first clock frequency. The shift register conveys the samples to a modulo counter that counts the number of samples between consecutive rising or consecutive falling edges in the signal samples from a selected path. Between the two edges, the path or a path characteristic is changed, and the resulting modulo count after the second edge is proportional to the change in delay. The circuit can compare the count, or the difference between counts, to test limits. | 2013-11-14 |
20130305112 | Method and Apparatus for Diagnosing an Integrated Circuit - System and method for diagnosing failures within an integrated circuit is provided. In an embodiment, the apparatus includes a diagnostic cell coupled in series with a buffer chain. The diagnostic cell includes a plurality of logic operators that when activated invert a signal received from the buffer chain. The inversion of the signal from the buffer chain allows the diagnostic cell to determine the location of a failure within an integrated circuit previously determined by a scan chain design for test methodology to contain a failure. | 2013-11-14 |