44th week of 2011 patent applcation highlights part 15 |
Patent application number | Title | Published |
20110266635 | Native Devices Having Improved Device Characteristics and Methods for Fabrication - A method for fabricating a native device is presented. The method includes forming a gate structure over a substrate starting at an outer edge of an inner marker region, where the gate structure extends in a longitudinal direction, and performing MDD implants, where each implant is performed using a different orientation with respect to the gate structure, performing pocket implants, where each implant is performed using a different orientation with respect to the gate structure, and concentrations of the pocket implants vary based upon the orientations. A transistor fabricated as a native device, is presented, which includes an inner marker region, an active outer region which surrounds the inner marker region, a gate structure coupled to the inner marker region, and first and second source/drain implants located within the active outer region and interposed between the first source/drain implant and the second source/drain implant. | 2011-11-03 |
20110266636 | METHOD FOR FORMING AN OFFSET SPACER OF A MOS DEVICE - A method for forming an offset spacer of a MOS device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon; forming a dielectric stack on the substrate and the gate structure, wherein the dielectric stack comprises a first dielectric layer, a second dielectric layer, a third dielectric layer, and a fourth dielectric layer; and performing an etching process on the dielectric stack to form an offset spacer around the gate structure. | 2011-11-03 |
20110266637 | Precise Resistor on a Semiconductor Device - A method includes forming a polysilicon layer on a substrate; and patterning the polysilicon layer to form a polysilicon resistor and a polysilicon gate. A first ion implantation is performed on the polysilicon resistor to adjust electric resistance of the polysilicon resistor. A second ion implantation is performed on a top portion of the polysilicon resistor such that the top portion of the polysilicon resistor has an enhanced etch resistance. An etch process is then used to remove the polysilicon gate while the polysilicon resistor is protected by the top portion. | 2011-11-03 |
20110266638 | Semiconductor Device Comprising Contact Elements and Metal Silicide Regions Formed in a Common Process Sequence - A metal silicide in sophisticated semiconductor devices may be provided in a late manufacturing stage on the basis of contact openings, wherein the deposition of the contact material, such as tungsten, may be efficiently combined with the silicidation process. In this case, the thermally activated deposition process may initiate the formation of a metal silicide in highly doped semiconductor regions. | 2011-11-03 |
20110266639 | Method of Producing a MEMS Device - A method of producing a MEMS device removes the bottom side of a device wafer after its movable structure is formed. To that end, the method provides the device wafer, which has an initial bottom side. Next, the method forms the movable structure on the device wafer, and then removes substantially the entire initial bottom side of the device wafer. Removal of the entire initial bottom side effectively forms a final bottom side. | 2011-11-03 |
20110266640 | ACOUSTIC SENSOR AND METHOD OF MANUFACTURING THE SAME - An acoustic sensor lengthens the portion of the beam portion not fixed with the anchor without lowering the strength of the beam portion and the supporting strength of the diaphragm. On an upper surface of a silicon substrate, a beam portion made of polysilicon is formed through a second sacrifice layer made of silicon dioxide film on an extended portion of a first sacrifice layer made of polysilicon. The extended portion is formed under a region excluding a distal end of the beam portion. The extended portion is removed by etching from a back chamber arranged in the silicon substrate to form a hollow portion in a region excluding the distal end of the lower surface of the beam portion, and then the second sacrifice layer is removed by etching. The second sacrifice layer remaining on the lower surface of the distal end of the beam portion forms an anchor. | 2011-11-03 |
20110266641 | SILICON CONDENSER MICROPHONE HAVING AN ADDITIONAL BACK CHAMBER AND A FABRICATION METHOD THEREFOR - A fabrication method of a silicon condenser microphone having an additional back chamber. The method includes applying an adhesive on a substrate and mounting a chamber container thereon by using a mounter; curing the adhesive holding the chamber container; applying an adhesive on the chamber container and mounting a micro electro mechanical system (MEMS) chip thereon by using a mounter; curing the adhesive holding the MEMS chip; and attaching the substrate on which devices are mounted to a case, wherein a back chamber formed by the chamber container is added to a back chamber of the MEMS chip. Therefore, a silicon condenser microphone fabricated by using the method may have improved sensitivity by increasing the small back chamber space of the a micro electro mechanical system (MEMS) chip itself and reduced noise including total harmonic distortion (THD). | 2011-11-03 |
20110266642 | METHOD FOR PRODUCING A MAGNETIC TUNNEL JUNCTION AND MAGNETIC TUNNEL JUNCTION THUS OBTAINED - According to this method for producing a magnetic tunnel junction, a film of a dielectric material capable of acting as a tunnel barrier is deposited between two nanocrystalline or amorphous magnetic films. The dielectric material constituting the tunnel barrier consists of an at least partially crystalline perovskite, and said material is deposited by ion beam sputtering in a vacuum chamber. | 2011-11-03 |
20110266643 | Solid state neutron detector - A low-cost device for the detection of thermal neutrons. Thin layers of a material chosen for high absorption of neutrons with a corresponding release of ionizing particles are stacked in a multi-layer structure interleaved with thin layers of hydrogenated amorphous silicon PIN diodes. Some of the neutrons passing into the stack are absorbed in the neutron absorbing material producing neutron reactions with the release of high energy ionizing particles. These high-energy ionizing particles pass out of the neutron absorbing layers into the PIN diode layers creating electron-hole pairs in the intrinsic (I) layers of the diode layers; the electrons and holes are detected by the PIN diodes. | 2011-11-03 |
20110266644 | SEMICONDUCTOR PHOTODETECTION ELEMENT - A semiconductor photodetection element SP has a silicon substrate | 2011-11-03 |
20110266645 | Back Side Illuminated Image Sensor With Back Side Pixel Substrate Bias - Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor also includes an isolation feature disposed in the substrate. The image sensor further includes a radiation-sensing region disposed in the substrate and adjacent to the isolation feature. The radiation-sensing region is operable to sense radiation projected toward the radiation-sensing region from the back side. The image sensor also includes a transparent conductive layer disposed over the back side of the substrate. | 2011-11-03 |
20110266646 | SEMICONDUCTOR DEVICE - A digital circuit portion ( | 2011-11-03 |
20110266647 | Methods of Forming Isolated Active Areas, Trenches, and Conductive Lines in Semiconductor Structures and Semiconductor Structures Including the Same - Methods of pitch doubling of asymmetric features and semiconductor structures including the same are disclosed. In one embodiment, a single photolithography mask may be used to pitch double three features, for example, of a DRAM array. In one embodiment, two wordlines and a grounded gate over field may be pitch doubled. Semiconductor structures including such features are also disclosed. | 2011-11-03 |
20110266648 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches having protruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form device isolation regions having protruding portions at sidewalls, wherein the device isolation regions decrease a portion of a width of active regions. | 2011-11-03 |
20110266649 | Semiconductor device - A semiconductor device includes a SOI (silicon on insulator) substrate having a first region and a second region, a multilayer wiring layer formed on the SOI substrate and having an insulating layer and a wiring layer alternately stacked in this order, a first inductor formed over the SOI substrate, and a second inductor formed over the SOI substrate and positioned above the first inductor. | 2011-11-03 |
20110266650 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a semiconductor device includes a semiconductor substrate, a first conductivity type region, a device isolation insulating film, a second conductivity type region, and a low concentration region. The first conductivity type region is formed in part of the semiconductor substrate. The device isolation insulating film is formed in an upper surface of the semiconductor substrate and includes an opening formed in part of an immediately overlying region of the first conductivity type region. The second conductivity type region is formed in the opening and is in contact with the first conductivity type region. The low concentration region is formed along a side surface of the opening, has second conductivity type, has an effective impurity concentration lower than an effective impurity concentration of the second conductivity type region, and separates an interface of the first conductivity type region and the second conductivity type region from the device isolation insulating film. | 2011-11-03 |
20110266651 | METHOD FOR MANUFACTURING COMPONENTS - The invention relates to a method for manufacturing components on a mixed substrate. It comprises the following steps: —providing a substrate of the semiconductor-on-insulator (SeOI) type comprising a buried oxide layer between a supporting substrate and a thin layer, —forming in this substrate a plurality of trenches opening out at the free surface of the thin layer and extending over a depth such that it passes through the thin layer and the buried oxide layer, these primary trenches delimiting at least one island of the SeOI substrate, —forming a mask inside the primary trenches and as a layer covering the areas of the free surface of the thin layer located outside the islands, —proceeding with heat treatment for dissolving the buried oxide layer present at the island, so as to reduce the thickness thereof. | 2011-11-03 |
20110266652 | Semiconductor Package with Penetrable Encapsulant Joining Semiconductor Die and Method Thereof - A semiconductor device includes a first substrate. A first semiconductor die is mounted to the first substrate. A bond wire electrically connects the first semiconductor die to the first substrate. A first encapsulant is deposited over the first semiconductor die, bond wire, and first substrate. The first encapsulant includes a penetrable, thermally conductive material. In one embodiment, the first encapsulant includes a viscous gel. A second substrate is mounted over a first surface of the first substrate. A second semiconductor die is mounted to the second substrate. The second semiconductor die is electrically connected to the first substrate. The first substrate is electrically connected to the second substrate. A second encapsulant is deposited over the first semiconductor die and second semiconductor die. An interconnect structure is formed on a second surface of the first substrate, opposite the first surface of the first substrate. | 2011-11-03 |
20110266653 | SEMICONDUCTOR DEVICE HAVING A FUSE ELEMENT - A portion-to-be-melted of a fuse is surrounded by plates, so that heat to be generated in a meltdown portion of the fuse under current supply can be confined or accumulated in the vicinity of the meltdown portion of the fuse. This makes it possible to facilitate meltdown of the fuse. The meltdown portion of the fuse in a folded form, rather than in a single here a fuse composed of a straight-line form, is more successful in readily concentrating the heat generated in the fuse under current supply into the meltdown portion, and in further facilitating the meltdown of the fuse. | 2011-11-03 |
20110266654 | POWER STORAGE DEVICE AND METHOD FOR MANUFACTURING THE SAME - Provided is a method for manufacturing a power storage device in which a crystalline silicon layer including a whisker-like crystalline silicon region is formed as an active material layer over a current collector by a low-pressure CVD method in which heating is performed using a deposition gas containing silicon. The power storage device includes the current collector, a mixed layer formed over the current collector, and the crystalline silicon layer functioning as the active material layer formed over the mixed layer. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region including a plurality of protrusions which project over the crystalline silicon region. With the protrusions, the surface area of the crystalline silicon layer functioning as the active material layer can be increased. | 2011-11-03 |
20110266655 | SEMICONDUCTOR WAFER HAVING MULTILAYER FILM, METHOD FOR PRODUCING THE SAME, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - A method for producing a semiconductor wafer having a multilayer film, in production of a semiconductor device by the steps of forming a porous layer on a surface of a semiconductor wafer by changing a surface portion into the porous layer, forming a semiconductor film on a surface of the porous layer to produce a semiconductor wafer having a multilayer film, fabricating a device on the semiconductor film, and producing the semiconductor device by delaminating the semiconductor film along the porous layer, the semiconductor film having the device formed thereon, including flattening the semiconductor wafer after delaminating and reusing the flattened semiconductor wafer, the method further including a thickness adjusting step of adjusting a whole thickness of the semiconductor wafer having a multilayer film to be produced by reusing the semiconductor wafer so as to satisfy a predetermined standard. | 2011-11-03 |
20110266656 | Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue - A semiconductor device has a build-up interconnect structure formed over an active surface of a semiconductor wafer containing a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the interconnect structure. Bumps are formed over the interconnect structure. A protective coating material is deposited over the insulating layer and saw street. A lamination tape is applied over the coating material. A portion of a back surface of the semiconductor wafer is removed. A mounting tape is applied over the back surface. The lamination tape is removed while leaving the coating material over the insulating layer and saw street. A first channel is formed through the saw street extending partially through the semiconductor wafer. The coating material is removed after forming the first channel. A second channel is formed through the saw street and the mounting tape is removed to singulate the semiconductor wafer. | 2011-11-03 |
20110266657 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region. | 2011-11-03 |
20110266658 | ISOLATED WIRE BOND IN INTEGRATED ELECTRICAL COMPONENTS - An electrical component includes a semiconductor layer having a first conductivity type and a interconnect layer disposed adjacent to a frontside of the semiconductor layer. At least one bond pad is disposed in the interconnect layer and formed adjacent to the frontside of the semiconductor layer. An opening formed from the backside of the semiconductor layer and through the semiconductor layer exposes at least a portion of the bond pad. A first region having a second conductivity type extends from the backside of the semiconductor layer to the frontside of the semiconductor layer and surrounds the opening. The first region can abut a perimeter of the opening or alternatively, a second region having the first conductivity type can be disposed between the first region and a perimeter of the opening. | 2011-11-03 |
20110266659 | TECHNIQUE FOR STABLE PROCESSING OF THIN/FRAGILE SUBSTRATES - A semiconductor on insulator (SOI) wafer includes a semiconductor substrate having first and second main surfaces opposite to each other. A dielectric layer is disposed on at least a portion of the first main surface of the semiconductor substrate. A device layer has a first main surface and a second main surface. The second main surface of the device layer is disposed on a surface of the dielectric layer opposite to the semiconductor substrate. A plurality of intended die areas are defined on the first main surface of the device layer. The plurality of intended die areas are separated from one another. A plurality of die access trenches are formed in the semiconductor substrate from the second main surface. Each of the plurality of die access trenches are disposed generally beneath at least a respective one of the plurality of intended die areas. | 2011-11-03 |
20110266660 | INSULATING FILM FOR SEMICONDUCTOR DEVICE, PROCESS AND APPARATUS FOR PRODUCING INSULATING FILM FOR SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND PROCESS FOR PRODUCING THE SEMICONDUCTOR DEVICE - An object is to provide an insulating film for a semiconductor device which has characteristics of a low permittivity, a low leakage current, and a high mechanical strength, undergoes less change in these characteristics with the elapse of time, and has an excellent water resistance, as well as to provide a process and an apparatus for producing the insulating film for a semiconductor device, a semiconductor device, and a process for producing the semiconductor device. A gas containing a raw material gas which gasified a predetermined alkylborazine compound is supplied in a chamber ( | 2011-11-03 |
20110266661 | LEAD FRAME AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME - A semiconductor device is manufactured using a lead frame for a mold array package (MAP) where multiple mount parts are arranged in the shape of an array, each configured to have a semiconductor chip mounted thereon. Multiple leads for coupling to the semiconductor chip are formed in each of the mount parts of the lead frame. The tips of the leads are mutually coupled by tie bars thinner than the leads. A dummy lead having a slot coupling to the tie bar is formed on a portion corresponding to a portion further outside the tie bar and corresponding to a portion where the lead is formed in the mount parts at predetermined locations among the mount parts. Once the resin is supplied, air in a tie bar part is pushed out into the slot of the dummy lead; therefore, generation of void in the tie bar part can be controlled. | 2011-11-03 |
20110266662 | Leadframe enhancing molding compound bondability and package structure thereof - A leadframe enhancing molding compound bondability includes a chip base and a pin holder. The chip bases includes a chip pad and a support, wherein the chip pad includes a side protrusion extending out of the support, and the side protrusion has a lower surface, and the support has a sidewall, and wherein the lower surface and the sidewall interconnect at an intersection line, and the lower surface is formed upwardly with a recess. Further, a pin holder includes a pin stand and a seat, wherein the pin stand has an edge portion extending out of the seat, the edge portion has a lower surface, the seat has a sidewall, and the lower surface and the sidewall interconnect at a crossing line. The lower surface of the pin stand is formed upward with a recess. As such, the bondability between the leadframe and the molding compound can be greatly enhanced. | 2011-11-03 |
20110266663 | LEAD FRAME BASED SEMICONDUCTOR PACKAGE AND A METHOD OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor package, where the package includes a surface for attachment of the package to a device by a joint formed of a connective material in a joint area of the surface. The method is characterized in that it comprises the step of patterning one or more channels on the surface which channels extend away from the joint area towards an edge of the surface. Also the method has the step of applying a compound to one or more channels which compound interacts with the connective material, such that when the semiconductor package is attached to the device the interaction defines one or more paths in the connective material. These correspond to the one or more channels on the surface and allow the passage of waste material away from the joint area to the outer edge of the surface. | 2011-11-03 |
20110266664 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: applying a conductive material on a support structure; providing a bottom integrated circuit package having a bottom lead extended therefrom; attaching the bottom lead to the conductive material; stacking a top integrated circuit package over the bottom integrated circuit package, the top integrated circuit package having a top lead extending therefrom and the top lead over the bottom lead; attaching a conductive paste at an end portion of the top lead; and forming a stacking joint by flowing the conductive paste and the conductive material, the stacking joint below the top lead as well as below and above the bottom lead. | 2011-11-03 |
20110266665 | PRESS-PACK MODULE WITH POWER OVERLAY INTERCONNECTION - Systems and methods for utilizing power overlay (POL) technology and semiconductor press-pack technology to produce semiconductor packages with higher reliability and power density are provided. A POL structure may interconnect semiconductor devices within a semiconductor package, and certain embodiments may be implemented to reduce the probability of damaging the semiconductor devices during the pressing of the conductive plates. In one embodiment, springs and/or spacers may be used to reduce or control the force applied by an emitter plate onto the semiconductor devices in the package. In another embodiment, the emitter plate may be recessed to exert force on the POL structure, rather than directly against the semiconductor devices. Further, in some embodiments, the conductive layer of the POL structure may be grown to function as an emitter plate, and regions of the conductive layer may be made porous to provide compliance. | 2011-11-03 |
20110266666 | CIRCUIT BOARD WITH BUILT-IN SEMICONDUCTOR CHIP AND METHOD OF MANUFACTURING THE SAME - A circuit board includes an insulating member and a semiconductor chip encapsulated with the thermoplastic resin portion of the insulating member. A wiring member is located in the insulating member and electrically connected to first and second electrodes on respective sides of the semiconductor chip. The wiring member includes a pad, an interlayer connection member, and a connection portion. A diffusion layer is located between the first electrode and the connection portion between the pad and the connection portion, and between the second electrode and the interlayer connection member. At least one element of the interlayer connection member has a melting point lower than a glass-transition point of the thermoplastic resin portion. The connection portion is made of material having a melting point higher than a melting point of the thermoplastic resin portion. | 2011-11-03 |
20110266667 | CU PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE - A sidewall protection structure is provided for covering at least a portion of a sidewall surface of a bump structure, in which a protection structure on the sidewalls of a Cu pillar and a surface region of an under-bump-metallurgy (UBM) layer is formed of at least one non-metal material layers, for example a dielectric material layer, a polymer material layer, or combinations thereof. | 2011-11-03 |
20110266668 | MICROELECTRONIC ASSEMBLIES HAVING COMPLIANCY - A microelectronic assembly includes a microelectronic element, such as a semiconductor wafer or semiconductor chip, having a first surface and contacts accessible at the first surface, and a compliant layer overlying the first surface of the microelectronic element, the compliant layer having openings in substantial alignment with the contacts of the microelectronic element. The assembly desirably includes conductive posts overlying the compliant layer and projecting away from the first surface of the microelectronic element, the conductive posts being electrically interconnected with the contacts of the microelectronic element by elongated, electrically conductive elements extending between the contacts and the conductive posts. | 2011-11-03 |
20110266669 | SEMICONDUCTOR CHIP WITH POST-PASSIVATION SCHEME FORMED OVER PASSIVATION LAYER - The invention provides a semiconductor chip comprising an interconnecting structure over said passivation layer. The interconnecting structure comprises a first contact pad connected to a second contact pad exposed by an opening in a passivation layer. A metal bump is on the first contact pad and over multiple semiconductor devices, wherein the metal bump has more than 50 percent by weight of gold and has a height of between 8 and 50 microns | 2011-11-03 |
20110266670 | WAFER LEVEL CHIP SCALE PACKAGE WITH ANNULAR REINFORCEMENT STRUCTURE - Annular reinforcement structures that can be used in wafer level chip scale packages (WLCSP) are described. The WLCSP comprises a substrate with an IC device and a bond pad connected to the IC device, a passivation layer protecting an outer portion of the bond pad, an annular ring structure formed on an inner portion of the bond pad, an under bump metal (UBM) layer covering the annular ring structure, and a solder ball attached to the UBM layer. The annular ring structure contains a substantially planar top with vertical or non-vertical sidewalls that slope down to the inner portion of the bond pad. The annular ring structure can slow the solder crack propagation in the solder ball and therefore increase the solder joint reliability in the WLCSP. As well, the annular ring structure can increase the surface area for solder attachment to the UBM layer, improving overall ball shear strength are described. Other embodiments are described. | 2011-11-03 |
20110266671 | SUBSTRATE FOR A SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF - Disclosed herein are a substrate for a semiconductor package and a manufacturing method thereof. The substrate for the semiconductor package, which has a single-sided substrate structure including circuit patterns having a connection pad formed on only an electronic component mounting surface, can directly connect a connection pad on the top of the substrate to external connection terminals on the bottom of the substrate through a connection via formed of a metal plating layer formed in an inner wall of the via hole and a conductive metal paste filled in the via hole. | 2011-11-03 |
20110266672 | INTEGRATED-CIRCUIT ATTACHMENT STRUCTURE WITH SOLDER BALLS AND PINS - An integrated-circuit attachment structure comprises an integrated circuit and a package assembly. The package assembly includes a package containing the integrated circuit. The package has pins at its corners and a grid at least primarily of solder halls on its bottom face. | 2011-11-03 |
20110266673 | INTEGRATED CIRCUIT PACKAGE STRUCTURE AND METHOD - An integrated circuit package structure includes an integrated circuit (IC) module, a plastic encapsulation, and input/output pins. The IC includes a substrate configured with signal lines and input/output ports disposed at edges of the substrate, chips, and wires. The chips are mounted on surfaces of the substrate, and the wires connect the chips to the signals lines and the input/output ports. The plastic encapsulation encapsulates the IC module to form an encapsulation body including an upper surface, a lower surface, and side surfaces, and the input/output ports are exposed out of the encapsulation body. The input/output pins are disposed on the side surfaces and at least one of the upper surface and the lower surface of the encapsulation body, and correspondingly leads the input/output ports to the at least one of the upper surface and the lower surface of the encapsulation body. | 2011-11-03 |
20110266674 | Laser Etch Via Formation - The present disclosure provides methods for forming semiconductor devices with laser-etched vias and apparatus including the same. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside and a backside, and providing a layer above the frontside of the substrate, the layer having a different composition from the substrate. The method further includes controlling a laser power and a laser pulse number to laser etch an opening through the layer and at least a portion of the frontside of the substrate, filling the opening with a conductive material to form a via, removing a portion of the backside of the substrate to expose the via, and electrically coupling a first element to a second element with the via. A semiconductor device fabricated by such a method is also disclosed. | 2011-11-03 |
20110266675 | DIRECTIONAL SELF-ASSEMBLY OF BIOLOGICAL ELECTRICAL INTERCONNECTS - A method for controlled nucleation and growth of microtubules on substrates. The substrate is functionalized with a nucleating agent for microtubule growth. The method can be employed to generate nanoscale structures on substrates or between substrates by additional attachment of MT capture agents which function to capture the ends of growing MT to form connecting MT structures. The method can be used to form 2-and 3-D structures on or between substrates and can function to establish interconnects between nanoscale devices or molecular electronic devices and electrodes. A specific method for metallization of biological macromolecules and structures is provided which can be applied to metallized the MT formed by the growth and capture method. The metallization method is biologically benign and is particularly useful for copper metallization of MTs. | 2011-11-03 |
20110266676 | METHOD FOR FORMING INTERCONNECTION LINE AND SEMICONDUCTOR STRUCTURE - A semiconductor structure is formed by placing a thin barrier metal layer in an interconnection trench or via in a manner such that the opening of the trench or via is not obstructed by an overhang that interferes with the placement of copper into the interconnection trench or via. The material for forming a copper interconnection line contains copper and manganese. Upon annealing, a manganese oxide layer is formed having barrier properties against copper diffusion. | 2011-11-03 |
20110266677 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF THE SAME - The present invention provides a semiconductor structure and a manufacturing method thereof. The method comprises; providing a semiconductor substrate comprising semiconductor devices; depositing a copper diffusion barrier layer on the semiconductor substrate; forming a copper composite layer on the copper diffusion barrier layer; decomposing the copper composite at corresponding positions, where copper interconnection is to be formed, into copper according to the shape of the copper interconnection; and etching off the undecomposed copper composite and the copper diffusion barrier layer underneath, to interconnect the semiconductor devices. The present invention is adaptive for manufacturing interconnection in integrated circuits. | 2011-11-03 |
20110266678 | Semiconductor device and method for manufacturing same - A semiconductor device includes a semiconductor substrate, an insulating film formed above the semiconductor substrate, and a multilayered wiring formed in a prescribed area within the insulating film. The multilayered wiring includes a dual damascene wiring positioned on at least one layer of the multilayered wiring. The dual damascene wiring includes an alloy having copper as a principal component. A concentration of at least one metallic element contained as an added component of the alloy in a via connected to the dual damascene wiring is 10% or more higher in a via connected to a wiring whose width exceeds by five or more times a diameter of the via than that in another via connected to another wiring of a smallest width in a same upper wiring layer of the multilayered wiring. | 2011-11-03 |
20110266679 | SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - Provided is a technique capable of improving the reliability of a semiconductor device having a slit made over a main surface of a semiconductor substrate, so as to surround each element formation region. In the technique, a second passivation film covers the side surface of an opening made to make the upper surface of a sixth-layer interconnection M | 2011-11-03 |
20110266680 | CARBON NANOTUBE CIRCUIT COMPONENT STRUCTURE - The present invention proposes a circuit component structure, which comprises a semiconductor substrate, a fine-line metallization structure formed over the semiconductor substrate and having at least one metal pad, a passivation layer formed over the fine-line metallization structure with the metal pads exposed by the openings of the passivation layer, at least one carbon nanotube layer formed over the fine-line metallization structure and the passivation layer and connecting with the metal pads. The present invention is to provide a carbon nanotube circuit component structure and a method for fabricating the same, wherein the circuit of a semiconductor element is made of an electrically conductive carbon nanotube, and the circuit of the semiconductor element can thus be made finer and denser via the superior electric conductivity, flexibility and strength of the carbon nanotube. | 2011-11-03 |
20110266681 | ELECTRONIC COMPONENT AS WELL AS METHOD FOR ITS PRODUCTION - An electronic component includes at least one patterned layer of an electrically conductive material on a substrate, a protective layer of a second material being deposited on the patterned layer of the electrically conductive material. The second material is baser than the electrically conductive material of the patterned layer. In a method for producing the electronic component, the patterned layer of the electrically conductive material is deposited on the substrate in a first step, and the protective layer of the second material, which is baser than the electrically conductive material of the patterned layer, is deposited on the patterned layer in a second step. | 2011-11-03 |
20110266682 | MICROELECTRONIC STRUCTURE INCLUDING AIR GAP - A microelectronic structure and a method for fabricating the microelectronic structure provide a plurality of voids interposed between a plurality of conductor layers. The plurality of voids is also located between a liner layer and an inter-level dielectric layer. The voids provide for enhanced electrical performance of the microelectronic structure. | 2011-11-03 |
20110266683 | Stackable Power MOSFET, Power MOSFET Stack, and Process of Manufacture - A thin and stackable power MOSFET (SP-MOSFET) and method are proposed. The SVP-MOSFET includes semiconductor substrate with bottom drain metal layer. Formed atop the semiconductor substrate are trenched gate regions and source-body regions. A patterned gate metal layer and source-body metal layer respectively contact trenched gate regions and source-body regions. At least one of through substrate drain via (TSDV), through substrate gate via (TSGV), through substrate source via (TSSV) is provided. The TSDV, formed through semiconductor substrate and in contact with drain metal layer, has top drain contacting pad and bottom drain contacting pad for making top and bottom contacts thereto. Similarly the TSGV, formed through semiconductor substrate and in contact with gate metal layer, has top gate contacting pad and bottom gate contacting pad. Likewise the TSSV, formed through semiconductor substrate and in contact with source-body metal layer, has top source contacting pad and bottom source contacting pad. | 2011-11-03 |
20110266684 | Selective Die Electrical Insulation By Additive Process - Additive processes are employed for electrically insulating selected surface regions on a stack of die; and methods for electrically interconnecting die in a stack of die, include additive processes for electrically insulating selected surface regions of the die. Regions that are not insulated according to the invention are available for electrical connection using electrically conductive material applied in flowable form to make electrically conductive traces. | 2011-11-03 |
20110266685 | Semiconductor Device Comprising Sophisticated Conductive Elements in a Dielectric Material System Formed by Using a Barrier Layer - An efficient patterning strategy may be applied when etching through a dielectric material system on the basis of two different etch chemistries. To this end, a conductive etch stop or barrier material may be formed in the opening prior to etching through the further dielectric layer of the material system, thereby substantially preserving the initial critical dimensions and avoiding etch damage. Thus, superior contact openings, via openings and the like may be formed on the basis of well-established etch chemistries. | 2011-11-03 |
20110266686 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a substrate having a conductor; a semiconductor chip disposed on the substrate and electrically connected to the conductor; a tubular electrode having one end electrically connected to the conductor; and a sealing resin sealing the substrate, the semiconductor chip and the electrode. The electrode is configured to be extendable and contractible in the stacking direction in which the substrate and the semiconductor chip are stacked in the state before sealing of the sealing resin. The edge of the other end of the electrode is exposed from the sealing resin. The electrode has a hollow space opened at the edge of the other end. Therefore, a semiconductor device reduced in size and a method of manufacturing this semiconductor device can be provided. | 2011-11-03 |
20110266687 | ELECTRONIC ELEMENTS AND DEVICES WITH TRENCH UNDER BOND PAD FEATURE - Electronic elements having an active device region and bonding pad (BP) region on a common substrate desirably include a dielectric region underlying the BP to reduce the parasitic impedance of the BP and its interconnection as the electronic elements are scaled to higher power and/or operating frequency. Mechanical stress created by plain (e.g., oxide only) dielectric regions can adversely affect performance, manufacturing yield, pad-to-device proximity and occupied area. This can be avoided by providing a composite dielectric region having electrically isolated inclusions of a thermal expansion coefficient (TEC) less than that of the dielectric material in which they are embedded and/or closer to the substrate TEC. For silicon substrates, poly or amorphous silicon is suitable for the inclusions and silicon oxide for the dielectric material. The inclusions preferably have a blade-like shape separated by and enclosed within the dielectric material. | 2011-11-03 |
20110266688 | PLANARIZED PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES - A semiconductor device includes a substrate having a dielectric layer and a device layer on the substrate. The device layer has an opening. First and second sublayers are disposed on the device layer and line the opening. The second sublayer serves as a stop layer for planarization to provide a substantially planarized top surface for the semiconductor device. | 2011-11-03 |
20110266689 | Methods Of Forming A Plurality Of Conductive Lines In The Fabrication Of Integrated Circuitry, Methods Of Forming An Array Of Conductive Lines, And Integrated Circuitry - A method of forming a pair of conductive lines in the fabrication of integrated circuitry includes forming a trench into a damascene material received over a substrate. Conductive material is deposited over the damascene material and to within the trench to overfill the trench. The conductive material is removed back at least to the damascene material to leave at least some of the conductive material remaining in the trench. Etching is conducted longitudinally through the conductive material within the trench to form first and second conductive lines within the trench which are mirror images of one another in lateral cross section along at least a majority of length of the first and second conductive lines. Other implementations are contemplated. | 2011-11-03 |
20110266690 | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, CIRCUIT SUBSTRATE, AND ELECTRONIC APPARATUS - A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode. | 2011-11-03 |
20110266691 | Through-Substrate Vias with Improved Connections - A device includes a substrate, and a plurality of dielectric layers over the substrate. A plurality of metallization layers is formed in the plurality of dielectric layers, wherein at least one of the plurality of metallization layers comprises a metal pad. A through-substrate via (TSV) extends from the top level of the plurality of the dielectric layers to a bottom surface of the substrate. A deep conductive via extends from the top level of the plurality of dielectric layers to land on the metal pad. A metal line is formed over the top level of the plurality of dielectric layers and interconnecting the TSV and the deep conductive via. | 2011-11-03 |
20110266692 | LAYERED CHIP PACKAGE AND METHOD OF MANUFACTURING SAME - A layered chip package includes a main body and a plurality of through electrodes. The main body includes a plurality of layer portions stacked and a plurality of through holes that penetrate all the plurality of layer portions. The plurality of through electrodes are provided in the plurality of through holes of the main body and penetrate all the plurality of layer portions. Each of the plurality of layer portions includes a semiconductor chip. At least one of the plurality of layer portions includes wiring that electrically connects the semiconductor chip to the plurality of through electrodes. The wiring includes a plurality of conductors that make contact with a through electrode that is exposed in the wall faces of any one of the plurality of through holes and passes through the through hole. | 2011-11-03 |
20110266693 | TCE COMPENSATION FOR PACKAGE SUBSTRATES FOR REDUCED DIE WARPAGE ASSEMBLY - A method for assembling die packages includes attaching contacts on a first side of a plurality of first die to substrate pads on a top surface of a composite carrier. The composite carrier includes a package substrate including at least one embedded metal layer having its bottom surface secured to a semiconductor wafer. The composite carrier minimizes effects of the CTE mismatch between the die and the package substrate during assembly reduces warpage of the die. After the attaching, the semiconductor wafer is removed from the package substrate. Electrically conductive connectors are attached to the bottom surface of the package substrate, and the package substrate is sawed to form a plurality of singulated die packages. | 2011-11-03 |
20110266694 | METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURES AND DEVICES INCLUDING NANOTUBES, AND SEMICONDUCTOR STRUCTURES, DEVICES, AND SYSTEMS FABRICATED USING SUCH METHODS - A method of forming a plurality of nanotubes is disclosed. Particularly, a substrate may be provided and a plurality of recesses may be formed therein. Further, a plurality of nanotubes may be formed generally within each of the plurality of recesses and the plurality of nanotubes may be substantially surrounded with a supporting material. Additionally, at least some of the plurality of nanotubes may be selectively shortened and at least a portion of the at least some of the plurality of nanotubes may be functionalized. Methods for forming semiconductor structures intermediate structures, and semiconductor devices are disclosed. An intermediate structure, intermediate semiconductor structure, and a system including nanotube structures are also disclosed. | 2011-11-03 |
20110266695 | SEMICONDUCTOR DEVICE LAYOUT METHOD, A COMPUTER PROGRAM, AND A SEMICONDUCTOR DEVICE MANUFACTURE METHOD - A semiconductor device layout method is disclosed, wherein vias carrying the same signal are arranged at intervals equal to the minimum value defined by a design rule, and vias carrying different signals are arranged at second intervals that are greater than the minimum value. | 2011-11-03 |
20110266696 | SEMICONDUCTOR DEVICE PACKAGES INCLUDING A SEMICONDUCTOR DEVICE AND A REDISTRIBUTION ELEMENT - A method for fabricating a chip-scale board-on-chip substrate, or redistribution element, includes forming conductive planes on opposite sides of a substrate. A first of the conductive planes includes two sets of bond fingers, conductive traces that extend from a first set of the bond fingers, and two sets of redistributed bond pads, including a first set to which the conductive traces lead. The second conductive plane includes conductive traces that extend from locations that are opposite from the second set of bond fingers toward locations that are opposite from the locations of the second set of redistributed bond pads. Conductive vias are formed through the second set of bond fingers to the conductive traces of the second conductive plane. In addition, conductive vias are also formed to electrically connect the conductive vias of the second conductive plane to their corresponding redistributed bond pads in the first conductive plane. Redistribution elements including these features, as well as semiconductor device assemblies including the redistribution elements and assembly methods, are also disclosed. | 2011-11-03 |
20110266697 | ELECTRONIC PART PACKAGE - A peeling off layer | 2011-11-03 |
20110266698 | SEMICONDUCTOR DEVICE COMPRISING VARIABLE-SIZED CONTACT, METHOD OF FORMING SAME, AND APPARATUS COMPRISING SAME - A semiconductor device comprises an electrical contact designed to reduce a contact resistance. The electrical contact has a size that varies according to a length of a region where the contact is to be formed. | 2011-11-03 |
20110266699 | METHOD FOR MANUFACTURING A MICROELECTRONIC DEVICE AND A MICROELECTRONIC DEVICE THUS MANUFACTURED - The invention pertains to a method for manufacturing a microelectronic device on a substrate comprising at least one first electrical component and one second electrical component distributed respectively in first and second levels stacked one on top of the other on the substrate, this method comprising:
| 2011-11-03 |
20110266700 | WIRE BOND INTERCONNECTION AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of a semiconductor package includes: providing a substrate; mounting a semiconductor die on the substrate, the semiconductor die having a die pad; mounting a lead finger on the substrate; attaching a support pedestal on sides of the lead finger; and attaching a wire interconnection between the die pad and the support pedestal, the wire interconnection having a ball bond on the die pad and a stitch bond on the support pedestal. | 2011-11-03 |
20110266701 | NOVEL BUILD-UP PACKAGE FOR INTEGRATED CIRCUIT DEVICES, AND METHODS OF MAKING SAME - A device is disclosed which includes, in one illustrative example, an integrated circuit die having an active surface and a molded body extending around a perimeter of the die, the molded body having lips that are positioned above a portion of the active surface of the die. Another illustrative example includes an integrated circuit die having an active surface, a molded body extending around a perimeter of the die and a CTE buffer material formed around at least a portion of the perimeter of the die adjacent the active surface of the die, wherein the CTE buffer material is positioned between a portion of the die and a portion of the molded body and wherein the CTE buffer material has a coefficient of thermal expansion that is intermediate a coefficient of thermal expansion for the die and a coefficient of thermal expansion for the molded body. | 2011-11-03 |
20110266702 | High capacity water misting gun - A high-velocity water misting gun with a very high-speed radial inflow hydraulic turbine mounted on the same shaft with an axial flow air compressor wheel compressing air discharged at high velocities through an exhaust air nozzle. All of the water discharging from the hydraulic turbine wheel is channeled directly into a water misting nozzle providing a fine water mist discharging into a high-velocity air flow provided by the axial-flow compressor. Preferred embodiments utilize a manually operated ball valve to control water pressure supplied to the gun. A second valve is a manually operated turbine water bypass valve that is integral part of the preferred embodiment which allows for change of turbine power and air flow independently of water flow. With turbine water bypass valve open, most of the turbine flow is bypassed around the turbine and directly into the water misting nozzle, increasing the water flow and decreasing the air flow and air velocity. With turbine water bypass valve fully closed, hydraulic turbine power increases the power input into the compressor resulting maximum reach of the water-air mist jet. | 2011-11-03 |
20110266703 | Method and System of Measuring Toric Lens Axis Angle - A method of measuring an axis angle of a toric contact lens including a posterior toric central zone having a cylindrical axis, and an anterior lens surface forming a ballast that has an axis of orientation offset from the cylindrical axis at a selected rotational angle is disclosed. The method involves (a) providing anterior and posterior mold sections including respective anterior and posterior mold cavity defining surfaces, wherein the posterior mold cavity defining surface includes a toric central zone and the anterior mold cavity defining surface is shaped to provide the ballast, the mold sections being alignable at multiple rotational positions; (b) providing a detectable feature on each of the anterior and posterior mold sections at a predetermined angular location with respect to the tonic and ballast axes thereof, respectively; (c) rotating the detectable feature of the posterior mold section relative to the detectable feature of the anterior mold section, wherein the detectable feature of the anterior mold section is a zero reference; and (d) measuring the axis angle between the detectable feature of the posterior mold section relative to the detectable feature of the anterior mold section after rotational displacement of the mold sections during toric contact lens formation. | 2011-11-03 |
20110266704 | Compartmentalized Chips With Similar Polymers of Different Viscosities For Improved Processability - Compartmentalized chips of at least two chemically similar crystallizable thermoplastic polymers each having a different intrinsic viscosity placed in separate zones are disclosed. These compartmentalized chips exhibit thermal characteristics that are different from the traditional technique of homogeneously combining the two materials into the chip. These compartmentalized chips in their amorphous, crystalline and solid phase polymerized forms exhibit a longer crystallization half time than the homogeneous mixture, thus permitting faster injection cycle times when compared to an equivalent homogenous mixture. | 2011-11-03 |
20110266705 | TEMPLATE REPAIR METHOD, PATTERN FORMING METHOD, AND TEMPLATE REPAIR APPARATUS - A template repair method according to one embodiment is a method for repairing a template including a template base material and a first mold release layer formed on a pattern surface of the template base material, and a restorative material is supplied to the pattern surface of the template base material in the template repair method. The restorative material has affinity to the base material and non-affinity to the mold release layer. | 2011-11-03 |
20110266706 | IMPRINT LITHOGRAPHY METHOD AND APPARATUS - A method of aligning a substrate and an imprint template is disclosed. The method includes directing an alignment radiation beam towards an imprint template alignment mark and an adjacent substrate alignment mark, the imprint template alignment mark and the substrate alignment mark each including a grating which extends in a first direction and a grating which extends in a second direction, providing relative movement between the imprint template and the substrate in the first direction and in the second direction, using an intensity detector to detect the intensity of alignment radiation redirected in the zero-order direction by the imprint template alignment mark and the substrate alignment mark during the relative movement in the first direction and in the second direction, and determining an aligned position of the imprint template alignment mark and the substrate alignment mark based upon the detected intensity. | 2011-11-03 |
20110266707 | MICROPOROUS POLYOLEFIN MULTI LAYER FILM AND PREPARING METHOD THEREOF - The present invention relates to a multi-layered microporous polyolefin film for a battery separator and a method for preparing the same. The microporous multi-layered film of the present invention has a characteristics to have both the low shutdown temperature conferred by the polyethylene and the high melt fracture temperature conferred by the polypropylene and heat-resistant filler. In addition, it has the high strength and stability conferred by the micropores prepared under wet process and the high permeability and high strength conferred by the macropores prepared under dry process. Therefore, this multi-layered film can be used effectively to manufacture a secondary battery with high capacity and high power. | 2011-11-03 |
20110266708 | BLOW-INJECTION METHOD FOR PRODUCING PLASTIC FLOWER POT - A blow-injection method for producing plastic flower pots comprising the following steps: fixing the fixed half, locking the moving half, injection, pressure maintaining, cooling, opening mould and ejection, wherein the gas pin is connected to the fixed half, and in pressure maintaining step, the nitrogen is blown in via the gas pin. The present invention integrate blow molding with injection molding, and is one-step formed, so the edge of the pots produced by the method of the invention is smooth and round, the edge of the pot is three-dimensional, Also, the center of the edge of the pot is hollow, the weight is reduced to enable cost-saving. | 2011-11-03 |
20110266709 | APPARATUS AND METHOD OF FABRICATING FLAT PANEL DISPLAY DEVICE - Disclosed are an apparatus and method for fabricating a flat panel display device to realize easy separation of a substrate from an imprinting mold. The apparatus includes an imprinting mold connected to a substrate to form a thin film pattern on the substrate, a first adsorption pad to vacuum-adsorb the center of the imprinting mold, a second adsorption pad to vacuum-adsorb the periphery of the imprinting mold, and a connector connected to vacuum pins to vertically move in different regions of the first and second adsorption pads. | 2011-11-03 |
20110266710 | ULTRA-HIGH STRENGTH UHMW PE FIBERS AND PRODUCTS - Multi-filament UHMW PE yarns can be produced according to processes that result in improved properties. The UHMW PE can have an intrinsic viscosity in decalin at 135° C. of at least about 30 dl/g, and can be processed under optimal conditions to achieve a gel spun yarn having a tenacity of greater than about 45 g/d (40.5 g/dtex). | 2011-11-03 |
20110266711 | MULTILAYERED FILMS - A pin-hole free multi-layered film having partially or fully water soluble films layered with substantially pin-hole free barrier coatings that are partially insoluble or fully water-soluble or dispersible. The film may include detachable and/or non detachable substrates. The process for manufacturing the film is versatile to accommodate embodiments such as on-line/off-line processing, selective barrier print-coating in flexo-gravure processing individually or in combinations involving especially designed roto-gravure cylinders/flexoplates for multi station registrations and/or multipass operations to achieve substantially pin-hole free films, etc. The barrier coatings may be continuous or discrete and/or selective, based on the end use application. | 2011-11-03 |
20110266712 | METHOD FOR FORMING TAIL FIN OF WIND TURBINE - A method for forming a tail fin of wind turbine includes first pouring a proper amount of molten plastic into a mold having a cavity showing a contour of the tail fin and the mold is rotated to induce a centrifugal force that makes the plastic uniformly sticking to an inside surface of the cavity to form a tail fin that shows an aerodynamic feature of a one-piece hollow shell. The tail fin, when mounted to the wind turbine, realizes efficient and stable control of rotor blades at a front end of the nacelle in alignment with windward direction so as to improve the use of wind power and make the tail fin and the rotor blades in a weight balanced condition to thereby reduce the load applied to a yaw bearing located under the nacelle and extend the service life of the bearing. | 2011-11-03 |
20110266713 | METHOD OF ENCAPSULATION OF A FLEXIBLE COMPONENT - A method of encapsulation of a flexible component having a preferred shape and dimensions including a void within the flexible component is disclosed. The method includes at least partially encapsulating the flexible component in a first mould using a curable material which shrinks in volume as it cures distorting the flexible component. The method includes an additional step of at least partially encapsulating the flexible component in a second mould using a curable material at a pressure so as to at least fill and expand unoccupied volume of the void such that the flexible component substantially conforms to the preferred shape and preferred dimensions of the flexible component. The flexible component may be of shape memory material. The method can be used to encapsulate medical devices which include a flexible component such as a coil/wire antenna such that the encapsulated medical device can be inserted into a human or animal body whilst achieving a preferred shape and configuration of the flexible component such as a coil antenna. | 2011-11-03 |
20110266714 | METHOD OF FORMING A PIPE FITTING - A pipe fitting includes a polymeric body molded into and fixedly connected to a metallic body, so that the metallic body extends around the polymeric body. The polymeric body extends around and is contiguous with a passageway of the pipe fitting, and at least partially defines a first opening of the passageway that is for being mated to a polymeric pipe. The metallic body extends around and is contiguous with the passageway, and at least partially defines a second opening of the passageway that is for being mated to a metallic pipe. | 2011-11-03 |
20110266715 | Article of Footwear with Mesh on Outsole and Insert - An article of footwear including a mesh disposed on the outsole and an insert of the outsole is disclosed. The outsole includes tread elements that extend farther from the outsole than the mesh, providing protection to the mesh. Additionally, the mesh on the insert preferably helps reduce hyperextension of the front of the insert and the article of footwear. | 2011-11-03 |
20110266716 | Sealing Molding With Insert For Forming Closeout Surface - A weatherstrip assembly is provided for a motor vehicle door frame. The weatherstrip assembly includes a sealing molding having a mounting portion adapted to be attached to the door frame. The weatherstrip assembly also includes an insert having a main body and a head fixedly secured thereto. The head is disposed within the mounting portion of the sealing molding. The insert and the sealing molding define an insert cavity therebetween. A molding substrate is disposed within the insert cavity to bond the insert with the sealing molding and provide a finished appearance at one end of the sealing molding. | 2011-11-03 |
20110266717 | Microwave-Assisted Setting of Shaped Ceramic/Foam Bodies - The invention relates to a method for the production of shaped foam bodies, comprising: provision of a composition having foam particles and binder; introduction of the composition into a space which is bounded on at least one side by a pressing surface; and exertion of pressure onto the composition by means of the pressing surface. The method further comprises irradiation of microwaves through the pressing surface into the composition, while pressure is being exerted onto the composition. The invention furthermore relates to a device for carrying out the method according to the invention, having: at least one pressing surface and a counterbearing surface lying opposite, between which a space extends which is adapted to receive a composition of foam particles and binder. The pressing surface and counterbearing surface adjoin the space directly. The device further comprises at least one stiff layer which locally or entirely is essentially transparent for microwaves and has a surface facing toward the space, which is connected to the pressing surface in such a way as to transmit force. The device also comprises a microwave radiator unit which is arranged on a side of the stiff layer remote from the space and is aligned relative to the space in order to irradiate microwaves into the space through the stiff layer. Lastly, the invention relates to a microwave radiator unit for the heat treatment of foam compositions. The microwave radiator unit comprises a multiplicity of microwave antennas which are arranged in a plane array and at least two of which are connected through a distributor device to a common microwave signal source, which feeds the at least two antennas. | 2011-11-03 |
20110266718 | Flat-Fold Respirator With Monocomponent Filtration/Stiffening Monolayer - A flat-fold respirator is made from a stiff filtration panel joined to the remainder of the respirator through at least one line of demarcation. The panel contains a porous monocomponent monolayer nonwoven web that contains charged intermingled continuous monocomponent polymeric fibers of the same polymeric composition and that has sufficient basis weight or inter-fiber bonding so that the web exhibits a Gurley Stiffness greater than 200 mg and the respirator exhibits less than 20 mm H | 2011-11-03 |
20110266719 | LARGE CERAMIC COMPONENT AND METHOD OF MANUFACTURE - The invention concerns a sintered ceramic component of silicon nitride or sialon suitable as rolling element in a bearing and a manufacturing method for making such ceramic components. The ceramic component has high density and a homogeneous and fine microstructure, giving the component excellent mechanical properties. Manufacturing of the sintered ceramic component by SPS is cost-effective and rapid. | 2011-11-03 |
20110266720 | System and Method for Stent Manufacture - The system and method for stent manufacture includes a method of supercritical stent manufacture including mixing a polymer and a supercritical fluid to form a supercritical mixture; electrically charging a mold to a first polarity, the mold having a mold wall defining a mold plenum; discharging the supercritical mixture through a nozzle; electrically charging the supercritical mixture to a second polarity opposite the first polarity; repeatedly directing the charged supercritical mixture into the mold plenum to form a plurality of polymer layers on the mold wall, the plurality of polymer layers having a predetermined thickness; and separating the plurality of polymer layers from the mold wall. | 2011-11-03 |
20110266721 | HORIZONTAL MOLDING METHOD AND APPARATUS OF INTERIOR MATERIAL OF VEHICLE - The present invention relates to a horizontal molding method and apparatus of an interior material of a vehicle. The horizontal molding apparatus includes a preheating means for preheating a skin material; a transfer unit formed to be movable and including fixing units for vertically attaching or detaching the preheated skin material on or from the transfer unit; a first mold disposed perpendicularly to a ground surface and including suction units for vacuum-sucking and fixing edges of the skin material transferred by the transfer unit, a base member having an embossed pattern to be printed on the skin material, fixing members for sealing an internal space between the skin material and the base member by clamping the edges of the skin material, and vacuum holes for vacuum-sucking the skin material onto the base member; a second mold disposed in parallel with the first mold and on which a base material is injected; and a mold moving means for horizontally moving one of the first and second molds and combining or separating the first and second molds to or from each other. According to the present invention, a skin material and a base material may be integrally molded by using horizontally moving molds, the skin material expanded in a preheating or heating process may be prevented from sagging downward due to its weight, and the skin material may be completely sealed so as not to be folded or wrinkled. | 2011-11-03 |
20110266722 | METHOD FOR PRODUCING A THIN-WALLED CONTAINER - This invention relates to a method for producing a thin-walled container, characterized in that a preform is deformed using a weight/wall surface ratio on the order of about 150 g/m | 2011-11-03 |
20110266723 | Process for manufacturing a fuel tank - Process and device for manufacturing a plastic fuel tank equipped with at least one communication component, by molding a parison using a mold comprising two impressions and a core, said process comprising the pressing of the parison against the impressions and formation of a pocket in this parison, the communication component being fastened in this pocket by welding of at least one portion of its side wall to at least one portion of the side wall of the pocket. | 2011-11-03 |
20110266724 | METHOD FOR MANUFACTURING MICROSTRUCTURED METAL OR CERAMIC PARTS FROM FEEDSTOCK - A method of manufacturing a production part having microstructured features comprising the steps of fabricating a microstructured prototype having microstructured features, manufacturing a microstructured intermediate from the microstructured prototype so that the microstructured intermediate carries a negative of the microstructured features, attaching the microstructured intermediate to a manufacturing tool thereby providing microstructured features on a manufacturing tool, providing feedstock containing material from the group comprising of: metal, ceramic, binder, and any combination of these and manufacturing the production part from the feedstock, using the manufacturing tool and using a process from the group consisting of: compression molding, roll forming, stamping, embossing, extrusion injection molding, and any combination of these. | 2011-11-03 |
20110266725 | METHOD FOR COOLING A MOVING METAL BELT - The present invention relates to a method for cooling a moving metal belt ( | 2011-11-03 |
20110266726 | GAS TURBINE EXHAUST AS HOT BLAST FOR A BLAST FURNACE - In certain exemplary embodiments, a system includes a gas turbine system having a turbine, combustor, and a compressor. The system also includes an output flow path from the gas turbine system. The system further includes a blast furnace coupled to the output flow path, wherein output flow path is configured to deliver heated air or exhaust gas from the gas turbine system directly to the blast furnace as a blast heat source. | 2011-11-03 |
20110266727 | DOUBLE PATH MOUNT FOR CAB SUSPENSION WITH TILTING FUNCTION - A cab mounting assembly attaches a cab to a chassis of a vehicle at the point of rotation of the cab when the cab is tilted. The cab mounting assembly provides two paths for the forces acting between the cab and the chassis. The static forces are supported by a bearing assembly which includes a relatively hard elastomeric member. The dynamic forces are supported by an elastomeric mount which includes a relatively soft elastomeric member. The elastomeric mount is attached to the bearing assembly and to a shock absorber. The bearing assembly is attached to the elastomeric mount and to an air spring assembly. | 2011-11-03 |
20110266728 | AIR SPRING - An air spring ( | 2011-11-03 |
20110266729 | DAMPING ELEMENT WITH CONNECTING SUBSTANCE - The present invention relates to a damping element comprising at least one fastening means and a spring element on the basis of cellular polyisocyanate polyaddition products which are firmly connected to each other. Furthermore, the invention relates to a method for producing damping elements of this type and to the use thereof. | 2011-11-03 |
20110266730 | SPRING, IN PARTICULAR FOR A LOCKING DEVICE OF A VEHICLE SEAT | 2011-11-03 |
20110266731 | Apparatus for Holding a Flat Object - An apparatus is disclosed for holding a flat object. The apparatus includes a post, a supporting mechanism movably connected to the post, a clamping mechanism pivotally connected to the post, and a linking element for linking the supporting mechanism and the clamping mechanism together. Thus, the flat object is clamped by the clamping mechanism clamps when the flat object is supported on the supporting mechanism. | 2011-11-03 |
20110266732 | ROTARY JOINT AND WORKTABLE USING THE SAME - A rotary joint includes a shaft, at least one input member defining an input hole rotatably sleeved on the shaft, and a plurality of sealing members positioned between the shaft. the at least one input member and an output member are fixed on the shaft. The shaft, the at least one input member, and the sealing members defines a circular channel cooperatively communicating with the input hole. The output member defines at least one output hole corresponding to the input member. The shaft defines at least one transmission hole intercommunicating the at least one output hole and the circular channel. | 2011-11-03 |
20110266733 | APPARATUS FOR FINAL FINISHING A WHEEL HUB OF A KNUCKLE ASSEMBLY AND RELATED METHOD - A fixture for final finishing flange faces of a hub of a knuckle assembly includes a mounting surface, a drive arrangement and a clamping arrangement. The drive arrangement is operative for engaging and rotating the hub of the knuckle assembly relative to the remainder of the knuckle assembly. The drive arrangement includes a drive member extending along a drive axis. The drive member is rotatable about the drive axis. The clamping arrangement is carried by the mounting surface. The clamping arrangement radially surrounds the drive arrangement and is operative for clamping the fixture relative to the mounting surface. The clamping arrangement includes a housing, a piston assembly radially positioned between the housing and the drive member, and a clamping sleeve radially disposed between the piston assembly and the clamping sleeve. The piston is movable in a first direction generally parallel to the drive axis. The clamping sleeve and the piston are cooperatively configured to radially force an upper end of the piston assembly radially outward in a second direction in response to movement of the piston in the first direction for engaging a back bore of the knuckle assembly. | 2011-11-03 |
20110266734 | Lock mechanism for bar clamp - A bar clamp includes a handgrip; a fixed jaw carrier; a slide bar comprising two opposite wing members; a moveable jaw carrier and comprising a transverse channel, a trough extending from center of the channel to one end of the channel, a bottom recess, and two opposite stop members in the recess wherein the slide bar passes the channel with the wing members being stopped by the trough in a locked position; and a U-shaped spring-actuated lock assembly in the recess and comprising inverted U-shaped opposite first and second lock members being engaged with the wing members in the locked position, and first and second projections between the lock members and a bottom of the lock assembly and being engaged with the stop members in the locked position. Pushing the locking assembly until being stopped will disengage the lock members from the wing members. | 2011-11-03 |