44th week of 2012 patent applcation highlights part 14 |
Patent application number | Title | Published |
20120273727 | SILICATE LUMINESCENT MATERIAL AND ITS PREPARATION METHOD - Silicate luminescent material and preparation method thereof are provided. The structural formula of the silicate luminescent material is Zn | 2012-11-01 |
20120273728 | STEAM REFORMING OF HYDROCARBONACEOUS FUELS OVER A NI-ALUMINA SPINEL CATALYST - A process for steam reforming of a hydrocarbonaceous fuel includes the steps of: providing a reactant mixture comprising H | 2012-11-01 |
20120273729 | Treatment of Asthma, Allergic Rhinitis and Improvement of Quality of Sleep by Temperature Controlled Laminar Airflow Treatment - This invention relates in general to methods and devices for displacing body convection and thereby reducing exposure to allergens and other airborne fine particles within a personal breathing zone during situations of or corresponding to sleep thereby reducing or removing symptoms of asthma and allergic rhinitis while improving quality of sleep and in particular to methods and devices that utilize Temperature controlled Laminar Airflow (abbreviated TLA from herein and onwards). Also, business methods involving such methods and devices are disclosed. | 2012-11-01 |
20120273730 | CONDUCTIVE POLYMER SOLUTION AND PREPARATION METHOD THEREOF - A conductive polymer solution includes one doped conjugated polymer and one organic solvent. The doped conjugated polymer has electrical conductivity, and is selected from the group consisting of polyacetylenes, polypyrroles, polyparaphenylenes, polythiophenes, polyfurans, poly(3,4-ethylenedioxythiophenes), poly(3,4-propylenedioxythiophenes) (PProDOT), polythianaphthenes, polyanilines, and their copolymers, derivatives and combinations. The organic solvent is selected from the group consisting of a fluorinated organic solvent, mixture solvents containing fluorinated organic solvents, and mixture solvents containing fluorinated and non-fluorinated organic solvents. The organic solvent is mixed with the doped conjugated polymer. A preparation method of the conductive polymer solution is also disclosed. | 2012-11-01 |
20120273731 | POLYIMIDE RESINS FOR HIGH TEMPERATURE WEAR APPLICATIONS - Polyimide resin compositions that contain an end-capped rigid aromatic polyimide, graphite and, optionally, a filler selected from sepiolite, attapulgite, kaolinite, or a mixture thereof, are found to exhibit low wear at high temperatures. Such compositions are especially useful in molded articles that are exposed to wear conditions at high temperatures such as aircraft engine parts. | 2012-11-01 |
20120273732 | COPOLYMER SEMICONDUCTORS COMPRISING THIAZOLOTHIAZOLE OR BENZOBISTHIAZOLE, OR BENZOBISOXAZOLE ELECTRON ACCEPTOR SUBUNITS, AND ELECTRON DONOR SUBUNITS, AND THEIR USES IN TRANSISTORS AND SOLAR CELLS - The inventions disclosed, described, and/or claimed herein relate to copolymers comprising copolymers comprising electron accepting A subunits that comprise thiazolothiazole, benzobisthiazole, or benzobisoxazoles rings, and electron donating subunits that comprise certain heterocyclic groups. The copolymers are useful for manufacturing organic electronic devices, including transistors and solar cells. The invention also relates to certain synthetic precursors of the copolymers. Methods for making the copolymers and the derivative electronic devices are also described. | 2012-11-01 |
20120273733 | Functionalized Boron Nitride Nanotubes - A plasma treatment has been used to modify the surface of BNNTs. In one example, the surface of the BNNT has been modified using ammonia plasma to include amine functional groups. Amine functionalization allows BNNTs to be soluble in chloroform, which had not been possible previously. Further functionalization of amine-functionalized BNNTs with thiol-terminated organic molecules has also been demonstrated. Gold nanoparticles have been self-assembled at the surface of both amine- and thiol-functionalized boron nitride Nanotubes (BNNTs) in solution. This approach constitutes a basis for the preparation of highly functionalized BNNTs and for their utilization as nanoscale templates for assembly and integration with other nanoscale materials. | 2012-11-01 |
20120273734 | COMPOSITION FOR FORMING AN ORGANIC SEMICONDUCTING DEVICE - A composition for forming a semiconducting device includes an organic semiconducting material, an agent capable of inhibiting and/or preventing dewetting, and an additional substance, wherein the additional substance is provided in an amount capable of preventing initial crystallization of the composition and reducing the melting point or glass transition temperature of the composition below the melting point or glass transition temperature of the organic semiconducting material. The additional substance may be naphthalene, phenylnaphthalene, anthrance, or diphenylanthrance. | 2012-11-01 |
20120273735 | TERNARY THERMOELECTRIC MATERIAL CONTAINING NANOPARTICLES AND PROCESS FOR PRODUCING THE SAME - A thermoelectric material that comprises a ternary main group matrix material and nano-particles and/or nano-inclusions of a Group 2 or Group 12 metal oxide dispersed therein. A process for making the thermoelectric material that includes reacting a reduced metal precursor with an oxidized metal precursor in the presence of nanoparticles. | 2012-11-01 |
20120273736 | COMPOSITIONS COMPRISING POLYMERIC BINDERS - The present invention relates to novel compositions comprising light emitting materials and/or charge transport materials and a polymeric binder, to their use as conducting inks for the preparation of organic light emitting diode (OLED) devices, to methods for preparing OLED devices using the novel formulations, and to OLED devices prepared from such methods and formulations. | 2012-11-01 |
20120273737 | POSITIVE ELECTRODE ACTIVE MATERIAL FOR LITHIUM SECONDARY BATTERY, METHOD FOR PRODUCING THE SAME, AND LITHIUM SECONDARY BATTERY - [Problem to be solved] | 2012-11-01 |
20120273738 | RAIL COMPONENT COMPRISING FLAME RETARDANT COMPOSITIONS, AND METHODS OF MANUFACTURE - A railway vehicle component, wherein the component is a partition or a light cover, and wherein the component is molded or formed from a thermoplastic polymer composition comprising: a siloxane-containing copolymer in an amount effective to provide a total of 0.2 to 6.5 wt % of siloxane units based on the total weight of the polymers in the thermoplastic polymer composition, a bromine-containing polymer in an amount effective to provide 9 to 13 wt % of bromine, based on the total weight of the polymers in the thermoplastic polymer composition, and optionally a third polymer, wherein the wt % of the siloxane-containing copolymer, the bromine-containing polymer, and the optional third polymer, sum to 100 wt %, and 0.05 to 10 wt % of a light diffuser additive, based on the total weight of polymers in the thermoplastic polymer composition. | 2012-11-01 |
20120273739 | ROTARY DEVICE AND WINCH PROVIDED WITH ROTARY DEVICE - A bracket of a rotation device of the present invention has a guide mechanism that is configured to guide a first motor and a second motor so as to rotate the same about an axis of a cylindrical rotating body relative to each other. A first gear and a second gear can respectively be meshed with rotating body side gears corresponding thereto while the first motor or the second motor is deviated around the axis of the cylindrical rotating body from a normal attachment position with respect to the bracket. Further, the first motor or the second motor can be guided to the normal attachment position by the guide mechanism in the condition. | 2012-11-01 |
20120273740 | Safety Railing Support System - A support system for attaching safety railings, especially useful on construction sites. A clamp allows attachment to beams or posts of differing sizes, squeezing the beam or post using mechanical fasteners and, optionally, shims or spacers. A support arm is mounted on the clamp, and upright posts for safety wires or railings are removably mounted to the support arm. | 2012-11-01 |
20120273741 | PHASE CHANGE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A method of manufacturing a phase change memory device includes forming a lower electrode layer pattern and an insulating interlayer covering the lower electrode layer pattern, forming a first opening in the insulating interlayer to expose the lower electrode layer pattern, forming an oxide layer pattern on the sidewall of the first opening and a lower electrode under the oxide layer pattern by partially removing the oxide layer and the lower electrode layer pattern, forming an insulation layer filling a remaining portion of the first opening, removing the oxide layer pattern by a wet etching process to form a second opening, and forming a phase change material pattern on the lower electrode such that the phase change material pattern fills the second opening. | 2012-11-01 |
20120273742 | SEMICONDUCTOR STORAGE DEVICE - An intermediate layer including at least one of elements constituting a phase change material and silicon is arranged between a recording layer composed of the phase change material and an n | 2012-11-01 |
20120273743 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device includes: a first interconnect; a second interconnect at a position opposing the first interconnect; and a variable resistance layer between the first interconnect and the second interconnect, the variable resistance layer being capable of reversibly changing between a first state and a second state by a voltage applied via the first interconnect and the second interconnect or a current supplied via the first interconnect and the second interconnect, the first state having a first resistivity, the second state having a second resistivity higher than the first resistivity. Wherein the variable resistance layer has a compound of carbon and silicon as a main component and including hydrogen. | 2012-11-01 |
20120273744 | NON-VOLATILE RESISTIVE SENSE MEMORY WITH IMPROVED SWITCHING - A resistive sense memory cell includes a layer of crystalline praseodymium calcium manganese oxide and a layer of amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack. A first and second electrode are separated by the resistive sense memory stack. The resistive sense memory cell can further include an oxygen diffusion barrier layer separating the layer of crystalline praseodymium calcium manganese oxide from the layer of amorphous praseodymium calcium manganese oxide a layer. Methods include depositing an amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack. | 2012-11-01 |
20120273745 | METHOD OF MANUFACTURING A PHASE CHANGE SEMICONDUCTOR DEVICE AND THE PHASE CHANGE SEMICONDUCTOR DEVICE - This disclosure is directed to a phase change semiconductor device and a manufacturing method thereof, comprising: forming an insulating layer on a substrate and a metal layer on the insulating layer; forming a via hole penetrating from the metal layer to the insulating layer; forming a phase change material layer on the metal layer and the via hole to at least fill up the via hole; and performing a planarization process, wherein after forming the metal layer and before forming the via hole, or after forming the via hole and before forming the phase change material layer, or after forming the phase change material layer and before the planarization process, subjecting the metal layer to an annealing treatment to form a metallic compound layer at an interface between the metal layer and the insulating layer. Adhesion between the phase change material layer and the insulating layer can be improved. | 2012-11-01 |
20120273746 | SYSTEM AND METHOD FOR THE RELAXATION OF STRESS IN PHASE MEMORY DEVICES - A phase change memory device that utilizes a nanowire structure. Usage of the nanowire structure permits the phase change memory device to release its stress upon amorphization via the minimization of reset resistance and threshold resistance. | 2012-11-01 |
20120273747 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a semiconductor device includes a fin type stacked layer structure which has first to third semiconductor layers, and first to third layer select transistors to select one of the first to third semiconductor layers. The second layer select transistor is normally on in the second semiconductor layer, and is controlled to be on or off in the first and third semiconductor layers. A channel region of the second semiconductor layer which is covered with a gate electrode of the second layer select transistor has a metal silicide. | 2012-11-01 |
20120273748 | INTERCONNECTS FOR STACKED NON-VOLATILE MEMORY DEVICE AND METHOD - A method of forming a memory device includes providing a substrate having a surface region, defining a cell region and first and second peripheral regions, sequentially forming a first dielectric material, a first wiring structure for a first array of devices, and a second dielectric material over the surface region, forming an opening region in the first peripheral region, the opening region extending in a portion of at least the first and second dielectric materials to expose portions of the first wiring structure and the substrate, forming a second wiring material that is overlying the second dielectric material and fills the opening region to form a vertical interconnect structure in the first peripheral region, and forming a second wiring structure from the second wiring material for a second array of devices, the first and second wiring structures being separated from each other and electrically connected by the vertical interconnect structure. | 2012-11-01 |
20120273749 | METHOD AND STRUCTURE FOR LED WITH NANO-PATTERNED SUBSTRATE - The present disclosure provides one embodiment of a method for fabricating light-emitting diode (LED) devices. The method includes forming a nano-mask layer on a first substrate, wherein the nano-mask layer has a randomly arranged grain pattern; growing a first epitaxy semiconductor layer in the first substrate, forming a nano-composite layer; growing a number of epitaxy semiconductor layers over the nano-composite layer; bonding a second substrate to the epitaxy semiconductor layers from a first side of the epitaxy semiconductor layers; applying a radiation energy to the nano-composite layer; and separating the first substrate from the epitaxy semiconductor layers from a second side of the epitaxy semiconductor layers. | 2012-11-01 |
20120273750 | LIGHT EMITTING DEVICES HAVING DOPANT FRONT LOADED TUNNEL BARRIER LAYERS - Light emitting devices described herein include dopant front loaded tunnel barrier layers (TBLs). A front loaded TBL includes a first surface closer to the active region of the light emitting device and a second surface farther from the active region. The dopant concentration in the TBL is higher near the first surface of the TBL when compared to the dopant concentration near the second surface of the TBL. The front loaded region near the first surface of the TBL is formed during fabrication of the device by pausing the growth of the light emitting device before the TBL is formed and flowing dopant into the reaction chamber. After the dopant flows in the reaction chamber during the pause, the TBL is grown. | 2012-11-01 |
20120273751 | LIGHT EMITTING DEVICE AND A MANUFACTURING METHOD THEREOF - The present invention provides a light emitting device and a method for manufacturing the light emitting device. The light emitting device includes a susceptor and a light emitting diode set on the susceptor. The light emitting diode includes an electrode layer connected to the susceptor and an LED die set on the electrode layer. The electrode layer is provided with a pyramid array structure surface and the pyramid array surface works as a reflective surface of the light emitting diode. The LED die is provided with an alveolate surface which works as the light exiting surface of the LED. According to the light emitting device provided in the present invention, the emanative light generated by the LED is emitted or reflected to a desired emitting direction. Further, the light emitting device has an alveolate light exiting surface and an LED having a pyramid array reflective surface, which increases the light emitting and reflective area of the LED, thereby improving the luminous efficiency. Besides, the light emitting device adopts a surface mount technology, which is easy to implement. | 2012-11-01 |
20120273752 | LATERAL-EPITAXIAL-OVERGROWTH THIN-FILM LED WITH NANOSCALE-ROUGHENED STRUCTURE AND METHOD FOR FABRICATING THE SAME - The present invention discloses a lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure and a method for fabricating the same. The lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure comprises a substrate, a metal bonding layer formed on the substrate, a first electrode formed on the metal bonding layer, a semiconductor structure formed on the first electrode with a lateral-epitaxial-growth technology, and a second electrode formed on the semiconductor structure, wherein a nanoscale-roughened structure is formed on the semiconductor structure except the region covered by the second electrode. The present invention uses lateral epitaxial growth to effectively inhibit the stacking faults and reduce the thread dislocation density in the semiconductor structure to improve the crystallization quality of the light-emitting layer and reduce leakage current. Meanwhile, the surface roughened structure on the semiconductor structure can promote the external quantum efficiency. | 2012-11-01 |
20120273753 | SEMICONDUCTOR LIGHT EMITTING DEVICE - According to an embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a plurality of thin parts thinner than other part being provided in the first semiconductor layer; a second semiconductor layer of a second conductivity type; and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. A transparent electrode is provided on a surface of the first semiconductor layer; a first electrode is provided on the transparent electrode; and a second electrode contacts a surface of the second semiconductor layer, wherein the second semiconductor layer is provided between the second electrode and the light emitting layer. A current blocking layer is provided for blocking a part of a current path between the transparent electrode and the second electrode, not overlapping the thin part in a planar view parallel to the surface of the second semiconductor layer. | 2012-11-01 |
20120273754 | LIGHT EMITTING DIODE - A light emitting diode includes a second electrode, a first semiconductor layer, an active layer, a second semiconductor layer, a reflector, and a first electrode. The second electrode, the first semiconductor layer, the active layer, the second semiconductor layer, and the reflector are stacked on the first electrode in that order. The first semiconductor layer defines a plurality of grooves on a surface contacting the second electrode. The plurality of grooves form a patterned surface used as the light extraction surface. A carbon nanotube layer is located on the patterned surface and embedded into the grooves. | 2012-11-01 |
20120273755 | LIGHT EMITTING DIODE - A light emitting diode includes a first semiconductor layer, an active layer and a second semiconductor layer stacked in that order; a first electrode electrically connected to the first semiconductor layer; a second electrode electrically connected to the second semiconductor layer. The light emitting diode further includes a carbon nanotube layer. The carbon nanotube layer is enclosed in the interior of the first semiconductor layer. The carbon nanotube layer includes a number of carbon nanotubes. | 2012-11-01 |
20120273756 | LIGHT EMITTING DIODE - A light emitting diode includes a substrate, a carbon nanotube layer, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode, and a second electrode. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked on one side of the substrate in that order. The first semiconductor layer is adjacent to the substrate. The carbon nanotube layer is located between the first semiconductor layer and the substrate. The first electrode is electrically connected to the first semiconductor layer. The second electrode is electrically connected to the second semiconductor layer. | 2012-11-01 |
20120273757 | LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME - A light emitting diode and a light emitting diode (LED) manufacturing method are disclosed. The LED comprises a substrate; a first n-type GaN layer; a second n-type GaN layer; an active layer; and a p-type GaN layer formed on the substrate in sequence; the second n-type GaN layers has a bottom surface interfacing with the first n-type GaN layer, a rim of the bottom surface has a roughened exposed portion, and Ga—N bonds on the bottom surface has an N-face polarity. | 2012-11-01 |
20120273758 | NITRIDE SEMICONDUCTOR LIGHT-EMITTING DIODE DEVICE - A nitride semiconductor light-emitting diode device includes an n-type nitride semiconductor layer, a p-type nitride semiconductor layer and an active layer provided between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer, while the active layer has a multiple quantum well structure including a quantum well layer and a barrier layer in contact with the p-type semiconductor layer, the barrier layer consists of a two-layer structure of an AlGaN layer and a GaN layer, and the AlGaN layer included in the barrier layer is in contact with a side of the quantum well layer closer to the p-type nitride semiconductor layer | 2012-11-01 |
20120273759 | EPITAXIAL SUBSTRATE FOR ELECTRONIC DEVICE AND METHOD OF PRODUCING THE SAME - An epitaxial substrate for an electronic device, in which a lateral direction of the substrate is defined as a main current conducting direction and a warp configuration of the epitaxial substrate is adequately controlled, as well as a method of producing the epitaxial substrate. Specifically, the epitaxial substrate for an electron device, including: a Si single crystal substrate; and a Group III nitride laminated body formed by epitaxially growing plural Group III nitride layers on the Si single crystal substrate, wherein a lateral direction of the epitaxial substrate is defined as a main current conducting direction, is characterized in that the Si single crystal substrate is a p-type substrate having a specific resistance value of not larger than 0.01 Ω·cm. | 2012-11-01 |
20120273760 | Bipolar Transistor with Lateral Emitter and Collector and Method of Production - A bipolar transistor includes a substrate of semiconductor material, a high-mobility layer in the substrate, and a donor layer adjacent to the high-mobility layer. An emitter terminal forms an emitter contact on the donor layer, and a collector terminal forms a collector contact on the donor layer. A base terminal is electrically conductively connected with the high-mobility layer. The transistor can be produced in a HEMT technology or BiFET technology in GaAs. | 2012-11-01 |
20120273761 | Nanowire Tunnel Field Effect Transistors - A nanowire tunnel field effect transistor (FET) device includes a channel region including a silicon portion having a first distal end and a second distal end, the silicon portion is surrounded by a gate structure disposed circumferentially around the silicon portion, a drain region including an doped silicon portion extending from the first distal end, a portion of the doped silicon portion arranged in the channel region, a cavity defined by the second distal end of the silicon portion and an inner diameter of the gate structure, and a source region including a doped epi-silicon portion epitaxially extending from the second distal end of the silicon portion in the cavity, a first pad region, and a portion of a silicon substrate. | 2012-11-01 |
20120273762 | ELECTRONIC ARRANGEMENTS FOR PASSIVATED SILICON NANOWIRES - Methods for fabricating passivated silicon nanowires and an electronic arrangement thus obtained are described. Such arrangements may comprise a metal-oxide-semiconductor (MOS) structure such that the arrangements may be utilized for MOS field-effect transistors (MOSFETs) or opto-electronic switches. | 2012-11-01 |
20120273763 | Topological Insulator-Based Field-Effect Transistor - A Topological INsulator-based field-effect transistor (TINFET) is disclosed. The TINFET includes a first and second gate dielectric layers separated by a topological insulator (TI) layer. A first gate contact is connected to the first gate dielectric layer on the surface that is opposite the TI layer. A second gate contact may be connected to the second gate dielectric layer on the surface that is opposite the TI layer. A first TI surface contact is connected to one surface of the TI layer, and a second TI surface contact is connected to the second surface of the TI layer. | 2012-11-01 |
20120273764 | COMPOSITION FOR ORGANIC PHOTOELECTRIC DEVICE, ORGANIC PHOTOELECTRIC DEVICE USING THE SAME, AND DISPLAY DEVICE INCLUDING THE SAME - A composition for an organic photoelectric device, the composition including a first host compound including substituents represented by the following Chemical Formulas 1 to 3 sequentially combined; and a second host compound represented by the following Chemical Formula 4, | 2012-11-01 |
20120273765 | LIGHT EMITTING DEVICES AND COMPOSITIONS - A light emitting composition includes a light-emitting lumophore-functionalized nanoparticle, such as an organic-inorganic light-emitting lumophore-functionalized nanoparticle. A light emitting device includes an anode, a cathode, and a layer containing such a light-emitting composition. In an embodiment, the light emitting device can emit white light. | 2012-11-01 |
20120273766 | AROMATIC HETEROCYCLIC DERIVATIVE AND ORGANIC ELECTROLUMINESCENCE DEVICE USING THE SAME - An aromatic heterocyclic derivative represented by the following formula (1), a material for an organic electroluminescence device and an organic electroluminescence device including these: | 2012-11-01 |
20120273767 | ORGANIC ELECTROLUMINESCENT DEVICE - A high-efficiency, high-durability organic electroluminescent device, particularly a phosphorescent organic electroluminescent device is provided by using an organic compound of excellent characteristics that exhibits excellent hole-injecting/transporting performance and has high triplet exciton confining capability with an electron blocking ability, and that has high stability in the thin-film state and high luminous efficiency. | 2012-11-01 |
20120273768 | HETEROCYCLE-CONTAINING ASYMMETRIC AROMATIC COMPOUND, COMPOUND FOR ORGANIC THIN FILM TRANSISTOR, AND ORGANIC THIN FILM TRANSISTOR USING THE SAME - A compound represented by the following formula (I), provided that the compound in which all of R | 2012-11-01 |
20120273769 | NOVEL IRIDIUM COMPLEX, ORGANIC LIGHT-EMITTING DEVICE, AND IMAGE DISPLAY APPARATUS - There is provided a novel iridium complex having a small half-width of an emission spectrum and an organic light-emitting device that contains the iridium complex. There is provided a novel iridium complex that has a phenyl ring and an imidazole ring as ligands and that has a basic skeleton in which the phenyl ring is bonded to a triazine ring. | 2012-11-01 |
20120273770 | POLYCYCLIC RING-FUSED COMPOUND AND ORGANIC THIN FILM TRANSISTOR UTILIZING SAME - A compound for an organic thin film transistor represented by the following formula (1): | 2012-11-01 |
20120273771 | COMPOUND FOR ORGANIC PHOTOELECTRIC DEVICE AND ORGANIC PHOTOELECTRIC DEVICE INCLUDING THE SAME - A compound for an organic photoelectric device is represented by Chemical Formula 1, | 2012-11-01 |
20120273772 | CHARGE TRANSPORT LAYERS AND ORGANIC ELECTRON DEVICES COMPRISING SAME - Provided are organic n-doped electron transport layers comprising at least one electron transport material and at least one electron rich dopant material and organic p-doped hole transport layers comprising at least one hole transport material and at least one electron deficient dopant material. | 2012-11-01 |
20120273773 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device which has low power consumption and can operate at high speed. The semiconductor device includes a memory element including a first transistor including crystalline silicon in a channel formation region, a capacitor for storing data of the memory element, and a second transistor which is a switching element for controlling supply, storage, and release of charge in the capacitor. The second transistor is provided over an insulating film covering the first transistor. The first and second transistors have a source electrode or a drain electrode in common. | 2012-11-01 |
20120273774 | SEMICONDUCTOR DEVICE - The semiconductor device includes transistors which are stacked. The transistors include a semiconductor substrate having a groove portion and a pair of low-resistance regions between which the groove portion is provided, a first gate insulating film over the semiconductor substrate, a gate electrode overlapping with the groove portion with the first gate insulating film interposed therebetween, a second gate insulating film covering the gate electrode, a pair of electrodes provided over the second gate insulating film so that the groove portion is sandwiched between the pair of electrodes, and a semiconductor film in contact with the pair of electrodes. One of the pair of low-resistance region is electrically connected to one of the pair of electrodes. One of the transistors includes an n-type semiconductor and the other includes a p-type semiconductor, so that a complementary MOS circuit is formed. | 2012-11-01 |
20120273775 | SEMICONDUCTOR-ON-DIAMOND DEVICES AND METHODS OF FORMING - The present invention provides semiconductor-on-diamond devices, and methods for the formation thereof. In one aspect, a mold is provided which has an interface surface configured to inversely match a configuration intended for the device surface of a diamond layer. An adynamic diamond layer is then deposited upon the diamond interface surface of the mold, and a substrate is joined to the growth surface of the adynamic diamond layer. At least a portion of the mold can then be removed to expose the device surface of the diamond which has received a shape which inversely corresponds to the configuration of the mold's diamond interface surface. The mold can be formed of a suitable semiconductor material which is thinned to produce a final device. Optionally, a semiconductor material can be coupled to the diamond layer subsequent to removal of the mold. | 2012-11-01 |
20120273776 | Semiconductor Device and Light-Emitting Device - One feature of a semiconductor device of the present invention is to include an electrode that serves as an electrode of a light-emitting element. The electrode includes a first layer and a second layer. Further, end portions of the electrode are covered with a partition layer having an opening portion. Moreover, a part of the electrode is exposed by the opening portion of the partition layer. One feature of a semiconductor device of the present invention is to include an electrode that serves as an electrode of a light-emitting element and a transistor. The electrode and the transistor are connected electrically to each other. The electrode includes a first layer and a second layer. Further, end portions of the electrode are covered with a partition layer having an opening portion. Moreover, the second layer is exposed by the opening portion of the partition layer. | 2012-11-01 |
20120273777 | SPUTTERING TARGET, OXIDE SEMICONDUCTOR FILM AND SEMICONDUCTOR DEVICE - A sputtering target including an oxide sintered body, the oxide sintered body containing indium (In) and at least one element selected from gadolinium (Gd), dysprosium (Dy), holmium (Ho), erbium (Er) and ytterbium (Yb), and the oxide sintered body substantially being of a bixbyite structure. | 2012-11-01 |
20120273778 | MEMORY DEVICE AND MANUFACTURING METHOD THE SAME - A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element. | 2012-11-01 |
20120273779 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - In an active matrix display device, electric characteristics of thin film transistors included in a circuit are important, and performance of the display device depends on the electric characteristics. Thus, by using an oxide semiconductor film including In, Ga, and Zn for an inverted staggered thin film transistor, variation in electric characteristics of the thin film transistor can be reduced. Three layers of a gate insulating film, an oxide semiconductor layer and a channel protective layer are successively formed by a sputtering method without being exposed to air. Further, in the oxide semiconductor layer, the thickness of a region overlapping with the channel protective film is larger than that of a region in contact with a conductive film. | 2012-11-01 |
20120273780 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed. | 2012-11-01 |
20120273781 | Device and Method For RF Characterization of Nanostructures and High Impedance Devices - A method and device are provided for the RF characterization of nanostructures and high impedance devices. A two-terminal electronic nanostructure device is fabricated by dividing a length of a nanostructure into a plurality of shorter, identical nanostructures using a plurality of finger electrodes electrically connected in parallel. The nanostructure may include a single walled carbon nanotube subdivided into shorter identical copies of a metallic nanotube segment by situating multiple finger electrodes along the length of the single walled carbon nanotube. Each of the subdivided shorter nanotube segments are connected in parallel. This arrangement allows for close impedance matching to radio frequency (RF) systems, and serves as an important technique in understanding and characterizing metallic (and even semiconducting) nanotubes at RF and microwave frequencies. | 2012-11-01 |
20120273782 | INTERPOSERS OF 3-DIMENSIONAL INTEGRATED CIRCUIT PACKAGE SYSTEMS AND METHODS OF DESIGNING THE SAME - An interposer of a package system includes a first probe pad disposed adjacent to a first surface of the interposer. A second probe pad is disposed adjacent to the first surface of the interposer. A first bump of a first dimension is disposed adjacent to the first surface of the interposer. The first bump is electrically coupled with the first probe pad. A second bump of the first dimension is disposed adjacent to the first surface of the interposer. The second bump is electrically coupled with the second probe pad. The second bump is electrically coupled with the first bump through a redistribution layer (RDL) of the interposer. | 2012-11-01 |
20120273783 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus has a plurality of chips stacked therein, and generation timing of read control signals for controlling read operations of the plurality of stacked chips is controlled such that times after a read command is applied to when data are outputted from respective chips are made to substantially correspond to one another. | 2012-11-01 |
20120273784 | FABRICATION OF ELECTRONIC AND PHOTONIC SYSTEMS ON FLEXIBLE SUBSTRATES BY LAYER TRANSFER METHOD - A transfer layer includes a transparent substrate. A buffer layer is formed on the transparent substrate that comprises PbO, GaN, PbTiO | 2012-11-01 |
20120273785 | PHOTOSENSOR ELEMENT, PHOTOSENSOR CIRCUIT, THIN FILM TRANSISTOR SUBSTRATE, DISPLAY PANEL, AND METHOD FOR MANUFACTURING PHOTOSENSOR ELEMENT - A photosensor element ( | 2012-11-01 |
20120273786 | ORGANIC SURFACE PROTECTIVE LAYER COMPOSITION AND METHOD FOR PROTECTING ORGANIC SURFACE - The problem to be solved by the present invention is to provide such an organic surface protective layer composition that a thin and uniform protective layer can be formed on a surface of an organic layer, that the formed protective layer can easily be removed by etching, and that it can inhibit the alteration of the organic compound presenting in the surface of the organic layer exposed by the etching. Means for solving the problem is an organic surface protective layer composition containing (A) a metal alkoxide, (B) a stabilizer for the metal alkoxide and (C) an organic solvent capable of dissolving the metal alkoxide. | 2012-11-01 |
20120273787 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - In a thin film transistor array panel according to an exemplary embodiment of the present invention, a plasma process using a mixed gas including hydrogen gas and nitrogen gas with a ratio of a predetermined value is undertaken before depositing a passivation layer. In this manner, performance deterioration of the thin film transistor may be prevented and simultaneously, haze in a transparent electrode may be prevented. Alternatively, a first passivation layer is depsoited, then removed. A passivation layer is again re-deposited, such that little or no haze is present in the resulting passivation layer. | 2012-11-01 |
20120273788 | PRINTED ELECTRONIC DEVICE - This invention generally relates to a patterned substrate for an electronic device and to electronic devices, device arrays, field effect transistors and transistor arrays comprising the patterned substrate. The invention also relates to a logic circuit, display, memory or sensor device comprising the patterned substrate. Further the invention relates to a method of patterning a substrate for an electronic device. In an embodiment, a patterned substrate for an electronic device comprises: a first body having an edge; a second body comprising an elongate plurality of printed droplets having an edge adjacent to and substantially aligned to said first body edge; and a separation between said first body edge and said second body edge, wherein said elongate plurality of printed droplets is at an angle of about 5 degrees to about 90 degrees to said first body edge. | 2012-11-01 |
20120273789 | LIQUID CRYSTAL DISPLAY AND ARRAY SUBSTRATE - An embodiment of the disclosed technology discloses an array substrate comprising: a base substrate; a first layer transparent common electrode formed on the base substrate; a gate metal common electrode formed on the first layer transparent common electrode; an insulation layer formed on the gate metal common electrode, with via holes being formed in the insulation layer; and a second layer transparent common electrode formed on the insulation layer. A side portion of via holes is in contact with the gate metal common electrode, another side portion is in contact with the first layer transparent common electrode, such that the second layer transparent common electrode is connected electrically with the first layer transparent common electrode and the gate metal common electrode in the via holes. | 2012-11-01 |
20120273790 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - In one embodiment, a method of manufacturing a semiconductor device includes forming an amorphous semiconductor film on a substrate. The method further includes annealing the amorphous semiconductor film by irradiating the substrate with a microwave to form a polycrystalline semiconductor film from the amorphous semiconductor film. The method further includes forming a transistor whose channel is the polycrystalline semiconductor film. | 2012-11-01 |
20120273791 | METHOD OF FORMING SEMICONDUCTOR DEVICES WITH BURIED GATE ELECTRODES AND DEVICES FORMED BY THE SAME - A polycrystalline semiconductor layer is formed on a cell active region and a peripheral active region of a substrate. A buried gate electrode is formed in the substrate in the cell active region at a level below the polycrystalline semiconductor layer after forming the polycrystalline semiconductor layer. A gate electrode is formed on the substrate in the peripheral active region from the polysilicon semiconductor layer after forming the buried gate electrode. | 2012-11-01 |
20120273792 | Zone Melt Recrystallization of Thin Films - A solar cell comprises a recrystallized layer wherein the recrystallized layer has at least one crystal grain at least 90% of the size of the illuminated area of the solar cell. | 2012-11-01 |
20120273793 | SEMICONDUCTOR LIGHT EMITTING DEVICE - According to one embodiment, a semiconductor light emitting device includes a substrate, a first electrode, a first conductivity type layer, a light emitting layer, a second conductivity type layer and a second electrode. The first conductivity type layer includes a first contact layer, a window layer having a lower impurity concentration than the first contact layer and a first cladding layer. The second conductivity type layer includes a second cladding layer, a current spreading layer and a second contact layer. The second electrode includes a narrow-line region on the second contact layer and a pad region electrically connected to the narrow-line region. Band gap energies of the first contact and window layers are larger than that of the light emitting layer. The first contact layer is provided selectively between the window layer and the first electrode and without overlapping the second contact layer as viewed from above. | 2012-11-01 |
20120273794 | SEMICONDUCTOR LIGHT EMITTING DEVICE, WAFER, AND METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE - According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, an active layer, and a second semiconductor layer. The first layer has a first upper surface and a first side surface. The active layer has a first portion covering the first upper surface and having a second upper surface, and a second portion covering the first side surface and having a second side surface. The second layer has a third portion covering the second upper surface, and a fourth portion covering the second side surface. The first and second layers include a nitride semiconductor. The first portion along a stacking direction has a thickness thicker than the second portion along a direction from the first side surface toward the second side surface. The third portion along the stacking direction has a thickness thicker than the fourth portion along the direction. | 2012-11-01 |
20120273795 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device comprising a back barrier layer that is formed by a group III-V compound semiconductor above a substrate; a channel layer that is formed of a group III-V compound semiconductor having less bandgap energy than the back barrier layer, is formed on the back barrier layer, and includes a recessed portion formed in at least a portion of the channel layer above the back barrier layer to be thinner than other portions of the channel layer; a first electrode that is in ohmic contact with the channel layer; and a second electrode formed at least above the recessed portion of the channel layer. | 2012-11-01 |
20120273796 | HIGH INDIUM UPTAKE AND HIGH POLARIZATION RATIO FOR GROUP-III NITRIDE OPTOELECTRONIC DEVICES FABRICATED ON A SEMIPOLAR (20-2-1) PLANE OF A GALLIUM NITRIDE SUBSTRATE - A Group-III nitride optoelectronic device fabricated on a semipolar (20-2-1) plane of a Gallium Nitride (GaN) substrate is characterized by a high Indium uptake and a high polarization ratio. | 2012-11-01 |
20120273797 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - There are provided a semiconductor device that includes a bypass protection unit against surge voltage or the like, achieves good withstand voltage characteristics and low on-resistance (low On-state voltage), has a simple structure, and is used for large-current purpose and a method for producing the semiconductor device. | 2012-11-01 |
20120273798 | METHOD OF FORMING SILICIDE CONTACTS OF DIFFERENT SHAPES SELECTIVELY ON REGIONS OF A SEMICONDUCTOR DEVICE - A structure and method for fabricating silicide contacts for semiconductor devices is provided. Specifically, the structure and method involves utilizing chemical vapor deposition (CVD) and annealing to form silicide contacts of different shapes, selectively on regions of a semiconductor field effect transistor (FET), such as on source and drain regions. The shape of silicide contacts is a critical factor that can be manipulated to reduce contact resistance. Thus, the structure and method provide silicide contacts of different shapes with low contact resistance, wherein the silicide contacts also mitigate leakage current to enhance the utility and performance of FETs in low power applications. | 2012-11-01 |
20120273799 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD FOR THE SAME - According to an embodiment, a semiconductor device includes: a conductive base plate; a semiconductor chip bonded on the conductive base plate, a first adhesive agent disposed on a central part of a bonded surface between the semiconductor chip and the conductive base plate; and a second adhesive agent disposed on a peripheral part of the central part of the bonded surface between the semiconductor chip and the conductive base plate. A coefficient of thermal conductivity of the first adhesive agent is relatively higher than that of the second adhesive agent, and a bonding strength of the second adhesive agent is relatively higher than that of the first adhesive agent. | 2012-11-01 |
20120273800 | COMPOSITE SUBSTRATE HAVING SINGLE-CRYSTAL SILICON CARBIDE SUBSTRATE - A first vertex of a first single-crystal silicon carbide substrate and a second vertex of a second single-crystal silicon carbide substrate abut each other such that a first side of the first single-crystal silicon carbide substrate and a second side of the second single-crystal silicon carbide substrate are aligned. In addition, at least a part of the first side and at least a part of the second side abut on a third side of a third single-crystal silicon carbide substrate. Thus, in manufacturing a semiconductor device including a composite substrate, process fluctuations caused by a gap between the single-crystal silicon carbide substrates can be suppressed. | 2012-11-01 |
20120273801 | SILICON CARBIDE SEMICONDUCTOR DEVICE - A SiC semiconductor device includes: a SiC substrate including a first or second conductive type layer and a first conductive type drift layer and including a principal surface having an offset direction; a trench disposed on the drift layer and having a longitudinal direction; and a gate electrode disposed in the trench via a gate insulation film. A sidewall of the trench provides a channel formation surface. The vertical semiconductor device flows current along with the channel formation surface of the trench according to a gate voltage applied to the gate electrode. The offset direction of the SiC substrate is perpendicular to the longitudinal direction of the trench. | 2012-11-01 |
20120273802 | JUNCTION BARRIER SCHOTTKY DIODES WITH CURRENT SURGE CAPABILITY - An electronic device includes a silicon carbide drift region having a first conductivity type, a Schottky contact on the drift region, and a plurality of junction barrier Schottky (JBS) regions at a surface of the drift region adjacent the Schottky contact. The JBS regions have a second conductivity type opposite the first conductivity type and have a first spacing between adjacent ones of the JBS regions. The device further includes a plurality of surge protection subregions having the second conductivity type. Each of the surge protection subregions has a second spacing between adjacent ones of the surge protection subregions that is less than the first spacing. | 2012-11-01 |
20120273803 | THERMAL DISSIPATION SUBSTRATE - The present invention related to a method for manufacturing a thermal dissipation substrate and a thermal dissipation substrate. The method includes steps of: (a) providing a substrate body having a surface; (b) forming a plurality of concave regions on the surface; and (c) filling the plurality of concave regions with a plurality of diamond materials. The thermal dissipation substrate includes: a substrate having a surface at a first horizontal; a plurality of regions formed on the surface at a second horizontal; and a plurality of diamond materials having a relatively high thermal coefficient and disposed on the plurality of regions. | 2012-11-01 |
20120273804 | Light-Emitting Device and Manufacturing Method Thereof - When a hollow structure in which a light-emitting element is provided between a pair of substrates is used in order to prevent oxygen or moisture from reaching the light-emitting element, light leakage to an adjacent pixel easily occurs as compared to a structure in which a space between a pair of substrates is filled with a resin such as an adhesive. In order to reduce light leakage to an adjacent pixel in the hollow structure, a light-blocking spacer is formed over a partition to keep the distance between the pair of substrates uniform. The cross-sectional shape of the light-blocking spacer is a trapezoid having a lower side shorter than an upper side. | 2012-11-01 |
20120273805 | METHOD FOR PRODUCING SILICON LAYERS - The invention relates to a liquid-phase method for the thermal production of silicon layers on a substrate, wherein at least one higher silicon that can be produced from at least one hydridosilane of the generic formula Si | 2012-11-01 |
20120273806 | LED PACKAGE STRUCTURE - An LED package structure with standby bonding pads for increasing wire-bonding yield includes a substrate unit, a light-emitting unit, a conductive wire unit and a package unit. The substrate unit has a substrate body and a plurality of positive pads and negative pads. The light-emitting unit has a plurality of LED bare chips. The positive electrode of each LED bare chip corresponds to at least two of the positive pads, and the negative electrode of each LED bare chip corresponds to at least two of the negative pads. Each wire is electrically connected between the positive electrode of the LED bare chip and one of the at least two positive pads or between the negative electrode of the LED bare chip and one of the at least two negative pads. The package unit has a light-permitting package resin body on the substrate body to cover the LED bare chips. | 2012-11-01 |
20120273807 | Method for the Producing of a Light-Emitting Semiconductor Chip, Method for the Production of a Conversion Die and Light-Emitting Semiconductor Chip - A light-emitting semiconductor chip is provided, the semiconductor chip comprising a semiconductor body having a pixel region with at least two electrically isolated sub-regions, each sub-region comprising an active layer, which generates electromagnetic radiation of a first wavelength range during operation, a separately manufactured ceramic conversion die over a radiation emission area of at least one sub-region, said conversion die being configured to convert radiation of the first wavelength range into electromagnetic radiation of a second wavelength range, wherein a width of the conversion die does not exceed 100 μm. Further, a method for the production of a light-emitting semiconductor chip and method for the production of a conversion die are provided. | 2012-11-01 |
20120273808 | LED ARRAY MODULE AND FABRICATION METHOD THEREOF - An LED array module is manufactured by: attaching an upper conductive layer to a lower conductive layer by an insulative adhesion layer; forming an insulating layer on the entire exposed surface of the upper conductive layer and the lower conductive layer; forming a plurality of LED mounting regions by machining the upper conductive layer so the upper surface of the lower conductive layer is exposed; mounting an LED in each of the LED mounting regions for supplying power to the LED by the lower and upper conductive layers; charging each of the LED mounting regions with an insulating and transparent resin; and forming respective separation grooves in the upper layer and lower conductive layers abreast in a width direction such that each of the upper and lower conductive layers is divided into a plurality of slices. | 2012-11-01 |
20120273809 | LIGHT EMITTING DIODE DEVICE - An LED package includes a substrate, a first LED module and a second LED module. The first LED module includes a plurality of first LEDs arranged at the substrate. The second LED module includes a plurality of second LEDs arranged at the substrate and surrounding the first LED module. A luminous intensity of the first LED module is less than a luminous intensity of the second LED module. | 2012-11-01 |
20120273810 | Booster Circuit, Semiconductor Device, and Electronic Apparatus - The invention provides a booster circuit including a first transistor, a second transistor, a first capacitor element, a second capacitor element, a diode, and an inverter, wherein one electrode of the first transistor is maintained at a predetermined potential, the output of the inverter is connected to the gate electrode of the first transistor and one electrode of the second transistor through the second capacitor element, the input of the inverter is connected to the other electrode of the first transistor through the first capacitor element and connected to the gate electrode of the second transistor, and the diode is connected between the other electrode of the first transistor and the other electrode of the second transistor so as to be forwardly biased. | 2012-11-01 |
20120273811 | HOUSING FOR AN OPTOELECTRONIC COMPONENT AND METHOD FOR PRODUCING A HOUSING - A housing for an optoelectronic component including a main housing body formed by a first plastics material, and which has a recess, and a coating formed by a second plastics material, and which, at least in a region of the recess, connects at least in places to the main housing body and is in direct contact with the main housing body, wherein the first plastics material is different from the second plastics material, and the first plastics material and the second plastics material differ from one another with regard to at least one of the following material properties: temperature resistance with regard to discoloration, temperature resistance with regard to deformation, temperature resistance with regard to destruction, and resistance to electromagnetic radiation. | 2012-11-01 |
20120273812 | LIGHT SOURCE FOR ILLUMINATION - The present invention aims to provide a light source for illumination that achieves excellent luminous intensity distribution and can be easily assembled. A light source | 2012-11-01 |
20120273813 | LIGHT EMITTING DIODE PACKAGE AND METHOD FOR FABRICATING THE SAME - The present disclosure provides an LED package and a method for fabricating the same. The LED package includes a base, at least one LED chip mounted on the base, a transparent wall disposed on the base and extending around the LED chip, and a fluorescent material disposed inside of the transparent wall and covering upper and side surfaces of the LED chip. | 2012-11-01 |
20120273814 | Light Emitting Diode with a Current Concentrating Structure - A light emitting diode (LED) includes a transparent insulating layer; and at least one transparent conductive oxide layer substantially enclosing the transparent insulating layer, wherein the transparent insulating layer and the at least one transparent conductive oxide layer are configured to distribute a current through the LED toward a peripheral region of the LED. | 2012-11-01 |
20120273815 | LIFT-OFF STRUCTURE FOR SUBSTRATE OF A PHOTOELECTRIC DEVICE AND THE METHOD THEREOF - The present invention related to a lift-off structure adapted to a substrate having a photoelectric device, the structure comprising: a buffer layer, forming on the substrate; an upper sacrificial layer, forming on the buffer layer; an etch stop layer, forming on the upper sacrificial layer, and the photoelectric device structure forming on the etch stop layer. | 2012-11-01 |
20120273816 | SEMICONDUCTOR OPTICAL DEVICE - A semiconductor optical device includes: a group III nitride semiconductor substrate having a primary surface of a first orientation; a first group III nitride semiconductor laminate including a first active layer disposed on a first region of the primary surface; a group III nitride semiconductor thin film having a surface, which has a second orientation different from the first orientation, disposed on a second region, the second region being different from the first region; a junction layer provided between the second region and the group III nitride semiconductor thin film; and a second group III nitride semiconductor laminate including a second active layer and disposed on the surface of the group III nitride semiconductor thin film. The first and second active layers include first and second well layers containing In, respectively, and the emission wavelengths of the first and second well layers are different from each other. | 2012-11-01 |
20120273817 | TOP-EMISSION ORGANIC LIGHT-EMITTING DIODE STRUCTURE - A top-emission organic light-emitting diode (OLED) structure is provided. The top-emission OLED structure includes a substrate, a reflective layer, a first conductive layer, a second conductive layer and an emissive layer. The reflective layer is disposed above the substrate. The reflective layer includes a first material, a second material and a third material. The first material is aluminum (Al), the second material is nickel (Ni), and the third material is selected form a group consisting of group 13 elements and group 14 elements of a periodic table of elements. The first conductive layer is disposed above the reflective layer. The second conductive layer is disposed above the first conductive layer. The emissive layer is disposed between the first conductive and the second conductive layer. | 2012-11-01 |
20120273818 | LIGHT EMITTING DIODE - A light emitting diode includes a carbon nanotube layer, a first semiconductor layer, a second semiconductor layer, an active layer, a first electrode and a second electrode stacked on an epitaxial growth surface of a substrate. A first part of the carbon nanotube layer is covered by the first semiconductor layer and a second part of the carbon nanotube layer is exposed. The first electrode is electrically connected with the second semiconductor layer and the second electrode electrically is connected with the second part of the carbon nanotube layer. | 2012-11-01 |
20120273819 | LED PACKAGE STRUCTURE - An LED package structure includes a substrate, two electrodes engaged in the substrate, an LED chip, a reflective cup and an encapsulation. The substrate includes a first surface and a second surface opposite to the first surface. Each of the electrodes defines a groove. The grooves surrounding the LED chip. The LED chip is mounted on one of the electrodes and electrically connected to the two electrodes. The reflective cup is mounted on the substrate and surrounds the LED chip. The encapsulation covers the LED chip and extends in the grooves of the electrodes to prevent water/moisture from entering the LED chip. | 2012-11-01 |
20120273820 | LED PACKAGE AND METHOD FOR MAKING THE SAME - An LED package includes a substrate, an LED die, electrodes, a reflective cup, a barrier portion and an encapsulation. The substrate includes a first surface and a second surface opposite to the first surface. The electrodes are formed on the substrate and spaced from each other. The barrier portion is formed on the electrodes and covered by the reflective cup, wherein a bonding force between the barrier portion and the electrodes is larger than that between the reflective cup and the electrodes. The LED die is mounted on one of the electrodes, received in the reflective cup and electrically connected to the electrodes via wire bonding. The disclosure also provides a method for making an LED package. | 2012-11-01 |
20120273821 | METHOD FOR PATTERNING AN EPITAXIAL SUBSTRATE, A LIGHT EMITTING DIODE AND A METHOD FOR FORMING A LIGHT EMITTING DIODE - A method for patterning an epitaxial substrate includes: (a) forming an etch mask layer over an epitaxial substrate, and patterning the etch mask layer using a patterned cover mask layer to form the etch mask layer into a plurality of spaced apart mask patterns; and (b) etching the epitaxial substrate that is exposed from the mask patterns, and removing the mask patterns such that the epitaxial substrate is formed with a plurality of spaced apart substrate patterns. | 2012-11-01 |
20120273822 | Light-Emitting Element, Light-Emitting Device, and Lighting Device - Disclosed is a light-emitting element with a microcavity structure which is capable of amplifying a plurality of wavelengths to give emission of a desired color. The light-emitting element includes a pair of electrodes and an EL layer having a light-emitting substance interposed between the pair of electrodes. One of the pair of electrodes gives a reflective surface and the other electrode gives a semi-reflective surface. The light-emitting element is arranged so that the emission of the light-emitting substance covers at least two wavelengths λ and an optical path length L between the reflective surface and the semi-reflective surface satisfies an equation L=nλ/2 where n is an integer greater than or equal to 2. | 2012-11-01 |
20120273823 | NITRIDE SEMICONDUCTOR LIGHT EMITTING ELEMENT AND METHOD OF MANUFACTURING THE SAME - A nitride semiconductor light emitting element having a thick metal bump, and a method of manufacturing a flip-chip nitride semiconductor light emitting element including: a nitride semiconductor light emitting element structure having an n-type nitride semiconductor layer and a p-type nitride semiconductor layer, which are laminated on a substrate, and an n-side electrode connecting surface for connecting an n-side electrode to the n-type nitride semiconductor layer and a p-side electrode connecting surface for connecting a p-side electrode to the p-type nitride semiconductor layer on the same plane side of the substrate, the n-side electrode being connected to the n-side electrode connecting surface and the p-side electrode being connected to the p-side electrode connecting surface; and metal bumps formed on the n-side electrode and the p-side electrode, with other manufacturing steps performed. | 2012-11-01 |
20120273824 | OPTOELECTRONIC SEMICONDUCTOR CHIP - An optoelectronic semiconductor chip includes a semiconductor layer sequence having an active layer and a light-outcoupling layer applied at least indirectly on a radiation permeable surface of the semiconductor layer sequence. A material of the light-outcoupling layer is different from a material of the semiconductor layer sequence and refractive indices of the materials of the light-outcoupling layer and of the semiconductor layer sequence differ from each other by 20% at most. Recesses in the light-outcoupling layer form facets, wherein the recesses do not penetrate the light-outcoupling layer completely. The facets have a total area of at least 25% of an area of the radiation permeable surface. | 2012-11-01 |
20120273825 | METHOD OF MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE - Disclosed is a light emitting device. The light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer on the active layer; an electrode layer on the light emitting structure; and a conductive support member on the electrode; wherein the conductive support member includes a center portion and a circumference portion surrounding the center portion, wherein a thickness of the circumference portion is lower than a thickness of the center portion, and wherein an area of a top surface of the electrode layer is larger than an area of a top surface of the second conductive semiconductor layer. | 2012-11-01 |
20120273826 | LED PACKAGE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, an LED package includes a first leadframe and a second leadframe mutually-separated, an LED chip and a resin body. The LED chip is provided above the first and second leadframes. One terminal of the LED chip is connected to the first leadframe. One other terminal is connected to the second leadframe. The resin body covers an entire upper surface, a portion of a lower surface, and a portion of an end surface of each of the first and second leadframes. The resin body covers the LED chip. Remaining portions of the lower surface and the end surface of each of the first and second leadframes are exposed on the resin body. First and second recesses are made between the remaining portions of the first and second leadframes. An inner surface of each of the first and second recesses is not covered with the resin body. | 2012-11-01 |