44th week of 2009 patent applcation highlights part 13 |
Patent application number | Title | Published |
20090267029 | Indium-oxide-based transparent conductive film and method for producing the film - The invention provides a transparent conductive film which exhibits low resistance and high transmittance, is an amorphous film, can be relatively readily patterned by etching with a weak acid, and can be relatively readily crystallized, and a method for producing the film. | 2009-10-29 |
20090267030 | SINTERED BODY FOR VACUUM VAPOR DEPOSITION - A sintered body for vacuum vapor deposition, the sintered body being a sintered body of an oxide containing at least one cation element; the cation element having an electronegativity of 1.5 or more; and the sintered body having a surface roughness of 3 μm or less and a bulk resistance of less than 1×10 | 2009-10-29 |
20090267031 | AZO DYE, COMPOSITION CONTAINING THE SAME FOR ANISOTROPIC DYE FILM, ANISOTROPIC DYE FILM, AND POLARIZING ELEMENT - To provide a dye capable of forming an anisotropic dye film showing high dichroism and having a high degree of molecular orientation, a composition containing the dye, an anisotropic dye film using the dye and a polarizing element. | 2009-10-29 |
20090267032 | Hydrogen Gas Detecting Material and the Coating Method - A hydrogen gas detecting material, which changes in light absorption characteristics when exposed to an atmosphere containing hydrogen, and the coating method are characterized in that ( | 2009-10-29 |
20090267033 | COMPOSITE MATERIAL AND PRODUCTION PROCESS OF DISPERSANT - A composite material is constituted by fine nano-oxide particles, a dispersant, and a transparent resin material. The dispersant includes a polymer of vinyl monomer having a binding acidic group. When φ is a dimensionless number defined by an average particle size (nm) of the fine nano-oxide particles divided by nm, the polymer has a degree of polymerization of an integer of 3 or more and 8×φ or less with the proviso that the integer is a numerical value obtained by dropping a decimal fraction. The composite material is produced through a step of obtaining a dispersant comprising a polymer by polymerizing a vinyl monomer having a binding acidic group in the presence of polyamine or in an aqueous dilute dispersion, and a step of mixing the dispersant, fine nano-oxide particles, and a transparent resin material. | 2009-10-29 |
20090267034 | STAPLE REMOVER - A staple remover device having first and second opposed, elongated jaws extending from a lower end of the remover toward an upper end of the remover. The jaws are pivoted to the remover at the upper end. With the remover in a substantially perpendicular orientation above a horizontal work surface, the first jaw moves toward the second jaw, actuated by a user's finger pressure. A handle extends along the remover device, the handle being normally operationally fixed to a jaw by a link including a latch, and at a pre-determined position of the first jaw to the second jaw, a release rib of at least one jaw causes the latch to suddenly de-link the handle from the jaw, wherein the de-linked handle moves in relation to the jaw and moving the handle in relation to the jaw causes the other jaw to rise, lifting out the staple. | 2009-10-29 |
20090267035 | Apparatus having a selectively engagable fastener set - A selectively engagable nut made up of plural nut portions which are able to move apart for disengagement with a screw and to move together to reengage. The nut portions are driven by pins extending into slots on the nut portions; the pins mounted in a rotating collar adjacent to the nut. The collar's pins, in a first rotational position holds the nut portions engaged with the screw. In an alternative rotational position, the pins drive and hold the nut portions apart to disengage with the nut portions. When the nut portions are in mutual contact, fingers are positioned on the nut portions in positions preventing the nut portions from moving apart so as to disengage the nut from the screw. | 2009-10-29 |
20090267036 | MOVING DEVICE - A support unit for moving an object may include an elongated member, at least one suction device coupled to the elongated member for attaching to an object, a lifting mechanism for raising and lowering the elongated member and an attached object, and a rotating member for moving the support unit and the attached object from a departure location to a destination location. | 2009-10-29 |
20090267037 | Conductor Stringing Apparatus And Process - A line stringing apparatus includes in combination an electric motor, motor controller and a processor switchable between a pulling mode and a tensioning mode. An electric motor expends electrical energy when pulling the line and generates electrical energy when tensioning the line. The processor outputting commands to the motor controller for control thereof and for application of electrical energy from the batteries to the electric motor when in the pulling mode and for application of electrical energy generated by the electric motor to the plurality of batteries when in tensioning mode. The processor limits electric motor torque and speed based on operator commands for speed and torque in said pulling mode; and, the processor controlling electric motor torque in the tensioning mode. | 2009-10-29 |
20090267038 | HOISTING DEVICE - The invention relates to a hoisting device for use at a wind turbine, in particular for use in a wind turbine nacelle, which hoisting device includes a reel, a drive motor, control mean and a hoisting line. The hoisting line is a rope, which is composed of synthetic fibre material, e.g. a high-tech rope. Hereby it is achieved that the hoisting device can be provided in a compact form, compared with traditionally used hoisting means, since the synthetic rope used as a hoisting line is characterized in having a high tensile strength and a low weight, whereby a rope having a comparable low weight can be used for lifting the same load, for which traditionally a steel wire having a relatively large weight has been used. Further, since the weight of the rope itself is relatively small, a drive motor, gear etc. having reduced capacity, power etc., can be used as compared to a traditional hoist, thereby also aiding in reducing the size, weight, complexity, cost etc. of the hoisting device. | 2009-10-29 |
20090267039 | Combination double bottom block - The invention relates to a combination double bottom hook block in which two pulley blocks ( | 2009-10-29 |
20090267040 | HYDRAULIC PUMPING CYLINDER AND METHOD OF PUMPING HYDRAULIC FLUID - A hydraulic jack including a frame and a pump connected to the frame. The pump includes a rod, a housing, a piston and a plurality of valves. The rod has a cross-sectional area. The housing has an end through which the rod slides. The piston is associated with said rod, with the piston establishing a rod side chamber and a piston side chamber within the housing. The piston having a cross-sectional area. The plurality of valves each are fluidly connected to the rod side chamber and/or the piston side chamber. The piston, the rod and the valves are arranged to provide a first hydraulic fluid flow associated with the cross-sectional area of the piston until a predetermined pressure is reached and a second hydraulic fluid flow associated with the cross-sectional area of the rod after the predetermined pressure is reached. | 2009-10-29 |
20090267041 | METHOD OF CONNECTING A FENCE RAIL TO A FENCE POST USING A RAIL CLIP ASSEMBLY - A method of using a rail clip assembly to connect a horizontal fence rail to a vertical fence post. The rail clip assembly includes a housing that is slidably engaged with at least one mounting spacer and a first leg of an L-shaped mounting bracket until a second leg of the bracket abuts the underside of the housing. A first fastener is screwed through the first leg and mounting spacer and into the side wall of the fence post. An end of the rail is inserted into the housing and a second fastener is screwed through the second leg, the housing and the end of the rail. The rail clip assembly aids in preventing the rail from disengaging from the housing when a lateral force is applied to the rail. | 2009-10-29 |
20090267042 | Integrated Circuit and Method of Manufacturing an Integrated Circuit - According to one embodiment of the present invention, an integrated circuit including a plurality of resistance changing memory cells is provided. Each memory cell includes: a semiconductor substrate; a select device arranged within the semiconductor substrate; and a memory element being arranged above the semiconductor substrate. The select device is a diode comprising a first semiconductor area of a first conductive type and a second semiconductor area of a second conductive type which are arranged adjacent to each other such that a lateral pn-junction is formed. The first semiconductor area is connected to a word line arranged on or above the semiconductor substrate. The second semiconductor area is connected to the memory element via a conductive connection element. | 2009-10-29 |
20090267043 | PHASE CHANGE MEMORY DEVICE RESISTANT TO STACK PATTERN COLLAPSE AND A METHOD FOR MANUFACTURING THE SAME - A phase change memory device resistant to stack pattern collapse is presented. The phase change memory device includes a silicon substrate, switching elements, heaters, stack patterns, bit lines and word lines. The silicon substrate has a plurality of active areas. The switching elements are connected to the active areas. The heaters are connected to the switching elements. The stack patterns are connected to the heaters. The bit lines are connected to the stack patterns. The word lines are connected to the active areas of the silicon substrate. | 2009-10-29 |
20090267044 | PHASE CHANGE MEMORY DEVICE HAVING A BENT HEATER AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes heaters which are formed in their respective memory cells and vertically positioned stack patterns having phase change layers and top electrodes which are formed to come into contact with the heaters. The heaters have horizontal cross-sectional bent shapes which can have any number of shapes such as a shape similar to that of a boomerang. The horizontal cross-sectional bent shapes of the heaters are for minimizing the contact area between the heaters and the phase change layer so that programming currents can be reduced or minimized. | 2009-10-29 |
20090267045 | PHASE CHANGE MEMORY DEVICE HAVING HEATERS AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes switching elements formed on a substrate that includes a cell region and a peripheral region. Heat sinks are formed on the switching elements. Heaters are formed on the heat sink and a phase change layer is formed on the heaters. | 2009-10-29 |
20090267046 | MEMORY STRUCTURE WITH A PROGRAMMABLE RESISTIVE ELEMENT AND ITS MANUFACTURING PROCESS - A memory structure has an access transistor connected in series with a programmable resistive element, wherein the programmable resistive element comprises on a semiconductor substrate; an insulated layer with a cavity comprising: a first layer lining the lateral surfaces and the bottom of the said cavity and impermeable to the diffusion of metal; a second layer made of porous material on the said first layer; a third layer of metallic material allowing to realize a contact electrode susceptible to spread within the said formed porous material of the second layer. Diffusion of metallic ions within the said second layer is controlled by the joint action of an electric field and temperature. A manufacturing process is also described. | 2009-10-29 |
20090267047 | SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - The present invention can promote the large capacity, high performance and high reliability of a semiconductor memory device by realizing high-performance of both the semiconductor device and a memory device when the semiconductor memory device is manufactured by stacking a memory device such as ReRAM or the phase change memory and the semiconductor device. After a polysilicon forming a selection device is deposited in an amorphous state at a low temperature, the crystallization of the polysilicon and the activation of impurities are briefly performed with heat treatment by laser annealing. When laser annealing is performed, the recording material located below the silicon subjected to the crystallization is completely covered with a metal film or with the metal film and an insulating film, thereby making it possible to suppress a temperature increase at the time of performing the annealing and to reduce the thermal load of the recording material. | 2009-10-29 |
20090267048 | SEMICONDUCTOR LIGHT EMITTING ELEMENT - Light extraction efficiency of a semiconductor light-emitting element is improved. A buffer layer, an n-type GaN layer, an InGaN emission layer, and a p-type GaN layer are laminated on a sapphire substrate in a semiconductor light-emitting element. A ZnO layer functioning as a transparent electrode is provided on the p-type GaN layer and concave portions are formed on a surface of the ZnO layer at two-dimensional periodic intervals. If a wavelength of light from the InGaN emission layer in the air is λ, an index of refraction of the ZnO layer at the wavelength λ is n | 2009-10-29 |
20090267049 | Plasmon Enhanced Nanowire Light Emitting Diode - A nanowire light emitting diode (LED) and method of emitting light employ a plasmonic mode. The nanowire LED includes a nanowire having a semiconductor junction, a shell layer coaxially surrounding the nanowire, and an insulating layer, which is plasmonically thin, isolating the shell layer from the nanowire. The shell layer supports a surface plasmon that couples to the semiconductor junction by an evanescent field. Light is generated in a vicinity of the semiconductor junction and the surface plasmon is coupled to the semiconductor junction during light generation. The coupling enhances one or both of an efficiency of light emission and a light emission rate of the LED. A method of making the nanowire LED includes forming the nanowire, providing the insulating layer on the surface of the nanowire, and forming the shell layer on the insulating layer in the vicinity of the semiconductor junction. | 2009-10-29 |
20090267050 | METHOD OF PREPARING CADMIUM SULFIDE NANOCRYSTALS EMITTING LIGHT AT MULTIPLE WAVELENGTHS, AND CADMIUM SULFIDE NANOCRYSTALS PREPARED BY THE METHOD - A cadmium sulfide nanocrystal, wherein the cadmium sulfide nanocrystal shows maximum luminescence peaks at two or more wavelengths and most of the atoms constituting the nanocrystal are present at the surface of the nanocrystal to form defects. | 2009-10-29 |
20090267051 | Method of preparing quantum dot-inorganic matrix composites - A method for preparing a quantum dot-inorganic matrix composite includes preparing an inorganic matrix precursor solution containing one or more quantum dot precursors, spin-coating the precursor solution on a substrate to form an inorganic matrix thin film, and heating the inorganic matrix thin film to form an inorganic matrix, while growing the quantum dot precursors into quantum dots in the inorganic matrix, thereby yielding a quantum dot-inorganic matrix composite. The quantum dot-inorganic matrix composite thus obtained has a structure in which the quantum dots have a high efficiency and are densely filled in an inorganic matrix. The quantum dot-inorganic matrix composites can be prepared using a low temperature process, and can be used for various displays and electronic device material applications. | 2009-10-29 |
20090267052 | LAYER TRANSFER OF LOW DEFECT SiGe USING AN ETCH-BACK PROCESS - A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si | 2009-10-29 |
20090267053 | CARBON-NANOTUBE BASED OPTO-ELECTRIC DEVICE - A carbon nano-tube based photoelectric device includes a substrate and a carbon nanotube (CNT) over the substrate. The CNT comprises a first end and a second end, wherein the CNT has a CNT work function. A high work-function electrode over the substrate is in electric contact with the first end of the CNT. The high work-function electrode has a first work function higher than the CNT work function. A low work-function electrode over the substrate is in electric contact with the second end of the CNT. The low work-function electrode has a second work function lower than the CNT work function. The CNT can form a conductive channel between the high work-function electrode and the low work-function electrode. The carbon nano-tube based photoelectric device also includes a dielectric material is in contact with a side surface of the CNT and a conductive material in contact with the dielectric material. | 2009-10-29 |
20090267054 | Apparatus, method and system for reconfigurable circuitry - The present invention relates to reconfigurable circuitry, and more particularly to the reconfiguration of the characteristics of materials used in the formation of electronic circuitry as the result of applied external influences. Exemplary embodiments of the present invention provide an apparatuses, methods, electronic devices and computer program products that include a nanoscale material layer, and a programmable element in close proximity to at least a first section of the nanoscale material layer. The programmable element is configured to produce interference with an electron wave in at least the first section of the nanoscale material layer. | 2009-10-29 |
20090267055 | TRANSISTOR, METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR DEVICE COMPRISING SUCH TRANSISTOR - The invention provides a process for production of a transistor that can form an oriented active layer by a convenient method while yielding a transistor with excellent carrier mobility. The process according to the invention is a process for production of a transistor with an active layer composed of an organic semiconductor compound-containing semiconductor film, the process comprising
| 2009-10-29 |
20090267056 | MEMORY CELL - A memory cell comprising a metal-insulator-semiconductor (MIS) structure is disclosed using a homogeneous carrier trapping layer interposed between a semiconductor layer and the gate electrode of a transistor structure so that the operation voltage is reduced and the manufacturing is simplified with lowered cost. The MIS structure comprises: a gate electrode; a semiconductor layer; and a homogeneous carrier trapping layer interposed between the gate electrode and the semiconductor layer; wherein the homogeneous carrier trapping layer comprises novolac. | 2009-10-29 |
20090267057 | ORGANIC FIELD-EFFECT TRANSISTOR FOR SENSING APPLICATIONS - Field-effect transistor comprising a gate electrode layer, a first dielectric layer, a source electrode, a drain electrode, an organic semiconductor and a second dielectric layer, wherein the first dielectric layer is located on the gate electrode layer, the source electrode, the drain electrode and the organic semiconductor are located above the first dielectric layer, the source electrode and the drain electrode are in contact with the organic semiconductor, wherein the second dielectric layer is placed upon the assembly of source electrode, drain electrode and organic semiconductor and wherein during operation of the field-effect transistor the capacitance of the assembly comprising the gate electrode layer and the first dielectric layer is lower than the capacitance of the second dielectric layer. Further a sensor system comprising such a field-effect transistor and the use of a sensor system for detecting molecules is disclosed. | 2009-10-29 |
20090267058 | SOLUTION-PROCESSED INORGANIC FILMS FOR ORGANIC THIN FILM TRANSISTORS - A method for fabricating a sol-gel film composition for use in a thin film transistor is disclosed. The method BB includes fabricating the sol-gel dielectric composition by solution processing at a temperature in the range 60° C. to 225° C. The sol-gel film made by the method, and an organic thin-film Si wafer Si wafer transistor incorporating the sol-gel film are also disclosed. | 2009-10-29 |
20090267059 | ORGANIC LIGHT EMITTING DEVICE - An organic light emitting device is disclosed. The organic light emitting device includes a substrate, a display positioned on the substrate, and a dummy pattern positioned at an edge of the display. The display includes a plurality of subpixels each including a first electrode, an emissive unit including at least an organic emissive layer, and a second electrode. The dummy pattern includes a dummy layer including the same formation material as that of at least one of a plurality of layers for forming the emissive unit. | 2009-10-29 |
20090267060 | POLYMER WRAPPED CARBON NANOTUBE NEAR-INFRARED PHOTOACTIVE DEVICES - A photoactive device includes a photoactive region disposed between and electrically connected to two electrodes where the photoactive region includes a first organic photoactive layer comprising a first donor material and a second organic photoactive layer comprising a first acceptor material. The first donor material contains photoactive polymer-wrapped carbon nanotubes and the photoactive region includes one or more additional organic photoactive material layers disposed between the first donor material layer and the acceptor material layer. The photoactive region creates excitons upon absorption of light in the range of about 400 nm to 1450 nm. | 2009-10-29 |
20090267061 | Carbonyl-Functionalized Thiophene Compounds and Related Device Structures - Carbonyl-functionalized oligo/polythiophene compounds, and related semiconductor components and related device structures. | 2009-10-29 |
20090267062 | Zinc oxide Based Compound Semiconductor Device - There is provided a zinc oxide based compound semiconductor device which, even when a semiconductor device is formed by forming a lamination portion having a hetero junction of ZnO based compound semiconductor layers, does not cause any rise in a drive voltage while ensuring p-type doping, and, at the same time, can realize good crystallinity and excellent device characteristics. ZnO based compound semiconductor layers ( | 2009-10-29 |
20090267063 | SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed is a semiconductor light-emitting device wherein a pn junction is formed by forming, as a p-type layer ( | 2009-10-29 |
20090267064 | SEMICONDUCTOR THIN FILM AND METHOD FOR MANUFACTURING SAME, AND THIN FILM TRANSISTOR - The present invention provides a semiconductor thin film which can be manufactured at a relatively low temperature even on a flexible resin substrate. As a semiconductor thin film having a low carrier concentration, a high Hall mobility and a large energy band gap, an amorphous film containing zinc oxide and tin oxide is formed to obtain a carrier density of 10 | 2009-10-29 |
20090267065 | SEMICONDUCTOR LIGHT EMITTING ELEMENT AND METHOD FOR MANUFACTURING THE SAME - A ZnO-based semiconductor light emitting element includes a ZnO-based semiconductor layer formed on a rectangular sapphire A-plane substrate having a principal surface lying in the A-plane {11-20}. The substrate has a thickness of 50 to 200 μm and is surrounded by two parallel first side edges forming an angle in a range of 52.7° to 54.7° with respect to the m-axis orthogonal to the c-axis and two parallel second side edges orthogonal to the first side edges. The light emitting element is obtained by: forming, on a surface of the sapphire A-plane substrate opposite to the surface on which the ZnO-based semiconductor layer is formed, first scribed grooves forming an angle in a range of 52.7° to 54.7° with respect to the m-axis and second scribed grooves orthogonal to the first scribed grooves; and breaking the substrate along the first scribed grooves and then along the second scribed grooves. | 2009-10-29 |
20090267066 | PHOTOELECTRIC CONVERSION DEVICE AND METHOD FOR MANUFACTURING THE SAME - To provide a photoelectric conversion device with improved photoelectric conversion characteristics and cost competitiveness. A photoelectric conversion device including a semiconductor junction has a semiconductor layer in which a needle-like crystal is made to grow over an impurity semiconductor layer. The impurity semiconductor layer is formed of a microcrystalline semiconductor and includes an impurity imparting one conductivity type. An amorphous semiconductor layer is deposited on a microcrystalline semiconductor layer by setting the flow rate of a dilution gas (typically silane) to 1 time to 6 times the flow rate of a semiconductor source gas (typically hydrogen) at the time of deposition. Thus, a crystal with a three-dimensional shape tapered in a direction of the deposition of a film, i.e., in a direction from the microcrystalline semiconductor layer to the amorphous semiconductor layer is made to grow. | 2009-10-29 |
20090267067 | THIN FILM TRANSISTOR - A thin film transistor has a gate electrode; a gate insulating layer provided so as to cover the gate electrode layer; a pair of impurity semiconductor layers forming source and drain regions which is provided so that at least part of each of them overlaps the gate electrode layer and which are provided with a space therebetween; a microcrystalline semiconductor layer provided over the gate insulating layer in part of a channel length; a semiconductor layer provided over the gate insulating layer so as to cover at least the microcrystalline semiconductor layer; and an amorphous semiconductor layer provided between the semiconductor layer and the pair of impurity semiconductor layers. An impurity element which reduces the coordination number of silicon and generates dangling bonds is made to exist in the semiconductor layer. | 2009-10-29 |
20090267068 | THIN FILM TRANSISTOR - The thin film transistor includes a gate insulating layer covering a gate electrode, over a substrate having an insulating surface; a semiconductor layer forming a channel formation region, in which a plurality of crystal regions is included in an amorphous structure; an impurity semiconductor layer imparting one conductivity type which forms a source region and a drain region; and a buffer layer formed from an amorphous semiconductor, which is located between the semiconductor layer and the impurity semiconductor layer. The thin film transistor includes the crystal region which includes minute crystal grains and inverted conical or inverted pyramidal grain each of which grows approximately radially from a position away from an interface between the gate insulating layer and the semiconductor layer toward a direction in which the semiconductor layer is deposited in a region which does not reach the impurity semiconductor layer. | 2009-10-29 |
20090267069 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes a p-type TFT having a first semiconductor layer, and an n-type TFT having a second semiconductor layer. A tilted portion, which is widened toward the insulating substrate side, is formed in at least a part of an outer edge portion of the first semiconductor layer. A tilt angle of a surface of the tilted portion to a surface of an insulating substrate, which is an angle formed inside the first semiconductor layer, is smaller than an angle of a side surface of an outer edge portion of the second semiconductor layer to the surface of the insulating substrate, which is an angle formed inside the second semiconductor layer. | 2009-10-29 |
20090267070 | Multilayer image sensor structure for reducing crosstalk - An image sensor pixel includes a substrate, an epitaxial layer, and a light collection region. The substrate is doped to have a first conductivity type. The epitaxial layer is disposed over the substrate and doped to have a second conductivity type opposite of the first conductivity type. The light collection region is disposed within the epitaxial layer for collecting photo-generated charge carriers. The light collection region is doped to have the first conductivity type as well. | 2009-10-29 |
20090267071 | PIXEL LAYOUT STRUCTURE FOR RAISING CAPABILITY OF DETECTING AMORPHOUS SILICON RESIDUE DEFECTS AND METHOD FOR MANUFACTURING THE SAME - Disclosed is a pixel layout structure capable of increasing the capability of detecting amorphous silicon (a-Si) residue defects and a method for manufacturing the same. Wherein, an a-Si dummy layer is disposed on either one side or both sides of each data line. The design of such an a-Si dummy layer is utilized, so that in an existing testing conditions (by making use of an existing automatic array tester in carrying out the test), in case that there exists an a-Si residue in a pixel, the pixel having defects can be detected through an enhanced capacitance coupling effect and an electron conduction effect. Therefore, through the application of the above-mentioned design, the capability of an automatic array tester can effectively be increased in detecting a defective pixel having a-Si residues. | 2009-10-29 |
20090267072 | ELECTRO-OPTICAL DEVICE AND METHOD FOR MANUFACTURING THE SAME - Using thin film transistors (TFTs), an active matrix circuit, a driver circuit for driving the active matrix circuit or the like are formed on one substrate. Circuits such as a central processing unit (CPU) and a memory, necessary to drive an electric device, are formed using single crystalline semiconductor integrated circuit chips. After the semiconductor integrated circuit chips are adhered to the substrate, the chips are connected with wirings formed on the substrate by a chip on glass (COG) method, a wire bonding method or the like, to manufacture the electric device having a liquid crystal display (LCD) on one substrate. | 2009-10-29 |
20090267073 | Semiconductor Device and Method of Manufacturing the Same - The present invention improves the aperture ratio of a pixel of a reflection-type display device or a reflection type display device without increasing the number of masks and without using a blackmask. A pixel electrode ( | 2009-10-29 |
20090267074 | ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A organic light emitting display device includes a thin film transistor (TFT) having a gate electrode, a source electrode and a drain electrode which are insulated from the gate electrode, and a semiconductor layer which is insulated from the gate electrode and which contacts each of the source electrode and the drain electrode; and a pixel electrode electrically connected to one of the source electrode and the drain electrode. The gate electrode is made up of a first conductive layer and a second conductive layer on the first conductive layer, and the pixel electrode is formed of the same material as the first conductive layer of the gate electrode on a same layer as the first conductive layer of the gate electrode. | 2009-10-29 |
20090267075 | OGANIC THIN FILM TRANSISTOR AND PIXEL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME AND DISPLAY PANEL - A method of manufacturing an organic thin film transistor is described. A patterned insulating layer having an opening therein is formed on a substrate. A gate is formed in the opening of the insulating layer, and a gate insulating layer is formed on the gate. A conductive material layer is formed on the gate insulating layer by a printing process. One of the gate insulating layer and the conductive material layer is hydrophobic or hydrophilic and the other is hydrophilic or hydrophobic, such that the conductive material layer is naturally separated to two sides of the gate insulating layer to form a source and a drain. An active layer is formed on the gate insulating layer between the source and the drain. | 2009-10-29 |
20090267076 | EL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - Plurality of pixels ( | 2009-10-29 |
20090267077 | SEMICONDUCTOR ELEMENT, ORGANIC TRANSISTOR, LIGHT-EMITTING DEVICE, AND ELECTRONIC DEVICE - It is an object of the present invention to provide an organic transistor having a low drive voltage. It is also another object of the present invention to provide an organic transistor, in which light emission can be obtained, which can be manufactured simply and easily. According to an organic light-emitting transistor, a composite layer containing an organic compound having a hole-transporting property and a metal oxide is used as part of the electrode that injects holes among source and drain electrodes, and a composite layer containing an organic compound having an electron-transporting property and an alkaline metal or an alkaline earth metal is used as part of the electrode that injects electrons, where either composite layer has a structure of being in contact with an organic semiconductor layer. | 2009-10-29 |
20090267078 | Enhancement Mode III-N HEMTs - A III-N semiconductor device that includes a substrate and a nitride channel layer including a region partly beneath a gate region, and two channel access regions on opposite sides of the part beneath the gate. The channel access regions may be in a different layer from the region beneath the gate. The device includes an AlXN layer adjacent the channel layer wherein X is gallium, indium or their combination, and a preferably n-doped GaN layer adjacent the AlXN layer in the areas adjacent to the channel access regions. The concentration of Al in the AlXN layer, the AlXN layer thickness and the n-doping concentration in the n-doped GaN layer are selected to induce a 2DEG charge in channel access regions without inducing any substantial 2DEG charge beneath the gate, so that the channel is not conductive in the absence of a switching voltage applied to the gate. | 2009-10-29 |
20090267079 | EXTERNALLY CONFIGURABLE INTEGRATED CIRCUITS - A die comprising two or more active electronic components is provided. The active electronic components are capable of being interconnected using interconnections external to the die. The die may be encased within a package, and the active electronic components may be interconnected using interconnections external to the package. By interconnecting the active electronic components, either directly or through one or more additional components, a desired circuit may be formed. In some examples, the desired circuit may be a monolithic microwave integrated circuit (MMIC). Methods of forming the circuit are also disclosed. | 2009-10-29 |
20090267080 | SEMICONDUCTOR DEVICE - In a semiconductor device by which peripheral circuit sections, such as a semiconductor element, a matching circuit section, a bias circuit section, a capacitor element, are placed on and connected to a substrate, the semiconductor element can be grounded, and the semiconductor device which can make heat radiation characteristics of the semiconductor element satisfactory is provided, without providing a via hole into a semiconductor substrate. | 2009-10-29 |
20090267081 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATION THEREOF - A semiconductor device includes a substrate formed of a single crystal. a silicon carbide layer disposed on a surface of the single crystal substrate and an intermediate layer disposed on a surface of the silicon carbide layer and formed of a Group III nitride semiconductor, wherein the silicon carbide layer is formed of a cubic crystal stoichiometrically containing silicon copiously and the surface thereof has a (3×3) reconstruction structure. The semiconductor device is fabricated by a method including a first step of blowing a hydrocarbon gas on the surface of the substrate, thereby inducing adsorption of hydrocarbon thereon, a second step of heating the substrate having adsorbed the hydrocarbon to a temperature exceeding a temperature used for the adsorption of the hydrocarbon while irradiating the surface of the substrate with electrons and consequently giving rise to a silicon carbide layer formed of a cubic crystal stoichiometrically containing silicon copiously and provided with a surface having a (3×3) reconstruction structure and a third step of supplying a gaseous raw material containing nitrogen and a gaseous raw material containing a Group III element to the surface of the silicon carbide layer and consequently giving rise to the intermediate layer formed of the Group III nitride semiconductor. | 2009-10-29 |
20090267082 | Semiconductor device and manufacturing method of the same - A semiconductor device includes: a semiconductor element having a first surface and a second surface; a first electrode disposed on the first surface of the element; a second electrode disposed on the second surface of the element; and an insulation film covers a part of the first electrode, the first surface of the element and a part of a sidewall of the element. The above semiconductor device has small dimensions and a high breakdown voltage. | 2009-10-29 |
20090267083 | TRENCHED SUBSTRATE FOR CRYSTAL GROWTH AND WAFER BONDING - A substrate for a light emitting diode (LED) can have one or more trenches formed therein so as to mitigate stress build up within the substrate due to mismatched thermal coefficients of expansion between the substrate and layers of material, e.g., semiconductor material, formed thereon. In this manner, the likelihood of damage to the substrate, such as cracking thereof, is substantially mitigated. | 2009-10-29 |
20090267084 | Integrated circuit with wireless connection - An integrated circuit includes a device stack including: a memory device with a first wireless coupling element, and a semiconductor device with a second wireless coupling element. The first and second wireless coupling elements are arranged face-to-face and are configured to provide a wireless connection between the memory device and the semiconductor device. | 2009-10-29 |
20090267085 | LED PACKAGE HAVING AN ARRAY OF LIGHT EMITTING CELLS COUPLED IN SERIES - Disclosed is a light emitting diode (LED) package having an array of light emitting cells coupled in series. The LED package comprises a package body and an LED chip mounted on the package body. The LED chip has an array of light emitting cells coupled in series. Since the LED chip having the array of light emitting cells coupled in series is mounted on the LED package, it can be driven directly using an AC power source. | 2009-10-29 |
20090267086 | Thermal Management For LED - A method and system for removing heat from an LED facilitates the fabrication of LEDs having enhanced brightness. A thermally conductive interposer can be attached to the top of the LED. Heat can flow through the top of the LED and into the interposer. The interposer can carry the heat away from the LED. Light can exit the LED though an at least partially transparent substrate of the LED. By removing heat from an LED, the use of more current through the LED is facilitated, thus resulting in a brighter LED. | 2009-10-29 |
20090267087 | LOW RESISTANCE WIRING STRUCTURE AND LIQUID CRYSTAL DISPLAY DEVICE USING THE SAME - A low-resistance wiring structure and a liquid crystal display are disclosed. The liquid crystal display includes a first substrate; a thin film transistor (TFT) formed on the first substrate and formed of a gate wiring, a data wiring and a semiconductor layer; and a second substrate attached to the first substrate in a facing manner, wherein at least one of the gate wiring and the data wiring is formed as a first wiring made of copper, a second wiring made of a barrier metal preventing spreading of copper, and a metal oxide film pattern formed between the first and second wirings. A MO/Cu wiring structure is implemented by using pure molybdenum, so that the low-resistance wiring structure with high reliability can be formed at a low cost. | 2009-10-29 |
20090267088 | SYSTEMS, DEVICES AND METHODS OF BROADBAND LIGHT SOURCES WITH TUNABLE SPECTRUM - Broadband light source systems, devices, and methods with a tunable spectrum are described by multiplexing a plurality of light sources, such as LEDs, with thin-film filters or diffraction gratings. A plurality of light sources with different or same wavelengths are multiplexed together to construct a combined broadband light source. A diffraction grating diffracts light beams from the plurality of light sources to a slit-shaped aperture, depending on selected light sources, the relative positions of the light sources to the slit-shaped aperture, and the type of grating to produce a tunable spectrum. | 2009-10-29 |
20090267089 | LIGHT EMITTING DEVICE HAVING LIGHT EMITTING ELEMENTS - A light-emitting device operating on a high drive voltage and a small drive current. LEDs ( | 2009-10-29 |
20090267090 | COLOR MIXING LIGHT EMITTING DIODE DEVICE - An exemplary color mixing light emitting diode (LED) device includes a substrate, LED dies, an encapsulating body, and a light mixing structure. The substrate has a main surface. The LED dies are arranged adjacent the main surface of the substrate. The light mixing structure is arranged adjacent an outer portion of the main surface of the substrate, around the LED dies. The encapsulating body encapsulates the LED dies and the light mixing structure. The light mixing structure is made of light transmissive material, and the light mixing structure has light scattering particles doped therein. | 2009-10-29 |
20090267091 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device includes a substrate | 2009-10-29 |
20090267092 | LIGHT-EMITTING DEVICE - A light-emitting device of the present invention includes: a semiconductor layer | 2009-10-29 |
20090267093 | LIGHT EMITTING DEVICE - A light emitting device includes a light emitting diode chip, a heat conductive plate mounting thereon the light emitting diode chip, a sub-mount member disposed between said light emitting diode chip and said heat conductive plate, a dielectric substrate stacked on the heat conductive plate and being formed with a through-hole through which the sub-mount member is exposed, an encapsulation member for encapsulation of said light emitting diode chip, and a lens superimposed on the encapsulation member. The sub-mount member is formed around a coupling portion of the light emitting diode chip with a reflective film which reflects a light emitted from a side face of the light emitting diode chip. The sub-mount member is selected to have a thickness such that the reflecting film has its surface spaced away from said heat conductive plate by a greater distance than said dielectric substrate. | 2009-10-29 |
20090267094 | LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a light emitting diode and a method for manufacturing the same. The light emitting diode includes a base, a light emitting chip on the base, a light permeable encapsulation encapsulating the light emitting chip to the base. The encapsulation defines a plurality of apertures extending from a bottom end toward a top end of the encapsulation. | 2009-10-29 |
20090267095 | Light-Emitting Device with Reflection Layer and Structure of the Reflection Layer - The present invention provides a light-emitting device with a reflection layer and the structure of the reflection layer. The reflection layer comprises a variety of dielectric materials. The reflection layer includes a plurality of dielectric layers. The materials of the plurality of dielectric layers have two or more types with two or more thicknesses, except for the combination of two material types and two thicknesses, for forming the reflection layer with a variety of structures. The reflection layer according to the present invention can be applied to light-emitting diodes of various types to form new light-emitting devices. Owing to its excellent reflectivity, the reflection layer can improve light-emitting efficiency of the light-emitting devices. | 2009-10-29 |
20090267096 | Luminous devices, packages and systems containing the same, and fabricating methods thereof - The present invention is directed to a vertical-type luminous device and high through-put methods of manufacturing the luminous device. These luminous devices can be utilized in a variety of luminous packages, which can be placed in luminous systems. The luminous devices are designed to maximize light emitting efficiency and/or thermal dissipation. Other improvements include an embedded zener diode to protect against harmful reverse bias voltages. | 2009-10-29 |
20090267097 | METHOD OF FABRICATING PHOTOELECTRIC DEVICE OF GROUP III NITRIDE SEMICONDUCTOR AND STRUCTURE THEREOF - A method of fabricating a photoelectric device of Group III nitride semiconductor comprises the steps of: forming a first Group III nitride semiconductor layer on a surface of an original substrate; forming a patterned epitaxial-blocking layer on the first Group III nitride semiconductor layer; forming a second Group III nitride semiconductor layer on the epitaxial-blocking layer and the first Group III nitride semiconductor layer not covered by the epitaxial-blocking layer and then removing the epitaxial-blocking layer; forming a third Group III nitride semiconductor layer on the second Group III nitride semiconductor layer; depositing or adhering a conductive layer on the third Group III nitride semiconductor layer; and releasing a combination of the third Group III nitride semiconductor layer and the conductive layer apart from the second Group III nitride semiconductor layer. | 2009-10-29 |
20090267098 | SEMICONDUCTOR LIGHT EMITTING DEVICE - Disclosed is a semiconductor light emitting device. The semiconductor light emitting device comprises a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer comprising a plurality of recesses on the active layer. | 2009-10-29 |
20090267099 | LED LIGHT SOURCE AND CHROMATICITY ADJUSTMENT METHOD FOR LED LIGHT SOURCE - There is provided an LED light source whose chromaticity can be adjusted easily without changing its outer shape and suffering damage in the process of chromaticity adjustment. An LED light source includes an LED device, a fluorescent material that absorbs and wavelength-converts a portion of light emitted from the LED device to emit light from itself, a sealing material that includes the fluorescent material and that is disposed around the LED device, and light scattering sections that are formed at a portion of a surface of the sealing material and scatter a portion of the light emitted from the LED device for adjusting chromaticity of the LED light source, and a chromaticity adjustment method for such LED light source. | 2009-10-29 |
20090267100 | NITRIDE-BASED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A nitride-based semiconductor device includes a substrate, a first step portion formed on a main surface side of a first side end surface of the substrate, a second step portion formed on the main surface side of a second side end surface substantially parallel to the first side end surface on an opposite side of the first side end surface and a nitride-based semiconductor layer whose first side surface is a (000-1) plane starting from a first side wall of the first step portion and a second side surface starting from a second side wall of the second step portion on the main surface. | 2009-10-29 |
20090267101 | DISPLAY INCLUDING LIGHT EMITTING ELEMENT, BEAM CONDENSING ELEMENT AND DIFFUSING ELEMENT - A display includes pixels each of which contains a light emitting element and which are arranged in a matrix form, a light transmitting insulating layer which includes a back surface facing the light emitting element and a front surface as a light output surface, a beam-condensing element which is arranged on a back side of the insulating layer and increases a directivity of light emitted by the light emitting element to make the light incident on the insulating layer, and a diffusing element which is arranged on a front side of the insulating layer, diffuses light from the insulating layer, and output the diffused light to an external environment. | 2009-10-29 |
20090267102 | LIGHT EMITTING DIODE PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME - A light emitting diode (LED) package structure includes a carrier, a first protrusion, a LED chip, and an adhesion layer. The first protrusion is disposed on the carrier and has a first opening to expose the carrier. The LED chip is disposed in the first opening on the carrier, and a ratio between a width of the first opening and a width of the LED chip is 1˜1.5. The adhesion layer is disposed between the LED chip and the carrier to bond the LED chip to the carrier. | 2009-10-29 |
20090267103 | GALLIUM NITRIDE-BASED COMPOUND SEMICONDUCTOR LIGHT-EMITTING DEVICE AND PRODUCTION METHOD THEREOF - The invention provides a gallium nitride based compound semiconductor light emitting device with excellent light extracting efficiency and its production method. A light emitting device, obtained from a gallium nitride based compound semiconductor, includes a substrate; a n-type semiconductor layer | 2009-10-29 |
20090267104 | LIGHT-EMITTING DIODE PACKAGE - An LED package including a lead-frame, at least an LED chip and an encapsulant is provided. The lead-frame has a roughened surface, the LED chip is disposed on the lead-frame and electrically connected to the lead-frame, and the roughened surface is suitable to scatter the light emitted from the LED chip. In addition, the encapsulant encapsulates the LED chip and a part of the lead-frame, and the rest part of the lead-frame is exposed out of the encapsulant. | 2009-10-29 |
20090267105 | LED Device with Embedded Top Electrode - An LED device and a method of manufacturing, including an embedded top electrode, are presented. The LED device includes an LED structure and a top electrode. The LED structure includes layers disposed on a substrate, including an active light-emitting region. A top layer of the LED structure is a top contact layer. The top electrode is embedded into the top contact layer, wherein the top electrode electrically contacts the top contact layer. | 2009-10-29 |
20090267106 | SEMICONDUCTOR LIGHT EMITTING DEVICE - Embodiments provides a semiconductor light emitting device, which comprises a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, a second conductive semiconductor layer under the active layer, a second electrode layer under the second conductive semiconductor layer, an insulator on one side of the second electrode layer, and a first electrode electrically connected to a one end of the first conductive semiconductor layer, on the insulator. | 2009-10-29 |
20090267107 | Optoelectronic Semiconductor Component - An optoelectronic semiconductor component includes a basic body, at least one semiconductor chip arranged thereon, and an encapsulation embedding the at least one semiconductor chip and composed of a radiation-transmissive material with scattering particles. A radiation-transmissive covering layer with an absorber is applied to the encapsulation. | 2009-10-29 |
20090267108 | LIGHT EMITTING DIODE CHIP PACKAGE AND METHOD OF MAKING THE SAME - The LED chip package of the present invention uses a semiconductor substrate as package substrate, which improves heat dissipation. Also, the LED chip package is incorporated with a planarization structure, which renders the LED chip and the substrate a substantially planar surface, thereby making formation of a planar patterned conductive layer possible. Accordingly, serial/parallel electrical connections between light emitting diode chips can be easily implemented by virtue of the planar patterned conductive layer. | 2009-10-29 |
20090267109 | COMPOUND SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - A compound semiconductor light-emitting device which includes an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, that are made of a compound semiconductor, formed on a substrate, the n-type semiconductor layer and the p-type semiconductor layer are stacked so as to interpose the light-emitting layer therebetween, a first conductive transparent electrode and a second conductive electrode. The first conductive transparent electrode is made of an IZO film containing an In | 2009-10-29 |
20090267110 | INTEGRATED LOW LEAKAGE SCHOTTKY DIODE - An integrated low leakage Schottky diode has a Schottky barrier junction proximate one side of an MOS gate with one end of a drift region on an opposite side of the gate. Below the Schottky metal and the gate oxide is a RESURF structure of an N− layer over a P− layer which also forms the drift region that ends at the diode's cathode in one embodiment of the present invention. The N− and P− layers have an upward concave shape under the gate. The gate electrode and the Schottky metal are connected to the diode's anode. A P− layer lies between the RESURF structure and an NISO region which has an electrical connection to the anode. A P+ layer under the Schottky metal is in contact with the P− layer through a P well. | 2009-10-29 |
20090267111 | MOSFET with Integrated Field Effect Rectifier - A modified MOSFET structure comprises an integrated field effect rectifier connected between the source and drain of the MOSFET to shunt current during switching of the MOSFET. The integrated FER provides faster switching of the MOSFET due to the absence of injected carriers during switching while also decreasing the level of EMI relative to discrete solutions. The integrated structure of the MOSFET and FER can be fabricated using N-, multi-epitaxial and supertrench technologies, including 0.25 μm technology. Self-aligned processing can be used. | 2009-10-29 |
20090267112 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE - A semiconductor device arrangement comprises a semiconductor device and an injector device. The semiconductor device comprises a first current electrode region of a first conductivity type, a second current electrode region of the first conductivity type, a drift region between the first and the second current electrode regions, and at least one floating region of a second conductivity type formed in the drift region. The injector device is arranged to receive an activation signal when the semiconductor device is turned on and to inject charge carriers of the second conductivity type into the drift region and the at least one floating region in response to receiving the activation signal. | 2009-10-29 |
20090267113 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device has a semiconductor base of a first conductivity type; a hetero semiconductor region in contact with the semiconductor base; a gate electrode adjacent to a portion of a junction between the hetero semiconductor region and the semiconductor base across a gate insulating film; a source electrode connected to the hetero semiconductor region; and a drain electrode connected to the semiconductor base. The hetero semiconductor region has a band gap different from that of the semi-conductor base. The hetero semiconductor region includes a first hetero semiconductor region and a second hetero semiconductor region. The first hetero semiconductor region is formed before the gate insulating film is formed. The second hetero semiconductor region is formed after the gate insulating film is formed. | 2009-10-29 |
20090267114 | FIELD EFFECT TRANSISTOR - A field effect transistor | 2009-10-29 |
20090267115 | CLUB EXTENSION TO A T-GATE HIGH ELECTRON MOBILITY TRANSISTOR - A method of fabricating a T-gate HEMT with a club extension comprising the steps of: providing a substrate; providing a bi-layer resist on the substrate; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to a T-gate opening; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to the shape of the club extension wherein the area corresponding to the club extension is approximately 1 micron to an ohmic source side of a T-gate and approximately 0.5 microns forward from a front of the T-gate; developing out the bi-layer resist in the exposed area that corresponds to the T-gate opening; developing out the bi-layer resist in the exposed area that corresponds to the club extension; and forming the T-gate and club extension through a metallization process. | 2009-10-29 |
20090267116 | WIDE BANDGAP TRANSISTORS WITH MULTIPLE FIELD PLATES - A transistor comprising a plurality of active semiconductor layers on a substrate, with source and drain electrodes in contact with the semiconductor layers. A gate is formed between the source and drain electrodes and on the plurality of semiconductor layers. A plurality of field plates are arranged over the semiconductor layers, each of which extends from the edge of the gate toward the drain electrode, and each of which is isolated from said semiconductor layers and from the others of the field plates. The topmost of the field plates is electrically connected to the source electrode and the others of the field plates are electrically connected to the gate or the source electrode. | 2009-10-29 |
20090267117 | ENHANCED STRESS FOR TRANSISTORS - A transistor disposed on a substrate includes a gate, spacers on gate sidewalls, and diffusion regions adjacent to the gate. Silicide contacts on the diffusion regions are displaced from the spacers by a distance G. Stressors may be provided in the diffusion region to induce a first stress in the channel region of the transistor. | 2009-10-29 |
20090267118 | METHOD FOR FORMING CARBON SILICON ALLOY (CSA) AND STRUCTURES THEREOF - Methods for forming carbon silicon alloy (CSA) and structures thereof are disclosed. The method provides improvement in substitutionality and deposition rate of carbon in epitaxially grown carbon silicon alloy layers (i.e., substituted carbon in Si lattice). In one embodiment of the disclosed method, a carbon silicon alloy layer is epitaxially grown on a substrate at an intermediate temperature with a silicon precursor, a carbon (C) precursor in the presence of an etchant and a trace amount of germanium material (e.g., germane (GeH | 2009-10-29 |
20090267119 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The semiconductor device includes a silicon substrate having a channel region, a gate electrode formed over the channel region, buried semiconductor regions formed in a surface of the silicon substrate on both sides of the gate electrode, for applying to the surface of the silicon substrate a first stress in a first direction parallel to the surface of the silicon substrate, and stressor films formed on the silicon substrate between the channel region and the buried semiconductor regions in contact with the silicon substrate, for applying to the silicon substrate a second stress in a second direction which is opposite to the first direction. | 2009-10-29 |
20090267120 | IMAGE DETECTION APPARATUS AND METHODS - MOS imaging pixels are described. The MOS imaging pixels may comprise bootstrapped source followers, having their bodies connected to their sources. The source followers of the MOS imaging pixels may be used to buffer a signal indicative of an amount of radiation incident on the pixel. MOS imagers are also described, which may comprise one or more MOS imaging pixels of the type described. | 2009-10-29 |
20090267121 | SOLID-STATE IMAGE PICKUP DEVICE - A solid-state image pickup device is provided which includes a substrate; a transistor formed on the substrate; a photoelectric conversion element including a first electrode connected to a drain or a source of the transistor, a semiconductor layer stacked on the first electrode, and a second electrode stacked on the semiconductor layer; an insulating layer disposed on the second electrode; and a bias line formed on the insulating layer to be connected to the second electrode, in which the insulating layer contains at least an inorganic insulating film, and the bias line is connected to the second electrode via a contact hole formed in the insulating layer, and a side surface of the semiconductor layer is in contact with the inorganic insulating film. | 2009-10-29 |
20090267122 | Semiconductor device and method of manufacturing the semiconductor device - A semiconductor device has a substrate, an insulator, an yttrium oxide film, a ferroelectric film (STN film), and an upper electrode. | 2009-10-29 |
20090267123 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor substrate; a plurality of transistors on the semiconductor substrate, each of the transistors has a source and drain region; an interlayer insulating film on the semiconductor substrate and the plurality of transistors; and at least three capacitors on the interlayer insulation film, each of them has a top electrode, a bottom electrode and an insulating film interposed therebetween; wherein the 1st and 2nd capacitors have an shared electrode, with the top electrodes of the 1st and 2nd capacitors, which has a 1st longer direction, the 2nd and 3rd capacitors have an shared electrode, with the bottom electrodes of the 2nd and 3rd capacitors, which has a 2nd longer direction different from the 1st direction. | 2009-10-29 |
20090267124 | INTEGRATED CIRCUIT HAVING EFFICIENTLY PACKED DECOUPLING CAPACITORS - An integrated circuit includes a substrate having a semiconducting surface ( | 2009-10-29 |
20090267125 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - An isolation region comprises a step structure comprising a step surface that is perpendicular to a depth direction, an upper isolation region and a lower isolation region. An RC transistor is enclosed by the isolation region. | 2009-10-29 |
20090267126 | RECESS CHANNEL TRANSISTOR - A recess channel transistor includes a semiconductor substrate; a trench isolation region in the semiconductor substrate, which defines an active area; a gate trench in the active area, wherein the gate trench includes a round lower portion; a recessed gate embedded in the gate trench with a spherical gate portion situated in the round lower portion; a gate oxide layer in the round lower portion between the semiconductor substrate and the spherical gate portion; a source region in the active area at one side of the recessed gate; a drain region in the active area at the other side of the recessed gate; and a channel region between the source region and the drain region, wherein the channel region presents a convex curve profile when viewed from a channel widthwise direction. | 2009-10-29 |
20090267127 | Single Poly NVM Devices and Arrays - A single-poly non-volatile memory includes a PMOS select transistor ( | 2009-10-29 |
20090267128 | THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY - A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks disposed side by side in a first direction, and a driver disposed on one end of the memory cell array in a second direction orthogonal to the first direction. A source diffusion layer, which is common to the first and second blocks, is disposed in a semiconductor substrate, and a contact plug, which has a lower end connected to the source diffusion layer and an upper end connected to a source line disposed above at least three conductive layers, is interposed between the first and second blocks. | 2009-10-29 |