43rd week of 2014 patent applcation highlights part 66 |
Patent application number | Title | Published |
20140317364 | SYSTEMS AND METHODS FOR DATA BACKUP - In accordance with embodiments of the present disclosure, an intermediary information handling system for communicatively may be configured to couple an information handling system communicatively coupled to the intermediary information handling system to information handling resources attached to or integral to the intermediary information handling system. The intermediary information handling system may include a processor, a memory communicatively coupled to the processor, a network interface communicatively coupled to the processor, and a backup agent comprising one or more instructions embodied in computer-readable media communicatively coupled to the processor. The instructions may cause causing the processor to, when read and executed by the processor: (i) retrieve data from the information handling system; (ii) store the data to the memory; and (iii) upload the data to a remote storage server coupled to the intermediary information handling system via the network interface. | 2014-10-23 |
20140317365 | TECHNIQUES FOR REDUCING POWER-DOWN TIME IN NON-VOLATILE MEMORY DEVICES - A method includes, in a memory including analog memory cells, storing first data in a group of the memory cells using a first type of storage command that writes respective analog values to the memory cells in the group. Second data is stored in the memory cells in the group, in addition to the first data, using a second type of storage command that modifies the respective analog values of the memory cells in the group. Upon detecting imminent interruption of electrical power to the memory during storage of the second data, a switch is made to perform an alternative storage operation that is faster than the second type of storage command and protects at least the first data from the interruption. | 2014-10-23 |
20140317366 | METHOD AND APPARATUS FOR REMOTE STORAGE PERFORMANCE DATA COPY - A storage system comprises: a storage device; and a controller operable to manage a primary volume in the storage system of a remote copy pair with a secondary volume of another storage system by using a storage area of the storage device, and send a first type copy data to said another storage system according to a remote copy procedure of the remote copy pair, so that said another storage system can update the secondary volume based on the first type copy data. The controller is operable to create a second type copy data by using performance data of the primary volume, and to send the second type copy data to said another storage system according to the remote copy procedure, so that said another storage system can use the performance data of the primary volume for performance data of the secondary volume based on the second type copy data. | 2014-10-23 |
20140317367 | STORAGE APPARATUS AND DATA COPY CONTROL METHOD - A storage apparatus comprises a storage controller and multiple storage devices. The storage controller sends, to either a storage device which is a copy source of copy-target data, or a storage device which is a copy destination of the copy-target data, a copy indication showing areas of the copy source and the copy destination, and the storage device, which receives the copy indication, copies data of the copy-source area to the copy-destination area based on the copy indication without going through the storage controller. | 2014-10-23 |
20140317368 | DEVICE INFORMATION BACKUP METHOD, DEVICE, AND SYSTEM - Embodiments of the present invention disclose a device information backup method, device, and system for information backup between a first device and a second device. The first device and the second device are directly connected through a cable, and the first device acquires, from the second device through the cable, information to be backed up and back up the information to be backed up. In this way, information backup can be completed quickly and simply, and shortcomings of a poor reliability and a poor security of a pluggable storage medium are avoided. | 2014-10-23 |
20140317369 | SNAPSHOT CREATION FROM BLOCK LISTS - Embodiments disclosed herein provide systems and methods for creating snapshots from a list of changed blocks. In a particular embodiment, a method provides establishing a base state for a data storage volume having a file system, creating a snapshot of the data storage volume, and restoring data items by merging the snapshot and the base state. | 2014-10-23 |
20140317370 | MANAGING ACCESS OF MULTIPLE EXECUTING PROGRAMS TO NON-LOCAL BLOCK DATA STORAGE - Techniques are described for managing access of executing programs to non-local block data storage. In some situations, a block data storage service uses multiple server storage systems to reliably store network-accessible block data storage volumes that may be used by programs executing on other physical computing systems. A group of multiple server block data storage systems that store block data volumes may in some situations be co-located at a data center, and programs that use volumes stored there may execute on other physical computing systems at that data center. If a program using a volume becomes unavailable, another program (e.g., another copy of the same program) may in some situations obtain access to and continue to use the same volume, such as in an automatic manner in some such situations. | 2014-10-23 |
20140317371 | METHOD AND SYSTEM FOR ACCESS BASED DIRECTORY ENUMERATION - Method and system for access based directory enumeration is provided. When a directory is enumerated for a first time, user credentials are verified against an access control list (ACL) entry that is referenced by an ACL inode (referred to as Xnode). The Xnode number is obtained from a file handle for a directory entry. The verification is recorded in a data structure that stores the Xnode identifier and user identifier. When the directory is enumerated again, the data structure is used to verify that the user has been validated before, instead of loading and checking against an ACL entry. | 2014-10-23 |
20140317372 | DATA FRAME SECURITY - A method of securing a data frame is provided. The method includes receiving a request from a memory client to read or write decoded data in a memory. The memory may be partitioned to have a secure memory region and an unsecure memory region. The method also includes determining if the request is associated with the secure memory region or the unsecure memory region. The method also includes determining whether the memory client has access privileges to the secure memory region if the request is associated with the secure memory region. The method also includes granting the request if the memory client is determined to have access privileges. | 2014-10-23 |
20140317373 | METHOD AND APPARATUS FOR MANAGING MEMORY - A method of managing a memory in an electronic device is provided that includes calculating an indication of remaining life of a memory component that is used as a swap space by the electronic device; and adjusting the use of the memory component as a swap space based on the indication of remaining life, wherein the adjusting includes one of: (i) reducing a rate at which data is swapped in and out of the memory component, and (ii) discontinuing the use of the memory component as a swap space. | 2014-10-23 |
20140317374 | LOGICAL ADDRESS TRANSLATION - The present disclosure includes methods for logical address translation, methods for operating memory systems, and memory systems. One such method includes receiving a command associated with a LA, wherein the LA is in a particular range of LAs and translating the LA to a physical location in memory using an offset corresponding to a number of physical locations skipped when writing data associated with a range of LAs other than the particular range. | 2014-10-23 |
20140317375 | SYSTEM AND METHOD TO PRIORITIZE LARGE MEMORY PAGE ALLOCATION IN VIRTUALIZED SYSTEMS - The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization. | 2014-10-23 |
20140317376 | Digital Processor Having Instruction Set with Complex Angle Function - A digital processor, such as a vector processor or a scalar processor, is provided having an instruction set with a complex angle function. A complex angle is evaluated for an input value, x, by obtaining one or more complex angle software instructions having the input value, x, as an input; in response to at least one of the complex angle software instructions, performing the following steps: invoking at least one complex angle functional unit that implements the one or more complex angle software instructions to apply the complex angle function to the input value, x; and generating an output corresponding to the complex angle of the input value, x, using one or more multipliers of a Multiply Accumulate (MAC) unit of the digital processor, wherein the complex angle software instruction is part of an instruction set of the digital signal processor. Multiplication operations optionally employ one or more multipliers of the MAC unit of the digital processor. | 2014-10-23 |
20140317377 | VECTOR FREQUENCY COMPRESS INSTRUCTION - A processor core that includes a hardware decode unit to decode a vector frequency compress instruction that includes a source operand and a destination operand. The source operand specifying a source vector register that includes a plurality of source data elements including one or more runs of identical data elements that are each to be compressed in a destination vector register as a value and run length pair. The destination operand identifies the destination vector register. The processor core also includes an execution engine unit to execute the decoded vector frequency compress instruction which causes, for each source data element, a value to be copied into the destination vector register to indicate that source data element's value. One or more runs of the source data elements equal are encoded in the destination vector register as the predetermined compression value followed by a run length for that run. | 2014-10-23 |
20140317378 | Scheduling in a Multicore Architecture - This invention relates to scheduling threads in a multicore processor. Executable transactions may be scheduled using at least one distribution queue, which lists executable transactions in order of eligibility for execution, and multilevel scheduler which comprises a plurality of linked individual executable transaction schedulers. Each of these includes a scheduling algorithm for determining the most eligible executable transaction for execution. The most eligible executable transaction is outputted from the multilevel scheduler to the at least one distribution queue. | 2014-10-23 |
20140317379 | INFORMATION PROCESSING SYSTEM, CONTROL APPARATUS, AND METHOD OF CONTROLLING INFORMATION PROCESSING SYSTEM - A parallel computer includes a plurality of processors connected through transmission paths to each other. A job management server determines a communication path passing transmission paths connecting a certain number of processors in accordance with jobs to be input among the processors, and inputs the jobs to the certain number of processors connected through the determined communication path. A link control server controls transmission/reception circuits of the processors connected through transmission paths not included in the communication path among the transmission paths connecting the processors. | 2014-10-23 |
20140317380 | MULTI-CORE PROCESSOR - A multi-core processor includes a plurality of former-stage cores that perform parallel processing using a plurality of pipelines covering a plurality of stages. In the pipelines, the former-stage cores perform stages ending with an instruction decode stage; stages starting with an instruction execution stage are executed by a latter-stage core. A dynamic load distribution block refers to decode results in the instruction decode stage and controls to assign the latter-stage core with a latter-stage-needed decode result being a decode result whose processing needs to be executed in the latter-stage core. | 2014-10-23 |
20140317381 | METHOD OF PROCESSING IMMEDIATE VALUE IN EISC PROCESSOR - Disclosed is a method of operating an immediate value in an extendable instruction set computer (EISC) processor, comprising: checking whether or not an unsigned immediate value is used to generate an extension register (ER) value for operating an immediate value; and generating the ER value by performing zero extension for the unsigned immediate value using an unsigned load extension register with immediate (ULERI) instruction if the unsigned immediate value is used. It is possible to improve operational efficiency by preventing an LERI instruction from being unnecessarily executed when an immediate value is operated using a 16-bit instruction in the EISC processor. | 2014-10-23 |
20140317382 | DYNAMIC CONFIGURATION OF PROCESSING PIPELINE BASED ON DETERMINED TYPE OF FETCHED INSTRUCTION - Various embodiments relating to executing different types of instruction code in a micro-processing system are provided. In one embodiment, a micro-processing system includes a memory/storage subsystem configured to store non-native instruction set architecture (ISA) code and native ISA code in a common address space, fetch logic configured to retrieve the non-native ISA code and native ISA code from the common address space, instruction type determining logic configured to determine, at runtime, whether fetched instruction code is non-native ISA code or native ISA code, and processing logic configured to execute the fetched instruction code via a first pipeline configuration in response to the instruction type determining logic determining that the fetched instruction code is non-native ISA code, and via a second pipeline configuration which is different than the first pipeline configuration, in response to the instruction type determining logic determining that the fetched instruction code is native ISA code. | 2014-10-23 |
20140317383 | APPARATUS AND METHOD FOR COMPRESSING INSTRUCTION FOR VLIW PROCESSOR, AND APPARATUS AND METHOD FOR FETCHING INSTRUCTION - Provided are an instruction compression apparatus and method for a very long instruction word (VLIW) processor, and an instruction fetching apparatus and method. The instruction compression apparatus includes: an indicator generator configured to generate an indicator code that indicates an issue width of an instruction bundle to be executed in the VLIW processor, and a number of No-Operation (NOP) instruction bundles following the instruction bundle; an instruction compressor configured to compress the instruction bundle by removing at least one of NOP instructions from the instruction bundle and the NOP instruction bundles following the instruction bundle; and an instruction converter configured to include the generated indicator code in the compressed instruction bundle. | 2014-10-23 |
20140317384 | DATA PROCESSING APPARATUS AND METHOD FOR PRE-DECODING INSTRUCTIONS TO BE EXECUTED BY PROCESSING CIRCUITRY - A hierarchical cache with at least a unified cache is used to store both instructions and data values, and a further cache coupled between processing circuitry and a unified cache. The unified cache has a plurality of cache lines identified as an instruction cache line or a data cache line. Each data cache line stores at least one data value and the associated information. Pre-decode circuitry is associated with the unified cache and performs a first pre-decode operation on a received instruction for that instruction cache line in order to generate a corresponding partially pre-decoded instruction for storing in the instruction cache line. Further pre-decode circuitry is associated with the further cache, and, when a partially pre-decoded instruction is routed to the further cache, performs a further pre-decode operation on the partially pre-decoded instruction to generate a corresponding pre-decoded instruction for storage in the further cache. | 2014-10-23 |
20140317385 | TECHNIQUES FOR DETERMINING INSTRUCTION DEPENDENCIES - One embodiment sets forth a method for efficiently determining memory resource dependencies between instructions included in a software application. For each instruction, a dependency analyzer uses overlapping search techniques to identify one or more overlaps between the memory elements included in the current instruction and the memory elements included in previous instructions. The dependency analyzer then maps objects included in the instructions to a set of partition elements wherein each partition element represents a set of memory elements that are functionally equivalent for dependency analysis. Subsequently, the dependency analyzer uses the set of partition elements to determine memory dependencies between the instructions at the memory element level. Advantageously, the disclosed techniques enable the compiler to retain an acceptable compilation speed while tuning the instruction ordering at a fine-grained memory element level, thereby increasing the speed at which the processor may execute the software application. | 2014-10-23 |
20140317386 | TECHNIQUES FOR DETERMINING INSTRUCTION DEPENDENCIES - One embodiment sets forth a method for efficiently determining memory resource dependencies between instructions included in a software application. For each instruction, a dependency analyzer uses overlapping search techniques to identify one or more overlaps between the memory elements included in the current instruction and the memory elements included in previous instructions. The dependency analyzer then maps objects included in the instructions to a set of partition elements wherein each partition element represents a set of memory elements that are functionally equivalent for dependency analysis. Subsequently, the dependency analyzer uses the set of partition elements to determine memory dependencies between the instructions at the memory element level. Advantageously, the disclosed techniques enable the compiler to retain an acceptable compilation speed while tuning the instruction ordering at a fine-grained memory element level, thereby increasing the speed at which the processor may execute the software application. | 2014-10-23 |
20140317387 | METHOD FOR PERFORMING DUAL DISPATCH OF BLOCKS AND HALF BLOCKS - A method for executing dual dispatch of blocks and half blocks. The method includes receiving an incoming instruction sequence using a global front end; grouping the instructions to form instruction blocks, wherein each of the instruction blocks comprise two half blocks; scheduling the instructions of the instruction block to execute in accordance with a scheduler; and performing a dual dispatch of the two half blocks for execution on an execution unit. | 2014-10-23 |
20140317388 | APPARATUS AND METHOD FOR SUPPORTING MULTI-MODES OF PROCESSOR - An apparatus and method for supporting a multi-mode. The apparatus for supporting a multi-mode may include an instruction distributor configured to select, according to a current execution mode, at least one instruction from among a plurality of received instructions that each include an operand and an opcode, and transfer the opcode included in each of at least one selected instruction to the plurality of functional units; an operand switch controller configured to generate, based on the operand included in each of the selected at least one instruction, switch configuration information for routing in order to execute the selected at least one instruction; and an operand switch configured to route, based on the switch configuration information, a functional unit output or a register file output to either a functional unit input or a register file input. | 2014-10-23 |
20140317389 | COMPUTATIONAL SPRINTING USING MULTIPLE CORES - A multi-core processing system that uses computational sprinting to generate high levels of computational output for short periods of time at power consumption levels that are not sustainable over longer periods of time due to thermal and/or other constraints. This is done using a number of processing cores that, when operated simultaneously, utilize available thermal capacity within the system to consume power and produce heat that is in excess of a thermal design power (TDP) of the system, but is tolerable because of the short period of operation. The system and/or method described herein may include thermal capacitors in the form of phase change materials (PCMs), may implement normal, sprint and/or cooling modes of operation, and may employ parallel sprinting, frequency sprinting, sprint pacing and/or sprint-and-rest techniques, to cite several possibilities. | 2014-10-23 |
20140317390 | RETURN ADDRESS PREDICTION - A data processing apparatus executes call instructions, and after a sequence of instructions executed in response to a call instruction a return instruction causes the program flow to return to a point in the program sequence associated with that call instruction. The data processing apparatus is configured to speculatively execute instructions in dependence on a predicted outcome of earlier instructions and a return address prediction unit is configured to store return addresses associated with unresolved call instructions. The return address prediction unit comprises: a stack portion onto which return addresses associated with unresolved call instructions are pushed, and from which a return address is popped when a return instruction is speculatively executed; and a buffer portion which stores an entry for each unresolved call instruction executed and for each return instruction which is speculatively executed. | 2014-10-23 |
20140317391 | METHOD FOR CHANGING A SYSTEM PROGRAM AND PROCESSING DEVICE UTILIZING THE SAME - A processing device includes a program memory and a processor. The program memory includes at least a first memory partition for storing a system program and a second memory partition for storing an application program. The processor is coupled to the program memory for executing the programs stored in the program memory. The processor executes the application program to enable the processing device to provide at least a predetermined function, and executes the system program to enable the processing device to update the application program. When the system program has to be changed, the processor further receives a first program from a host, stores the first program in the second memory partition, triggers a reboot procedure to reboot from the second memory partition and thereafter execute the first program to change the system program based on the first program. | 2014-10-23 |
20140317392 | OPERATING SYSTEM MANAGEMENT OF SECOND OPERATING SYSTEM - The present invention provides a method of easily managing two or more OSs. A host OS, a guest OS, and a virtualization module are loaded into a primary physical address area of a main memory. The guest OS is executed in a virtual environment in a primary physical address area. A memory image of the guest OS loaded in the primary physical address area is copied to a secondary physical address area. The right of access to a processor is transferred to the guest OS copied in the secondary physical address area to execute the guest OS in a physical environment. | 2014-10-23 |
20140317393 | Method and Apparatus for Integrating Personal Computer and Electronic Device Functions - An apparatus and a method for integrating personal computer and electronic device functions. An input device, personal computer host, and encoder in turn integrate hardware, operating system, and application programs to provide personal computer and electronic device functions at the same time. | 2014-10-23 |
20140317394 | PROVISIONING OF OPERATING SYSTEMS TO USER TERMINALS - Methods and apparatus are provided for provisioning an operating system image from a server ( | 2014-10-23 |
20140317395 | MICROPROCESSOR, AND METHOD OF MANAGING RESET EVENTS THEREFOR - A microprocessor comprises at least one reset management module. The at least one reset management module is arranged to detect a reset event, determine if at least one reset condition has been met upon detection of the reset event, and cause at least a part of the microprocessor to remain in a reset state upon determining that the at least one reset condition has been met. | 2014-10-23 |
20140317396 | SYSTEM AND METHOD FOR RELICENSING CONTENT - A method of relicensing digital encrypted radio media content transmitted via a network and received by a user electronic device includes receiving a request to relicense an encrypted digital media data file included within digital encrypted radio media content. The encrypted digital media data file is retrieved from the digital encrypted radio media content stored in a memory of the user electronic device. The encrypted digital media data file is decrypted using a radio encryption key to generate an unbound digital media data file. The unbound digital media data file is bound with the user electronic device to generate, a bound encrypted digital media data file. The bound encrypted digital media data file is stored in the memory of the user electronic device. | 2014-10-23 |
20140317397 | SELECTIVELY PERFORMING MAN IN THE MIDDLE DECRYPTION - A device within the network receives a domain name service (DNS) request for an address of a first resource outside the network, the first resource associated with a security policy of the network. An address of a second resource within the network is returned to the device within the network in response the DNS request, the second resource address having previously been associated with the first resource address. A first encrypted connection is established between the device and the second resource, and a second encrypted connection is established between the second resource and the first resource, to facilitate encrypted communication traffic between the device and the first resource. The encrypted communication traffic passing between the device and the first resource is selectively decrypted and inspected depending on the address of the first resource. | 2014-10-23 |
20140317398 | SECURING INFORMATION WITHIN A CLOUD COMPUTING ENVIRONMENT - Embodiments of the invention provide a solution for securing information within a Cloud computing environment. Specifically, an encryption service/gateway is provided to handle encryption/decryption of information for all users in the Cloud computing environment. Typically, the encryption service is implemented between Cloud portals and a storage Cloud. Through the use of a browser/portal plug-in (or the like), the configuration and processing of the security process is managed for the Cloud computing environment user by pointing all traffic for which security is desired to this encryption service so that it can perform encryption (or decryption in the case of document retrieval) as needed (e.g., on the fly) between the user and the Cloud. | 2014-10-23 |
20140317399 | COMPUTER STORAGE DEVICE HAVING SEPARATE READ-ONLY SPACE AND READ-WRITE SPACE, REMOVABLE MEDIA COMPONENT, SYSTEM MANAGEMENT INTERFACE, AND NETWORK INTERFACE - A storage device for use with a computer is disclosed. The storage device includes a processor communicably connected to a computer through a computer interface and a system interface. The computer interface enables communications exclusively between the processor and the computer, while the system interface enables to processor to manage one or more hardware components of the computer. A network interface is also included to enable the processor to communicate over a network with select file servers to the exclusion of other file servers. A storage means is communicably connected to the processor and includes first and second designated storage sections. The processor has read-write access to both storage sections, while the computer has read-only access to the first storage section and read-write access to the second storage section. A removable media storage component is also communicably connected to the processor. | 2014-10-23 |
20140317400 | SYSTEM AND METHOD FOR VALIDATION AND ENFORCEMENT OF APPLICATION SECURITY - A system and method for validation and enforcement of application security, wherein the user credentials and the integrity of a target application are verified before the target application is permitted to execute. | 2014-10-23 |
20140317401 | SERVER, SYSTEM, AND METHOD FOR ISSUING MOBILE CERTIFICATE - A mobile certificate issue server, system, and method are provided. The mobile certificate issue server includes a certificate generation part for generating a certificate using a public key included in certificate issue request information received from a user terminal, an e-mail sending part for sending the certificate to an e-mail address accessible to the mobile terminal of a user, and a server-side certificate conversion part for converting the certificate into information having a recognition format capable of being recognized by the mobile terminal Here, the e-mail sending part sends the certificate through e-mail in an attachment form. The e-mail sending part stores the information having the recognition format in a file form, inserts the file into the e-mail as an attachment file, and sends the e-mail to the e-mail address accessible to the mobile terminal of the user. | 2014-10-23 |
20140317402 | METHOD OF PROCESSING PACKET IN BELOW BINARY STACK STRUCTURE - Disclosed is a packet processing method in a below binary stack (BBS) structure. A transmission packet processing method includes receiving a packet from a network layer, reassembling a packet for which a first fragmentation has been performed when the received packet is the packet for which the first fragmentation has been performed, encrypting the reassembled packet, performing a second fragmentation for the encrypted packet when the second fragmentation is necessary for the encrypted packet, adding a header to the packet for which the second fragmentation has been performed, and transmitting the packet with the header added thereto through a physical layer. Accordingly, an encryption function can be provided in the BBS structure. | 2014-10-23 |
20140317403 | DISPERSED STORAGE NETWORK WITH SLICE REFRESH AND METHODS FOR USE THEREWITH - An integrity record is appended to data slices prior to being sent to multiple slice storage units. Each of the data slices includes a different encoded version of the same data segment. An integrity indicator of each data slice is computed, and the integrity record is generated based on each of the individual integrity indicators, and may be, for example, list or a hash of the combined integrity indicators. When retrieving data slices from storage, the integrity record can be stripped off, a new integrity indicator of the data slice calculated, and a new integrity record created. The new integrity record can be compared to the original integrity record, and used to verify the integrity of the data slices. | 2014-10-23 |
20140317404 | DYNAMIC ENCRYPTION OF A UNIVERSAL RESOURCE LOCATOR - A system including a computer and a computer readable hardware storage device containing instructions which, upon being executed by the computer, implements a method for restricting access to information transmitted over a computing network. A resource request for a resource to be located is received. The resource request contains a universal resource locator (URL). The URL is evaluated to determine whether encryption of none, part, or all of the URL is required. It is determined that the requested resource is available and in response, the requested resource contained in the resource request is located. It is determined whether encryption is required for none, part, or all of a return URL of the requested resource that is to be returned to a location of the resource request. | 2014-10-23 |
20140317405 | SECURED COMMUNICATIONS ARRANGEMENT APPLYING INTERNET PROTOCOL SECURITY - A secure communications arrangement including an endpoint is disclosed. The endpoint includes a computing system. The computing system includes a user level services component and a kernel level callout driver interfaced to the user level services component and configured to establish an IPsec tunnel with a remote endpoint. The computing system also includes a filter engine storing one or more filters defining endpoints authorized to communicate with the endpoint via the IPsec tunnel. The computing system also includes a second kernel level driver configured to establish a secure tunnel using a second security protocol different from IPsec. | 2014-10-23 |
20140317406 | COMMUNICATION BETWEEN NETWORK NODES THAT ARE NOT DIRECTLY CONNECTED - A first node sends a sequence of packets to another node to which it is connected over a communication network. A second node monitors network traffic in the communication network and intercepts the sequence of packets in the network traffic sent by the first node. The second node decodes a message in the sequence of packets intended for the second node, wherein the message is encoded using lengths of the packets in the sequence of packets. | 2014-10-23 |
20140317407 | INCREMENTAL MAC TAG GENERATION DEVICE, METHOD, AND PROGRAM, AND MESSAGE AUTHENTICATION DEVICE - Provided is an incremental MAC tag generation device that enables incremental tag calculations that can support the editing of all block units, without losing the efficiency of normal tag calculations. A padding unit ( | 2014-10-23 |
20140317408 | DATA BACKUP AND SERVICE ENCRYPTION KEY MANAGEMENT - Disclosed are an apparatus and method of using encryption to access remote online application servers. One example method of operation may include applying an encryption key to an application server access operation. The method may include transmitting authentication credentials to an encryption server and receiving an application session key from the encryption server. The session key is then applied to an agent application seeking access to an application server. The method may also provide transmitting the session key in an encryption request to the encryption server to obtain an encryption key, and receiving an encryption key responsive to the transmitted session key. | 2014-10-23 |
20140317409 | SYSTEM FOR MANAGING CRYPTOGRAPHIC KEYS AND TRUST RELATIONSHIPS IN A SECURE SHELL (SSH) ENVIRONMENT - A system for managing cryptographic keys and trust relationships in a secure shell (SSH) environment by mapping network servers, clients, and appliances and locating SSH keys and key pairs associated with each device. The system provides for mapping the network topology and all SSH keys and key pairs stored on network connected devices, and the creation of a master database of all devices, keys and key pairs, key types and encryption strength, and user accounts with which each key or key pair is associated. The mapping and database enable the effective management of SSH keys and key pairs, detection of errors and weakness, elimination of orphaned or outdated keys, correction of all deficiencies, and replacement of keys in accordance with policies set by the organization maintaining the network. | 2014-10-23 |
20140317410 | NETWORK SERVICE INTERMEDIATION METHOD AND INTERMEDIATION SYSTEM - An intermediation method used in an intermediation system that includes an intermediation device determining a permission for application services requiring user authentication on a network, where in response to a user request, a first account used for a first service and a second account used for a second service, and a registration request for using the linking service linking the first application service and the second application service are associated with each other, when the two accounts are valid, as accounts usable in a linking service, an association between the first and second services is stored in the intermediation device, and when the user makes a request to use the linked services, that use is controlled by a query to the intermediation device regarding whether the account is associated as able to use the linking service. | 2014-10-23 |
20140317411 | DEDUPLICATION OF DATA - Backing up a data file can be accomplished by processing, in-line and at a first client, a plurality of datablocks taken from the data file. The processing of each datablock includes creating a unique signature of the datablock and determining whether the signature is contained in a database of signatures. Each signature in the database is associated with previously backed up datablocks. The database of signatures includes signatures of previous backed up datablocks that were backed up from at least one other client. Data are transmitted to a remote backup server for backing up the datablock. The transmitted data characterize a link to one of the previously stored datablocks when the signature of the processed datablock is found in the database of signatures. Related apparatus, systems, techniques, and articles are also described. | 2014-10-23 |
20140317412 | METHOD FOR SECURELY SEARCHING, FINDING, REPRODUCING, RECOVERING, AND/OR EXPORTING OF ELECTRONIC DATA - A method for securely searching, finding, reproducing, recovering, and/or exporting electronic data from at least two systems which can be found in a network and which are organized in a functionally identical and decentralized manner. The individual systems include a system certificate and a corresponding serial number by the manufacturer and can carry out an authentication process using said system certificate and serial number. Information is provided on user authorizations between the systems using configuration tables which are stored on each of the systems. A maximum level of security is ensured by combining cryptographic methods and the mutual authentication of the involved systems. A user interface is provided for the user, wherein the user receives a pre-selection of the requested electronic data in the user interface and can then mark the pre-selection for further processing. | 2014-10-23 |
20140317413 | SECURE REMEDIATION OF DEVICES REQUESTING CLOUD SERVICES - In accordance with embodiments disclosed herein, there are provided systems, apparatuses, and methods for implementing secure remediation of devices requesting cloud services. For example, in one embodiment, such means may include means for receiving, at a services provider, a request for services from a client; means for requesting authentication from the client to verify the client is one of a plurality of known subscribers of the services; means for requesting attestation to verify compliance of the client with a policy specified by the services provider; means for receiving an attestation confirmation from an attestation verifier, the attestation confirmation verifying compliance of the client with the policy specified by the services provider; and means for granting the client access to the services requested. | 2014-10-23 |
20140317414 | CONTEXT SENSITIVE DYNAMIC AUTHENTICATION IN A CRYPTOGRAPHIC SYSTEM - A system for performing authentication of a first user to a second user includes the ability for the first user to submit multiple instances of authentication data which are evaluated and then used to generate an overall level of confidence in the claimed identity of the first user. The individual authentication instances are evaluated based upon: the degree of match between the user provided by the first user during the authentication and the data provided by the first user during his enrollment; the inherent reliability of the authentication technique being used; the circumstances surrounding the generation of the authentication data by the first user; and the circumstances surrounding the generation of the enrollment data by the first user. This confidence level is compared with a required trust level which is based at least in part upon the requirements of the second user, and the authentication result is based upon this comparison. | 2014-10-23 |
20140317415 | MULTI-TOUCH METHODS AND DEVICES - The present disclosure relates to a multi-touch method, configured to a touch panel. The method comprises: applying a first object to touch a first image on the touch panel for inputting a first password; and determining whether inputting a second password, and if not, removing the first object from the touch panel for ending a first round of password input. | 2014-10-23 |
20140317416 | METHOD FOR INPUTTING ACCOUNTS AND PASSWORDS TO COMPUTER OR TELECOM DEVICE VIA AN AUDIO INTERFACE - A method for inputting accounts and passwords to a computer or telecom device via an audio interface via an audio jack. The method includes the following steps: fabricating a data storage device with audio interface; storing an account and password into the data storage device; setting a software capable of being implemented on the computer or telecom device; said software has the functions of data encryption and decryption as well as data access via the audio interface; and connecting the data storage device via the audio interface to the audio jack of the computer or telecom device. When the software requests the user to input accounts and passwords, the accounts and passwords in the data storage device could be obtained and then decrypted via the audio jack and audio interface, thus finishing the input of the users accounts and passwords by non-keying means. | 2014-10-23 |
20140317417 | Generation of working security key based on security parameters - Techniques for improving security of an electronics device are disclosed. In one aspect of the present disclosure, security of a device may be improved by generating a working key based on a hardware secret key and at least one security parameter of the device, e.g., with a key derivation function. The security parameter(s) may be related to software to be authenticated on the device and/or other aspects of security for the wireless device. The security parameter(s) may indicate whether the software is authorized and/or at least one operating function authorized for the software. At least one security function may be performed for the device based on the working key. For example, the working key may be used to encrypt, sign, decrypt, or verify data for the device. The working key may be used directly or indirectly by the software for the at least one security function. | 2014-10-23 |
20140317418 | SERVER, CLIENT DEVICE, AND USB REDIRECTION METHOD - A client device obtains data from a universal serial bus (USB) device and compresses the data. The client device sends the compressed data to a server using a USB redirection. The server decompresses the compressed data and sends the decompressed data to a virtual machine installed in the server. The client device remotely accesses decompressed data when the decompressed data is stored into the virtual machine. | 2014-10-23 |
20140317419 | SECURE COMPUTING - Techniques and logic are presented for encrypting and decrypting programs and related data within a multi-processor system to prevent tampering. The decryption and encryption may be performed either between a system bus and a processor's individual L1 cache memory or between a processor's instruction and execution unit and their respective L1 caches. The logic may include one or more linear feedback shift registers (LFSRs) that may be used for generation of unique sequential address related codes to perform the decryption of instructions and transformation logic that may be used for generation of equivalent offset address related codes to perform decryption and encryption of data. The logic may also be programmable and may be used for test purposes. | 2014-10-23 |
20140317420 | ENCRYPTED DATA STORAGE APPARATUS - The present invention relates to a secure memory storage system. In particular there is a data storage device having a receiver for receiving data, an encrypted persistent memory to store received data and a transmission control device physically independent of the data storage device. The apparatus is arranged such that when a connection between the transmission control device and the data storage device is established, transmission of data between the data storage device and a further device (e.g. a PC) is enabled. Wireless connection between the transmission control device and data storage device is not established, and transmission of data between the data storage device and the further device (e.g. PC) is non-enabled. The transmission control device therefore controls data transfer between the data storage device and the further device. | 2014-10-23 |
20140317421 | DATA STORAGE SYSTEM AND METHOD BY SHREDDING AND DESHREDDING - A system and method for data storage by shredding and deshredding of the data allows for various combinations of processing of the data to provide various resultant storage of the data. Data storage and retrieval functions include various combinations of data redundancy generation, data compression and decompression, data encryption and decryption, and data integrity by signature generation and verification. Data shredding is performed by shredders and data deshredding is performed by deshredders that have some implementations that allocate processing internally in the shredder and deshredder either in parallel to multiple processors or sequentially to a single processor. Other implementations use multiple processing through multi-level shredders and deshredders. Redundancy generation includes implementations using non-systematic encoding, systematic encoding, or a hybrid combination. Shredder based tag generators and deshredder based tag readers are used in some implementations to allow the deshredders to adapt to various versions of the shredders. | 2014-10-23 |
20140317422 | Method And Apparatus To Control Current Transients In A Processor - In an embodiment, a processor includes at least one core. The at least one core includes an execution unit and a current protection (IccP) controller. The IccP controller may receive instruction width information associated with one or more instructions of an instruction queue prior to execution of the instructions by the execution unit. The IccP controller may determine an anticipated highest current level (Icc) for the at least one core based on the instruction width information. The IccP controller may generate a request for a first license for the at least one core that is associated with the Icc. Other embodiments are described and claimed. | 2014-10-23 |
20140317423 | MULTI-BATTERY POWER SUPPLY SYSTEM - A multi battery power system includes an electronic device and an extension docking. The electronic device includes a first power storage module, a first connector, a second connector and a power conversion module. The first power storage module includes a first power storage unit. The first connector is coupled to the first power storage module. The power conversion module is coupled between the first power storage unit and the second connector and converts power stored in the first power storage unit into a converted output voltage and transmits the converted output voltage to the second connector. The extension docking includes a third connector and an electrical load. The third connector is paired with and selectively connected to the second connector of the electronic device. The electrical load is coupled to the third connector, and selectively receives the converted output voltage from the electronic device via the third connector. | 2014-10-23 |
20140317424 | POWER SUPPLY APPARATUS, POWER SUPPLY METHOD, AND STORAGE MEDIUM - A power supply apparatus includes a receiving unit configured to receive a power supply request and a power supply condition from a power receiving apparatus, and a power supply control unit configured to instruct a power supply unit to perform a test power supply to a target power receiving apparatus which is a transmission source of the power supply request, and instruct the power supply unit to perform actual power supply according to the power supply condition when the receiving unit receives a success notification of the test power supply from the target power receiving apparatus after performing the test power supply. | 2014-10-23 |
20140317425 | MULTI-CORE PROCESSOR INSTRUCTION THROTTLING - An apparatus for performing instruction throttling for a multi-processor system is disclosed. The apparatus may include a power estimation circuit, a table, a comparator, and a finite state machine. The power estimation circuit may be configured to receive information on high power instructions issued to a first processor and a second processor, and generate a power estimate dependent upon the received information. The table may be configured to store one or more pre-determined power threshold values, and the comparator may be configured to compare the power estimate with at least one of the pre-determined power threshold values. The finite state machine may be configured to adjust the throttle level of the first and second processors dependent upon the result of the comparison. | 2014-10-23 |
20140317426 | ENERGY SAVING CIRCUIT OF COMPUTER - Energy saving circuit of a computer is connected between a power supply and a motherboard. The energy saving circuit includes six electronic switches and a switch. When the computer is in the stand-by state, and the switch is pressed, the motherboard of the computer receives a standby voltage and the motherboard maintains the stand-by state. The energy-saving circuit can shut off the standby voltage by pressing the switch when the computer is powered off to save energy. | 2014-10-23 |
20140317427 | DYNAMIC CLOCK VOLTAGE SCALING (DCVS) BASED ON APPLICATION PERFORMANCE IN A SYSTEM-ON-A-CHIP (SOC), AND RELATED METHODS AND PROCESSOR-BASED SYSTEMS - Dynamic clock voltage scaling (DCVS) based on application performance in a system-on-a-chip (SOC), and related methods and processor-based systems are disclosed. In this regard, in one embodiment, a method of providing an application-specific DCVS in a SOC is provided. The method comprises receiving performance data corresponding to at least one performance characteristic of a SOC indicative of an execution performance of an application executing on the SOC. The method also comprises storing the performance data for the application executing on the SOC. The method further comprises, responsive to executing the application on the SOC, determining an application-specific DCVS setting for the application based on the performance data, and setting a DCVS parameter of the SOC based on the determined application-specific DCVS setting for the application. In this manner, an optimal DCVS setting is provided for the SOC to optimize computing resources, thus improving perceived performance of the application. | 2014-10-23 |
20140317428 | Pre-processing Operation Method and Related Electronic Device - A pre-processing operation method for an electronic device with a touch panel, includes detecting a hovering event according a pre-processing condition of an application service; and entering into a standby mode of the application service and performing a pre-processing process after the hovering event conformed to the pre-processing condition is detected | 2014-10-23 |
20140317429 | ELECTRONIC DEVICE AND METHOD FOR RESUMING FROM HIBERNATION FOR THE SAME - An electronic device and method for resuming from hibernation, the electronic device has a light sensing component and a tilt sensing component. When the electronic device is in the hibernation status, external light of electronic device is detected via the light sensing component for attaining light source data, the tilt angle of the electronic device against the horizontal plane is detected via the tilt sensing component for attaining tilt data. Thus, when it is determined that the light source data and the tilt data satisfy a predetermined resuming condition, the electronic device resumes from the hibernation status. With the present invention, when a user is going to operate electronic device, and the user only needs to hold electronic device and the electronic device resumes from the hibernation status and is ready to use without extra trigger actions required. | 2014-10-23 |
20140317430 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING OPTIMIZING C-STATE SELECTION UNDER VARIABLE WAKEUP RATES - A processor may include power management techniques to, dynamically, chose an optimal C-state for the processing core. The measurement of real workloads on the OSes exhibit two important observations (1) the bursts of high interrupt rate are interspersed between the low interrupt rate periods and long periods of high activity levels; and (2) the interrupt rate may, suddenly, fall below an interrupt rate (of 1 milli-second, for example) that is typical of the current operating systems (OS). Instead of determining the C-state based on the stale data stored in the counters, the power control logic may determine an optimal C-state by overriding the C-state determined by the OS or any other power monitoring logic. The power control logic may, dynamically, determine an optimal C-state based on the CPU idle residency times and variable rate wakeup events to match the expected wakeup event rate. | 2014-10-23 |
20140317431 | METHOD AND SYSTEM FOR REMOTELY CONTROLLING A STORAGE SHELF OF A STORAGE SYSTEM - System and method for remotely performing a power cycle operation for a storage shelf of a storage server using a control path independent of a data path used for processing I/O requests is provided. The storage server maintains a data structure for storing information regarding a state of a plurality of power latches that are used to control power for the storage shelf having an alternate control path module for receiving control commands via the control path. Depending on the state of the plurality of power latches, the storage server sends one or more commands to the alternate control path module to turn off power to the storage shelf during a power cycle operation. When the power shelf is powered off, the storage server waits for a certain duration and then sends one or more power on commands to the alternate control path module to power on the storage shelf. | 2014-10-23 |
20140317432 | Methods and Systems for Receiver Detection on a PCI-Express Bus - A method for detecting a receiver on a computer bus, comprises the steps of: applying a low voltage state on transmission lines of the computer bus using a voltage mode driver; applying a high voltage state on the transmission lines using the voltage mode driver; determining a voltage rate change for transmission voltages on the transmission lines; and determining the presence of the receiver on the computer bus as a function of the voltage rate change. | 2014-10-23 |
20140317433 | CLOCK CONTROL CIRCUIT AND METHOD - This invention provides a clock control circuit, which can be added to any pipeline-processor to solve timing problems arising from variations due to process outcome and environmental conditions. Critical instructions are detected (instructions that exercise critical paths) in conjunction with environmental sensing (such as process, temperature and voltage). This information is used to control cycle stealing. | 2014-10-23 |
20140317434 | Methods and Systems for Distributing Clock and Reset Signals - A distribution network, comprises: circuit blocks having counters, wherein the counters are synchronized relative to an input signal; drivers connected in a balanced tree for distributing the input signal synchronously to the circuit blocks; and drivers connected in an unbalanced tree for distributing a reset signal to the circuit blocks, wherein the input signal is distributed via the balanced tree as a function of the reset signal. | 2014-10-23 |
20140317435 | ELECTRONIC DEVICE AND METHOD FOR TESTING CAPACITORS OF MOTHERBOARD OF ELECTRONIC DEVICE - In a method for testing the locations and identities of capacitors of a motherboard of an electronic device, register addresses of the capacitors of the motherboard are detected and a notification is generated if all the detected register addresses are correct. Each capacitor having an incorrect register address is reconfigured with a correct register address. The configuration report is generated recording the reconfiguration of the capacitors, and the electronic device is then powered off. | 2014-10-23 |
20140317436 | PROCESSING APPARATUS, METHOD, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM - A processing apparatus includes a first memory, a second memory, a capacitor, and a processor coupled to the first memory and the second memory. The processor is configured to cause power feeding from the capacitor, and execute a first processing to cause the first memory to hold data, after the power feeding is caused from the capacitor, cause a battery to start power feeding in at least one of a case where the power feeding from an external power source is not started after being halted and an output voltage of the capacitor has fallen below a first value, and a case where the power feeding from the external power source is not started after being halted and a first time period has elapsed, and execute a second processing to write the data from the first memory into the second memory during the power feeding from the battery. | 2014-10-23 |
20140317437 | AUTOMATIC CLUSTER-BASED FAILOVER HANDLING - Example embodiments relate to automatic cluster-based failover handling. In example embodiments, a first node included in a high availability cluster may receive a failure signal from a second node included in the high availability cluster, where the failure signal indicates a failure in the second node. The failure signal may also indicate a second port in the second node that is or will be inactive due to the failure, the second port being associated with a second port address. The first node may activate a first port of the first node, where the first port was previously inactive before being activated. The first node may assign a first port address to the first port, wherein the first port address is the same as the second port address. | 2014-10-23 |
20140317438 | System, software, and method for storing and processing information - A system for storing and processing information comprises a plurality of nodes, each node comprising: a local information storage medium; a data connection configured to connect to at least one linked client; and a processor configured to process information in the local information storage medium and send processed information to the at least one linked client, and a secondary shared storage medium connected to the plurality of nodes via a shared data connection and configured to store information copied from the local information storage medium of each of the plurality of nodes, wherein each of the nodes in the plurality of nodes is configured, in the event of failure of a failed one of the plurality of nodes, to connect to the at least one linked client corresponding to the failed one of the plurality of nodes. | 2014-10-23 |
20140317439 | PROCESS FOR SELECTING AN AUTHORITATIVE NAME SERVER - Methods and systems for intelligently choosing an authoritative name server from among a group of name servers for resolving Domain Name System requests. Systems and methods are provided that enable choosing of a first server associated with and/or operated by a first service provider based on a first measurement associated with that first server. The systems and methods further comprise requesting first data from that first server, determining that the first server is unresponsive, and choosing a second server. The second server is chosen based on a second measurement, and chosen contingent on it being associated with and/or operated by to a different service provider than that associated with the first server. The systems and methods then comprise requesting second data from the second server. | 2014-10-23 |
20140317440 | Method and Apparatus for Indirectly Assessing a Status of an Active Entity - A method and system permit a backup entity of a redundant apparatus of a communication system that shares control of hardware resources or other network resources with an active entity to indirectly determine a status of the active entity based upon behavior and reaction to actions it takes in connection with resources it shares control of with the active entity. Such a method and system permit the backup entity to deduce the state of the active entity without having any a hardware connection or other communication connection with the active entity. | 2014-10-23 |
20140317441 | MANAGEMENT SYSTEM FOR MANAGING COMPUTER SYSTEM, METHOD FOR MANAGING COMPUTER SYSTEM, AND STORAGE MEDIUM - An exemplary management system stores computer performance management information, I/O performance management information regarding communication by I/O adapters, and priority management information associating a priority of a failover destination pair candidate including failover destination computer and destination I/O adapter candidates with a relationship between a failover source computer and destination computer candidate and with an I/O performance relationship between failover source and destination I/O adapter candidates. The management system determines failover destination pair candidates, each including failover destination computer and I/O adapter candidates. The management system determines a priority of each failover destination pair candidates with reference to the computer and I/O performance management information, and the priority management information based on a performance relationship between the active computer and the failover destination computer candidate and on a performance relationship between the active I/O adapter and the failover destination I/O adapter candidate. | 2014-10-23 |
20140317442 | COMMUNICATION OF CONDITIONS AT A PRIMARY STORAGE CONTROLLER TO A HOST - A primary storage controller is maintained in a copy relationship with a secondary storage controller, wherein the primary and secondary storage controllers are coupled to a host that is configurable to use the secondary storage controller instead of the primary storage controller. The primary storage controller determines occurrence of at least one condition in the primary storage controller, wherein the at least one condition occurs prior to a failure of the host to perform an Input/Output (I/O) operation with respect to at least one storage volume of the primary storage controller. The primary storage controller communicates the occurrence of the at least one condition to the host, wherein in response to the communicating the host is configured to determine whether to use the secondary storage controller instead of the primary storage controller based on the occurrence of the at least one condition. | 2014-10-23 |
20140317443 | METHOD AND APPARATUS FOR TESTING A STORAGE SYSTEM - A method and a system for testing a storage system to which is applied a command or a sequence of commands. The storage system has a storage medium and a controller, and each command results in an outcome, and the method comprises: storing in a dataset; information related to the command and/or the sequence of commands including for each command: an address of the storage system the command is applied to, and an outcome of the command. When a sequence of commands is applied, the information stored in the dataset includes an outcome of the sequence of commands. This method further comprises selecting one or more commands from the dataset to be subsequently replayed when the outcome of the at least one command indicates an error. | 2014-10-23 |
20140317444 | STORAGE CONTROL DEVICE AND STORAGE DEVICE - A storage control device includes a processor. The processor is configured to monitor driving states of each of a plurality of storage drives included in a storage device. The processor is configured to rearrange data stored in the storage drives so that the driving states of the storage drives are uniformed. | 2014-10-23 |
20140317445 | RECOVERY OF STORAGE DEVICE IN A REDUNDANT ARRAY OF INDEPENDENT DISK (RAID) OR RAID-LIKE ARRAY - A method for managing storage devices in a storage subsystem having an array of storage devices, according to one embodiment, includes determining that a storage device in an array of storage devices has failed. A first candidate storage device having storage device characteristics that match storage device characteristics of the failed storage device is identified. The first candidate storage device is exchanged with a second candidate storage device in response to determining that the second candidate storage device has storage device characteristics that are more similar to the storage device characteristics of the array of storage devices than the first candidate storage device. | 2014-10-23 |
20140317446 | PRIORITIZING BACKUPS ON A DISK LEVEL WITHIN ENTERPRISE STORAGE - A system, method, and computer program product provide a process that includes storing data on first data storage devices, and a backup copy of the data on the first and/or on second ones of the data storage devices. A probability of a failure of each of at least some of the first and/or second data storage devices is determined, and at least one of the first and/or data storage devices that is determined to have a higher probability of failure than a threshold and/or a probability of failure of another of the data storage devices, is selected. A second backup copy of the data, stored on the selected data storage device(s), is also stored on third ones of the data storage devices. The first and/or second data storage devices determined to have the higher probability of failure are used for their designated purpose after the second backup copy is created. | 2014-10-23 |
20140317447 | ADAPTIVE RAID FOR AN SSD ENVIRONMENT - A system and method for adaptive RAID geometries. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to determine a first RAID layout for use in storing data, and write a first RAID stripe to the device group according to the first RAID layout. In response to detecting a first condition, the controller is configured to determine a second RAID layout which is different from the first RAID layout, and write a second RAID stripe to the device group according to the second layout, whereby the device group concurrently stores data according to both the first RAID layout and the second RAID layout. | 2014-10-23 |
20140317448 | INCREMENTAL CHECKPOINTS - A method and system on failure recovery in a storage system are disclosed. In the storage system, user data streams (e.g., log data) are collected by a scribeh system. The scribeh system may include a plurality of Calligraphus servers, HDFS and Zookeeper. The Calligraphus servers may shard the user data streams based on keys (e.g., category and bucket pairs) and stream the user data streams to Puma nodes. Sharded user data streams may be aggregated according to the keys in memory of a specific Puma node. Periodically, aggregated user data streams cached in memory of the specific Puma node, together with a Incremental checkpoint, are persisted to HBase. When a specific process on the specific Puma node fails, Ptail retrieves the Incremental checkpoint from HBase and then restores the specific process by requesting user data streams processed by the specific process from the scribeh system according to the Incremental checkpoint. | 2014-10-23 |
20140317449 | APPARATUS AND METHOD FOR ALLOCATING PROCESSING REQUESTS - A system stores at least one item of connection information for each of a plurality of processing systems. The system receives a request from the requesting apparatus and, in response to receiving the request, sets a status related to one item of the connection information stored in the storage unit for connection to one of the processing systems. The system transmits the received request to the one processing system by using the one item of connection information and receives a response denoting a result of the processing from the one processing system. Responsive to receiving the response, the system releases the status related to the one item of connection information, and transmits the response to the requesting apparatus. | 2014-10-23 |
20140317450 | PRETEST SETUP PLANNING - A computer-implemented method comprising: obtaining a description of a test suite which comprises a plurality of tests, wherein each test of the test suite is described by values of functional attributes, wherein at least a portion of the functional attributes are setup-related attributes, wherein a combination of values of the setup-relates attributes potentially indicate a setup activity to be performed prior to executing the test to set up a test environment for the test. Identifying, based on the description of the test suite, a setup activity that is associated with two or more tests, wherein the setup activity is configured to set up a component of the test environment, wherein the identifying is performed by a processor. Providing a first instruction to perform the setup activity prior to executing a first test of the two or more tests. And, providing a second instruction to reuse the component of the test environment when executing additional tests of the two or more tests, whereby avoiding performing duplicate setup activities. | 2014-10-23 |
20140317451 | AUTOMATICALLY ALLOCATING CLIENTS FOR SOFTWARE PROGRAM TESTING - Techniques are described herein that are capable of automatically allocating clients for testing a software program. For instance, a number of the clients that are to be allocated for the testing may be determined based on a workload that is to be imposed by the clients during execution of the testing. For example, the number of the clients may be a minimum number of the clients that is capable of accommodating the workload. In accordance with this example, the minimum number of the clients may be allocated in a targeted environment so that the test may be performed on those clients. Additional clients may be allocated along with the minimum number of the clients in the targeted environment to accommodate excess workload. | 2014-10-23 |
20140317452 | ERROR DETECTING APPARATUS, PROGRAM AND METHOD - An error detecting apparatus includes: an execution history storing unit to store a first execution history which is an execution history of a first program, and a second execution history which is an execution history of a second program changed from said first program; a flow comparing means for extracting positions, which are determined on the basis of positions at which a difference between number of executions of a predetermined instruction to number of executions of said first program, and number of executions of an instruction corresponding to said predetermined instruction to number of executions of said second program is not smaller than a predetermined value, from said first execution history and said second execution history; and a cause position restricting means for outputting cause position information which indicates a preceding position form said position of said second program. | 2014-10-23 |
20140317453 | METHOD AND APPARATUS FOR DOCKING A TEST HEAD WITH A PERIPHERAL - A method and apparatus for docking an electronic test head with a peripheral, which positions devices for testing. Exact-constraint alignment features, also sometimes known as kinematic features, are incorporated to provide repeatable positioning of the test head in three degrees of freedom with respect to the docking plane of the peripheral. A distinct alignment feature is used to provide planarity and to establish the required docked distance between the test head and the peripheral. The exact-constraint alignment features are mounted compliantly to enable them to position the test head in the plane while the test head is away from its final docked distance and to maintain that position as the test head is moved to its final docked position. | 2014-10-23 |
20140317454 | Tracer List for Automatically Controlling Tracer Behavior - A tracing system may use an evaluation mechanism to determine which functions to include or exclude during tracing. The architecture may evaluate functions when functions or groups of functions may be loaded for execution, as well as each time a function may be encountered. The evaluation mechanism may use whitelists, blacklists, and various expressions to identify which functions to trace and which functions to exclude. The evaluation mechanism may evaluate an expression that may identify specific conditions under which a function may be traced or not traced. The tracing mechanism may create wrapping functions for each function, including callback functions. | 2014-10-23 |
20140317455 | LPC BUS DETECTING SYSTEM AND METHOD - A LPC bus detecting system includes a PLD for detecting a LPC bus of a server. The PLD includes a detecting module connected to the LPC bus and an Embedded Block RAM (EBR) connected to the detecting module. The detecting module is capable of decoding signals transferred by the LPC bus and storing decoded data to the EBR. The present disclosure further discloses a method for detecting the LPC bus. | 2014-10-23 |
20140317456 | METHOD AND APPARATUS FOR LOGGING - The present invention relates to a method and an apparatus for logging a radio resource control (RRC) failure of user equipment (UE) and receiving the log. According to one embodiment of the present invention, a method for logging an RRC failure of UE may comprise the steps of: attempting random access; if the failure of random access is sensed, logging information on the failure; and if the success of random access is sensed, transmitting information on the failure logged before the success to a connected base station. According to one embodiment of the present invention, an apparatus and a method which effectively log a channel state or a connection failure can be provided. | 2014-10-23 |
20140317457 | SERVER SYSTEM - A server system includes at least one server and a server cabinet. The at least one server includes a first connection port and a baseboard management controller which detects a connection state of the first connection port and according to the connection state, outputs a data signal or a warning signal. The server cabinet includes chambers for containing the at least one server, and the chamber includes a second connection port and a storage unit. The storage unit stores data. When the connection state specifies that the first connection port couples to the second connection port, the baseboard management controller reads the data stored in the storage unit, to output the data signal. When the connection state specifies that the first connection port does not couple to the second connection port, the baseboard management controller outputs the warning signal. | 2014-10-23 |
20140317458 | EMBEDDED RESILIENT BUFFER - Described is an apparatus that comprises: a first sequential unit; a first queue coupled in parallel to the first sequential unit such that the first queue and first sequential unit receive a first input, the first sequential for double sampling the first input; a compare unit to receive an output from the first sequential unit; and a first selection unit controllable by a write pointer of a previous cycle, the first selection unit to receive outputs of each storage unit of the first queue, wherein the first selection unit to generate an output for comparison by the first compare unit. | 2014-10-23 |
20140317459 | BACKUP SYSTEM DEFECT DETECTION - A backup defect detection system includes a backend and an agent. The backend includes a plurality of file servers backed by a database. The database contains data associated with one or more users. The agent is installed on a user's computing device and in communication with the backend to scan a user's selected folders to determine new or changed files and upload the new or changed files to the backend. The agent is configured to generate one or more logs recording the success or failure type of a file backup and transmit the logs to the backend. The backend is configured to generate a report from the logs, filter and prioritize the report based on a set of user defined importance for each error type and provide the filtered and prioritized report for further action. Related apparatus, systems, techniques and articles are also described. | 2014-10-23 |
20140317460 | MEMORY DEVICE WITH BACKGROUND BUILT-IN SELF-REPAIR USING BACKGROUND BUILT-IN SELF-TESTING - A memory device with a background built-in self-repair module (BBISRM) includes a main memory, an arbiter, and a redundant memory to repair a target memory under test (TMUT). The memory device also includes a background built-in self-test module (BBISTM) to identify portions of memory needing background built-in self-repair (BBISR). The BBISRM or the BBISTM can operate simultaneously while the memory device is operational for performing external accesses during field operation. The BBISR can detect and correct a single data bit error in the data stored in the TMUT. The arbiter configured to receive a read or write access memory request including a memory address, to determine if the memory address of the read or write access memory request matches the memory address mapped to the selected portion of the redundant memory, and to read or write data from the selected portion of the redundant memory, respectively. | 2014-10-23 |
20140317461 | METHOD FOR ANALYZING A CAUSE OF LINK FAILURE, METHOD OF NETWORK OPTIMIZATION AND APPARATUS - A method for analyzing a cause of link failure, a method of network optimization and an apparatus. The method includes: determining, when link failure occurs, detailed triggering information causing the link failure; analyzing a cause of link failure according to the detailed triggering information causing the link failure; and transmitting the cause of link failure obtained by analysis to a network side. With the embodiments of the present invention, the UE may transmit detailed causes in detailed configuration information obtained by analysis to the network side, so that the network side determines a root cause of link failure according to the cause or according to the cause in combination with a measurement result, so as to take corresponding measures to optimize the network more accurately. | 2014-10-23 |
20140317462 | SCANNABLE SEQUENTIAL ELEMENTS - A scannable sequential element is provided. The scannable sequential element includes a master stage that includes a data path configured to receive a data input. The master stage also includes a pass gate located on the data path and configured to selectively pass the data input, in which the data path has only one pass gate. The master stage also includes a test path coupled to the data path and configured to receive a test input. The master stage also includes pass gates located on the test path and configured to selectively pass the test input. | 2014-10-23 |
20140317463 | Scheme for Masking Output of Scan Chains in Test Circuit - Operating a scan chain of a test circuit of an integrated circuit to have either a single fanout or multiple fanout to a compressor. The test circuit receives a fanout control signal for configuring the fanout of the scan chain. If the fanout control signal indicates configuring of the scan chain with a single fanout, the output of the scan chain is sent to one input of a compressor. If the fanout control signal indicates configuring of the scan chain with multiple fanout, the output of the scan chain is sent to multiple inputs of the compressor. | 2014-10-23 |