42nd week of 2011 patent applcation highlights part 15 |
Patent application number | Title | Published |
20110253937 | LIQUID-CRYSTALLINE MEDIUM - The present invention relates to a liquid-crystalline medium based on a mixture of polar compounds having negative dielectric anisotropy (Δ∈), which is distinguished by the fact that it has a value for the ratio γ | 2011-10-20 |
20110253938 | LIQUID-CRYSTALLINE MEDIUM - The present invention relates to a liquid-crystalline medium based on a mixture of polar compounds having negative dielectric anisotropy (Δε), which is distinguished by the fact that it has a value for the ratio γ | 2011-10-20 |
20110253939 | DYE LOADED ZEOLITE MATERIAL - The present invention provides a dye loaded zeolite material comprising: a) at least one zeolite crystal having straight through uniform channels each having a channel axis parallel to, and a channel width transverse to, a c-axis of crystal unit cells; b) closure molecules having an elongated shape and consisting of a head moiety and a tail moiety, the tail moiety having a longitudinal extension of more than a dimension of the crystal unit cells along the c-axis and the head moiety having a lateral extension that is larger than said channel width and will prevent said head moiety from penetrating into a channel; c) a channel being terminated, in generally plug-like manner, at least at one end thereof located at a surface of the zeolite crystal by a closure molecule hose tail moiety penetrates into said chanel and whose head moiety substantially occludes said channel end while projecting over said surface; and d) an essentially linear arrangement of luminescent dye molecules enclosed within a terminated channel adjacent to at least one closure molecule and exhibiting properties related to supramolecular organization. | 2011-10-20 |
20110253940 | Green Emitting Phosphor - A green emitting phosphor exhibiting an excellent absorption ratio is provided. A green emitting phosphor containing crystal represented by MGa | 2011-10-20 |
20110253941 | DISPERSANT HAVING MULTIFUNCTIONAL HEAD AND PHOSPHOR PASTE COMPOSITION COMPRISING THE SAME - Disclosed is a dispersant having a multifunctional head, and a phosphor paste composition comprising the dispersant. The dispersant has a multifunctional head that comprises an acidic group, a basic group and an aromatic group, thereby enhancing an affinity for the surface of phosphor particles and improving dispersibility. | 2011-10-20 |
20110253942 | ENCAPSULATION MATERIAL - Disclosed are encapsulation materials including an 80 to 99.5 weight percentage (wt %) of ethylene vinyl acetate copolymers (EVA) and a 0.5 to 20 weight percentage(wt %) of a photoluminescent polymer, wherein the EVA and the photoluminescent polymers are evenly blended. The encapsulation materials can be applied to packaging solar cells, and the encapsulating structure may protect the EVA from UV damage and enhance light utilization efficiency of the solar cell. | 2011-10-20 |
20110253943 | ONE PART EPOXY RESIN INCLUDING A LOW PROFILE ADDITIVE - An adhesive composition comprising: (i) a one part curable epoxy adhesive and (ii) a low profile additive (LPA), the low profile additive being a polymer that is compatible with the epoxy adhesive such that it forms a single phase when admixed with the adhesive composition and that separates from the adhesive to form a network of stress-absorbing nodules therein when the adhesive is cured, the low profile additive being present in an amount sufficient to prevent or reduce shrinkage and/or the formation of voids or cracks when the adhesive is cured. In one embodiment the LPA is a block copolymer including at least one flexible block and at least one rigid block that makes the low profile additive compatible with the epoxy adhesive such that a mixture of the uncured epoxy resin and the low profile additive forms a homogenous solution and as the epoxy resin is cured, the low profile additive forms a stress absorbing network of nodules in the cured epoxy resin matrix. | 2011-10-20 |
20110253944 | NOVEL ORGANIC SEMICONDUCTOR COMPOUND, METHOD FOR PREPARING SAME, AND ORGANIC SEMICONDUCTOR COMPOSITION, AND ORGANIC SEMICONDUCTOR THIN FILM AND ELEMENT CONTAINING THE SAME - The present invention relates to a novel polycyclic aromatic organic semiconductor compound having a polycyclic aromatic core, a method for preparing the same, and electronic, optical or electro-optical devices such as an organic semiconductor composition, organic semiconductor thin film, organic field effect transistor and solar cell containing the compound. The novel organic semiconductor compound according to the present invention has high crystallinity and control capability, and facilitates control of doping conditions in the manufacture of organic semiconductor element so that it can be used for diverse applications. The compound can be mass-produced at low cost and has high solubility in organic solvents so that a liquid phase process can be applied to the manufacture of semiconductor elements and the like, thus enabling the mass-production of semiconductor elements and solar cells at low cost. | 2011-10-20 |
20110253945 | DISPERSION OF CARBON MATERIAL AND PROCESS FOR PRODUCING SAME - The invention is directed to a carbon material dispersion, including: a fluorinated carbon material having a fluorinated surface formed by bringing a treatment gas with a fluorine concentration of 0.01 to 100 vol % into contact with a carbon material under conditions at 150 to 600° C.; and a dispersion medium in which the fluorinated carbon material is dispersed. | 2011-10-20 |
20110253946 | CONDUCTIVE POLYMER, CONDUCTIVE POLYMER COMPOSITION, CONDUCTIVE POLYMER ORGANIC FILM, AND ORGANIC PHOTOELECTRIC DEVICE INCLUDING THE SAME - A conductive polymer, a conductive polymer composition, a conductive polymer organic film, and an organic photoelectric device including the same, the conductive polymer including repeating units represented by the following Chemical Formula 1, repeating units represented by the following Chemical Formula 2, and repeating units represented by the following Chemical Formula 3: | 2011-10-20 |
20110253947 | AQUEOUS DISPERSIONS CONTAINING OF ELECTRICALLY CONDUCTING POLYMERS CONTAINING HIGH BOILING SOLVENT AND ADDITIVES - The present invention relates to electrically conductive polymer compositions, and their use in electronic devices. The compositions are an aqueous dispersion of at least one electrically conductive polymer doped with a non-fluorinated polymeric acid, at least one high-boiling polar organic solvent, and an additive selected from the group consisting of fullerenes, carbon nanotubes, and combinations thereof. | 2011-10-20 |
20110253948 | Polymer Composition - A polymer composition comprises at least one substantially non-conductive polymer binder and at least first and second electrically conductive fillers. The first electrically conductive filler is comprised of particles having avoid-bearing structure; and the second electrically conductive filler is comprised of particles which are acicular in shape. | 2011-10-20 |
20110253949 | FINE SILVER PARTICLE POWDER, METHOD FOR MANUFACTURING THE SAME, SILVER PASTE USING THE POWDER, AND METHOD OF USE OF THE PASTE - A method suitable for mass production of nanoparticles with a uniform particle diameter is provided. It is an object to provide a powder of the nanoparticle obtained by this method, a dispersion containing the nanoparticles, and a paste containing the nanoparticles. There is provided a method for manufacturing silver particles including the step of reducing silver in a silver solution containing a protective agent composed of an organic material and a copper component in an amount of 1 to 1,000 ppm relative to the amount of silver to obtain particles having an average particle diameter (D | 2011-10-20 |
20110253950 | Surface Finishing Product and Method for Its Application - A method includes the steps of preparing a work area for mitigating contamination of an item to be coated. A residue free cleaning solution is applied to a surface of the item for cleaning the surface without leaving residue. The surface is scuffed and cleaned for removing contaminates. The surface rinsed to remove cleaning solution and residue from scuffing the surface. A catalytic hardener is combined with a finishing product comprising clear coat, an accelerated reducer, a fast reducer, an acetone and a UV inhibitor for bonding to the surface with UV protection. The surface is tacked-off to remove dirt and dust. The combined catalytic hardener and finishing product is applied with an HVLP spray system having less than 5 psi of pressure for mitigating overspray. A period of time is provided for the combined catalytic hardener and finishing product to cure. | 2011-10-20 |
20110253951 | COMPOSITIONS FOR LOW REFRACTIVE-INDEX FILMS - The present invention relates to a composition for low-refractive-index films, components (b) and (c), and an organic solvent. Component (b) is a fluorine-containing polymer. Component (c) is one or more of acrylic acid derivatives and methacrylic acid derivatives having 1 to 5 acryloyl groups or methacryloyl groups. Component (b) is a copolymer comprising 10 to 50 parts by mole of one or more of fluorine-containing polymers having cyclic structures as represented by formulae (1), (2) and (3), and tetrafluoroethylene; 0 to 50 parts by mole of hexafluoropropylene; 90 to 10 parts by mole of vinylidene fluoride; and 10 to 100 parts by mole of vinyl fluoride and component (b) is one or more of methacrylate compounds and acrylate compounds containing a fluoroalkyl group having 1 to 10 carbon atoms. | 2011-10-20 |
20110253952 | Service stand for lawn mowers and ATV's - A portable, user configurable service stand for a variety of riding lawnmowers and other motorized implements. The stand comprises a rigid frame with an elongated, longitudinal section spanning between twin, spaced apart vertical frame sections that support the load. Each vertical frame section secures generally planar, horizontal wheel supports. A pair of parallel, removable spans is coupled between front and rear wheel supports to temporarily provide a travel pathway over the stand. Removable, drive-on ramps are pivotally connected to the frame. After a mower is parked on the stand, the spans may be slidably removed, exposing the sides and undercarriage of the mower for convenient access. Upon removal of the spans, a pair of gravity-operated safeties automatically deploys to block the mower front wheels. | 2011-10-20 |
20110253953 | RACK AND PINION MECHANISM, VACUUM PROCESSING APPARATUS, METHOD OF DRIVING AND CONTROLLING RACK AND PINION MECHANISM, DRIVE CONTROL PROGRAM, AND RECORDING MEDIUM - The present invention provides a rack and pinion mechanism which avoids collision between respective tooth tops of a rack gear and a pinion gear due to a phase shift between the rack gear and the pinion gear with a simple mechanism and meshes the rack gear and the pinion gear smoothly. | 2011-10-20 |
20110253954 | TRAILER HITCH JACK - A trailer hitch jack is disclosed. The trailer hitch jack may include a jack housing tube, an extender tube, a drop leg tube, and a hitch engagement tube projecting orthogonally from the jack housing tube. The jack housing tube, extender tube, and drop leg tube may be coupled to one another and configured to telescope upon operation of a hand crank. | 2011-10-20 |
20110253955 | Lifting Apparatus - One disclosed lifting apparatus includes a base, a receiving portion, and a first pair of laterally offset arms. The base has proximal and distal ends, and the laterally offset arms are rotatably coupled to the base for movement between lowered and raised positions. The arms are also rotatably coupled to the receiving portion, and the receiving portion is relatively near the base distal end when the arms are at the lowered position. The arms of the first pair of arms do not share a common axis of rotation with one another. Further, a height of the first pair of arms when at the lowered position is less than the sum of: (a) a thickness of one arm of the first pair of arms; (b) a thickness of the other arm of the first pair of arms; and (c) a height of the base at the distal end. | 2011-10-20 |
20110253956 | Tensioning device for chains - The invention relates to a tensioning device ( | 2011-10-20 |
20110253957 | Compliant motion distribution system - A force distribution arrangement is configured as an array of compliant building blocks, each having a plurality of leg elements having respective leg thickness distribution and leg lengths. The plurality of leg elements are, in some embodiments, of uniform thickness and uniform leg length. The legs are joined to one another at corresponding compliant nodes, and are integrally formed. The array is constrained at a first end thereof, and optionally at a second end thereof. A membrane is arranged to overlie the array, and a control point is affixed to the array and optionally to the membrane that overlies the array. The membrane is formed of a compliant material or fabric. A further array is arranged in some applications at a predetermined orientation with respect to the first array. The arrays have respective actuation force response characteristics to achieve contour upon the application of actuation forces. | 2011-10-20 |
20110253958 | Winch Assembly - The present invention is directed to apparatus for a winch assembly. The winch assembly may be secured to a towing trailer and arranged to assist in loading and unloading cargo from the trailer. The winch assembly may include mechanisms, systems, and features to make the winch assembly easy to assemble and use, increase the service life of the winch assembly, and improve the consistency of the performance of the winch assembly. Embodiments of a winch assembly disclosed include novel drive systems, novel ratchet and pawl systems, novel systems for guiding a winch strap, novel systems for securing the winch assembly to a towing trailer, and a novel frame member for a winch assembly. | 2011-10-20 |
20110253959 | MOBILE JACK WITH LOCKING ASSEMBLY - A mobile jack is provided for a vehicle the where the mobile jack includes a movable base with a plurality of rollers adapted for moving the jack upon a generally horizontal support surface and positioning the jack under a load. The mobile jack may lift loads using a scissor assembly lying in a vertical plane where the scissor assembly connected between the movable base and an upper platform. Additionally, the mobile jack may include at least one hydraulic cylinder for actuating the scissor assembly. The mobile jack may include a safety lock for locking the upper platform in a lifted position where the lock is movable between at least one locked and unlocked position. When the upper platform is in the lifted position, the lock automatically moves to the locked position so that it cooperates with the scissor assembly to prevent the scissor assembly from lowering independent of the cylinders. | 2011-10-20 |
20110253960 | Protective padding - A protective padding assembly for covering a section of chain link fence of the character found in sports venues, such as baseball fields, soccer fields, football fields and the like, wherein the section of chain link fence includes a hingeably connected swinging gate. The protective padding assembly uniquely includes a fence covering section, a gate covering section and an intermediate, wedge shaped portion for covering the gate hinges in a manner that will not interfere with opening and closing the gate. | 2011-10-20 |
20110253961 | Combined Guardrail and Cable Safety Systems - A combined guardrail and cable safety system is disclosed. In one aspect, a safety barrier incorporating the teachings of the present disclosure may include a plurality of cable posts spaced from each other and disposed adjacent to a roadway. At least two cables may be releasably engaged with and supported by the cable posts. The cable posts and the at least two cables may cooperate with each other to prevent a vehicle from leaving the roadway. A plurality of guardrail posts may also spaced from each other and disposed adjacent to the roadway longitudinally spaced from the plurality of cable post. A box beam guardrail beam may be attached to the plurality of guardrail posts. The at least two cables may operably extend from the cable posts to engage respective cable anchor brackets attached to the box beam guardrail beam. | 2011-10-20 |
20110253962 | FENCE AND FENCE BASE - A fence includes a plurality of bases, each base having a body having a floor, a top wall, side walls and end walls defining an interior chamber; a first projection extending from one of the end walls and having a top wall; and a second projection extending from another one of the end walls and having a bottom wall; wherein the bottom wall of the second projection and the top wall of the first projection are both configured to receive a pole and wherein the first projection of a first base of the bases can overlap the second projection of a second base of the bases when the floor of the first and second bases are resting on a common surface. The fence further includes a plurality of poles, each inserted into and maintained erect by one of the bases; and a mesh fencing material tensioned between the poles. | 2011-10-20 |
20110253963 | FENCE FOR USE BY INFANTS OR PETS - The present invention is a device for use by infants or pets which provides a fence for use by infants or pets to confine their activities within a restricted area so that caring of the infants or pets can become easier. The present invention comprises an assembly of fence plates rotatable in relation to each other, wherein the adjacent fence plates are assembled with each other by means of a rotating axle. The fence has a bottom portion which is disposed with fixing members. The present invention assembles a plurality of the fence plates to form a fence. The fence is fixed on the ground by the fixing members to prevent it from sliding. When infants or pets are put into an area restricted by the fence, they can enjoy sufficient rooms for activities. It is also possible to prevent the infants or pets from escaping out of the fence and to confine their activities within a restricted area, thus accidents due to absence of care could be avoided. | 2011-10-20 |
20110253964 | BALUSTER MOUNTING SYSTEM - A baluster mounting system includes removably locking a baluster between oppositely disposed upper and lower surfaces. A first rail connector is fixed relative to either an upper or lower surface. A second rail connector is fixed relative to either the upper or lower surface which is opposite the first rail connector. A baluster is removably locked between the first and second rail connectors. The first rail connector is configured to slidably receive an end of the baluster and the second rail connector is configured to laterally receive an opposite end of the baluster. A locking sleeve is slidable along a portion of the baluster and configured for locking engagement with the second rail connector. | 2011-10-20 |
20110253965 | VERTICAL TRANSISTOR PHASE CHANGE MEMORY - Vertical transistor phase change memory and methods of processing phase change memory are described herein. One or more methods include forming a dielectric on at least a portion of a vertical transistor, forming an electrode on the dielectric, and forming a vertical strip of phase change material on a portion of a side of the electrode and on a portion of a side of the dielectric extending along the electrode and the dielectric into contact with the vertical transistor. | 2011-10-20 |
20110253966 | IONIC-MODULATED DOPANT PROFILE CONTROL IN NANOSCALE SWITCHING DEVICES - A nanoscale switching device is provided, comprising: a first electrode of a nanoscale width; a second electrode of a nanoscale width; an active region disposed between the first and second electrodes, the active region having at least one non-conducting layer comprising an electronically semiconducting or nominally insulating and a weak ionic conductor switching material capable of carrying a species of dopants and transporting the dopants under an electric field; and a source layer interposed between the first electrode and the second electrode and comprising a highly reactive and highly mobile ionic species that reacts with a component in the switching material to create dopants that are capable of drifting through the non-conducting layer under an electric field, thereby controlling dopant profile by ionic modulation. A crossbar array comprising a plurality of the nanoscale switching devices is also provided, along with a process for making at least one nanoscale switching device. | 2011-10-20 |
20110253967 | SWITCHING DEVICE, DRIVE AND MANUFACTURING METHODS FOR THE SAME, INTEGRATED CIRCUIT DEVICE AND MEMORY DEVICE - Provided is a switching device including ion conducting part | 2011-10-20 |
20110253968 | RESISTIVE MEMORY ARRAY USING P-I-N DIODE SELECT DEVICE AND METHODS OF FABRICATION THEREOF - An electronic structure includes a resistive memory device, and a P-I-N diode in operative association with the resistive memory device. A plurality of such electronic structures are used in a resistive memory array, with the P-I-N diodes functioning as select devices in the array. Methods are provided for fabricating such resistive memory device—P-I-N diode structures. | 2011-10-20 |
20110253969 | Narrow Graphene Nanoribbons from Carbon Nanotubes - Disclosed is a method for making graphene nanoribbons (GNRs) by controlled unzipping of structures such as carbon nanotubes (CNTs) by etching (e.g., argon plasma etching) of nanotubes partly embedded in a polymer film. The GNRs have smooth edges and a narrow width distribution (2-20 nm). Raman spectroscopy and electrical transport measurements reveal the high quality of the GNRs. Such a method of unzipping CNTs with well-defined structures in an array will allow the production of GNRs with controlled widths, edge structures, placement and alignment in a scalable fashion for device integration. GNRs may be formed from nanostructures in a controlled array to form arrays of parallel or overlapping structures. Also disclosed is a method in which the CNTs are in a predetermined pattern that is carried over and transferred to a substrate for forming into a semiconductor device. | 2011-10-20 |
20110253970 | Transparent nanowire transistors and methods for fabricating same - Disclosed are fully transparent nanowire transistors having high field-effect mobilities. The fully transparent nanowire transistors disclosed herein include one or more nanowires, a gate dielectric prepared from a transparent inorganic or organic material, and transparent source, drain, and gate contacts fabricated on a transparent substrate. The fully transparent nanowire transistors disclosed herein also can be mechanically flexible. | 2011-10-20 |
20110253971 | Photo-Receptor for Electro-Magnetic Radiation Collection - An underwater data transmission system including arrays of nano-meter scaled photon emitters and sensors on an outer surface of an underwater platform. For the emitters, a laser is pulsed to correlate with data packets, providing a beam of photons at a prescribed frequency. Nano-scaled collecting lenses channel the incoming photons to photo-receptors located at a focal plane for the frequency at the base of each lens. A coating on the lenses absorbs photons at the frequency that are not aligned with the longitudinal axes of the lenses or tubes. Nano-wires connect the photo-receptors to a light intensity integrator. The integrator integrates the intensity over a surface area. The output of the integrator is fed to a signal processor to track and process the arriving digital packets. | 2011-10-20 |
20110253972 | LIGHT-EMITTING DEVICE BASED ON STRAIN-ADJUSTABLE InGaAIN FILM - A method for fabricating a semiconductor light-emitting device based on a strain adjustable multilayer semiconductor film is disclosed. The method includes epitaxially growing a multilayer semiconductor film on a growth substrate, wherein the multilayer semiconductor film comprises a first doped semiconductor layer, a second doped semiconductor layer, and a multi-quantum-wells (MQW) active layer; forming an ohmic-contact metal layer on the first doped semiconductor layer; depositing a metal substrate on top of the ohmic-contact metal layer, wherein the density and/or material composition of the metal substrate is adjustable along the vertical direction, thereby causing the strain in the multilayer semiconductor film to be adjustable; etching off the growth substrate; and forming an ohmic-electrode coupled to the second doped semiconductor layer. | 2011-10-20 |
20110253973 | Semiconductor layer - A light-emitting element includes a β-Ga | 2011-10-20 |
20110253974 | NITRIDE SEMICONDUCTOR - To provide a high-quality nitride semiconductor ensuring high emission efficiency of a light-emitting element fabricated. In the present invention, when obtaining a nitride semiconductor by sequentially stacking a one conductivity type nitride semiconductor part, a quantum well active layer structure part, and a another conductivity type nitride semiconductor part opposite the one conductivity type, the crystal is grown on a base having a nonpolar principal nitride surface, the one conductivity type nitride semiconductor part is formed by sequentially stacking a first nitride semiconductor layer and a second nitride semiconductor layer, and the second nitride semiconductor layer has a thickness of 400 nm to 20 mm and has a nonpolar outermost surface. By virtue of selecting the above-described base for crystal growth, an electron and a hole, which are contributing to light emission, can be prevented from spatial separation based on the QCSE effect and efficient radiation is realized. Also, by setting the thickness of the second nitride semiconductor layer to an appropriate range, the nitride semiconductor surface can avoid having extremely severe unevenness. | 2011-10-20 |
20110253975 | Semiconductor Material Doping - A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. Additionally, a target doping level for the quantum well and/or adjacent barrier can be selected to facilitate a real space transfer of holes across the barrier. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity and/or actual doping level(s) correspond to the relevant target(s). | 2011-10-20 |
20110253976 | NITRIDE-BASED SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A nitride-based semiconductor light-emitting device | 2011-10-20 |
20110253977 | NITRIDE-BASED SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A nitride-based semiconductor light-emitting device | 2011-10-20 |
20110253978 | LIGHT EMITTING DIODE AND FABRICATION METHOD THEREOF - A light emitting diode (LED) and a method for fabricating the same, capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1−x)N and a range of x is given by 02011-10-20 | |
20110253979 | LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - A light-emitting device and the method for making the same is disclosed. The light-emitting device is a semiconductor device, comprising a growth substrate, an n-type semiconductor layer, a quantum well active layer and a p-type semiconductor layer. It combines the holographic and the quantum well interdiffusion (QWI) to form a photonic crystal light-emitting device having a dielectric constant of two-dimensional periodic variation or a material composition of two-dimensional periodic variation in the quantum well active layer. The photonic crystal light-emitting devices can enhance the internal efficiency and light extraction efficiency. | 2011-10-20 |
20110253980 | Source/Drain Technology for the Carbon Nano-tube/Graphene CMOS with a Single Self-Aligned Metal Silicide Process - Electronic devices having carbon-based materials and techniques for making contact to carbon-based materials in electronic devices are provided. In one aspect, a device is provided having a carbon-based material; and at least one electrical contact to the carbon-based material comprising a metal silicide, germanide or germanosilicide. The carbon-based material can include graphene or carbon nano-tubes. The device can further include a segregation region, having an impurity, separating the carbon-based material from the metal silicide, germanide or germanosilicide, wherein the impurity has a work function that is different from a work function of the metal silicide, germanide or germanosilicide. A method for fabricating the device is also provided. | 2011-10-20 |
20110253981 | METHOD OF MANUFACTURING A VERTICAL TFET - The present disclosure provides a method for manufacturing at least one nanowire Tunnel Field Effect Transistor (TFET) semiconductor device. The method comprises providing a stack comprising a layer of channel material with on top thereof a layer of sacrificial material, removing material from the stack so as to form at least one nanowire from the layer of channel material and the layer of sacrificial material, and replacing the sacrificial material in the at least one nanowire by heterojunction material. A method according to embodiments of the present disclosure is advantageous as it enables easy manufacturing of complementary TFETs. | 2011-10-20 |
20110253982 | VERTICAL GROUP III-V NANOWIRES ON SI, HETEROSTRUCTURES, FLEXIBLE ARRAYS AND FABRICATION - Embodiments of the invention provide a method for direct heteroepitaxial growth of vertical III-V semiconductor nanowires on a silicon substrate. The silicon substrate is etched to substantially completely remove native oxide. It is promptly placed in a reaction chamber. The substrate is heated and maintained at a growth temperature. Group III-V precursors are flowed for a growth time. Preferred embodiment vertical Group III-V nanowires on silicon have a core-shell structure, which provides a radial homojunction or heterojunction. A doped nanowire core is surrounded by a shell with complementary doping. Such can provide high optical absorption due to the long optical path in the axial direction of the vertical nanowires, while reducing considerably the distance over which carriers must diffuse before being collected in the radial direction. Alloy composition can also be varied. Radial and axial homojunctions and heterojunctions can be realized. Embodiments provide for flexible Group III-V nanowire structures. An array of Group III-V nanowire structures is embedded in polymer. A fabrication method forms the vertical nanowires on a substrate, e.g., a silicon substrate. Preferably, the nanowires are formed by the preferred methods for fabrication of Group III-V nanowires on silicon. Devices can be formed with core/shell and core/multi-shell nanowires and the devices are released from the substrate upon which the nanowires were formed to create a flexible structure that includes an array of vertical nanowires embedded in polymer. | 2011-10-20 |
20110253983 | SIDEWALL GRAPHENE DEVICES FOR 3-D ELECTRONICS - A device is provided that includes a structure having a sidewall surface, a layer of material provided on the sidewall surface, and a device structure provided in contact with the layer of material. Fabrication techniques includes a process that includes forming a structure having a sidewall surface, forming a layer of material on the sidewall surface, and forming a device structure in contact with the layer of material, where the device structure and the layer of material are components of a device. | 2011-10-20 |
20110253984 | ELECTRONIC GRADE SILK SOLUTION, OTFT AND MIM CAPACITOR WITH SILK PROTEIN AS INSULATING MATERIAL AND METHODS FOR MANUFACTURING THE SAME - An electronic grade silk solution, an organic thin film transistor (OTFT) and a metal-insulator-metal capacitor with silk protein as the insulating material manufactured by use of the silk solution, and methods for manufacturing the same are disclosed. The OTFT of the present invention comprises: a substrate; a gate disposed on the substrate; a gate insulating layer containing silk protein, which is disposed on the substrate and covers the gate; an organic semiconductor layer; and a source and a drain, wherein the organic semiconductor layer, the source and the drain are disposed over the gate insulating layer. | 2011-10-20 |
20110253985 | TRIARYLAMINE COMPOUNDS FOR ELECTRONIC APPLICATIONS - This invention relates to triarylamine compounds that are useful in electronic applications. It also relates to electronic devices in which the active layer includes such a compound. | 2011-10-20 |
20110253986 | TRIARYLAMINE COMPOUNDS FOR ELECTRONIC APPLICATIONS - This invention relates to triarylamine compounds that are useful in electronic applications. It also relates to electronic devices in which the active layer includes such a compound. | 2011-10-20 |
20110253987 | POLYSILICON LAYER, METHOD OF PREPARING THE POLYSILICON LAYER, THIN FILM TRANSISTOR USING THE POLYSILICON LAYER, AND ORGANIC LIGHT EMITTING DISPLAY DEVICE INCLUDING THE THIN FILM TRANSISTOR - A method of crystallizing a silicon layer. An amorphous silicon layer is formed on a buffer layer on a substrate. A catalyst metal layer is formed on the amorphous silicon layer to have a density of from about 10 | 2011-10-20 |
20110253988 | BRIDGED BENZIMIDAZOLE-CARBENE COMPLEXES AND USE THEREOF IN OLEDS - The present invention concerns a metal-carbene complex of the general formula (I) | 2011-10-20 |
20110253989 | ORGANIC ELECTRONIC CIRCUIT - The invention concerns an organically electronic circuit ( | 2011-10-20 |
20110253990 | ORGANIC ELECTROLUMINESCENCE DEVICE AND PRODUCTION METHOD THEREOF - Disclosed is an organic electroluminescence device which can be stably produced by a wet process and exhibits enhanced external quantum efficiency and reduced coating unevenness and a production method thereof. Specifically, disclosed is a method of producing the organic electroluminescence device comprising at least a layer, which is formed by a wet process comprising of coating a solution of an organic material dissolved in a solvent to form a liquid layer, followed by removal of the solvent by blowing air to form the layer, wherein the relative drying rate of the solvent to butyl acetate is from 1 to 1000, (based on the drying rate of butyl acetate being 100), the thickness of the formed liquid layer is from 1 to 100 μm, a air-blowing rate is from 0.1 to 5 m/s and the time between completion of coating and start of blowing is from 0 to 60 sec. | 2011-10-20 |
20110253991 | ORGANIC ELECTROLUMINESCENCE DEVICE - [Problem to be Solved] To provide an organic electroluminescence device with heat resistance capable of being driven by a low voltage. | 2011-10-20 |
20110253992 | ORGANIC PHOTOSENSITIVE DEVICES USING SUBPHTHALOCYANINE COMPOUNDS - An organic photosensitive optoelectronic device includes an anode, a cathode, and a donor-acceptor heterojunction between the anode and the cathode, the heterojunction including a donor-like material and an acceptor-like material, wherein at least one of the donor-like material and the acceptor-like material includes a subphthalocyanine, a subporphyrin, and/or a subporphyrazine compound, wherein the subporphyrin or subporphyrazine compound includes boron. | 2011-10-20 |
20110253993 | POLYVINYL PYRROLE HOST MATERIAL, LUMINESCENT LAYER COMPRISING THE SAME, AND ORGANIC ELECTROLUMINESCENT DEVICE COMPRISING THE LUMINESCENT LAYER - Provided are a polyvinyl pyrrole host material emitting highly efficient phosphorescence, a luminescent layer using the material, and an organic electroluminescent display device. The polyvinyl pyrrole host material shows highly efficient luminescence having improved energy transfer, and thus is useful for an organic electroluminescent display device and other various light emitting devices. | 2011-10-20 |
20110253994 | COMPOUND FOR ORGANIC OPTOELECTRONIC DEVICE, ORGANIC LIGHT EMITTING DIODE INCLUDING THE SAME AND DISPLAY DEVICE INCLUDING THE SAME - A compound for an organic optoelectronic device, an organic optoelectronic device including the same, and a display device including the same, the compound for an organic optoelectronic device being represented by the following Chemical Formula 1: | 2011-10-20 |
20110253995 | MATERIAL FOR ORGANIC ELECTROLUMINESCENCE DEVICE AND ORGANIC ELECTROLUMINESCENCE DEVICE USING THE SAME - Provided are an organic electroluminescence device, which shows high luminous efficiency, is free of any pixel defect, and has a long lifetime, and a material for an organic electroluminescence device for realizing the device. The material for an organic electroluminescence device is a compound having a π-conjugated heteroacene skeleton crosslinked with a carbon atom, nitrogen atom, oxygen atom, or sulfur atom. The organic electroluminescence device has one or more organic thin film layers including a light emitting layer between a cathode and an anode, and at least one layer of the organic thin film layers contains the material for an organic electroluminescence device. | 2011-10-20 |
20110253996 | COMPOSITE DIELECTRIC MATERIAL DOPED WITH RARE EARTH METAL OXIDE AND MANUFACTURING METHOD THEREOF - A composite dielectric material doped with rare earth metal oxide and a manufacturing method thereof are provided. The composite dielectric material is doped with nano-crystalline rare metal oxide which is embedded in silicon dioxide glass matrix, and the composite dielectric material of the nano-crystalline rare metal oxide and the silicon dioxide glass matrix is synthesized by the manufacturing method using sol-gel route. The dielectric value of the glass composite dielectric material is greater than that of pure rare metal oxide or that of silicon dioxide. In presence of magnetic field, the dielectric value of the composite dielectric material is substantially enhanced compared with that of the composite dielectric material at zero field. | 2011-10-20 |
20110253997 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a semiconductor device using a p-type oxide semiconductor layer and a method of manufacturing the same. The device includes the p-type oxide layer formed of at least one oxide selected from the group consisting of a copper(Cu)-containing copper monoxide, a tin(Sn)-containing tin monoxide, a copper tin oxide containing a Cu—Sn alloy, and a nickel tin oxide containing a Ni—Sn alloy. Thus, transparent or opaque devices are easily developed using the p-type oxide layer. Since an oxide layer that is formed using a low-temperature process is applied to a semiconductor device, the manufacturing process of the semiconductor device is simplified and manufacturing costs may be reduced. | 2011-10-20 |
20110253998 | Stability Enhancements in Metal Oxide Semiconductor Thin Film Transistors - A plasma hydrogenated region in the dielectric layer of a semiconductor thin film transistor (TFT) structure improves the stability of the TFT. The TFT is a multilayer structure including an electrode, a dielectric layer disposed on the electrode, and a metal oxide semiconductor on the dielectric. Exposure of the dielectric layer to a hydrogen containing plasma prior to deposition of the semiconductor produces a plasma hydrogenated region at the semiconductor-dielectric interface. The plasma hydrogenated region incorporates hydrogen which decreases in concentration from semiconductor/dielectric interface into the bulk of one or both of the dielectric layer and the semiconductor layer. | 2011-10-20 |
20110253999 | SEMICONDUCTOR WAFER HAVING SCRIBE LINE TEST MODULES INCLUDING MATCHING PORTIONS FROM SUBCIRCUITS ON ACTIVE DIE - A semiconductor wafer includes a plurality of integrated circuit (IC) die areas for accommodating IC die that include at least a first subcircuit having at least one matched component portion that includes at least two matched devices. The first subcircuit is arranged in a layout on the IC die. A plurality of scribe line areas having a scribe line width dimension are interposed between the plurality of IC die areas. At least one subcircuit-based test module (TM) is positioned within the scribe line areas, wherein the subcircuit-based TMs implement a schematic for the first subcircuit with a TM layout that copies the layout on the IC die for at least the two matched devices in the matched component portion and alters the layout on the IC die for a portion of the first subcircuit other than the matched devices in matched component portion to fit the TM layout of the first subcircuit within the scribe line width dimension. | 2011-10-20 |
20110254000 | SEMICONDUCTOR CHIP EMBEDDED WITH A TEST CIRCUIT - A semiconductor chip includes a semiconductor chip body having a first surface on which pad parts are formed and an opposing second surface. Through-electrodes may be connected to the pad parts and formed to pass through the semiconductor chip body. Determination units may be connected to the through-electrodes and may be enabled to determine whether the pad parts and the through-electrodes are electrically connected with each other. | 2011-10-20 |
20110254001 | HIGH PERFORMANCE SUB-SYSTEM DESIGN AND ASSEMBLY - A multiple integrated circuit chip structure provides interchip communication between integrated circuit chips of the structure with no ESD protection circuits and no input/output circuitry. The interchip communication is between internal circuits of the integrated circuit chips. The multiple integrated circuit chip structure has an interchip interface circuit to selectively connect internal circuits of the integrated circuits to test interface circuits having ESD protection circuits and input/output circuitry designed to communicate with external test systems during test and burn-in procedures. The multiple interconnected integrated circuit chip structure has a first integrated circuit chip mounted to one or more second integrated circuit chips to physically and electrically connect the integrated circuit chips to one another. The first integrated circuit chips have interchip interface circuits connected each other to selectively communicate between internal circuits of the each other integrated circuit chips or test interface circuits, connected to the internal circuits of each integrated circuit chip to provide stimulus and response to said internal circuits during testing procedures. A mode selector receives a signal external to the chip to determine whether the communication is to be with one of the other connected integrated circuit chips or in single chip mode, such as with the test interface circuits. ESD protection is added to the mode selector circuitry. | 2011-10-20 |
20110254002 | DISPLAY SUBSTRATE AND METHOD OF FABRICATING THE SAME - A display substrate is provided that can prevent the opening of an upper conduction layer. The display substrate comprises a semiconductor layer pattern formed on a substrate, a data interconnection pattern formed on the semiconductor layer pattern, a protection layer formed on the substrate and the data interconnection pattern, contact holes formed on the substrate to expose at least a portion of an upper surface of the semiconductor pattern and at least a portion of an upper surface of the data interconnection pattern, and contact electrodes formed in the contact holes to be in contact with the exposed upper surfaces of the data interconnection pattern and the semiconductor layer pattern. | 2011-10-20 |
20110254003 | ORGANIC THIN FILM TRANSISTOR MANUFACTURING METHOD AND ORGANIC THIN FILM TRANSISTOR - Provided are an organic TFT manufacturing method whereby flow of ink into an unnecessary area can be suppressed and excellent characteristics and high reliability can be obtained, and an organic TFT. The organic TFT manufacturing method comprises a step of providing a source electrode and a drain electrode on a base member; a step of providing a bank layer, which has an opening on a channel between the source electrode and the drain electrode, an opening on a predetermined area of the base member, and a groove or grooves around the opening on the predetermined area, which surround the opening on the predetermined area; and a step of supplying an organic semiconductor solution to the opening of the bank layer formed on the channel to form an organic semiconductor layer. | 2011-10-20 |
20110254004 | Semiconductor Device and Manufacturing Method Thereof - A semiconductor device manufactured utilizing an SOI substrate, in which defects due to an end portion of an island-shaped silicon layer are prevented and the reliability is improved, and a manufacturing method thereof. The following are included: an SOI substrate in which an insulating layer and an island-shaped silicon layer are stacked in order over a support substrate; a gate insulating layer provided over one surface and a side surface of the island-shaped silicon layer; and a gate electrode which is provided over the island-shaped silicon layer with the gate insulating layer interposed therebetween. The gate insulating layer is formed such that the dielectric constant in the region which is in contact with the side surface of the island-shaped silicon layer is lower than that over the one surface of the island-shaped silicon layer. | 2011-10-20 |
20110254005 | THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - In an exemplary embodiment, a thin film transistor array panel includes: a substrate; a gate line on the substrate; a gate driver on a peripheral area of the substrate; a gate pad formed on the substrate and connecting the gate line and the gate driver; a gate insulating layer formed on the gate line and the gate pad; a data line formed on the gate insulating layer and including a source electrode and a facing drain electrode; a height controlling member corresponding to the gate pad and formed on the gate insulating layer; a passivation layer on the gate insulating layer, the data line, the drain electrode, the gate pad, and the height controlling member; an insulating layer on the passivation layer; a pixel electrode formed on the insulating layer and connected to the drain electrode; and contact assistants connected to the gate pad and the height controlling member. | 2011-10-20 |
20110254006 | DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - A display device in which a plurality of gate wires and a plurality of drain wires that intersect the gate wires are provided, and thin film transistors connected to the gate wires and the drain wires are formed for respective pixel regions. At least one of the gate wires, the drain wires, and lead wires drawn from the gate wires or the drain wires is formed of a light-transmitting patterned conductive film. The light-transmitting patterned conductive film is formed of at least a first light-transmitting patterned conductive film, and a second light-transmitting patterned conductive film laminated on the first light-transmitting patterned conductive film. The second light-transmitting patterned conductive film is formed of a conductive film for coating only the surface of the first light-transmitting patterned conductive film including its side wall surface. | 2011-10-20 |
20110254007 | THIN-FILM TRANSISTOR SUBSTRATE, METHOD OF MANUFACTURING THE SAME AND DISPLAY APPARATUS HAVING THE SAME - In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform. | 2011-10-20 |
20110254008 | Semiconductor Device and Manufacturing Method Thereof - By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer. | 2011-10-20 |
20110254009 | Semiconductor Device and the Fabricating Method Thereof - The object is to pattern extremely fine integrated circuits by forming fine contact holes. The dry etching method is employed to form contact holes to pattern a wiring ( | 2011-10-20 |
20110254010 | Wide Band-Gap MOSFETs Having a Heterojunction Under Gate Trenches Thereof and Related Methods of Forming Such Devices - Semiconductor switching devices include a first wide band-gap semiconductor layer having a first conductivity type. First and second wide band-gap well regions that have a second conductivity type that is opposite the first conductivity type are provided on the first wide band-gap semiconductor layer. A non-wide band-gap semiconductor layer having the second conductivity type is provided on the first wide band-gap semiconductor layer. First and second wide band-gap source/drain regions that have the first conductivity type are provided on the first wide band-gap well region. A gate insulation layer is provided on the non-wide band-gap semiconductor layer, and a gate electrode is provided on the gate insulation layer. | 2011-10-20 |
20110254011 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a gate line, a gate insulation layer, a data line, a switching element, a protection insulation layer, a gate pad portion and a data pad portion. The gate insulation layer is disposed on the gate line. The switching element is connected to the gate line and the data line. The protection insulation layer is disposed on the switching element. The gate pad portion includes a first gate pad electrode which makes contact with an end portion of the gate line through a first hole formed through the gate insulation layer, and a second gate pad electrode which makes contact with the first gate pad electrode through a second hole formed through the protection insulation layer. The data pad portion includes a data pad electrode which makes contact with an end portion of the data line through a third hole formed through the protection insulation layer. | 2011-10-20 |
20110254012 | Ultra high voltage GaN ESD protection device - In an ultra high voltage lateral GaN structure having a 2DEG region extending between two terminals, an isolation region is provided between the two terminals to provide for reversible snapback. | 2011-10-20 |
20110254013 | HYBRID ORIENTATION ACCUMULATION MODE GAA CMOSFET - A hybrid orientation accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of p-type Si(110) and n-type Si(100), respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. The device structure according to the prevent invention is quite simple, compact and highly integrated. In an accumulation mode, current flows through the overall racetrack-shaped channel. The disclosed device results in high carrier mobility. Meanwhile polysilicon gate depletion and short channel effects are prevented, and threshold voltage is increased. | 2011-10-20 |
20110254014 | NITRIDE SEMICONDUCTOR WAFER AND NITRIDE SEMICONDUCTOR DEVICE - There is stably provided a nitride semiconductor wafer having a nitride semiconductor layer with high insulating properties, wherein a semi-insulating nitride semiconductor layer is provided on an insulating substrate, with a resistivity of 10 MΩcm or more and 100 MΩcm or less, and a film thickness of 0.1 μm or more and 1.5 μm or less. | 2011-10-20 |
20110254015 | METHOD FOR IMPROVING DEVICE PERFORMANCE USING EPITAXIALLY GROWN SILICON CARBON (SiC) OR SILICON-GERMANIUM (SiGe) - A semiconductor substrate including a field effect transistor (FET) and a method of producing the same wherein a stressor is provided in a recess before the source/drain region is formed. The device has an increased carrier mobility in the channel region adjacent to the gate electrode. | 2011-10-20 |
20110254016 | VERTICAL JFET LIMITED SILICON CARBIDE METAL-OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS - Silicon carbide metal-oxide semiconductor field effect transistors (MOSFETs) may include an n-type silicon carbide drift layer, a first p-type silicon carbide region adjacent the drift layer and having a first n-type silicon carbide region therein, an oxide layer on the drift layer, and an n-type silicon carbide limiting region disposed between the drift layer and a portion of the first p-type region. The limiting region may have a carrier concentration that is greater than the carrier concentration of the drift layer. | 2011-10-20 |
20110254017 | MANUFACTURING METHOD FOR CRYSTAL, CRYSTAL, AND SEMICONDUCTOR DEVICE - A manufacturing method for a crystal, a crystal, and a semiconductor device capable of growing a high-quality crystal are provided. The manufacturing method for a crystal of the present invention includes the steps of: preparing a seed crystal having a frontside surface and a backside surface opposite to the frontside surface; fixing the backside surface of the seed crystal to a pedestal; and growing the crystal on the frontside surface of the seed crystal. In the step of fixing, the seed crystal is fixed to the pedestal by coating the backside surface of the seed crystal with a Si layer or disposing a Si layer on the backside surface of the seed crystal, and carbonizing the Si layer. | 2011-10-20 |
20110254018 | Semiconductor Switching Arrangement Having a Normally on and a Normally off Transistor - A semiconductor switching arrangement includes a normally on semiconductor component of a first conduction type and a normally off semiconductor component of a second conduction type which is the complement of the first conduction type. A load path of the normally off semiconductor component is connected in series with the load path of the normally on semiconductor component. A first actuation circuit connected between the control connection of the normally on semiconductor component and a load path connection of the normally on semiconductor component. The load path connection of the normally on semiconductor component is arranged between the normally on and normally off semiconductor components. A second actuation circuit is connected between the control connection of the normally off semiconductor component and a load path connection of the normally off semiconductor component. The load path connection of the normally off semiconductor component is arranged between the normally on and normally off semiconductor components. | 2011-10-20 |
20110254019 | ADAPTED SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor light-emitting device with light-modulating function and a method of fabrication the same are provided. The semiconductor light-emitting device as provided includes a light-emitting layer and a super-paramagnetic layer. The light-emitting layer functions for emitting a first light. In particular, a portion or most of the first light is modulated by the super-paramagnetic layer into a second light when the first light passes through the super-paramagnetic layer. In some embodiments, the semiconductor light-emitting device is designed in such a way that a portion of the first light, which is not modulated into the second light, blends with the second light into a third light, e.g., a white light. | 2011-10-20 |
20110254020 | DEVICE FORMED HARD MASK AND ETCH STOP LAYER - A method of etching a device in one embodiment includes providing a silicon carbide substrate, forming a silicon nitride layer on a surface of the silicon carbide substrate, forming a silicon carbide layer on a surface of the silicon nitride layer, forming a silicon dioxide layer on a surface of the silicon carbide layer, forming a photoresist mask on a surface of the silicon dioxide layer, and etching the silicon dioxide layer through the photoresist mask. | 2011-10-20 |
20110254021 | LIGHT EMITTING DIODE - A light emitting diode includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode, a transparent conductive layer, a second electrode and a metal grating. The first semiconductor layer, the active layer, and the second semiconductor layer are orderly stacked on the substrate. The first electrode is electrically connected to the first semiconductor layer. The transparent conductive layer is located on a surface of the second semiconductor layer away from the substrate. The second electrode is electrically connected to the transparent conductive layer. The metal grating is located on a surface of the transparent conductive layer away from the substrate. The metal grating is a two-dimensional array of a plurality of metal micro-structures. | 2011-10-20 |
20110254022 | LIGHT EMITTING DEVICE - There is presented a light emitting device, having plural light emitting elements disposed on a substrate, in which a protection element, such as a zener diode, can be disposed at an appropriate position. The light emitting device includes: a substrate; a light emitting section having plural light emitting elements disposed in a mounting area on the substrate; a positive electrode and negative electrode each having a pad section and wiring section to apply voltage to the light emitting section through the wiring sections; a protection element disposed at one of the positive electrode and negative electrode and electrically connected with the other one electrode; and a light reflecting resin formed on the substrate such as to cover at least the wiring sections and the protection element, wherein the wiring sections are formed along the periphery of the mounting area such that one end portions thereof are adjacent to each other. | 2011-10-20 |
20110254023 | LUMINAIRE AND LIGHT-EMITTING APPARATUS WITH LIGHT-EMITTING DEVICE - According to one embodiment, the light-emitting apparatus is provided with a substrate, a plurality of light-emitting devices, and a phosphor layer. The plurality of light-emitting devices are mounted on the substrate. The phosphor layer is formed of a translucent resin containing a phosphor and includes a phosphor portion that is formed in a convex shape and covers a predetermined number of the light-emitting device. Bases of the adjacent phosphor portions are formed by being linked with one another. | 2011-10-20 |
20110254024 | Circuit Structure of Package Carrier and Multi-Chip Package - A multi-chip package comprises a plurality of chip pads and a plurality of LED chips. The chip pads are arranged in an M×N array, M and N each a positive integer greater than 1. A peripheral area of each chip pad comprises a respective first bonding pad, a respective second bonding pad, and a respective third bonding pad arranged in sequence in a clockwise direction. A first orientation of the respective first to third bonding pads in a first row of the N rows differs from a second orientation of the respective first to third bonding pads in a second row of the N rows by 90 degrees. Each of the LED chips is disposed on a respective one of the chip pads and electrically connected to two of the respective first to third bonding pads on a same side of the respective LED chip. | 2011-10-20 |
20110254025 | Light-Emitting Diode Packaging Structure and Module and Assembling Method Thereof - A light-emitting diode packaging structure comprises a light-emitting diode and first and second metal plates on which the light-emitting diode is mounted. The light-emitting diodes includes first and second electrode leads, the second electrode lead having first and second contact surfaces on an outer edge of the second electrode lead. The first metal plate includes at least one clamping portion that clamps and fixes the first electrode lead on the first metal plate. The second metal plate includes at least first and second clamping portions. The first contact surface of the second electrode lead contacts the first clamping portion, and the second contact surface of the second electrode lead contacts the second clamping portion, such that the light-emitting diode is fixed on the second metal plate in at least two dimensions parallel to a primary surface of the second metal plate on which the light-emitting diodes is mounted. | 2011-10-20 |
20110254026 | SURFACE MOUNTED LED PACKAGE - An LED device and LED module are provided. The LED device is coupled to a lead frame with a first plane and a second plane opposite to the first plane, the lead frame having a LED chip disposed on the first plane. The LED device includes a reflection cup structure disposed on the lead frame, a lens structure and at least one fixing structure. The LED chip is disposed in the reflection cup structure and electrically connected to the first plane of the lead frame. The lens structure covers the first plane and the second plane of the lead frame. The fixing structure and the fixing structures are formed integrally and cover the lead frame cooperatively. | 2011-10-20 |
20110254027 | METHOD FOR CONTROLLING COLOR ACCURACY IN A LIGHT-EMITTING SEMICONDUCTOR-BASED DEVICE AND PROCESS FOR PRODUCING A LIGHT-EMITTING SEMICONDUCTOR-BASED DEVICE WITH CONTROLLED COLOR ACCURACY - A method for controlling color accuracy of a light-emitting semiconductor-based device, and a process for producing a light-emitting semiconductor-based device with desired color accuracy is disclosed. The color accuracy is controlled by defining a desired color accuracy of a light produced by mixing colors emitted by at least two light sources over a first range of operating conditions; determining characteristics of the light as a function of operating conditions; and establishing desired light characteristics of the at least two light sources over a second range of operating condition in accordance with the step of defining and the step of determining. | 2011-10-20 |
20110254028 | Light Emitting Diode - The present disclosure provides a light emitting diode. The light emitting diode includes a substrate having a first surface and an opposite second surface. At least one light emitting diode chip is disposed on the first surface of the ceramic substrate. A plurality of thermal metal pads are disposed on the second surface of the substrate, wherein the thermal metal pads are electrically isolated from the at least one light emitting diode chip. | 2011-10-20 |
20110254029 | LED MODULE AND METHOD OF MANUFACTRURING THE SAME - An exemplary LED module includes a base, an anisotropic conductive film on the base, multiple LED dies on the anisotropic conductive film, multiple first electrodes between the base and the anisotropic conductive film, and multiple second electrodes on the LED dies. The LED dies are arranged in multiple rows by multiple columns. The first electrodes each are elongated and parallel to each other. The second electrodes each are elongated and parallel to each other. The LED dies of each column are connected to one of the first electrodes electrically. Each second electrode is electrically coupled to the LED dies of one row. | 2011-10-20 |
20110254030 | LIQUID REFLECTOR - A light emitting diode (LED) package is disclosed which has an integral reflector for improving performance. The package includes a substrate for supporting the LED. A frame is formed on the top surface of the substrate surrounding the LED. During fabrication, a liquid compound is dispensed into the frame in a manner to surround the LED without covering the active area of the LED. The liquid compound includes particles for scattering light. The top surface of the liquid compound is curved due to surface tension. The curvature remains after the compound is cured. In a preferred embodiment, an encapsulating material is used to cover the LED and the compound. The reflector functions to increase the light output from the LED package. | 2011-10-20 |
20110254031 | LIGHT-EMITTING DEVICES WITH VERTICAL LIGHT-EXTRACTION MECHANISM - A light-emitting device comprises a lattice structure to minimize the horizontal waveguide effect by reducing light traveling distance in the light-absorption medium of the light-emitting devices, and to enhance light extraction from the light-emitting layer. The lattice structure includes sidewalls and/or rods embedded in the light-absorption medium and dividing the light-absorption medium into a plurality of area units. The area units are completely isolated or partially separated from each other by the sidewalls. Also provided is a method of fabricating a light-emitting device that comprises a lattice structure, which lattice structure includes sidewalls and/or rods embedded in the light-absorption medium and dividing the light-absorption medium into a plurality of area units. | 2011-10-20 |
20110254032 | Electronic Assembly - An electronic assembly includes a first substrate and a second substrate, a hole through the first substrate, the second substrate having a trace with an indentation, an electronic device mounted over the indentation in the trace, and the first substrate is attached to the second substrate such that the electronic device is positioned within the hole through the first substrate. | 2011-10-20 |
20110254033 | Organic Light-Emitting Diode Device with High Color Rendering - The present invention discloses an organic light-emitting diode (OLED) device with high color rendering comprising a base plate, a first conductive layer, a plurality of white light emitting layers, and a second conductive layer, wherein the spectra of the white light emitting layers possess characteristics of complementarities so as to enhance the color rendering of the emitted white light, and at least one carrier regulating layer is selectively disposed between every two white light emitting layers so as to increase the emitting efficiency and color rendering. | 2011-10-20 |
20110254034 | NANOSTRUCTURED LED - The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance. | 2011-10-20 |
20110254035 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND ILLUMINATION SYSTEM - Disclosed are a light emitting device, a light emitting device package, and an illumination system. The light emitting device includes a substrate; a light emitting structure layer including a first conductive type semiconductor layer formed on the substrate and having first and second upper surfaces, in which the second upper surface is closer to the substrate than the first upper surface, an active layer on the first conductive type semiconductor layer, and a second conductive type semiconductor layer on the active layer; a second electrode on the second conductive type semiconductor layer; and at least one first electrode extending at least from the second upper surface of the first conductive type semiconductor layer to a lower surface of the substrate by passing through the substrate. | 2011-10-20 |
20110254036 | LIGHT EMITTING DEVICE, METHOD OF MANUFACTURING THE SAME, LIGHT EMITTING DEVICE PACKAGE, AND LIGHTING SYSTEM - Disclosed is a light emitting device. The light emitting device includes a light emitting structure layer including a first conductive type semiconductor layer, an active layer on the first conductive type semiconductor layer, and a second conductive type semiconductor layer on the active layer, a first light extracting structure formed on an outer portion of the first conductive type semiconductor layer and having a plurality of side surfaces and a plurality of upper surfaces formed in a step structure, and a transmissive layer on the first light extracting structure of the first conductive type semiconductor layer. | 2011-10-20 |