41st week of 2011 patent applcation highlights part 17 |
Patent application number | Title | Published |
20110248721 | PARTIAL DISCHARGE MONITORING METHOD AND SYSTEM - The invention relates to a method and system of monitoring partial discharges occurring in an electrical system, and to a method of measuring or analyzing partial discharges occurring in an electrical system. The method comprising receiving a signal or impulse, or information associated therewith, from the electrical system; breaking the received signal or impulse into predefined frequency components; and displaying a peak of the received signal or impulse on a scatter plot with other peaks associated with similar predefined frequency components. | 2011-10-13 |
20110248722 | Diagnostic Circuit and Method of Testing a Circuit - A diagnostic circuit is configured for connecting to a unit under test that has a load and a sinusoidal source. The diagnostic circuit includes a voltage sensing device that has an input for sensing a signal, a first terminal for connecting to the load, a second terminal for connecting to the sinusoidal source, and a relay connected between the first and second terminals for connecting the sinusoidal source to the load. Clamping diodes are provide for clamping a sinusoidal signal and include a first clamping diode connected between a D/C voltage source and the input and a second clamping diode connected between ground and the input. A resistor is connected between the D/C voltage source and the first terminal. The diagnostic circuit verifies the operational functionality of the load, related wiring and connections. | 2011-10-13 |
20110248723 | CAPACITIVE SENSOR HAVING CALIBRATION MECHANISM AND CAPACITIVE SENSING METHOD - A capacitive sensor with a calibration mechanism is provided. The capacitive sensor includes a set of sensing capacitors to generate a capacitance variation, a subtraction circuit and an integration circuit. The subtraction circuit includes a first capacitor array to generate offset-adjusting charges and a second capacitor array to generate subtraction charges according to an initial offset and a sensitivity of the sensing capacitors respectively. The integration circuit includes two input ends, wherein one of them is connected to the sensing capacitors and the subtraction circuit. During a sensing period, the integration circuit performs integration according to the capacitance variation and performs cancellation of the effect of the initial offset according to the offset-adjusting charges to generate an integration output signal that is continuously subtracted by the subtraction charges during a computing period to generate a subtraction count. A capacitive sensing method is disclosed herein as well. | 2011-10-13 |
20110248724 | DETECTION ELEMENT FOR DETECTING AN ELECTROMAGNETIC WAVE - A detection element for detecting an electromagnetic wave includes: a substrate; a schottky barrier diode disposed on the substrate; and an antenna disposed on the substrate, wherein the antenna includes a first conductive element and a second conductive element which are divided, a third conductive element and a fourth conductive element which are divided, a first connecting member that electrically connects the first conductive element and the third conductive element, and a second connecting member that electrically connects the second conductive element and the fourth conductive element, wherein the first conductive element and the second conductive element, and the third conductive element and the fourth conductive element are formed on multiple surfaces of the substrate, which are spaced apart from each other along an incident direction of the electromagnetic wave, respectively, and wherein the schottky barrier diode is electrically connected between the first conductive element and the second conductive element. | 2011-10-13 |
20110248725 | Non-Invasive Level Measurement for Liquid or Granular Solids - An apparatus and method is described for measuring non-invasively level of contents inside an array of containers without setting up any electrodes or attaching sensors around the containers, or inserting of a probe inside. Electromagnetic waves are launched from the bottom of the containers using launchers embedded in a tray the containers rest on. These waves travel through the bulk of the contents inside the container using a mode of propagation similar to dielectric waveguides or optical fibers and set up standing waves due to reflection at the content-air interface. The level inside the container is a function of the complex reflection coefficient (magnitude and phase) at the launcher input and can be thus determined by measuring the complex reflection coefficient. | 2011-10-13 |
20110248726 | METHOD OF DETERMINING THE DIAMETER OF A HOLE IN A WORKPIECE - A method of determining the diameter of a hole extending from a surface of an electrically conducting workpiece into or through the workpiece | 2011-10-13 |
20110248727 | Method for Compensation of System Tolerances in Inductive Couplers - A method is disclosed for compensation of system tolerances in an inductive coupler which includes a power generator that feeds an alternating current into a series resonance circuit formed by a resonance capacitor and an inductive rotating transmission device. First, a brief sequence of at least one period of an alternating current is fed by the power generator into the series resonance circuit. Then the series resonance circuit is short-circuited. A first resonance frequency is measured. Then a longer sequence having a plurality of periods of an alternating-current voltage is generated by the power generator, so that a given small voltage is built up at the load. Now a second resonance frequency is measured whilst the resonance circuit is short-circuited. Then at least one correcting variable for the power generator is determined from the two resonance frequencies. | 2011-10-13 |
20110248728 | ELECTRONIC DEVICE AND OPERATION DETECTION METHOD - An electronic device includes an input plane member that includes a plurality of first conductive layers that is elastically deformed when a pressing operation is received from a user, a base that includes a plurality of second conductive layers that comes in contact with the first conductive layer when the input plane member is deformed, a capacitance detection unit that detects capacitance between the plurality of first conductive layers and between the plurality of second conductive layers, a resistance value detection unit that detects a resistance value between the first conductive layer and the second conductive layer when the first conductive layer comes in contact with the second conductive layer, and a switch unit that controls electrical connection between the first conductive layer and the second conductive layer and either of the capacitance detection unit and the resistance value detection unit. | 2011-10-13 |
20110248729 | SENSOR SYSTEM AND METHODS FOR THE CAPACITIVE MEASUREMENT OF ELECTROMAGNETIC SIGNALS HAVING A BIOLOGICAL ORIGIN - The invention relates to a sensor system and several method for the capacitive measurement of electromagnetic signals having a biological origin. Such a sensor system comprises a capacitive electrode device ( | 2011-10-13 |
20110248730 | Electric power metering device and method - The measuring device with electric voltage divider comprises a first measuring resistor connected between a voltage measurement input and a common point, and a second measuring resistor connected between said common point and a reference electric ground. A measurement output is connected to the common point. An outer shielding enclosure surrounds the first and second measuring resistors and is connected to the reference electric ground. An inner capacitive electrode surrounding the first and second measuring resistors is arranged inside said outer shielding enclosure. To improve the phase difference and passband, the device comprises a phase difference compensation circuit connected between said inner capacitive electrode and said common point. | 2011-10-13 |
20110248731 | APPARATUS AND METHOD FOR MEASUREMENT OF pH OVER A WIDE RANGE OF PRESSURE - A sensor for measuring the pH of a solution of the present invention comprises: (a) a tubular body portion constructed from a flexible electrically-insulating material, the tubular body portion having an interior passage; (b) a first reverse osmosis membrane disposed in the interior passage; (c) a second reverse osmosis membrane disposed in the interior passage; (d) a proton conducting membrane disposed between the first reverse osmosis membrane and the second reverse osmosis membrane in the interior passage; (e) a first electrode; and (f) a second electrode. | 2011-10-13 |
20110248732 | IRREGULARITY DETECTION IN A STRUCTURE OF AN AIRCRAFT - A device, a system and a method for detecting an irregularity in a structure of an aircraft are proposed. The device includes a resonant circuit with a resonance frequency and a probe for tuning the resonance frequency of the resonant circuit. The resonant circuit and the probe are operatively connected in such a way that the probe changes the resonance frequency of the resonant circuit if the structure changes due to a formation of an irregularity. | 2011-10-13 |
20110248733 | TEST APPARATUS AND TEST METHOD - A test apparatus that tests a device under test having a plurality of blocks operating asynchronously, based on a signal received from outside, the test apparatus comprising a plurality of domain test units corresponding respectively to the blocks; and a main body unit that controls the domain test units. The main body unit includes a reference operation clock generating section that generates a reference operation clock supplied to each domain test unit, and a test start signal generating section that generates a test start signal instructing each domain test unit to start the testing. Each domain test unit includes a test clock generating section that generates a test clock based on the reference operation clock, and generates a test signal for testing the corresponding block based on the test clock obtained by the test clock generating section, and each domain test unit starts generating the test signal on a condition that the test start signal is received. | 2011-10-13 |
20110248734 | ELECTRONIC DEVICE TEST APPARATUS - An electronic device test apparatus which can optimize throughput and costs is provided. | 2011-10-13 |
20110248735 | Probecard System and Method - A microelectronic contactor assembly can include a probe head having microelectronic contactors for contacting terminals of semiconductor devices to test the semiconductor devices. A stiffener assembly can provide mechanical support to microelectronic contactors and for connecting a probe card assembly to a prober machine. A stiffener assembly may include first and second stiffener bodies that are connected together at their central portions with adjustment mechanisms such as three differential screw mechanisms. A probe head may be attached to a first stiffener body at locations outside its central portion, while a prober machine may be attached to a second stiffener body at locations outside its central portion. The first and second stiffener bodies may have different coefficients of thermal expansion. The stiffener assembly allows for differential thermal expansion of various components of the microelectronic contactor assembly while minimizing accompanying dimensional distortion that could interfere with contacting the terminals of semiconductor devices. The adjustment mechanisms allow for quick, sensitive adjustment of the positions of microelectronic contactors relative to semiconductor devices to be tested. | 2011-10-13 |
20110248736 | PROBE PIN AND AN IC SOCKET WITH THE SAME - The probe pin includes a plunger formed of a sheet metal, and a coil spring unit formed of a metal wire and configured to hold the plunger thereon. In a developed state, the plunger includes first and second portions each of which has an upper contact strip, a wide portion, and a lower contact strip, and which are connected to each other via the wide portions formed in the first and second portions. The plunger is formed in a united manner by folding together the first and second portions along a boundary of the wide portions formed therein to thereby bring at least the wide portions into tight contact with each other. | 2011-10-13 |
20110248737 | TEST APPARATUS AND CONNECTION DEVICE - It is an object to use an additional circuit to increase speed and functioning of an existing test apparatus at a low cost. Provided is a test apparatus that is connected to a socket board corresponding to a type of device under test and tests the device under test. The test apparatus comprises a test head including therein a test module that tests the device under test; a function board that is connected to the test module in the test head via a cable and also connected to the socket board; and an additional circuit that is loaded on the function board and connected to the test module and the device under test. | 2011-10-13 |
20110248738 | TESTING APPARATUS FOR ELECTRONIC DEVICES - A wafer processing apparatus used for the testing of electronic devices comprises first and second clampers movably mounted on a shaft, each clamper being configured for holding a wafer carrier on which a wafer is mounted. Clamping fingers on each of the first and second clampers are operative to clamp onto the wafer carrier to hold the wafer carriers, and the clampers are operative to move the wafer carriers reciprocally between a loading position and a wafer processing location for processing the wafers. | 2011-10-13 |
20110248739 | BENDING TEST APPARATUS FOR FLEXIBLE DEVICES - Provided is a bending test apparatus of a flexible device. The bending test apparatus includes: first and second electrode parts disposed in a horizontal direction and loading a flexible device horizontally, wherein the first electrode part is movable in the horizontal direction and the second electrode part is fixed so that the first electrode part horizontally moves toward the second electrode part to apply mechanical stress of the horizontal direction to the flexible device. | 2011-10-13 |
20110248740 | STACKED SEMICONDUCTOR APPARATUS WITH CONFIGURABLE VERTICAL I/O - The present invention provides an apparatus including a stacked plurality of devices and a related method. The apparatus includes a stacked plurality of devices including a master device and at least one secondary device; a plurality of segments, each segment being associated with one of the stacked plurality of devices; and a plurality of N vertical connection paths traversing the stacked plurality of devices. The apparatus further includes a plurality of M vertical signal paths configured from the plurality of N vertical connections paths, wherein M is less than N, and at least one of the plurality of M vertical signal paths is a merged vertical signal path adaptively configured by the master device using at least one segment from each one of at least two of the plurality of N vertical connection paths. | 2011-10-13 |
20110248741 | Semiconductor integrated circuit - A semiconductor integrated circuit includes a macro connected between a first power supply line and a second power supply line to drive a load, and a power-supply-noise cancelling circuit connected between an input and an output of the macro to generate a current for canceling one of a current flowing from the first power supply line to the output of the macro and a current flowing from the output of the macro to the second power supply line, on the basis of a potential difference between the input and the output of the macro. The macro and the power-supply-noise cancelling circuit are mounted in a same chip. | 2011-10-13 |
20110248742 | Calibration circuit, semiconductor device including the same, and data processing system - A method includes issuing a calibration command and performing a calibration operation in response to the calibration command. The calibration operation includes adjusting an impedance of a first replica buffer with updating a first code, the first replica buffer being substantially identical in circuit configuration to one of pull-up and pull-down circuits included in an output buffer, adjusting impedance of a second replica buffer with updating a second code, the second replica buffer being substantially identical in circuit configuration to the other of the pull-up and pull-down circuits included in the output buffer, controlling a first latch circuit to hold the first code when the impedance of the first replica buffer reaches a first level, and controlling a second latch circuit to hold the second code when the impedance of the second replica buffer reaches a second level. | 2011-10-13 |
20110248743 | ENHANCED PERFORMANCE MEMORY SYSTEMS AND METHODS - Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus. At least one divider unit may be interposed between the memory bus and the at least two memory units that is configured to approximately equally divide levels of received signals while matching an impedance of the memory bus to an impedance of the memory units. | 2011-10-13 |
20110248744 | SCALABLE NON-BLOCKING SWITCHING NETWORK FOR PROGRAMMABLE LOGIC - A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits. | 2011-10-13 |
20110248745 | STAGED PREDRIVER FOR HIGH SPEED DIFFERENTIAL TRANSMITTER - According to various embodiments, a differential transmitter includes a driver and a predriver. In various embodiments, the predriver may include pull-up transistors and pull-down transistors configured in various ways to produce a staged output signal during a pull-up transition, wherein the higher bits of the input signal are switched slower in comparison with the lower bits of the input signal, while at the same time maintaining the simultaneous pull-down transition among all the bits. In various embodiments, the staged output of a predriver may further be dynamically disabled during a deemphasis exit transition. Other embodiments may be described and claimed. | 2011-10-13 |
20110248746 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - It is an object of the invention to provide a digital circuit which can operate normally regardless of binary potentials of an input signal. A semiconductor device having a correcting unit and a logic unit wherein the correcting unit includes a capacitor, first and second switches, wherein the first electrode of the capacitor is connected to the input terminal and the second electrode of the capacitor is connected to the gate of the transistor in the logic circuit, wherein the first switch controls the connection between a gate and drain of the transistor and the second switch controls the potential to be supplied to the drain of the transistor is provided. | 2011-10-13 |
20110248747 | ZERO-TEMPERATURE-COEFFICIENT VOLTAGE OR CURRENT GENERATOR - General speaking, a resistor of high resistivity has a negative-temperature-coefficient and a resistor of low resistivity has a positive-temperature-coefficient. Utilizing this characteristic, an appropriate proportion between the above resistors can be found to make a combined resistor with an approximate zero-temperature-coefficient. The combined resistor can be used to design a circuit for generating voltage and current with approximate zero-temperature-coefficients. | 2011-10-13 |
20110248748 | LOAD DRIVE CIRCUIT WITH CURRENT BIDIRECTIONAL DETECTING FUNCTION - A load drive circuit with a current bidirectional detecting function includes: a current bidirectional switch connected between a first wire and a second wire and through which a first forward current flows in a direction from the first wire to the second wire and a first backward current flows in a direction from the second wire to the first wire; a forward current detecting switch connected to the first wire and into which a second forward current correlated to the first forward current flowing through the current bidirectional switch flows; a backward current detecting switch connected to the second wire and into which a second backward current correlated to the first backward current flowing through the current bidirectional switch flows. | 2011-10-13 |
20110248749 | SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device having an output driver and a driver replica. The output driver is based on a scalable low-voltage signaling technology and capable of operating on low power and making automatic adjustments of output characteristics in accordance with the magnitude of a reference current. The driver replica, which is a duplicate of the output driver, adjusts the magnitude of the reference current in accordance with the difference between its own output and a reference voltage and outputs the adjusted current to the output driver. | 2011-10-13 |
20110248750 | HIGH-BANDWIDTH ON-CHIP COMMUNICATION - Some embodiments of the present invention provide techniques and systems for high-bandwidth on-chip communication. During operation, the system receives an input voltage signal which is to be transmitted over a wire in a chip. The system then generates one or more modified voltage signals from the input voltage signal. Next, the system drives each of the voltage signals (i.e., the input voltage signal and the one or more modified voltage signals) through a respective capacitor. The system then combines the output signals from the capacitors to obtain a combined voltage signal. Next, the system transmits the combined voltage signal over the wire. The transmitted signals can then be received by a hysteresis receiver which is coupled to the wire through a coupling capacitor. | 2011-10-13 |
20110248751 | SLEW DETECTION FOR HIGH VOLTAGE ISOLATION REGION - A system includes control circuitry configured to provide one or more control pulses in response to a command signal, the one or more control pulses being communicated from the control circuitry to associated circuitry via a connection. A detector is configured to detect a disturbing signal that mitigates reception of the one or more control pulses via the connection. The command signal is controlled to cause the control circuitry to provide one or more additional control pulses when the disturbing signal is detected by the detector to improve a likelihood of the reception of the one or more control pulses via the connection. | 2011-10-13 |
20110248752 | CLOCK SIGNAL GENERATORS HAVING A REDUCED POWER FEEDBACK CLOCK PATH AND METHODS FOR GENERATING CLOCKS - Memories, clock generators and methods for providing an output clock signal are disclosed. One such method includes delaying a buffered clock signal by a adjustable delay to provide an output clock signal, providing a feedback clock signal from the output clock signal, and adjusting a duty cycle of the buffered clock signal based at least in part on the feedback clock signal. An example clock generator includes a forward clock path configured to provide a delayed output clock signal from a clock driver circuit, and further includes a feedback clock path configured to provide a feedback clock signal based at least in part on the delayed output clock signal, for example, frequency dividing the delayed output clock signal. The feedback clock path further configured to control adjustment a duty cycle of the buffered input clock signal based at least in part on the feedback clock signal. | 2011-10-13 |
20110248753 | Suppression of Low-Frequency Noise from Phase Detector in Phase Control Loop - The disclosed invention provides a structure and method for improving performance of a phase locked loop by suppressing low-frequency noise produced by a phase detector. This is achieved by up-conversion of the in-band frequency components in the phase difference between reference signal and feedback signal to a higher frequency range where noise performance of a phase detector is improved. The up-converted phase difference is provided to a phase detector that is configured to determine an error signal based upon this phase difference. The error signal is output to a down-converter configured to down-convert the error signal (e.g., back to the original frequency range), thereby intrinsically up-converting the error signal's low-frequency noise (produced by the phase detector), prior to being provided to a filter configured to filter the up-converted noise, thereby resulting in an improved PLL noise performance. | 2011-10-13 |
20110248754 | SYNCHRONIZATION SCHEME WITH ADAPTIVE REFERENCE FREQUENCY CORRECTION - An apparatus and a method provide synchronization of an output signal to a synchronization information. The synchronization is accomplished by providing coupling of a correction control information that controls a signal generator, e.g. a phase locked loop arrangement or a direct digital synthesis arrangement, to its exact frequency to a frequency conversion unit that converts an uncorrected reference frequency to a correct or exact reference frequency. Thereby, the uncorrected reference frequency for the signal generator can be provided by a simple crystal oscillator without any frequency controller. The setting of the signal generator and the frequency conversion unit can be done in a predetermined sequence which enables a user equipment to synchronize its reference frequency to the synchronization information emitted by a communication network. | 2011-10-13 |
20110248755 | CROSS-FEEDBACK PHASE-LOCKED LOOP FOR DISTRIBUTED CLOCKING SYSTEMS - According to various embodiments, a cross-feedback phase-locked loop (XF-PLL) may include a secondary phase/frequency detector to detect the phase/frequency differences between two adjacent domains and feed the phase/frequency differences back into the main feedback loop of the XF-PLL, thereby reducing accumulated jitter and inter-domain clock skew in a distributed clocking system. Other embodiments may be described and claimed. | 2011-10-13 |
20110248756 | SEMICONDUCTOR CIRCUIT - Power consumption in a DLL circuit having a DCC circuit is reduced. Specifically, a semiconductor circuit includes a change-in-duty detection circuit, activation and deactivation of which is controlled based upon a control signal (DCCEN), for comparing duty of a clock signal that has been generated based upon an input clock signal and a preset duty and outputting result of the comparison; and a duty determination circuit for outputting the control signal (DCCEN) for deactivating the change-in-duty detection circuit when the output of the change-in-duty detection circuit indicates that duty of the generated clock signal is in the vicinity of a target value, which is a preset duty, and outputting the control signal (DCCEN) for activating the change-in-duty detection circuit when the duty of the generated clock signal is not in the vicinity of the target value. | 2011-10-13 |
20110248757 | DIGITAL CALIBRATION DEVICE AND METHOD FOR HIGH SPEED DIGITAL SYSTEMS - A digital calibration device and method for a high speed digital system. A digital calibration device coupled to a timing device in a high speed digital system for digitally calibrating the timing device includes a delay estimator, a control logic, and a digitally controlled load unit. In operation, the delay estimator calculates a delay value indicative of a timing delay between a first output and a second output of a timing device of the high speed digital system. Further, the control logic generates a control signal based on the delay value. Furthermore, the digitally controlled load unit applies at least one of a first load to a non-delayed line and a second load to a delayed line of the timing device based on the control signal to calibrate a timing delay between the non-delayed line and the delayed line of the timing device. | 2011-10-13 |
20110248758 | CLOCK SUPPLY CIRCUIT AND CONTROL METHOD THEREOF - A clock supply circuit includes a clock generating portion configured to generate a clock signal and to change a frequency of the clock signal from a first frequency to a second frequency being higher than the first frequency; and a intermittent clock generating portion configured to receive the clock signal and to mask a clock pulse of the clock signal at a predetermined rate for a predetermined period when the frequency of the clock signal is changed to the second frequency. | 2011-10-13 |
20110248759 | RETENTION FLIP-FLOP - A master-slave retention flip-flop includes a master latch adapted to latch an input data signal and to output a latched master latch data signal based on an input clock signal, a slave latch coupled to an output of the master latch and adapted to output a latched slave latch data signal based on the input clock signal, and a retention latch embedded within one of the master and slave latches adapted to preserve data in a power down mode based on a power down control signal. | 2011-10-13 |
20110248760 | Flip-Flop for Low Swing Clock Signal - The invention provides a flip-flop. In one embodiment, the flip-flop receives a low swing clock signal, and comprises a first NMOS transistor, a first latch circuit, a second NMOS transistor, and a second latch circuit. The low swing clock signal is inverted to obtain an inverted low swing clock signal. The first NMOS transistor is coupled between a receiving node and a first node, and has a gate coupled to the inverted low swing clock signal. The first latch circuit is coupled between the first node and a second node. The second NMOS transistor is coupled between the second node and a third node. The second latch circuit is coupled between the third node and a fourth node, and generates an output signal on the fourth node. | 2011-10-13 |
20110248761 | Phase Adjustment Apparatus and Method for a Memory Device Signaling System - Apparatus and methods are disclosed for adjusting phase of data signals to compensate for phase-offset variations between devices during normal operation. The phase of data signals are adjusted individually in each transmit data unit and receive data unit across multiple data slices with a common set of phase vector clock signals and a corresponding clock cycle count signal. The transmission of signal information between a first device (such as a memory controller) and a second device (such as a memory component) occurs without errors even when the accumulated delays between the first device and second device change by a half symbol time interval or more during operation of the system. The apparatus reduces the circuitry required, such as phase-lock-loops, for individually adjusting the phase of each transmit data unit and receive data unit across multiple data slices, which in turn results in reduction in complexity and cost of the system. | 2011-10-13 |
20110248762 | Clock generator - To provide a clock generator capable of suppressing a peak power, the circuit includes a counter receiving a reference clock signal to generate a timing signal based on the reference clock signal; and a plurality of intermittent clock generating units each coupled to a storage unit thereof storing a bit strings data, each of the intermittent clock generating units receiving the reference clock signal and the timing signal. Each of the intermittent clock generating units masks a clock pulse of the reference clock signal based on the bit string data stored in the storage unit thereof to output an intermittent clock signal in response to the timing signal. | 2011-10-13 |
20110248763 | CHARGE PUMPING CIRCUIT - A charge pumping circuit is provided to regulate the amount of charge to be pumped according to a driving voltage to reduce the loss of power and increase charge pumping efficiency. The charge pumping circuit includes: a driving voltage sensing unit sensing a driving voltage to generate one or more sensing signals for determining the amount of charge to be pumped; a multi-level clock generation unit generating a pair of clock signals each having an amplitude corresponding to a signal value of each of the one or more sensing signals; and a charge pumping unit charging the pair of clock signals to generate a charged voltage, adding the charged voltage to the driving voltage, and outputting the same. | 2011-10-13 |
20110248764 | Clock Divider System and Method - In a particular embodiment, a single step increment calculation module is responsive to a first ramp control value and a second ramp control value. The single step increment calculation module generates a single step frequency adjustment as an output. The generated single step frequency adjustment is applied to a system clock signal having a first frequency to change the system clock signal to a second clock signal having a second frequency. The first frequency is different from the second frequency and the system clock signal has a first duty cycle that is within a tolerance range of a second duty cycle of the second clock signal. | 2011-10-13 |
20110248765 | X-Ray and Gamma Ray Detector Readout Sytem - A readout electronics scheme is under development for high resolution, compact PET (positron emission tomography) imagers based on LSO (lutetium ortho-oxysilicate, Lu | 2011-10-13 |
20110248766 | COMPACT HIGH LINEARITY MMIC BASED FET RESISTIVE MIXER - A MMIC (microwave monolithic integrated circuit) based FET mixer and method for the same is provided. In particular, adjacent transistors, such as FETs (field effect transistors) share terminals reducing physical layout separation and interconnections. A smaller die size is realized with the improved system geometry herein provided. | 2011-10-13 |
20110248767 | MICROWAVE GENERATOR AND PROCESSES THEREOF - A microwave generator and/or methods thereof. A microwave generator may include a plurality of connected sequential sections in cascade. A microwave generator may include a first section and an output section. Each section may include an intermediate conductor, an upper conductor and a lower conductor. A first isolating material having a first thickness may be connected between an intermediate conductor and an upper conductor. A second isolating material having a second thickness may be connected between an intermediate conductor and a lower conductor. A switch may be connected between an intermediate conductor and an upper conductor and/or a lower conductor, forming a switched thickness and an unswitched thickness. The unswitched thickness of an output section is larger than the unswitched thickness of the first section and the increase in unswitched thickness from the first section to the output section includes a monotonic increase. | 2011-10-13 |
20110248768 | CHARGE DOMAIN FILTER WITH CONTROLLABLE TRANSFER FUNCTIONS AND TRANSFER FUNCTION CONTROL METHODS THEREOF - A charge domain filter with controllable transfer function is disclosed. The charge domain filter has a plurality of switched-capacitor networks, a switching device and a current adder. The switched-capacitor networks are interleaving controlled, and each have an input terminal and an output terminal, and the input terminals of all of the switched-capacitor networks are connected together to be coupled to an input signal. The switching device is designed for transfer function control, and is operated according to a switch control signal. The switching device determines connections between the output terminals of the switched-capacitor networks and how the output terminals of the switched-capacitor networks are coupled to the current adder and thereby generates at least one current adder input. The at least one current adder input is received by the current adder, and the current adder outputs an output signal accordingly. | 2011-10-13 |
20110248769 | ILLUMINATED PUSHBUTTON SWITCH WITH CONFIGURABLE ELECTRONIC LATCHING FEATURES - Within an illuminating pushbutton switch, an electronic latching circuit replaces an electromagnetic holding coil for latching or releasing a state of the illuminated pushbutton switch. The electronic latching circuit includes inputs receiving clock and reset control signals, one or more outputs delivering latch output states, which may include multiple configurable states, and latch logic controlled by the clock and reset control signals and delivering signals maintaining the illuminated pushbutton switch in a predetermined condition depending upon the latch state. The electronic logic circuit fits within the illuminated pushbutton switch housing in space sized to hold one snap action switching device without increase in the length, weight or mounting depth of the illuminated pushbutton switch. | 2011-10-13 |
20110248770 | SYSTEM AND METHOD FOR DRIVING BIPOLAR TRANSISTORS IN SWITCHING POWER CONVERSION - A system and method for driving a bipolar junction transistor is provided. The system includes a first transistor including a first gate, a first terminal, and a second terminal. The first gate is configured to receive a first control signal. Additionally, the system includes a second transistor including a second gate, a third terminal, and a fourth terminal. The second gate is configured to receive a second control signal. Moreover, the system includes a first resistor including a fifth terminal and a sixth terminal. The fifth terminal is connected to the first terminal, and the sixth terminal is biased to a first predetermined voltage. The fourth terminal is biased to a second predetermined voltage. The second terminal and the third terminal are connected at a node, and the node is connected to a base for a bipolar junction transistor. | 2011-10-13 |
20110248771 | INVERSE-MODE BIPOLAR TRANSISTOR RADIO-FREQUENCY SWITCHES AND METHODS OF USING SAME - The various embodiments of the present disclosure relate generally to inverse-mode Radio-Frequency (“RF”) switching circuits and methods of using the same. An embodiment of the present invention provides an inverse-mode RF switching circuit. The inverse-mode RF switching circuit comprises a bipolar transistor, a shunt element, a first RF channel, and a second RF channel. The bipolar transistor comprises a base, a collector, and an emitter, wherein the base and emitter are in electrical communication first via a base-emitter junction and second via an electrical connection element. The shunt element is in electrical communication with the collector. The first RF channel is in electrical communication with the base and emitter. The second RF channel is in electrical communication with the collector and the shunt element. The base-collector junction operates as a switching diode between the first RF channel and the second RF channel. | 2011-10-13 |
20110248772 | TRIMMED THERMAL SENSING - A trimmed thermal sensing system can include a temperature sensitive circuit configured to provide an output that varies as a function of temperature and in response to a trimmed bandgap reference signal. A trim network is coupled to the temperature sensitive circuit. The trim network trims the temperature sensitive circuit in an opposite direction of trimming implemented to provide the trimmed bandgap reference signal, such that temperature tolerance of the temperature sensitive circuit is reduced. | 2011-10-13 |
20110248773 | System And Method For Sensing Human Activity By Monitoring Impedance - A system for sensing human activity by monitoring impedance includes a signal generator for generating an alternating current (AC) signal, the AC signal applied to an object, a reactance altering element coupled to the AC signal, an envelope generator for converting a returned AC signal to a time-varying direct current (DC) signal, and an analog-to-digital converter for determining a defined impedance parameter of the time-varying DC signal, where the defined impedance parameter defines an electromagnetic resonant attribute of the object. | 2011-10-13 |
20110248774 | ELECTRONIC DEVICE WITH A CARRIER CURRENT - A device comprising both a box containing an electronic central unit, and power supply module connected to the central unit. The device also includes an external power supply block connected to the module by an electric cable and provided with both a connection member for connection to a power supply network delivering AC power and a data signal superposed thereon. A converter is provided for converting the AC power. The box includes a carrier current data transmission module, the converter being connected to the connection member and to the electric cable via a first diverter member that extracts and diverts the data signal relative to the converter. The module is connected to the electric cable by a second diverter member for separating the converted power supply current and the data signal and for bringing the power supply current to the power supply module and the data signal to the transmission module. | 2011-10-13 |
20110248775 | ELECTRONIC FUSE SYSTEM - An electronic fuse system includes: a pad, an electronic fuse circuit, a first switch circuit, and a control circuit. The pad is used of receiving a reference voltage. The electronic fuse circuit is used of changing a voltage level when a current signal passes. The first switch circuit coupled between the pad and the electronic fuse circuit, for controlling the first switch circuit disabled or enabled according to a switch control signal. The control circuit, coupled to the first switch circuit, for transferring the switch control signal according a control signal and a lock signal. Wherein, when the lock signal is enabled, the control signal is unable to control the control circuit to turn on the first switch circuit. | 2011-10-13 |
20110248776 | POWER SUPPLY HAVING A CHARGE PUMP CIRCUIT - Exemplary embodiments of a power supply can be provided. The exemplary power supply can include a voltage source which supplies a supply voltage; and a charge pump circuit supplied by the voltage source and configured to generate an output voltage at an output. The charge pump can include alternating first and second clock states. In the first clock state, a first charge pump capacitor can be disposed between the supply voltage and ground and can be charged to the supply voltage by the voltage source, and a second charge pump capacitor can be coupled in series between the voltage source and the output. In the second clock state, the first charge pump capacitor and the second charge pump capacitor can be connected in series such that the charged connection of the first charge pump capacitor the first clock state can be grounded and the second charge pump capacitor can be charged by the voltage source. | 2011-10-13 |
20110248777 | SEMICONDUCTOR CHIP WITH VOLTAGE ADJUSTABLE FUNCTION AND MANUFACTURE METHOD THEREOF - The present invention provides a semiconductor chip with voltage adjustable function, said semiconductor chip is supplied with a power supply device and comprises a voltage regulating module for adjusting the voltage supplied to said semiconductor chip from said power supply device, based on the best operating voltage at which said semiconductor chip operates. | 2011-10-13 |
20110248778 | DEVICES COMPRISING COLOSSAL MAGNETOCAPACITIVE MATERIALS AND RELATED METHODS - Semiconductor devices include a transistor having a gate structure located close to a channel region that comprises a colossal magnetocapacitive material. The gate structure is configured to affect electrical current flow through the channel region between a source and a drain. The colossal magnetocapacitive material optionally may be disposed between two structures, one or both of which may be electrically conductive, magnetic, or both electrically conductive and magnetic. Methods of fabricating semiconductor devices include forming a colossal magnetocapacitive material close to a channel region between a source and a drain of a transistor, and configuring the colossal magnetocapacitive material to exhibit colossal magnetocapacitance for generating an electrical field in the channel region. Methods of affecting current flow through a transistor include causing a colossal magnetocapacitive material to exhibit colossal magnetocapacitance and generate an electrical field in a channel region of a transistor. | 2011-10-13 |
20110248779 | AMPLIFIER CIRCUITRY, INTEGRATED CIRCUIT AND COMMUNICATION UNIT - Amplifier circuitry comprising a class-D amplifier for amplifying an audio input signal. The amplifier circuitry comprises sigma-delta modulation logic arranged to receive the audio input signal and to generate a modulated signal representative of the audio input signal, and an output stage arranged to generate an output signal for the amplifier circuitry. The amplifier circuitry further comprises finite impulse response, filter logic operably coupled between the modulation logic and the output stage, and having at least one zero in its transfer function arranged to substantially pass signal components within the modulated signal occurring at frequencies less than the at least one zero and to attenuate signal components within the modulated signal at frequencies greater than the at least one zero. | 2011-10-13 |
20110248780 | CASCODE AMPLIFIER WITH INCREASED LINEARITY - An amplifier circuit for current amplification. An input stage is adapted to receive an input signal. At least one current multiplication stage is connected to the input stage. The current multiplication stage is adapted to receive a current signal from the input stage and to produce a multiplied output current signal at an output of the amplifier circuit. The current multiplication stage includes at least two current multiplication circuits connected to each other. Each current multiplication circuit is adapted to produce an output current signal essentially equal to the current signal from the input stage, such that the output current signal at an output of the amplifier circuit includes a sum of the current signals received at each current multiplication circuit. A method of improving linearity in an amplification circuit. | 2011-10-13 |
20110248781 | Duplicate feedback network in class D amplifiers - A circuit and a method are provided for suppressing the pop and click noise during the power on and power off of Class D amplifiers. The technique also suppresses pops and clicks when the Class D amplifier enters or exits standby mode. A duplicate feedback network is used to establish the stable operating points, including offsets in the Class D circuit without turning on the outputs. The technique works by gradually propagating or dissipating the offset through the signal path of a Class D amplifier by swapping the differential outputs using switches to suppress pops and clicks when starting up and shutting down the amplifier. | 2011-10-13 |
20110248782 | RF POWER AMPLIFIER - A reduction is achieved in the primary-side input impedance of a transformer (voltage transformer) as an output matching circuit without involving a reduction in Q-factor. An RF power amplifier includes transistors, and a transformer as the output matching circuit. The transformer has a primary coil and a secondary coil which are magnetically coupled to each other. To the input terminals of the transistors, respective input signals are supplied. The primary coil is coupled to each of the output terminals of the transistors. From the secondary coil, an output signal is generated. The primary coil includes a first coil and a second coil which are coupled in parallel between the respective output terminals of the transistors, and each magnetically coupled to the secondary coil. By the parallel coupling of the first and second coils of the primary coil, the input impedance of the primary coil is reduced. | 2011-10-13 |
20110248783 | CIRCUIT FOR AMPLIFYING A SIGNAL REPRESENTING A VARIATION IN RESISTANCE OF A VARIABLE RESISTANCE AND CORRESPONDING SENSOR - A circuit for amplifying a signal representing a variation in resistance of a variable resistance comprising at least one first load linked to an output terminal of a first transistor whose other terminal is associated with a variable resistance, in such a way as to allow the recovery of the amplified signal at the terminals of the first load. | 2011-10-13 |
20110248784 | MULTI-CHIP DOHERTY AMPLIFIER WITH INTEGRATED POWER DETECTION - In accordance with an exemplary embodiment of the present invention, a Doherty amplifier is provided for applications in radio frequency, microwave, and other electronic systems. An exemplary Doherty amplifier comprises a first MMIC having a first power detector, and a second MMIC having a second power detector. The first MMIC and the second MMIC are structurally identical. Furthermore, the first MMIC is configured as a carrier amplifier and the second MMIC is configured as a peaking amplifier. In the exemplary embodiment, an amplifier control bias of the carrier amplifier is a function of the power detected by the first power detector and an amplifier control bias of the peaking amplifier is a function of the power detected by the second power detector. The ability to assemble a Doherty amplifier using a single MMIC product results in a simple and less expensive manufacturing process. | 2011-10-13 |
20110248785 | Clock Generators, Clock Generating Methods, and Mobile Communication Device Using the Clock Generator - A clock generator and generating method, and a mobile communication device using the clock generator. A clock generator comprises a first accumulator, an oscillating signal generating circuit and a frequency adjustment circuit. The oscillating signal generating circuit generates a first oscillating signal and adjusts a frequency of the first oscillating signal according to a first overflow output signal of the first accumulator. The frequency adjustment circuit generates a frequency control value according to the first oscillating signal and a reference oscillating signal. The first accumulator accumulates the frequency control value according to the first oscillating signal to generate the first overflow output signal. | 2011-10-13 |
20110248786 | OSCILLATOR CIRCUIT - An oscillator circuit in accordance with an aspect of the present invention includes a filter capacitor that generates an oscillating frequency control voltage according to a charge amount accumulated based on an oscillating frequency setting current, an oscillator that changes a frequency of an oscillation signal to be output according to the oscillating frequency control voltage, a control circuit that generates a timing control signal, a frequency detection circuit that generates a frequency detection voltage based on the timing control signal, a voltage level of the frequency detection voltage being changed according to a length of the period of the oscillation signal, and a differential amplifier that continuously changes the oscillating frequency setting current according to a voltage difference between the frequency detection voltage and a reference voltage, and outputs the resultant oscillating frequency setting current to the filter capacitor. | 2011-10-13 |
20110248787 | VARACTOR CIRCUIT AND VOLTAGE-CONTROLLED OSCILLATION - A varactor circuit and voltage-controlled oscillation are described. The varactor circuit includes a first varactor, a second varactor, a third varactor, and a fourth varactor. A first source-drain node of the first varactor and a second source-drain node of the second varactor are coupled to a first input node. A first gate node for the first varactor is coupled to a first output node. A second gate node for the second varactor is coupled to a second output node. A third gate node for the third varactor and a fourth gate node for the fourth varactor are coupled to a second input node. A third source-drain node of the third varactor is coupled to the first output node. A fourth source-drain node of the fourth varactor is coupled to the second output node. In other embodiments, varactor circuits block and re-center VCO output CML. | 2011-10-13 |
20110248788 | GLASS SUBSTRATE POLISHING METHOD, PACKAGE MANUFACTURING METHOD, PIEZOELECTRIC VIBRATOR, OSCILLATOR, ELECTRONIC DEVICE AND RADIO TIMEPIECE - A glass substrate polishing method having polishing processes for polishing a glass substrate surface while supplying a polishing agent. The glass substrate polishing method is characterized in that the polishing processes include a first polishing process in which the surface of the glass substrate is polished using a first polishing pad made from a polishing cloth and a second polishing process in which the surface of the glass substrate is polished using a second polishing pad made from urethane foam. | 2011-10-13 |
20110248789 | COMPENSATING FOR AN ELECTROSTATIC DISCHARGE CAPACITANCE LOAD - In some embodiments a differential communication channel compensates for electrostatic discharge capacitance of an electrostatic discharge component by increasing an impedance of the differential communication channel near the electrostatic discharge component. Other embodiments are described and claimed. | 2011-10-13 |
20110248790 | APPARATUS AND METHOD FOR AN A/B RF REDUNDANT SENSING SWITCH - An A/B RF automatic-set-up redundant sensing switch that monitors the relative differences in signal strength of the A and B paths and processes it according to a predetermined logic setting with no manual adjustment. When one of the paths is determined not to match the logic setting, it will switch to the other. | 2011-10-13 |
20110248791 | METAMATERIAL DIPLEXERS, COMBINERS AND DIVIDERS - A wireless device having a CRLH structure incorporates a power combiner/divider and diplexer. In one embodiment, circuit parameters are selected to achieve impedance matching using a transmission line structure. | 2011-10-13 |
20110248792 | CIRCUIT ARRANGEMENT WITH IMPROVED DECOUPLING - A circuit arrangement includes a component having a closed signal path, that closed signal path connected to a first port, a second port and at least a third port. The component has a directed signal flow of a signal applied to one of that ports. Such a coupling device can be connected to a transmitter and to a receiver path, respectively. | 2011-10-13 |
20110248793 | BAND-PASS FILTER BASED ON CRLH RESONATOR AND DUPLEXER USING THE SAME - A CRLH resonator-based band-pass filter includes at least two CRLH resonators. The resonators are connected by capacitive coupling. The resonators includes a microstrip line having input and output ports. The microstrip line includes a first interdigital line serial-connected to the input port, a second interdigital line serial-connected to the output port, a connection line connecting the first and second interdigital lines, and an inductor line parallel-connected to the connection line and provided with a grounded end. | 2011-10-13 |
20110248794 | Antenna Duplexer with High GPS Suppression - An antenna duplexer includes a transmission filter which operates in a transmission frequency band and has a transmission filter output. A reception filter operates in a reception frequency band and has a reception filter output. An antenna connection is connected to the transmission filter output and a matching element is connected between the antenna connection and the reception filter input. The circuit formed from the transmission filter, reception filter and matching element attenuates transmission signals in a frequency band whose frequencies f are in the interval 0.50*f | 2011-10-13 |
20110248795 | BAND REJECT FILTERS - Distributed band reject filters are disclosed. A band reject filter includes a first acoustic resonator and a second acoustic resonator, each of which has either shunt resonators adapted to resonate substantially at respective resonance frequencies defining a rejection frequency band or series resonators adapted to anti-resonate substantially at respective anti-resonance frequencies defining the rejection frequency band. These resonators are connected through a phase shifter which imparts an impedance phase shift of approximately 45° to 135°. Exemplary applications of the band reject filters disclosed herein include implementation as an inter-stage band reject filter for a base station power amplifier for a wireless communication system, as a radio frequency band reject filter in a duplexer for a wireless communication terminal, and in a low noise amplifier input stage. | 2011-10-13 |
20110248796 | RF FEED NETWORK FOR MODULAR ACTIVE APERTURE ELECTRONICALLY STEERED ARRAYS - A feed network for an antenna subarray includes a first feed arrangement having an sum output, a second feed arrangement having an delta output, a fixed attenuator having a first port and a second port, the first port connected to the delta output of the second feed arrangement, a first power divider/combiner having a first and second port and a third port; the first port connected to the second port of the fixed attenuator, a variable phase shifter having a first port and a second port, the first port connected to the second port of the power divider/combiner, a variable attenuator having a first port and a second port, the first port connected to the second port of the variable phase shifter, a second power divider/combiner having a first and second port and a third port; the first port connected to the second port of the fixed attenuator, a first circulator having a first port, a second port and a third port, the first port connected to the sum output of the first feed arrangement, and a third power divider/combiner having a first and second port and a third port; the third port connected to the second port of the circulator and the second port connected to the second port of the variable attenuator. | 2011-10-13 |
20110248797 | TUNABLE DELAY SYSTEM AND CORRESPONDING METHOD - The present invention relates to a tunable delay system and corresponding method for delaying a signal. The system includes an oscillator for providing a carrier. A first mixer modulates the signal with the carrier. The modulated signal is delayed in a metamaterial transmission line. Afterwards, a second mixer is used to separate the delayed signal from the carrier. The present invention also relates to using a metamaterial transmission line for delaying a modulated signal. | 2011-10-13 |
20110248798 | PROJECTED ARTIFICIAL MAGNETIC MIRROR - A projected artificial magnetic mirror (PAMM) includes conductive coils, a metal backing, and a dielectric material. The conductive coils are arranged in an array on a first layer of a substrate and the metal backing is on a second layer of the substrate. The dielectric material is between the first and second layers of the substrate. The conductive coils are electrically coupled to the metal backing to form an inductive-capacitive network that, for a third layer of the substrate and within a given frequency band, substantially reduces surface waves along the third layer. | 2011-10-13 |
20110248799 | MILLIMETRE WAVE BANDPASS FILTER ON CMOS - Q of resonant elements formed over lossy substrates such as in a CMOS process is improved by forming the ground plane of the resonant element immediately over a high impedance layer to reduce cross coupling and eddy currents. A new type of meandering hairpin resonator configuration is also introduced providing, for example, for 4th order cross coupled filters of high selectivity and compact layout. | 2011-10-13 |
20110248800 | FILTER BASED ON A COMBINED VIA STRUCTURE - A filter is provided with a planar transmission line and a combined via structure connected to (both) one ends of the planar transmission line. The planar transmission line and the combined via structure are disposed in a same multilayer board. The combined via structure comprises two working parts. The first working part comprises a segment of signal via and a plurality of segments of ground vias surrounding the signal via. The second working part comprises a segment of the same signal via, a plurality of segments of the same ground vias, smooth conductive plate and corrugated conductive plate. The smooth conductive plate and the corrugated conductive plate are connected to the signal via. The second working part comprises a segment of the same signal via, a plurality of segments of the same ground vias and corrugated conductive plate. The corrugated conductive plate is connected to the signal via. | 2011-10-13 |
20110248801 | GROUND LOOP ISOLATOR FOR A COAXIAL CABLE - A ground loop isolator for a coaxial cable, for example that blocks DC current but which allows a desired band of RF through the ground loop isolator, and which is small enough to fit in the areas where coupling of the desired electronic equipment is to occur. Embodiments may include an outer area allowing for easier manual coupling of the coaxial cable connector nut to electronic devices. | 2011-10-13 |
20110248802 | Switch, In Particular Load Breaking Switch - A switch is disclosed. In at least one embodiment, the switch is a load breaking switch including a rotor which is embodied in particular as a switch shaft segment, and a contact arm which is pivotally mounted in the rotor and is pivotable between an ON and OFF position about an axis of rotation and at the free end of which is a contact piece which is pivotable together with the contact arm and is in contact with an opposite fixedly arranged contact piece when the contact arm is in its ON position. In at least one embodiment, the current flows through the switch via the contact pieces and the contact arm, wherein the contact arm is pivotable into its OFF position when the current flowing via the contact pieces exceeds a value, in particular the rated current value or an overload current value. In order to provide a load breaking switch which is simple in terms of its construction and at the same time has a high current-carrying capacity, it is proposed in at least one embodiment that a magnetizable area is spatially arranged inside the rotor in such a way that the current flowing through the contact arm in this area induces a magnetic field which in turn exerts a torque on the contact arm. | 2011-10-13 |
20110248803 | ELECTROMAGNETIC SWITCH - An electromagnetic switch includes an excitation coil that forms an electromagnet by energizing, a movable core driven by a magnetism generated in the excitation coil, a cylindrical frame having a bottom that accommodates the excitation coil and constitutes a part of a magnetic circuit of the excitation coil, an end plate electrically connected with the frame, and diodes electrically connected with the excitation coil in parallel. In addition, at least one of terminals of the diodes is fixed to the end plate. | 2011-10-13 |
20110248804 | Multistable Electromagnetic Actuators - A multistable electromagnetic actuator is provided which addresses a need for a more robust, reliable and energy efficient actuation device. It comprises an armature ( | 2011-10-13 |
20110248805 | LINEAR SOLENOID - A linear solenoid includes a shaft to reciprocate in an axis direction, a movable member fixed to the shaft, a front stator, a rear stator, a coil, a front housing, and a rear housing. The front housing is made of metal, and covers the front stator and the coil in the axis direction. The rear housing is made of metal, and is connected to the front housing so as to define a space to accommodate the movable member, the front stator, the rear stator and the coil. The rear housing covers the rear stator and the coil in the axis direction. | 2011-10-13 |
20110248806 | SWITCHABLE CORE ELEMENT-BASED PERMANENT MAGNET APPARATUS - A method and device for a switchable core element-based permanent magnet apparatus, for holding and lifting a target, comprised of two or more carrier platters containing core elements. The core elements are magnetically matched soft steel pole conduits attached to the north and south magnetic poles of one or more permanent magnets, inset into carrier platters. The pole conduits contain and redirect the permanent magnets' magnetic field to the upper and lower faces of the carrier platters. By containing and redirecting the magnetic field within the pole conduits, like poles have a simultaneous level of attraction and repulsion. Aligning upper core elements “in-phase,” that is, north-north/south-south with the lower core elements, activates the apparatus by redirecting the combined magnetic fields of the pole conduits into the target. Anti-aligning upper core elements “out-of-phase,” that is, north-south/south-north with the lower core elements, deactivates the apparatus and results in pole conduits containing opposing fields. | 2011-10-13 |
20110248807 | Magnetic Suspension Device - A magnetic suspension device comprises a magnetic base and a suspension body. The suspension body is suspended above the magnetic base. The suspension body is provided with a receiving coil and at least one luminous body. The magnetic base is provided with a transmitting coil. The transmitting coil transmits an AC signal to the receiving coil. The receiving coil converts the AC signal transmitted by the transmitting coil into electric energy and supplies the electric energy to the luminous body for emitting light. In the magnetic suspension device of the present invention, the transmitting coil is arranged at the magnetic base, and the receiving coil is arranged in the suspension body. Wireless power transmission is realized through the transmitting coil and the receiving coil, so, the luminous body arranged on the suspension body can emit light without any cell and external power supply. This wireless power transmission method can avoid the impact on the operation of the suspension body, which not only can ensure the favorable suspension effect of the suspension body, but also can make the suspension body emit light. The magnetic suspension device has a very good decorative effect, and can be widely used in fields such as toys, ornaments, advertisements, and so on. | 2011-10-13 |
20110248808 | OUTDOOR DRY-TYPE TRANSFORMER - A three-phase dry distribution transformer adapted for mounting outdoors on a pad or to a utility pole. The distribution transformer includes one or more winding assemblies mounted to a ferromagnetic core. Each winding assembly includes a low voltage winding and a high voltage winding. In each winding assembly, an encasement comprised of an insulating resin encapsulates the low voltage and high voltage windings. The encasement includes a body and a pair of high voltage bushings and a pair of low voltage bushing. | 2011-10-13 |
20110248809 | Inductor Structure - An inductor structure includes a first inductor and a second inductor. The second inductor includes a loop that surrounds the first inductor. The first inductor includes a first loop and a second loop, and a crossover section coupling the first loop to the second loop so as to cause current flowing through the first inductor to circulate around the first loop in a first rotational direction and around the second loop in a second rotational direction opposite to the first rotational direction; wherein the first and second inductors are arranged in an equilibrated configuration about a first axis that bisects the inductor structure such that the first loop is on one side of the first axis and the second loop is on a second side of the first axis, such that the magnetic interaction between the inductors due to current flow in the inductors is cancelled out. | 2011-10-13 |
20110248810 | WIRE-WOUND COIL - The disclosure provides a wire-wound coil that can prevent contact between an outer flange portion of the wire-wound coil and a mount board so as to prevent breakage of the outer flange portion and misalignment and unwinding of a wound conductive wire. A groove is provided in an outer side face of a flange at an end of a winding core, and an inner flange portion and an outer flange portion are provided on opposite sides of the groove. A distance from a bottom face of the groove to at least an outer side face of the outer flange portion that would be facing a mount board or is attached to a mount board is shorter than a distance from the bottom face of the groove to the inner flange portion. | 2011-10-13 |
20110248811 | STACKED DUAL INDUCTOR STRUCTURE - The dual inductor structure can include a first inductor including a first plurality of coils. Each coil of the first plurality of coils can be disposed within a different one of a plurality of conductive layers. The coils of the first plurality of coils can be vertically stacked and concentric to a vertical axis. The dual inductor structure further can include a second inductor including a second plurality of coils. Each of the second plurality of coils can be disposed within a different one of the plurality of conductive layers. The coils of the second plurality of coils can be vertically stacked and concentric to the vertical axis. Within each conductive layer, a coil of the second plurality of coils can be disposed within an inner perimeter of a coil of the first plurality of coils. | 2011-10-13 |
20110248812 | CURRENT-CONTROLLED VARIABLE INDUCTOR - A variable inductor comprises one or more magnetic cores providing magnetic flux paths. An inductor coil is wound around one or more inductor sections of the one or more magnetic cores. An inductor magnetic flux flows through one or more closed flux paths along the inductor sections of the magnetic core. A control coil is wound around one or more control sections of the one or more magnetic cores. A control magnetic flux flows through one or more closed flux paths along the control sections of the magnetic core. Under this arrangement, the inductor magnetic flux substantially does not flow through the control sections of the magnetic core and the control magnetic flux substantially does not flow through the inductor sections of the magnetic core. The closed flux paths associated with the inductor magnetic flux and the closed flux paths associated with the control magnetic flux share one or more common sections of the magnetic core not including the control sections and inductor sections. The inductance of said variable inductor is varied by varying said control magnetic flux. | 2011-10-13 |
20110248813 | TRANSFORMER - A transformer includes the first iron core having a plurality of legs arranged spaced apart from each other; a plurality of high-voltage side coils wound around the plurality of legs, respectively, and receiving a common single-phase AC power; and a plurality of low-voltage side coils provided corresponding to the high-voltage side coils, magnetically coupled to the corresponding high-voltage side coils, and wound around the plurality of legs, respectively. The high-voltage side coils and the corresponding low-voltage side coils constitute a plurality of coil groups. The transformer further includes the second iron core provided between the coil groups adjacent to each other. | 2011-10-13 |
20110248814 | Shielded-type inductor - An inexpensive shielded-type inductor is disclosed to include a first powder compact member, a coil embedded in the first powder compact member with the bottom side of the coil body thereof kept in flush with the bottom side of the first powder compact member and two metal terminals thereof extending from the two opposite ends of the coil body to the outside of the first powder compact member, and a second powder compact member bonded to the bottom side of the first powder compact member to determine the inductance value of the inductor subject to the thickness of the second powder compact member and to protect the inductor against external environmental factors. | 2011-10-13 |
20110248815 | Method For Expanding The Adjustment Range of Overload Protection Devices, Associated Overload Protection Devices, and Their Use - In order to achieve thermomechanical overload protection with a broad adjustment range for protecting against overload currents, the live components carry an electrical current which is between the value of the overload current and zero. According to at least one embodiment of the invention, switching devices are used which, in a preferred embodiment, switch the current, in parallel, from a first current branch to at least one second current branch, the parallel-connected at least one current branch carrying a partial current, which is between the value of the overload current and zero. In the associated overload protection device, contact devices are provided which are associated with live components on two current branches which can be connected in parallel with one another, wherein at least one current branch can be switched on and off by the switching devices. In an alternative embodiment, a first and a second current branch are connected electrically in series by switching devices, as a result of which it is possible to switch over from an upper adjustment range to another, lower adjustment range of the broad adjustment range. | 2011-10-13 |
20110248816 | VARISTOR COMPRISING AN ELECTRODE HAVING A PROTRUDING PORTION FORMING A POLE AND PROTECTION DEVICE COMPRISING SUCH A VARISTOR - An exemplary varistor is disclosed which includes at least two poles; a non-linear block; a conductive plate arranged on a main face of the block and having a protruding portion forming one of the poles; and an electrically insulating coating applied to the main face of the block. The part forming the connection pole emerges from the electrically insulating coating and has a braze surface extending above the electrically insulating coating; and the protruding part forming the connection pole is connected to the rest of the plate over at least half of the perimeter thereof. | 2011-10-13 |
20110248817 | Synchronized vibration device for haptic feedback - The present invention relates to synchronized vibration devices that can provide haptic feedback to a user. A wide variety of actuator types may be employed to provide synchronized vibration, including linear actuators, rotary actuators, rotating eccentric mass actuators, and rocking mass actuators. A controller may send signals to one or more driver circuits for directing operation of the actuators. The controller may provide direction and amplitude control, vibration control, and frequency control to direct the haptic experience. Parameters such as frequency, phase, amplitude, duration, and direction can be programmed or input as different patterns suitable for use in gaming, virtual reality and real-world situations. | 2011-10-13 |
20110248818 | VISITOR MANAGEMENT SYSTEMS AND METHODS - Various apparatus, methods, techniques and systems are disclosed for admitting, tracking, monitoring and processing data about visitors and vehicles that visit an access-controlled environment. A network having one or more greeting stations and a number of linked answering stations collects and manages data concerning visitors and/or vehicles in the access-controlled environment, and can manage or assist individuals in managing granting access to the access-controlled environment, monitoring visitors and vehicles present in the access-controlled environment, limiting movement and access to certain areas in the access-controlled environment and generating records and other data about each visit. Some embodiments of the network are also adaptable for use in providing traveler assistance and consular services for various types of individuals. | 2011-10-13 |
20110248819 | ANTENNA CORE AND METHOD OF MANUFACTURING THE SAME, AND ANTENNA AND DETECTION SYSTEM USING THE SAME - An antenna core includes a laminate of a plurality of Co-based amorphous magnetic alloy thin strips in which a length ratio of a long axis to a short axis is greater than 1. 60% or more of the Co-based amorphous magnetic alloy thin strips in terms of the number of the thin strips as percentage have a line-shaped mark formed along the long axis on at least one surface thereof. An antenna includes the antenna core and a winding wound around the antenna core along the long axis. | 2011-10-13 |
20110248820 | DEVICE FOR AUTOMATICALLY UNLOCKING AN OPENABLE PANEL OF A MOTOR VEHICLE - The present invention relates to a device for automatically locking and/or unlocking at least one openable panel ( | 2011-10-13 |