40th week of 2012 patent applcation highlights part 54 |
Patent application number | Title | Published |
20120252094 | Recombinant Butyrylcholinesterases and Truncates Thereof - Isolated nucleic acids encoding polypeptides that exhibit butyrylcholinesterase (BChE) enzyme activity are disclosed, along with molecular criteria for preparing such nucleic acids, including codon optimization. Methods of preparing modified and/or truncated BChE molecules having selected properties, especially selective formation of monomers, are also described. Vectors and cells containing and/or expressing the nucleic acids are also disclosed. | 2012-10-04 |
20120252095 | Alpha-Amylase Variants - The invention relates to a variant of a parent Termamyl-like alpha-amylase, comprising mutations in two, three, four, five or six regions/positions. The variants have increased stability at high temperatures (relative to the parent). The invention also relates to a DNA construct comprising a DNA sequence encoding an alpha-amylase variant of the invention, a recombinant expression vector which carries a DNA construct of the invention, a cell which is transformed with a DNA construct of the invention, the use of an alpha-amylase variant of the invention for washing and/or dishwashing, textile desizing, starch liquefaction, a detergent additive comprising an alpha-amylase variant of the invention, a manual or automatic dishwashing detergent composition comprising an alpha-amylase variant of the invention, a method for generating a variant of a parent Termamyl-like alpha-amylase, which variant exhibits increased. | 2012-10-04 |
20120252096 | MUTANT PROTEINASE WITH REDUCED SELF-CLEAVAGE ACTIVITY AND METHOD OF PURIFICATION - The present invention provides a mutant 27 kDa NIa proteinase having reduced self-cleavage activity relative to the self-cleavage activity of its wild-type proteinase. The mutant has the same substrate cleavage activity as the wild-type proteinase but is more stable than the wild-type proteinase. The present invention also provides a method of obtaining large quantities of active 27 kDa NIa proteinase for use as a tool for purification of other proteins. | 2012-10-04 |
20120252097 | Therapeutic Agents Comprising Pro-Apoptotic Proteins - The present invention relates to targeted killing of a cell utilizing a chimeric polypeptide comprising a cell-specific targeting moiety and a signal transduction pathway factor. In a preferred embodiment, the signal transduction pathway factor is an apoptosis-inducing factor, such as granzyme B, granzyme A, or Bax. | 2012-10-04 |
20120252098 | Dissociation of Product-complexed Contaminants in Chromatography - The invention provides methods and materials for using apatite chromatography supports to dissociate and remove contaminants that are complexed to biological products. The invention further provides materials and methods for dissociating aggregations of target biological molecules or improperly folded target molecules to improve purification of the target molecule. | 2012-10-04 |
20120252099 | IMMUNOGENIC MINICELLS AND METHODS OF USE - The disclosed invention relates to immunogenic minicells cells (anucleated) and their use to induce an immune response from a subject. | 2012-10-04 |
20120252100 | Mixed Strain Culture For The Disposal Of Food Waste, And Food Waste Disposal Method Using Same - The present invention relates to a mixed strain culture for the disposal of food waste, and more particularly, to a mixed strain culture for the disposal of food waste which has high degradation activity on cellulose, amylose, protein, and fat at a wide range of temperatures, pH levels, and salinities, and which can degrade food waste having a high moisture content and therefore can degrade food waste in an efficient manner. The present invention also relates to a food waste disposal method using the mixed strain culture. | 2012-10-04 |
20120252101 | VARIANTS OF BACILLUS SP. TS-23 ALPHA-AMYLASE WITH ALTERED PROPERTIES - Variants of | 2012-10-04 |
20120252102 | BIOREMEDIATION SYSTEMS, COMPOSITIONS, AND METHODS - Systems, compositions, and methods for the anaerobic oxidative bioremediation of a contaminant contained within a treatment zone associated with a contaminated region. These systems, compositions, and methods may include a bioremediation formulation that includes a high-mobility oxidant, a low-mobility oxidant, and a nutrient source. The high-mobility oxidant may include a nitrate salt. The low-mobility oxidant may include a sulfate salt. The nutrient source may include brewer's yeast and/or a complex sugar. The bioremediation formulation also may include one or more additional components, including a phosphate salt, a surfactant, a solvent, a chemical oxidant, and/or a bio-augmentation species. Methods of supplying the bioremediation formulation to the treatment zone may include identifying the contaminated region, estimating a mass of contaminant within the contaminated region, determining a bioremediation formulation composition, supplying the bioremediation formulation to the treatment zone, supplying supplemental material(s) to the treatment zone, and/or modifying the environment within the treatment zone. | 2012-10-04 |
20120252103 | APPARATUS, METHOD AND SYSTEM FOR ALGAE GROWTH - The cultivation, by optimized growth and harvesting of algae derived bio-mass may provide useful feedstock for various products and processes. The present invention provides an apparatus that allows for the optimized growth and harvesting of algae within a photo-bioreactor. The photo-bioreactor may include a channel and a propulsion unit for circulating an algae mixture through a channel while exposing the algae mixture to light to support photosynthesis and growth of the algae. A method is also provided for the optimizing the growth and harvesting of algae utilizing a number of different input streams. Further, a system including a programmable control assembly is provided for the growth and harvesting of algae. | 2012-10-04 |
20120252104 | ENERGY EFFICIENT TEMPERATURE CONTROL OF ENCLOSED MICROALGAE CULTIVATOR - The present invention provides methods and systems for energetically efficient and economically viable temperature regulation of the environment within commercial scale enclosed microalgae cultivators. | 2012-10-04 |
20120252105 | SYSTEMS, APPARATUSES AND METHODS OF CULTIVATING ORGANISMS AND MITIGATION OF GASES - Cultivators and methods of cultivating microorganisms are provided. In some examples, a cultivator may include a retaining wall defining a cavity for retaining liquid and may also include a horizontally orientated frame at least partially positioned within the cavity and having media for supporting microorganisms. In other examples, the horizontal frame may be partially submerged in the liquid retained in the cavity and rotatable to selectively submerge and unsubmerge portions of the frame and media. | 2012-10-04 |
20120252106 | Use of Protease Variants - The present invention relates to protease variants, in particular to the use of the protease variants in hard surface cleaning. The present invention also relates to detergent compositions, such as dish wash compositions, comprising the protease variants, and the use of such compositions for removal of proteinaceous stains, especially boiled egg stains. Finally, the invention provides methods for removal proteinceous stains using the variant enzymes or laundry and detergent compositions composition comprising the variants enzymes. | 2012-10-04 |
20120252107 | Bio-Reactor System and Method for Composting Food Waste - A bio-reactor made according to this invention uses low temperature aerobic composting to decompose bio-compostable material. The reactor includes mixing paddles with wiper blades which aerate and agitate a set of plastic resin biochips which house microorganisms and cause the chips to come into contact with bio-compostable material. A water pipe located toward the upper portion of the bio-reactor delivers fresh or recycled water (or some mix of the two) and the bio-reactor cycles between a water cycle and a non-water cycle. Agitation also cycles on and off. Perforated bottom screens limit the size of the composted material exiting the bio-reactor. The wiper blades, which may be brushes, continually wipe the bottom screens and work to prevent blockage and build-up of debris within the bio-reactor. | 2012-10-04 |
20120252108 | PNEUMATICALLY AGITATED AND AERATED SINGLE-USE BIOREACTOR - A single-use round flexible mixing bag for use in bioprocessing in which a fluid is received and agitated using an internal fluid-agitating element comprising a radial flow impeller driven by an internal pneumatic vane motor is disclosed. The bag may include an integral sparger and sensor receiver. Related methods are also disclosed. | 2012-10-04 |
20120252109 | REAGENT CARTRIDGE FOR AN ASSEMBLY FOR SELECTIVELY PERFORMING A CLINCIAL CHEMICAL TEST OR AN ELISA TEST, USE OF SAID REAGENT CARTRIDGE AND ASSEMBLY - The invention relates to a reagent cartridge | 2012-10-04 |
20120252110 | CELL CULTURE APPARATUS - A cell culture apparatus includes: an isolator in which a sterile space accommodating a cell incubator filled with a culture solution containing cells to be cultured is disposed; a sampling unit configured to sample the culture solution in the cell incubator; a delivery flow path through which an inside of the sterile space and an outside of the sterile space communicate with each other, the delivery flow path configured to limit a flow in the delivery flow path to a direction that is directed from the inside of the sterile space toward the outside of the sterile space; and a culture solution delivering section configured to deliver the sampled culture solution to the outside of the sterile space via the delivery flow path. | 2012-10-04 |
20120252111 | MEASURING SYSTEM USING OPTICAL WAVEGUIDE, MEASURING DEVICE, MEASURING METHOD, OPTICAL WAVEGUIDE TYPE SENSOR CHIP, AND MAGNETIC FINE PARTICLE - According to one embodiment, a measuring system using an optical waveguide is provided. The measuring system has an optical waveguide, magnetic fine particles, a magnetic field applying unit, a light source and a light receiving element. The optical waveguide has a sensing area to which first substances having a property of specifically bonding to subject substances to be measured are fixed. Second substances having a property of specifically bonding to the subject substances are fixed to the magnetic fine particle. The magnetic field applying unit generates a magnetic field for moving the magnetic fine particles. The light source inputs a light into the optical waveguide. The light receiving element receives the light output from the optical waveguide. | 2012-10-04 |
20120252112 | THIN-LAYER PHOTOBIOREACTOR WITH HIGH VOLUME PRODUCTIVITY - The invention relates to a photobioreactor ( | 2012-10-04 |
20120252113 | USE OF TRIPLEX STRUCTURE DNA IN TRANSFERRING NUCLEOTIDE SEQUENCES - The invention concerns a recombinant vector characterized in that it comprises a polynucleotide comprising a central initiation cis-active region (cPPT) and a termination cis-active region (CTS), the regions being of retroviral or retroviral-like origin, and the vector further comprising a predetermined nucleotide sequence (transgene or nucleotide sequence of interest) and retrotranscription regulating, expressing, and packaging signals of retroviral or retroviral-like origin. | 2012-10-04 |
20120252114 | USE OF TRIPLEX STRUCTURE DNA IN TRANSFERRING NUCLEOTIDE SEQUENCES - The invention concerns a recombinant vector characterized in that it comprises a polynucleotide comprising a central initiation cis-active region (cPPT) and a termination cis-active region (CTS), the regions being of retroviral or retroviral-like origin, and the vector further comprising a predetermined nucleotide sequence (transgene or nucleotide sequence of interest) and retrotranscription regulating, expressing, and packaging signals of retroviral or retroviral-like origin. | 2012-10-04 |
20120252115 | METHODS AND DEVICES FOR NUCLEIC ACID PURIFICATION - The invention provides pipette tip columns and automated methods for the purification of nucleic acids such as plasmids from unclarified cell lysates containing cell debris as well as methods for making and using such columns. The columns typically include a bed of medium positioned in the pipette tip column, above a bottom frit and with an optional top frit. | 2012-10-04 |
20120252116 | Fluid Flow Device Containing Nanotubes and Method for Cell Trafficking Using Same - The present invention relates to device and method for cell trafficking. In particular, the invention relates to a fluid flow device in which the flow surface has nanotubes immobilized thereon. The nanotubes have molecules on their outer surface, which support cell rolling. Also provided is a method for separation of a cell type from a mixture of different cell types or from a fluid based on the differential rolling property of the cell type on the flow surface. | 2012-10-04 |
20120252117 | OPTIMIZED MESSENGER RNA - The present invention is directed to a synthetic nucleic acid sequence which encodes a protein wherein at least one non-common codon or less-common codon is replaced by a common codon. The synthetic nucleic acid sequence can include a continuous stretch of at least 90 codons all of which are common codons. | 2012-10-04 |
20120252118 | PLASTIC PRESSURE VESSEL FOR BIOPHARMACEUTICAL APPLICATIONS AND METHODS THEREOF - Described herein is a molded plastic pressure vessel for biopharmaceutical applications and methods thereof. The molded plastic pressure vessel has a surface area of at least 500 inches2 and comprises a polyphenylene oxide polymer; and at least one antioxidant. | 2012-10-04 |
20120252119 | METHODS FOR THE COLLECTION AND MATURATION OF OOCYTES - The present invention relates to a method of producing an embryo from an oocyte by an assisted reproduction technology. The method includes (a) collecting an oocyte from an ovary of a subject in a collection medium comprising a first phosphodiesterase inhibitor and an agent that increases intracellular cAMP concentration in the oocyte, (b) culturing the oocyte in a maturation medium comprising a second phosphodiesterase inhibitor, and (c) producing an embryo from the oocyte by an assisted reproduction technology. The present invention also relates to methods of inducing oocyte maturation. For example a method of in vitro maturation of an oocyte is described which comprises steps (a) and (b) above. The present invention also relates to an oocyte maturation medium comprising a phosphodiesterase inhibitor and a ligand for inducing maturation of the oocyte. A combination product comprising an oocyte collection and maturation medium referred to above is also described. | 2012-10-04 |
20120252120 | DIAZONIUM SALT MODIFICATION OF SILK POLYMER - A method for modifying silk polymer by coupling a chemical moiety to a tyrosine residue of a silk polymer is described herein for the purpose of altering the physical properties of the silk protein. Thus, silk proteins with desired physical properties can be produced by the methods described herein. These methods are particularly useful when the introduction of cells to a mammal is desired, since modifications to the silk protein affect the physical properties and thus the adhesion, metabolic activity and cell morphology of the desired cells. The silk protein can be modified to produce, or modify, a structure that provides an optimal environment for the desired cells. | 2012-10-04 |
20120252121 | Culture Method for Amplifying Large Numbers of Hair Follicle Stem Cells in Vitro - The present invention is a method, belonging to the field of cell culture, for amplifying a large numbers of hair follicle stem cells in vitro by using microspheres as carriers for cell culture and a revolving bottle as a fermentation tank for cell proliferation. The method is simple in its procedures, is economical and practical, and avoids side effects associated with the traditional cell amplification method, such as the weakening of cell proliferation capability, the reduction of differentiation potential and the like caused by repeated cell subculture, and also reduces the consumption of the culture solution; the hair follicle stem cells amplified by the method can still keep the original proliferation capability and differentiation potential, and can be used for: (1) establishing hair follicle stem cell bank to provide high-quality seed cells for related research on adult stem cells; (2) transplanting and repairing tissues and organs subjected to pathological changes; (3) constructing tissue-engineered organs to be used as substitute autologous organs for transplantation or repair of organs subjected to pathological changes or missing organs; and (4) serving as target cells for the genetic treatment of corresponding diseases. | 2012-10-04 |
20120252122 | METHODS AND COMPOSITIONS FOR INCREASING PRODUCTION OF INDUCED PLURIPOTENT STEM CELLS (IPSCS) - Disclosed herein are methods and compositions for increasing yield of induced pluripotent stem cells (iPSCs). | 2012-10-04 |
20120252123 | NUCLEIC ACID SILENCING SEQUENCES - The present invention features compositions and methods for introducing, into cells, nucleic acids whose expression results in chromosomal silencing. The nucleic acids are targeted to specific chromosomal regions where they subsequently reduce the expression of deleterious genes, or cause the death of deleterious cells. Where the nucleic acid sequence is a silencing sequence, it may encode an Xist RNA or other non-coding, silencing RNA. Accordingly, the present invention features, inter alia, nucleic acid constructs that include a transgene (e.g., a silencing sequence encoding an Xist RNA or other non-coding RNA that silences a segment of a chromosome); first and second sequences that direct insertion of the silencing sequence into a targeted chromosome; and, optionally, a selectable marker. | 2012-10-04 |
20120252124 | COMPOSITIONS AND METHODS FOR ALTERING ALPHA- AND BETA-TOCOTRIENOL CONTENT USING MULTIPLE TRANSGENES - Preparation and use of isolated nucleic acids useful in altering the oil phenotype of plants are described. Isolated nucleic acids and their encoded polypeptides are described that alter the content of alpha-tocotrienol, beta-tocotrienol, or both, in transformed seeds and oil obtained from the transformed seeds. Expression cassettes, host cells and transformed plants are described that contain the foregoing nucleic acids. | 2012-10-04 |
20120252125 | ETHYLENE OXIDE STERILIZATION INDICATOR COMPOSITIONS - An indicator composition for indicating that an article has undergone an ethylene oxide sterilization process is provided. The indicator composition includes at least one pyridine derivative that reacts with moist ethylene oxide to provide an irreversible color change of the composition. | 2012-10-04 |
20120252126 | METHOD FOR ANALYZING AND DETECTING CALCIUM ELEMENT IN ORE - A method for determining the content of calcium element in an ore is provided. It includes: decomposing the ore with hydrochloric acid and nitric acid under heating condition, adding perchloric acid, cooling, adding a small amount of water and boiling the solution to dissolve the salts, then cooling, diluting to the constant volume, filtering into a dry beaker with dry filter-paper, masking interfering ions with triethanolamine, adjusting the pH value of the solution with KOH, using calcein-thymolphthalein as indicator, and determinating the content of calcium with EDTA titrimetry. | 2012-10-04 |
20120252127 | Optical Blood Coagulation Monitor and Method - An optical blood coagulation monitor and method. The monitor has a blood sample holder, a laser with its output light directed through the blood sample, a two-dimensional detector that is able to detect light at the laser light wavelength and that has a detector output, optics for imaging onto the detector laser light that is forward scattered by the blood, and a data analysis system, responsive to the detector output, that is adapted to analyze the detected light to provide information on time-resolved coagulation and clotting properties of the blood. | 2012-10-04 |
20120252128 | LABEL-FREE FUNCTIONAL NUCLEIC ACID SENSORS FOR DETECTING TARGET AGENTS - A general methodology to design label-free fluorescent functional nucleic acid sensors using a vacant site approach and an abasic site approach is described. In one example, a method for designing label-free fluorescent functional nucleic acid sensors (e.g., those that include a DNAzyme, aptamer or aptazyme) that have a tunable dynamic range through the introduction of an abasic site (e.g., dSpacer) or a vacant site into the functional nucleic acids. Also provided is a general method for designing label-free fluorescent aptamer sensors based on the regulation of malachite green (MG) fluorescence. A general method for designing label-free fluorescent catalytic and molecular beacons (CAMBs) is also provided. The methods demonstrated here can be used to design many other label-free fluorescent sensors to detect a wide range of analytes. Sensors and methods of using the disclosed sensors are also provided. | 2012-10-04 |
20120252129 | PRE-CONCENTRATOR AND METHOD OF USING THE SAME - A chemical pre-concentrator is provided having a support structure, an airflow conduit, and a layer of a reactive chemical compound on a surface of the support structure is used for collecting and pre-concentrating at least one chemical analyte from a dilute sample. A method of concentrating a gaseous sample is provide that includes exposing the chemical pre-concentrator with a dilute gaseous sample that contains at least one chemical analyte; and forming a conjugate of the at least one chemical analyte. A method of diagnosing a disease state in a mammalian patient is provided using the chemical pre-concentrator. | 2012-10-04 |
20120252130 | Particulate Matter Generator For Use With An Emissions Control Device Aging System - A particulate matter generator implemented as a “mini-burner”, and used in conjunction with a larger test system for the specific purpose of enhancing the particulate matter content of exhaust gas. The exhaust stream of the larger system is supplemented with exhaust from the mini-burner to produce exhaust with desired particulate matter characteristics. The exhaust gas may then be used for various test purposes, such as testing emissions control devices. | 2012-10-04 |
20120252131 | BIOLOGICAL MATERIAL ANALYZER AND BIOLOGICAL MATERIAL ANALYSIS METHOD - An analyzer includes a holder for a chip having a spreading layer for a sample including a biological material and a reaction layer with a reagent that reacts with the biological material and generates a chromogenic material, a first light source that applies first light that is absorbed by the chromogenic material, a first detector that detects first output light from the chip irradiated with the first light, a second light source that applies second light that is absorbed by the biological material, a second detector that detects second output light from the chip irradiated with the second light, and a calculation unit that calculates a first concentration of the biological material from the first output light, calculates a spreading state of the sample from the second output light, and calculates a second concentration of the biological material by correcting the first concentration using the calculated spreading state. | 2012-10-04 |
20120252132 | VARIOUS-SUBSTANCE HOLDER, VARIOUS-SUBSTANCE HOLDER TREATING APPARATUS, AND VARIOUS-SUBSTANCE HOLDER TREATING METHOD - A various-substance holder, a various-substance holder treating apparatus, and a various-substance holder treating method are provided which enable the mutual identification of particulate carriers to which various substances are or can be immobilized without the need to arrange the particulate carriers at predetermined positions or in a predetermined order, eliminating the need for time and effort to arrange the various substances at predetermined positions or in a predetermined order to allow treatments to be quickly and easily achieved. The various-substance holder has a plurality of particulate carriers or plural sets of particulate carriers to which plural types of chemical substances are or can be immobilized and a carrier holding portion holding the plurality of particulate carriers or the plural sets of particulate carriers in a substantially stationary state such that the plurality of particulate carriers or the plural sets of particulate carriers can be externally measured. | 2012-10-04 |
20120252133 | TEST METER WITH A STRIP PORT CONNECTOR CONFIGURED FOR FLUID ENTRAPMENT - A test meter for use win an analytical test strip for the determination of an analyte (such as glucose) in a bodily fluid sample (e.g., a whole blood sample) includes a test meter housing and a strip port connector. The test meter housing has a distal end with a strip port opening configured to receive the analytical test strip. The strip port connector is integrated with the distal end of the test meter housing and has a distal portion with an analytical test strip guide. The analytical test strip guide has an upper guide surface configured such that an analytical test strip received in the strip port opening is guided and supported by the upper guide surface and also has a liquid entrapment feature configured to direct free liquid that enters the strip port opening away from the upper guide surface and entrap such directed liquid in the distal portion of the strip port connector and/or the distal end of the test meter housing. The strip port connector also has a proximal portion disposed within the test meter housing with the proximal portion having an electrical connector pin configured for operable electrical contact with an analytical test strip received within the strip port opening. | 2012-10-04 |
20120252134 | TEST TUBE FOR DIAGNOSTIC ANALYSES - A test tube ( | 2012-10-04 |
20120252135 | PROTECTION FROM HYDROPHOBIZING AGENTS - The present invention concerns storage containers for storing diagnostic elements having a hydrophilic or hydrophilically coated surface. Furthermore, the invention concerns analytical measuring devices which comprise storage containers of this type, and the use of an absorption material for selectively absorbing hydrophobic, volatile substances in such storage containers. | 2012-10-04 |
20120252136 | MARKER SOLUTION TO BE APPLIED BY MEANS OF AN INKJET PRINTER - The invention relates to a marker solution which is to be applied by means of an inkjet printer and contains (i) at least one organic solvent that has a greater steam pressure than water at 20° C. and a water content of less than 50 percent (v/v), (ii) predefined first synthetically produced nucleic acids, and (iii) a nucleic acid-complexing, organic auxiliary agent as components. | 2012-10-04 |
20120252137 | Fluorescence Polarization Assay For Bacterial Endotoxin - The present invention comprises methods of detecting and quantifying bacterial endotoxin by using a tracer or a fluorescently labeled polymyxin wherein fluorescent tags include bodipy, NHS-fluorescein, FITC, 5-carboxyfluorescein, boron dipyrromethene, or tetramethylrhodamine. The polymyxins utilized include polymyxin B | 2012-10-04 |
20120252138 | Methods and Related Devices for Continuous Sensing Utilizing Magnetic Beads - Provided is a fluidic device including a main channel, wherein a first inlet fluidly connects to an upstream end of the main channel and introduces magnetic beads into a first side of the main channel. A second inlet is fluidly connected to the upstream end of the main channel and introduces a sample stream into a second side of the main channel. A magnet disposed adjacent to the second side of the main channel pulls the magnetic beads towards a sidewall of the second side, and thus into the sample stream. The beads continue through an extended incubation channel before entering a return channel. The return channel includes a detection region. Also provided is a multi-layer micro-fluidic assay device. An assay method that utilizes a microfluidic assay device is provided as well. | 2012-10-04 |
20120252139 | Novel Process - A process for the identification of compounds with a molecular weight in the range 100 to 750 which inhibit the binding of the first and/or second bromodomains of human BRD-2 to 4 to acetylated lysine residues of their physiological partner proteins which comprises selecting those compounds which are able to:
| 2012-10-04 |
20120252140 | FLUORESCENT SUBSTANCE-CONTAINING SILICA NANOPARTICLES AND BIOSUBSTANCE LABELING AGENT - Disclosed are fluorescent substance-containing silica nanoparticles containing a fluorescent substance therein featured in that the surface of the silica nanoparticles is coated with a material having a bulk refractive index of from 1.60 to 4.00. The invention can provide fluorescent substance-containing silica nanoparticles excellent in long term storage stability and a biosubstance labeling agent employing the same. | 2012-10-04 |
20120252141 | Adaptive Recipe Selector - The invention provides a method of processing a wafer using Ion Energy (IE)-related multilayer process sequences and Ion Energy Controlled Multi-Input/Multi-Output (IEC-MIMO) models and libraries that can include one or more measurement procedures, one or more IEC-etch sequences, and one or more Ion Energy Optimized (IEO) etch procedures. The IEC-MIMO process control uses dynamically interacting behavioral modeling between multiple layers and/or multiple IEC etch sequences. The multiple layers and/or the multiple IEC etch sequence can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created using IEO etch procedures. | 2012-10-04 |
20120252142 | Singulation and Strip Testing of No-Lead Integrated Circuit Packages Without Tape Frame - Strip testing is applied to a plurality of integrated circuit dies that are each encapsulated in an encapsulant, that each have a set of externally accessible leads connected thereto, and that are electrically isolated from one another. Provision is made for the strip testing to be performed without mounting the encapsulated integrated circuit dies on a support tape. | 2012-10-04 |
20120252143 | METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DEVICE - To solve a problem that, in a method of manufacturing an organic light emitting device using a step of releasing a layer formed on a release layer by dissolving the release layer, released film flakes are not dissolved in a removing liquid for dissolving the release layer, and thus may drift in the removing liquid and may adhere to a surface of a substrate after patterning to cause defective patterning, provided is a method of manufacturing an organic light emitting device, including forming the release layer continuously over multiple light emitting portions to cause the size of the released film flakes to be large. This may reduce the possibility that the released film flakes adhere to the surface of the substrate and may facilitate, even when the released film flakes once adhere to the surface of the substrate, removal of the released film flakes later, thereby suppressing defective patterning. | 2012-10-04 |
20120252144 | METHOD FOR THERMALLY CONTACTING OPPOSING ELECTRICAL CONNECTIONS OF A SEMICONDUCTOR COMPONENT ARRANGEMENT - The invention relates to thermally contacting a semiconductor component arrangement, wherein at least one of two heat conducting bodies disposed on opposite sides of the semiconductor component arrangement is brought into contact with a contact surface of the semiconductor component arrangement by means of a metal layer under the application of a force, wherein the metal layer melts during solidification of a locking agent, forming an adhesive bond between the two heat transfer bodies over the entire region thereof. | 2012-10-04 |
20120252145 | METHOD OF MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE AND MASK FOR APPLICATION OF PASTE USED THEREFOR - Provided are a mask for an application of paste and a method of manufacturing a semiconductor light emitting device by using the same. The method includes preparing a light emitting structure including first and second conductive semiconductor layers and an active layer disposed therebetween, which has at least one electrode formed on a surface of the light emitting structure; disposing a mask having an open part exposing a portion of the surface of the light emitting structure therethrough and a recess part corresponding the electrode in a region thereof on a surface of the light emitting structure; and applying wavelength conversion material-containing paste to the surface of the light emitting structure through the open part. | 2012-10-04 |
20120252146 | PHOTONIC QUANTUM RING LASER AND FABRICATION METHOD THEREOF - A photonic quantum ring (PQR) laser includes an active layer having a multi-quantum-well (MQW) structure and etched lateral face. The active layer is formed to be sandwiched between p-GaN and n-GaN layers epitaxially grown on a reflector disposed over a support substrate. A coating layer is formed over an outside of the lateral faces of the active alyer, and upper electrode is electrically connected to an upper portion of the n-GaN layer, and a distributed Bragg reflector (DBR) is formed over the n-GaN layer and the upper electrode. Accordingly, the PQR laser is capable of oscillating a power-saving vertically dominant 3D multi-mode laser suitable for a low power display device, prevent the light speckle phenomenon, and generate focus-adjusted 3D soft light. | 2012-10-04 |
20120252147 | METHOD OF MANUFACTURING ORGANIC ELECTROLUMINESCENCE ELEMENT - A method of manufacturing an organic electroluminescence element having on a belt-formed flexible base material, a first electrode, at least one organic functional layer, and a second electrode, includes continuously forming at least one organic functional layer by coating the same on a first electrode which is formed continuously on the flexible base material in the conveying direction thereof, further forming a second electrode on the organic functional layer, so as to make a plurality of organic electroluminescence element structures in the conveying direction, and then cutting the electroluminescence element structures into individual organic electroluminescence elements so as to manufacture organic electroluminescence elements. | 2012-10-04 |
20120252148 | ECHTANT AND METHOD FOR MANUFACTURING DISPLAY DEVICE USING THE SAME - An etchant according to exemplary embodiments of the present invention includes about 0.5 wt % to about 20 wt % of persulfate, about 0.01 wt % to about 2 wt % of a fluorine compound, about 1 wt % to about 10 wt % of inorganic acid, about 0.5 wt % to about 5 wt % of a cyclic amine compound, about 0.1 wt % to about 5 wt % of a chlorine compound, about 0.05 wt % to about 3 wt % of copper salt, about 0.1 wt % to about 10 wt % of organic acid or organic acid salt, and water. | 2012-10-04 |
20120252149 | METHOD OF MANUFACTURING ORGANIC ELECTROLUMINESCENCE DISPLAY DEVICE - Provided is a method of manufacturing an organic electroluminescence display device including an emission region, the emission region including multiple organic compound layers arranged therein, each of the organic compound layers being provided between a pair of electrodes and including at least an emission layer, the method including: forming in the entire emission region an organic compound layer which is insoluble in water; forming on the organic compound layer a mask layer containing a water-soluble material in a predetermined pattern; removing a part of the organic compound layer which is formed in a region which is not covered with the mask layer; removing the mask layer; drying the organic compound layer; and forming a common layer on the organic compound layers, in which the steps from the drying of the organic compound layer to the forming of a common layer are carried out in a vacuum. | 2012-10-04 |
20120252150 | METHOD OF MANUFACTURING ORGANIC ELECTROLUMINESCENCE DISPLAY DEVICE - A method of manufacturing an organic electroluminescence display device includes an organic compound layer which is placed between a pair of electrodes and includes at least an emission layer, the organic compound layer being two-dimensionally arranged, includes forming the organic compound layer which is insoluble in water in an entire emission region on a substrate, providing a mask layer containing a water-soluble material in at least a part of a region on the organic compound layer, removing a part of the organic compound layer which is provided in a region which is other than the region in which the mask layer is provided, removing the mask layer, and forming, after the removing of the mask layer, a layer containing at least an alkali metal or an alkaline-earth metal in a region including at least the emission region. | 2012-10-04 |
20120252151 | METHOD OF MANUFACTURING ORGANIC ELECTROLUMINESCENCE DEVICE - A method of manufacturing an organic electroluminescence device includes forming a first organic electroluminescence layer at least on a first lower electrode, forming a first protective layer on the first organic electroluminescence layer, processing the first organic electroluminescence layer and the first protective layer, forming a second organic electroluminescence layer at least on a second lower electrode, forming a second protective layer on the second organic electroluminescence layer, and processing the second organic electroluminescence layer and the second protective layer. The second organic electroluminescence layer and the second protective layer, which have been processed by the processing the second organic electroluminescence layer and the second protective layer, cover an end portion of the first organic electroluminescence layer and an end portion of the first protective layer, which have been processed by the processing the first organic electroluminescence layer and the first protective layer. | 2012-10-04 |
20120252152 | DISPLAY PANEL, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF - An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit. | 2012-10-04 |
20120252153 | Semiconductor Processing Methods - Some embodiments include methods of forming semiconductor constructions in which a semiconductor material sidewall is along an opening, a protective organic material is over at least one semiconductor material surface, and the semiconductor material sidewall and protective organic material are both exposed to an etch utilizing at least one fluorine-containing composition. The etch is selective for the semiconductor material relative to the organic material, and reduces sharpness of at least one projection along the semiconductor material sidewall. In some embodiments, the opening is a through wafer opening, and subsequent processing forms one or more materials within such through wafer opening to form a through wafer interconnect. In some embodiments, the opening extends to a sensor array, and the protective organic material is comprised by a microlens system over the sensor array. Subsequent processing may form a macrolens structure across the opening. | 2012-10-04 |
20120252154 | BACKSIDE ILLUMINATED IMAGE SENSOR - A backside illuminated image sensor includes a light receiving element disposed in a first substrate, an interlayer insulation layer disposed on the first substrate having the light receiving element, an align key spaced apart from the light receiving element and passing through the interlayer insulation layer and the first substrate, a plurality of interconnection layers disposed on the interlayer insulation layer in a multi-layered structure, wherein the backside of the lowermost interconnection layer is connected to the align key, a passivation layer covering the interconnection layers, a pad locally disposed on the backside of the first substrate and connected to the backside of the align key, a light anti-scattering layer disposed on the backside of the substrate having the pad, and a color filter and a microlens disposed on the light anti-scattering layer to face the light receiving element. | 2012-10-04 |
20120252155 | METHOD OF IMPLANTING IMPURITIES AND METHOD OF MANUFACTURING A COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) IMAGE SENSOR USING THE SAME - In a method of doping impurities, an amorphous layer is formed on a substrate. Impurities are implanted through a top surface of the amorphous layer to form a first doping region at an upper portion of the substrate. The first doping region and the amorphous layer are transformed into a second doping region and a recrystallized layer, respectively, by a laser annealing process. The recrystallized layer is removed. | 2012-10-04 |
20120252156 | SOLID-STATE IMAGING DEVICE HAVING PENETRATION ELECTRODE FORMED IN SEMICONDUCTOR SUBSTRATE - A solid-state imaging device includes an imaging element, an external terminal, an insulating film, a penetration electrode, a first insulating interlayer, a first electrode, and a first contact plug. The imaging element is formed on a first main surface of a semiconductor substrate. The external terminal is formed on a second main surface facing the first main surface of the substrate. The insulating film is formed in a through-hole formed in the substrate. The penetration electrode is formed on the insulating film in the through-hole and electrically connected to the external terminal. The first insulating interlayer is formed on the first main surface of the substrate and the penetration electrode. The first electrode is formed on the first insulating interlayer. The first contact plug is formed in the first insulating interlayer between the penetration electrode and the first electrode to electrically connect the penetration electrode and the first electrode. | 2012-10-04 |
20120252157 | IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME - Disclosed are an image sensor and a method of manufacturing the same. A metal wiring consisting of a lower metal wiring, an upper metal wiring, and a plug connecting the lower and upper metal wirings, in which the lower and upper metal wiring are made of a transparent conductive film pattern, is formed on a substrate with devices formed thereon, the devices including a photodiode and gate electrodes. Then, a passivation film, a color filter, and a microlens are sequentially formed on the metal wiring. All or a portion of the metal wiring is formed in a transparent conductive film pattern. As such, the metal wiring is formed on the photodiode. | 2012-10-04 |
20120252158 | Method for Manufacturing Lateral Germanium Detectors - An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers. | 2012-10-04 |
20120252159 | METHODS FOR FORMING OPTOELECTRONIC DEVICES INCLUDING HETEROJUNCTION - Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side. | 2012-10-04 |
20120252160 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - In a method for manufacturing a transistor including an oxide semiconductor layer, a gate electrode is formed and then an aluminum oxide film, a silicon oxide film, and the oxide semiconductor film are successively formed in an in-line apparatus without being exposed to the air and are subjected to heating and oxygen adding treatment in the in-line apparatus. Then, the transistor is covered with another aluminum oxide film and is subjected to heat treatment, so that the oxide semiconductor film from which impurities including hydrogen atoms are removed and including a region containing oxygen at an amount exceeding that in the stoichiometric composition ratio. The transistor including the oxide semiconductor film is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress (BT test) can be reduced. | 2012-10-04 |
20120252161 | DIE BONDING METHOD UTILIZING ROTARY WAFER TABLE - An array of semiconductor components, comprising a first plurality of semiconductor components and a second plurality of semiconductor components held on a carrier, is bonded onto one or more substrates. The first plurality of semiconductor components is first located for pick-up by a transfer device, and each semiconductor component comprised in the first plurality of semiconductor components is picked up with the transfer device and is bonded onto a respective bonding position on the one or more substrates. After the first plurality of semiconductor components have been picked up and bonded, the carrier is rotated and the second plurality of semiconductor components is located for pick-up by the transfer device. Thereafter, each semiconductor component comprised in the second plurality of semiconductor components is picked up with the transfer device and is bonded onto a respective bonding position on the one or more substrates. | 2012-10-04 |
20120252162 | METHODS FOR BONDING SEMICONDUCTOR STRUCTURES INVOLVING ANNEALING PROCESSES, AND BONDED SEMICONDUCTOR STRUCTURES FORMED USING SUCH METHODS - Methods of bonding together semiconductor structures include annealing a first metal feature on a first semiconductor structure, bonding the first metal feature to a second metal feature of a second semiconductor structure to form a bonded metal structure that comprises the first metal feature and the second metal feature, and annealing the bonded metal structure. Annealing the first metal feature may comprise subjecting the first metal feature to a pre-bonding thermal budget, and annealing the bonded metal structure may comprise subjecting the bonded metal structure to a post-bonding thermal budget that is less than the pre-bonding thermal budget. Bonded semiconductor structures are fabricated using such methods. | 2012-10-04 |
20120252163 | STACKED PACKAGE, METHOD OF FABRICATING STACKED PACKAGE, AND METHOD OF MOUNTING STACKED PACKAGE FABRICATED BY THE METHOD - Provided are a stacked package, method of fabricating a stacked package, and method of mounting a stacked package. A method includes providing an upper semiconductor package including an upper package substrate, upper semiconductor chips formed on a top surface of the upper package substrate, and first solders formed on a bottom surface of the upper package substrate and having a first melting temperature, providing a lower semiconductor package including a lower package substrate, lower semiconductor chips formed on a top surface of the lower package substrate, and solder paste nodes formed on the top surface of the lower package substrate and having a second melting temperature lower than the first melting temperature, and forming inter-package bonding units by attaching respective first solders and solder paste nodes to each other by performing annealing at a temperature higher than the second melting temperature and lower than the first melting temperature. | 2012-10-04 |
20120252164 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Provided is a method for manufacturing a semiconductor device which includes: providing a plurality of semiconductor substrates formed with through holes which penetrate between main surfaces of the substrates and are filled with porous conductors; stacking the plurality of semiconductor substrates while aligning the porous conductors filled in the through holes; introducing conductive ink containing particle-like conductors into the porous conductors of the plurality of stacked semiconductor substrates; and sintering the plurality of stacked semiconductor substrates. | 2012-10-04 |
20120252165 | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE - A method for forming a semiconductor device includes the following processes. A first semiconductor chip and a second semiconductor chip are stacked to form a stacked structure. A gap between the first and second semiconductor chips of the stacked structure is filled with a filler. A temperature of the stacked first and second semiconductor chips is kept more than room temperature from the stacking to the filing. | 2012-10-04 |
20120252166 | SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device manufacturing method is provided. First and second semiconductor chips are prepared, including first and second electrodes on first and second surfaces respectively. The second semiconductor chip includes a third electrode on a third surface opposite to the second surface. The third electrode overlaps the second electrode. The second surface includes an electrode-free region that is free of any electrode. A sealing resin is applied on the first surface of the first semiconductor chip. A second surface of the first semiconductor chip is held by a bonding tool including a pressing surface and a supporting-portion projected from the pressing surface. The pressing surface is made into contact with the second electrode. The supporting-portion is arranged at a position facing the electrode-free region. The second semiconductor chip is stacked over the first semiconductor chip by the bonding tool to electrically connect the third electrode to the first electrode. | 2012-10-04 |
20120252167 | POTTED INTEGRATED CIRCUIT DEVICE WITH ALUMINUM CASE - An integrated circuit device includes a die, a lead, and an electrically-conductive structure that is arranged to facilitate electrical communication between the die and the lead. The device also includes a potting material, in which the electrically conductive structure, the die, and at least part of the lead are embedded. An electrically-conductive housing encases the potting material and forms exterior packaging of the device. During manufacturing, the electrically-conductive structure, the die, and at least part of the lead may be arranged within the electrically-conductive housing either before or after the potting material is disposed in the housing. When the integrated circuit device is operating, heat is removable from the die via a thermal conduction path formed by the electrically-conductive structure, the potting material, and the electrically-conductive housing. | 2012-10-04 |
20120252168 | Copper Post Solder Bumps on Substrate - A method comprises forming semiconductor flip chip interconnects where the flip chip comprises a wafer and a substrate having electrical connecting pads and electrically conductive posts operatively associated with the pads and extending away from the pads to terminate in distal ends. Solder bumping the distal ends by injection molding solder onto the distal ends produces a solder bumped substrate. Another embodiment comprises providing the substrate having the posts on the pads with a mask having a plurality of through hole reservoirs and aligning the reservoirs in the mask to be substantially concentric with the distal ends. This is followed by injecting liquid solder into the reservoirs to provide a volume of liquid solder on the distal ends, cooling the liquid solder in the reservoirs to solidify the solder, removing the mask to expose the solidified solder after the cooling and thereby provide a solder bumped substrate. This is followed by positioning the solder bumped substrate on a wafer in a manner that leaves a gap between the wafer and the substrate. The wafer has electrically conductive sites on the surface for soldering to the posts. Abutting the sites and the solder bumped posts followed by heating the solder to its liquidus temperature joins the wafer and substrate, after which, the gap is optionally filled with a material comprising an underfill. | 2012-10-04 |
20120252169 | REDISTRIBUTED CHIP PACKAGING WITH THERMAL CONTACT TO DEVICE BACKSIDE - An integrated circuit assembly includes a panel including an semiconductor device at least partially surrounded by an encapsulant. A panel upper surface and a device active surface are substantially coplanar. The assembly further includes one or more interconnect layers overlying the panel upper surface. Each of the interconnect layers includes an insulating film having contacts formed therein an interconnect metallization formed thereon. A lower surface of the panel is substantially coplanar with either a backside of the device or a lower surface of a thermally and electrically conductive slab that has an upper surface in thermal contact with the device backside. The assembly may also include a set of panel vias. The panel vias are thermally and electrically conductive conduits extending through the panel between the interconnect layer and suitable for bonding with a land grid array (LGA) or other contact structure of an underlying circuit board. | 2012-10-04 |
20120252170 | PACKAGED ELECTRONIC DEVICES HAVING DIE ATTACH REGIONS WITH SELECTIVE THIN DIELECTRIC LAYER - A method for forming a packaged electronic device including a package substrate having a top substrate surface including a die attach region including at least one land pad thereon and a first dielectric layer positioned lateral to the land pad and a non-die attach region. A second dielectric layer is formed on the top substrate surface of the package substrate. An IC die which is mounted to the top substrate surface of the package substrate. An underfill layer is formed between the IC die and the die attach region. | 2012-10-04 |
20120252171 | NON-VOLATILE MEMORY AND LOGIC CIRCUIT PROCESS INTEGRATION - A method for forming an integrated circuit for a non-volatile memory cell transistor is disclosed that includes: forming a layer of discrete storage elements over a substrate in a first region of the substrate and in a second region of the substrate; forming a first layer of dielectric material over the layer of discrete storage elements in the first region and the second region; forming a first layer of barrier work function material over the first layer of dielectric material in the first region and the second region; and removing the first layer of barrier work function material from the second region, the first layer of dielectric material from the second region, and the layer of discrete storage elements from the second region. After the removing, a second layer of barrier work function material is formed over the substrate in the first region and the second region. The second layer of barrier work function material is removed from the first region. A first gate of a memory device is formed in the first region. The first gate includes a portion of the first layer of barrier work function material. The memory device includes a charge storage structure including a portion of the layer of discrete storage elements. A second gate of a transistor is formed in the second region, the second gate including a portion of the second layer of barrier work function material. | 2012-10-04 |
20120252172 | Method for producing a thyristor - In a method for producing a thyristor, first and second connection regions are formed on or above a substrate; the first connection region is doped with dopant atoms of a first conductivity type and the second connection region is doped with dopant atoms of a second conductivity type; first and second body regions are formed between the connection regions, wherein the first body region is formed between the first connection region and second body region, and the second body region is formed between the first body region and second connection region; the first body region is doped with dopant atoms of the second conductivity type and the second body region is doped with dopant atoms of the first conductivity type, wherein the dopant atoms are in each case introduced into the respective body region using a Vt implantation method; a gate region is formed on or above the body regions. | 2012-10-04 |
20120252173 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - The amount of water and hydrogen contained in an oxide semiconductor film is reduced, and oxygen is supplied sufficiently from a base film to the oxide semiconductor film in order to reduce oxygen deficiencies. A stacked base film is formed, a first heat treatment is performed, an oxide semiconductor film is formed over and in contact with the stacked base film, and a second heat treatment is performed. In the stacked base film, a first base film and a second base film are stacked in this order. The first base film is an insulating oxide film from which oxygen is released by heating. The second base film is an insulating metal oxide film. An oxygen diffusion coefficient of the second base film is smaller than that of the first base film. | 2012-10-04 |
20120252174 | PROCESS FOR FORMING AN EPITAXIAL LAYER, IN PARTICULAR ON THE SOURCE AND DRAIN REGIONS OF FULLY-DEPLETED TRANSISTORS - A layer of a semiconductor material is epitaxially grown on a single-crystal semiconductor structure and on a polycrystalline semiconductor structure. The epitaxial layer is then etched in order to preserve a non-zero thickness of said material on the single-crystal structure and a zero thickness on the polycrystalline structure. The process of growth and etch is repeated, with the same material or with a different material in each repetition, until a stack of epitaxial layers on said single-crystal structure has reached a desired thickness. The single crystal structure is preferably a source/drain region of a transistor, and the polycrystalline structure is preferably a gate of that transistor. | 2012-10-04 |
20120252175 | Stressed Source/Drain CMOS and Method for Forming Same - A complementary metal-oxide semiconductor (CMOS) structure includes a substrate and a P-type field effect transistor (FET) and an N-type FET disposed adjacent to one another on the substrate. Each FET includes a silicon-on-insulator (SOI) region, a gate electrode disposed on the SOI region, a source stressor, and a drain stressor disposed across from the source stressor relative to the gate electrode, wherein proximities of the source stressor and the drain stressor to a channel of a respective FET are substantially equal. | 2012-10-04 |
20120252176 | METHOD FOR FABRICATING A POWER TRANSISTOR - A method for fabricating a power transistor includes: (a) forming a trench in a substrate with a first electrical type; (b) diffusing second electrical type carriers into the substrate from the trench such that the substrate is formed into a first part and a second part that is diffused with the second electrical type carriers and that adjoins the trench, the first and second parts being crystal lattice continuous to each other; (c) forming a filling portion in the trench, the filling portion adjoining the second part; (d) performing a carrier-implanting process in the second part and the filling portion; and (e) forming over the substrate a gate structure that has a dielectric layer and a conductive layer. | 2012-10-04 |
20120252177 | PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATION OF A GATE EDGE DIODE - A gate-edge diode is made in a diode region of a substrate and a non-volatile memory cell is made in an NVM region of the substrate. A first dielectric layer is formed on the substrate in the diode region and the NVM region. A first conductive layer is formed on the first dielectric layer. A second dielectric layer is formed on the first conductive layer. A second conductive layer is formed over the second dielectric layer. A first mask is formed over the diode region having a first pattern. The first pattern is of a plurality of fingers and a second mask over the NVM region has a second pattern. The second pattern is of a gate stack of the non-volatile memory cell. An etch is performed through the second conductive layer, the second dielectric layer, and the first conductive layer to leave the first pattern of the plurality of fingers in the diode region and the second pattern of the gate stack in the NVM region. An implant is performed using the gate stack and the plurality of fingers as a mask to provide source/drain regions adjacent to the gate stack in the NVM region and diode terminals between the fingers in the diode region to form the gate-edge diode with the diode terminals and the substrate. | 2012-10-04 |
20120252178 | PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATION OF A CAPACITOR - A capacitor and an NVM cell are formed in an integrated fashion so that the etching of the capacitor is useful in end point detection of an etch of the NVM cell. This is achieved using two conductive layers over an NVM region and over a capacitor region. The first conductive layer is patterned in preparation for a subsequent patterning step which includes a step of patterning both the first conductive layer and the second conductive layer in both the NVM region and the capacitor region. The subsequent etch provides for an important alignment of a floating gate to the overlying control gate by having both conductive layers etched using the same mask. During this subsequent etch, the fact that first conductive material is being etched in the capacitor region helps end point detection of the etch of the first conductive layer in the NVM region. | 2012-10-04 |
20120252179 | PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATION OF A METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) - A first dielectric layer is formed on a substrate in a transistor region and an NVM region, a first conductive layer is formed on the first dielectric layer, a second dielectric layer is formed on the first conductive layer, and a second conductive layer is formed over the second dielectric layer. A patterned etch is performed to remove at least a portion of the second conductive layer in the transistor region and to expose an extension portion of the first conductive layer. A first mask is formed over the transistor region having a first pattern, wherein the first pattern is of a gate stack of the MOSFET and an extension in the extension portion extending from the gate stack, and a second mask over the NVM region having a second pattern, wherein the second pattern is of a gate stack of the NVM cell. A patterned etch is then performed. | 2012-10-04 |
20120252180 | MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - There is a problem with a CMIS semiconductor integrated circuit using a High-k Gate insulation film that, in a device region having a short channel length and a narrow channel width, with an increase of the film thickness of an Interfacial Layer IL between the High-k Gate insulation film and a silicon-based substrate by activation annealing of source/drain regions, the absolute value of the threshold voltage increases. | 2012-10-04 |
20120252181 | SEMICONDUCTOR DEVICE HAVING CAPACITOR CAPABLE OF REDUCING ADDITIONAL PROCESSES AND ITS MANUFACTURE METHOD - A first capacitor recess and a wiring trench are formed through an interlayer insulating film. A lower electrode fills the first capacitor recess, and a first wiring fills the wiring trench. An etching stopper film and a via layer insulating film are disposed over the interlayer insulating film. A first via hole extends through the via layer insulating film and etching stopper film and reaches the first wiring, and a first plug fills the first via hole. A second capacitor recess is formed through the via layer insulating film, the second capacitor recess at least partially overlapping the lower electrode, as viewed in plan. The upper electrode covers the bottom and side surfaces of the second capacitor recess. A capacitor is constituted of the upper electrode, etching stopper film and lower electrode. A second wring connected to the first plug is formed over the via layer insulating film. | 2012-10-04 |
20120252182 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME - A method of fabricating a semiconductor device includes providing a substrate including a first region and a second region, forming a first trench having a first width in the first region and a second trench having a second width in the second region, and the second width is greater than the first width. The method also includes forming a first insulation layer in the first and second trenches, removing the first insulation layer in the second trench to form a first insulation pattern that includes the first insulation layer remaining in the first trench, forming on the substrate a second insulation layer that fills the second trench, and the second insulation layer includes a different material from the first insulation layer. | 2012-10-04 |
20120252183 | METHOD FOR OBTAINING SMOOTH, CONTINUOUS SILVER FILM - A method for forming a semiconductor device including a resistive memory cell includes providing a substrate having an upper surface. A first conductive layer is formed over the upper surface of the substrate. An amorphous silicon layer is formed over the first conductive layer. A surface of the amorphous silicon layer is cleaned to remove native oxide formed on the surface of the amorphous silicon layer. A silver layer is deposited over the amorphous silicon layer after removing the native oxide by performing the cleaning step. The resistive memory cell includes the first conductive layer, the amorphous silicon layer, and the second conductive layer. The surface of the amorphous silicon layer is cleaned to prevent silver agglomeration on the native oxide. | 2012-10-04 |
20120252184 | VARIABLE RESISTANCE ELEMENT AND MANUFACTURING METHOD THEREOF - A variable resistance element comprises, when M is a transition metal element, O is oxygen, and x and y are positive numbers satisfying y>x; a lower electrode; a first oxide layer formed on the lower electrode and comprising MO | 2012-10-04 |
20120252185 | METHODS OF FORMING FINE PATTERNS IN INTEGRATED CIRCUIT DEVICES - A method of fabricating an integrated circuit device includes forming first and second mask structures on respective first and second regions of a feature layer. Each of the first and second mask structures includes a dual mask pattern and an etch mask pattern thereon having an etch selectivity relative to the dual mask pattern. The etch mask patterns of the first and second mask structures are etched to partially remove the etch mask pattern from the second mask structure. Spacers are formed on opposing sidewalls of the first and second mask structures. The first mask structure is selectively removed from between the spacers in the first region to define a first mask pattern including the opposing sidewall spacers with a void therebetween in the first region, and a second mask pattern including the opposing sidewall spacers with the second mask structure therebetween in the second region. | 2012-10-04 |
20120252186 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A semiconductor device includes a semiconductor substrate including an active area defined by an device isolation region, a buried gate formed on both side walls of a trench formed in the semiconductor substrate, and a storage node contact which is buried between the buried gates, and is connected to the active region of a middle portion of the trench and the device isolation region. | 2012-10-04 |
20120252187 | Semiconductor Device and Method of Manufacturing the Same - A method of manufacturing the semiconductor device includes sequentially forming first to third mold layer patterns on a substrate and spaced apart from each other , forming a first semiconductor pattern between the first mold layer pattern and the second mold layer pattern, and a second semiconductor pattern between the second mold layer pattern and the third mold layer pattern, forming a first trench between the first mold layer pattern and the third mold layer pattern by removing a portion of the second mold layer pattern and portions of the first and second semiconductor patterns, depositing a material for a lower electrode conformally along side and bottom surfaces of the first trench, and forming first and second lower electrodes separated from each other on the first and second semiconductor patterns, respectively, by removing a portion of the material for a lower electrode positioned on the second mold layer pattern. | 2012-10-04 |
20120252188 | PLASMA PROCESSING METHOD AND DEVICE ISOLATION METHOD - A plasma processing method for use in device isolation by shallow trench isolation in which an insulating film is embedded in a trench formed in silicon and the insulating film is planarized to form a device isolation film, the method includes a plasma nitriding the silicon of an inner wall surface of the trench by using a plasma before embedding the insulating film in the trench. The plasma nitriding is performed by using a plasma of a processing gas containing a nitrogen-containing gas under conditions in which a processing pressure ranges from 1.3 Pa to 187 Pa and a ratio of a volumetric flow rate of the nitrogen-containing gas to a volumetric flow rate of the entire processing gas ranges from 1% to 80% such that a silicon nitride film is formed on the inner wall surface of the trench to have a thickness of 1 to 10 nm. | 2012-10-04 |
20120252189 | METHODS FOR BONDING SEMICONDUCTOR STRUCTURES INVOLVING ANNEALING PROCESSES, AND BONDED SEMICONDUCTOR STRUCTURES AND INTERMEDIATE STRUCTURES FORMED USING SUCH METHODS - Methods of bonding together semiconductor structures include annealing metal of a feature on a semiconductor structure prior to directly bonding the feature to a metal feature of another semiconductor structure to form a bonded metal structure, and annealing the bonded metal structure after the bonding process. The thermal budget of the first annealing process may be at least as high as a thermal budget of a later annealing process. Additional methods involve forming a void in a metal feature, and annealing the metal feature to expand the metal of the feature into the void. Bonded semiconductor structures and intermediate structures are formed using such methods. | 2012-10-04 |
20120252190 | Plasma Spraying with Mixed Feedstock - The instant invention discloses compositions for source material for a plasma spray gun comprising a Group IV based powder, optionally, a Group IV based liquid, optionally, a gas containing Group IV based gases, optionally a dopant, and a carrier gas, optionally, inert. | 2012-10-04 |
20120252191 | GALLIUM NITRIDE SEMICONDUCTOR DEVICE ON SOI AND PROCESS FOR MAKING SAME - Methods and apparatus for producing a gallium nitride semiconductor on insulator structure include: bonding a single crystal silicon layer to a transparent substrate; and growing a single crystal gallium nitride layer on the single crystal silicon layer. | 2012-10-04 |
20120252192 | METHOD OF GROWING HETEROEPITAXIAL SINGLE CRYSTAL OR LARGE GRAINED SEMICONDUCTOR FILMS ON GLASS SUBSTRATES AND DEVICES THEREON - Inexpensive semiconductors are produced by depositing a single crystal or large grained silicon on an inexpensive substrate. These semiconductors are produced at low enough temperatures such as temperatures below the melting point of glass. Semiconductors produced are suitable for semiconductor devices such as photovoltaics or displays | 2012-10-04 |
20120252193 | DOUBLE AND TRIPLE GATE MOSFET DEVICES AND METHODS FOR MAKING SAME - A double gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a fin, a first gate and a second gate. The first gate is formed on top of the fin. The second gate surrounds the fin and the first gate. In another implementation, a triple gate MOSFET includes a fin, a first gate, a second gate, and a third gate. The first gate is formed on top of the fin. The second gate is formed adjacent the fin. The third gate is formed adjacent the fin and opposite the second gate. | 2012-10-04 |